[PATCH] D73644: [Mips] Add intrinsics for 4-byte and 8-byte MSA loads/stores.
Mirko Brkusanin via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Wed Jan 29 10:08:01 PST 2020
mbrkusanin created this revision.
mbrkusanin added reviewers: atanasyan, petarj, sdardis, mstojanovic.
mbrkusanin added projects: LLVM, clang.
Herald added subscribers: cfe-commits, jrtc27, hiraditya, arichardson.
New intrinisics are implemented for when we need to port SIMD code from other
arhitectures and only load or store portions of MSA registers.
Following intriniscs are added which only load/store element 0 of a vector:
v4i32 __builtin_msa_ldrq_w (const void *, imm_n2048_2044);
v2i64 __builtin_msa_ldr_d (const void *, imm_n4096_4088);
void __builtin_msa_strq_w (v4i32, void *, imm_n2048_2044);
void __builtin_msa_str_d (v2i64, void *, imm_n4096_4088);
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D73644
Files:
clang/include/clang/Basic/BuiltinsMips.def
clang/lib/Headers/msa.h
clang/lib/Sema/SemaChecking.cpp
llvm/include/llvm/IR/IntrinsicsMips.td
llvm/lib/Target/Mips/MipsISelLowering.cpp
llvm/lib/Target/Mips/MipsISelLowering.h
llvm/lib/Target/Mips/MipsMSAInstrInfo.td
llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
llvm/test/CodeGen/Mips/msa/ldr_str.ll
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