[PATCH] D72932: [ARM] Follow AACPS standard for volatile bit-fields access width
Diogo N. Sampaio via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Wed Jan 22 01:45:34 PST 2020
dnsampaio added a comment.
In D72932#1829716 <https://reviews.llvm.org/D72932#1829716>, @ostannard wrote:
> Why are you doing this in CodeGen, rather than adjusting the existing layout code in CGRecordLowering? Doing it this way will result in AdjustAAPCSBitfieldLValue being called for every access to the bitfield, rather than just once. This is probably more fragile too, because it's spreading the logic across multiple parts of the codebase, and has to undo some of the layout done by CGRecordLowering.
@olista01 Indeed, after looking at the `CGRecordLayout` I am not kind for doing this change. It will require changing all possible initialization, with a sensible value, and add a special getAddress function that would consider if an access is volatile. I don't believe that volatile accesses are that frequent that this would pose much of an overhead, perhaps we can leave it as a todo to move it there?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D72932/new/
https://reviews.llvm.org/D72932
More information about the cfe-commits
mailing list