[PATCH] D72959: Relative VTables ABI on Fuchsia

[Peter Collingbourne via Phabricator via cfe-commits]

pcc added a subscriber: peter.smith.
pcc added a comment.

> On Aarch64, right now only CALL26 and JUMP26 instructions generate PLT relocations, so we manifest them with stubs that are just jumps to the original function.

I think it would be worth considering defining a new relocation type for this. I think we should make the new reloc type represent the relative address shifted right by 2, which would allow it to be used freely in the aarch64 small code model (which permits programs up to 4GB), but would require the target to be 4-byte aligned, which seems like a reasonable restriction. On aarch64, decoding this would not require any additional instructions either (we can fold the lsl into the add). We could use the same technique for a new GOTPCREL relocation to be used for the RTTI component. @peter.smith what do you think?


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  https://reviews.llvm.org/D72959/new/

https://reviews.llvm.org/D72959