[PATCH] D72932: [ARM] Follow AACPS standard for volatile bit-fields access width

[Diogo N. Sampaio via Phabricator via cfe-commits]

dnsampaio added a comment.

In D72932#1829716 <https://reviews.llvm.org/D72932#1829716>, @ostannard wrote:

> Why are you doing this in CodeGen, rather than adjusting the existing layout code in CGRecordLowering? Doing it this way will result in AdjustAAPCSBitfieldLValue being called for every access to the bit-field, rather than just once. This is probably more fragile too, because it's spreading the logic across multiple parts of the codebase, and has to undo some of the layout done by CGRecordLowering.


Only at CodeGen we definitely know if an access is volatile, due casts to volatile.
About undoing what the CGRecordLowering does, that can't be avoided. We only can compute if a given offset and width will touch outside the bit-field when all fields and padding are defined.
We could add special volatile access fields into CGBitFieldInfo and compute them at the end for CGRecordLowering::lower, but these fields would only be relevant to ARM. And they will need to be computed even if there are any volatile accesses.
I have no strong opinion about which is better, I can add the fields if that suites better.


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