[clang] b10a0eb - [ARM][MVE][Intrinsics] Take abs() of VMINNMAQ, VMAXNMAQ intrinsics' first arguments.
Mark Murray via cfe-commits
cfe-commits at lists.llvm.org
Mon Jan 20 06:37:11 PST 2020
Author: Mark Murray
Date: 2020-01-20T14:33:26Z
New Revision: b10a0eb04adfc4186cc6198cf8231358b2b04d89
URL: https://github.com/llvm/llvm-project/commit/b10a0eb04adfc4186cc6198cf8231358b2b04d89
DIFF: https://github.com/llvm/llvm-project/commit/b10a0eb04adfc4186cc6198cf8231358b2b04d89.diff
LOG: [ARM][MVE][Intrinsics] Take abs() of VMINNMAQ, VMAXNMAQ intrinsics' first arguments.
Summary: Fix VMINNMAQ, VMAXNMAQ intrinsics; BOTH arguments have the absolute values taken.
Reviewers: dmgreen, simon_tatham
Subscribers: kristof.beyls, hiraditya, cfe-commits, llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D72830
Added:
Modified:
clang/include/clang/Basic/arm_mve.td
clang/test/CodeGen/arm-mve-intrinsics/vmaxnmaq.c
clang/test/CodeGen/arm-mve-intrinsics/vminnmaq.c
llvm/lib/Target/ARM/ARMInstrMVE.td
llvm/test/CodeGen/Thumb2/mve-intrinsics/vmaxnmaq.ll
llvm/test/CodeGen/Thumb2/mve-intrinsics/vminnmaq.ll
Removed:
################################################################################
diff --git a/clang/include/clang/Basic/arm_mve.td b/clang/include/clang/Basic/arm_mve.td
index a348713b2aa3..d28f97390614 100644
--- a/clang/include/clang/Basic/arm_mve.td
+++ b/clang/include/clang/Basic/arm_mve.td
@@ -307,10 +307,12 @@ let params = T.Float in {
(IRIntBase<"maxnum", [Vector]> $a, $b)>;
def vminnmaq: Intrinsic<Vector, (args Vector:$a, Vector:$b),
(IRIntBase<"minnum", [Vector]>
- $a, (IRIntBase<"fabs", [Vector]> $b))>;
+ (IRIntBase<"fabs", [Vector]> $a),
+ (IRIntBase<"fabs", [Vector]> $b))>;
def vmaxnmaq: Intrinsic<Vector, (args Vector:$a, Vector:$b),
(IRIntBase<"maxnum", [Vector]>
- $a, (IRIntBase<"fabs", [Vector]> $b))>;
+ (IRIntBase<"fabs", [Vector]> $a),
+ (IRIntBase<"fabs", [Vector]> $b))>;
}
def vpselq: Intrinsic<Vector, (args Vector:$t, Vector:$f, Predicate:$pred),
diff --git a/clang/test/CodeGen/arm-mve-intrinsics/vmaxnmaq.c b/clang/test/CodeGen/arm-mve-intrinsics/vmaxnmaq.c
index ae963e2c9990..b7e85ff2a584 100644
--- a/clang/test/CodeGen/arm-mve-intrinsics/vmaxnmaq.c
+++ b/clang/test/CodeGen/arm-mve-intrinsics/vmaxnmaq.c
@@ -6,9 +6,10 @@
// CHECK-LABEL: @test_vmaxnmaq_f16(
// CHECK-NEXT: entry:
-// CHECK-NEXT: [[TMP0:%.*]] = tail call <8 x half> @llvm.fabs.v8f16(<8 x half> [[B:%.*]])
-// CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x half> @llvm.maxnum.v8f16(<8 x half> [[A:%.*]], <8 x half> [[TMP0]])
-// CHECK-NEXT: ret <8 x half> [[TMP1]]
+// CHECK-NEXT: [[TMP0:%.*]] = tail call <8 x half> @llvm.fabs.v8f16(<8 x half> [[A:%.*]])
+// CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x half> @llvm.fabs.v8f16(<8 x half> [[B:%.*]])
+// CHECK-NEXT: [[TMP2:%.*]] = tail call <8 x half> @llvm.maxnum.v8f16(<8 x half> [[TMP0]], <8 x half> [[TMP1]])
+// CHECK-NEXT: ret <8 x half> [[TMP2]]
//
float16x8_t test_vmaxnmaq_f16(float16x8_t a, float16x8_t b)
{
@@ -21,9 +22,10 @@ float16x8_t test_vmaxnmaq_f16(float16x8_t a, float16x8_t b)
// CHECK-LABEL: @test_vmaxnmaq_f32(
// CHECK-NEXT: entry:
-// CHECK-NEXT: [[TMP0:%.*]] = tail call <4 x float> @llvm.fabs.v4f32(<4 x float> [[B:%.*]])
-// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.maxnum.v4f32(<4 x float> [[A:%.*]], <4 x float> [[TMP0]])
-// CHECK-NEXT: ret <4 x float> [[TMP1]]
+// CHECK-NEXT: [[TMP0:%.*]] = tail call <4 x float> @llvm.fabs.v4f32(<4 x float> [[A:%.*]])
+// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.fabs.v4f32(<4 x float> [[B:%.*]])
+// CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.maxnum.v4f32(<4 x float> [[TMP0]], <4 x float> [[TMP1]])
+// CHECK-NEXT: ret <4 x float> [[TMP2]]
//
float32x4_t test_vmaxnmaq_f32(float32x4_t a, float32x4_t b)
{
diff --git a/clang/test/CodeGen/arm-mve-intrinsics/vminnmaq.c b/clang/test/CodeGen/arm-mve-intrinsics/vminnmaq.c
index e16ede06f691..955e8feab52a 100644
--- a/clang/test/CodeGen/arm-mve-intrinsics/vminnmaq.c
+++ b/clang/test/CodeGen/arm-mve-intrinsics/vminnmaq.c
@@ -6,9 +6,10 @@
// CHECK-LABEL: @test_vminnmaq_f16(
// CHECK-NEXT: entry:
-// CHECK-NEXT: [[TMP0:%.*]] = tail call <8 x half> @llvm.fabs.v8f16(<8 x half> [[B:%.*]])
-// CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x half> @llvm.minnum.v8f16(<8 x half> [[A:%.*]], <8 x half> [[TMP0]])
-// CHECK-NEXT: ret <8 x half> [[TMP1]]
+// CHECK-NEXT: [[TMP0:%.*]] = tail call <8 x half> @llvm.fabs.v8f16(<8 x half> [[A:%.*]])
+// CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x half> @llvm.fabs.v8f16(<8 x half> [[B:%.*]])
+// CHECK-NEXT: [[TMP2:%.*]] = tail call <8 x half> @llvm.minnum.v8f16(<8 x half> [[TMP0]], <8 x half> [[TMP1]])
+// CHECK-NEXT: ret <8 x half> [[TMP2]]
//
float16x8_t test_vminnmaq_f16(float16x8_t a, float16x8_t b)
{
@@ -21,9 +22,10 @@ float16x8_t test_vminnmaq_f16(float16x8_t a, float16x8_t b)
// CHECK-LABEL: @test_vminnmaq_f32(
// CHECK-NEXT: entry:
-// CHECK-NEXT: [[TMP0:%.*]] = tail call <4 x float> @llvm.fabs.v4f32(<4 x float> [[B:%.*]])
-// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.minnum.v4f32(<4 x float> [[A:%.*]], <4 x float> [[TMP0]])
-// CHECK-NEXT: ret <4 x float> [[TMP1]]
+// CHECK-NEXT: [[TMP0:%.*]] = tail call <4 x float> @llvm.fabs.v4f32(<4 x float> [[A:%.*]])
+// CHECK-NEXT: [[TMP1:%.*]] = tail call <4 x float> @llvm.fabs.v4f32(<4 x float> [[B:%.*]])
+// CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x float> @llvm.minnum.v4f32(<4 x float> [[TMP0]], <4 x float> [[TMP1]])
+// CHECK-NEXT: ret <4 x float> [[TMP2]]
//
float32x4_t test_vminnmaq_f32(float32x4_t a, float32x4_t b)
{
diff --git a/llvm/lib/Target/ARM/ARMInstrMVE.td b/llvm/lib/Target/ARM/ARMInstrMVE.td
index 70f1d75bc439..1cccad214e55 100644
--- a/llvm/lib/Target/ARM/ARMInstrMVE.td
+++ b/llvm/lib/Target/ARM/ARMInstrMVE.td
@@ -3655,7 +3655,8 @@ multiclass MVE_VMAXMINNMA_m<string iname, MVEVectorVTInfo VTI,
let Predicates = [HasMVEInt] in {
// Unpredicated v(max|min)nma
- def : Pat<(VTI.Vec (unpred_op (VTI.Vec MQPR:$Qd), (fabs (VTI.Vec MQPR:$Qm)))),
+ def : Pat<(VTI.Vec (unpred_op (fabs (VTI.Vec MQPR:$Qd)),
+ (fabs (VTI.Vec MQPR:$Qm)))),
(VTI.Vec (Inst (VTI.Vec MQPR:$Qd), (VTI.Vec MQPR:$Qm)))>;
// Predicated v(max|min)nma
diff --git a/llvm/test/CodeGen/Thumb2/mve-intrinsics/vmaxnmaq.ll b/llvm/test/CodeGen/Thumb2/mve-intrinsics/vmaxnmaq.ll
index df0367eba2cf..0f412cab6d11 100644
--- a/llvm/test/CodeGen/Thumb2/mve-intrinsics/vmaxnmaq.ll
+++ b/llvm/test/CodeGen/Thumb2/mve-intrinsics/vmaxnmaq.ll
@@ -7,9 +7,10 @@ define arm_aapcs_vfpcc <8 x half> @test_vmaxnmaq_f16(<8 x half> %a, <8 x half> %
; CHECK-NEXT: vmaxnma.f16 q0, q1
; CHECK-NEXT: bx lr
entry:
- %0 = tail call <8 x half> @llvm.fabs.v8f16(<8 x half> %b)
- %1 = tail call <8 x half> @llvm.maxnum.v8f16(<8 x half> %a, <8 x half> %0)
- ret <8 x half> %1
+ %0 = tail call <8 x half> @llvm.fabs.v8f16(<8 x half> %a)
+ %1 = tail call <8 x half> @llvm.fabs.v8f16(<8 x half> %b)
+ %2 = tail call <8 x half> @llvm.maxnum.v8f16(<8 x half> %0, <8 x half> %1)
+ ret <8 x half> %2
}
declare <8 x half> @llvm.fabs.v8f16(<8 x half>) #1
@@ -22,9 +23,10 @@ define arm_aapcs_vfpcc <4 x float> @test_vmaxnmaq_f32(<4 x float> %a, <4 x float
; CHECK-NEXT: vmaxnma.f32 q0, q1
; CHECK-NEXT: bx lr
entry:
- %0 = tail call <4 x float> @llvm.fabs.v4f32(<4 x float> %b)
- %1 = tail call <4 x float> @llvm.maxnum.v4f32(<4 x float> %a, <4 x float> %0)
- ret <4 x float> %1
+ %0 = tail call <4 x float> @llvm.fabs.v4f32(<4 x float> %a)
+ %1 = tail call <4 x float> @llvm.fabs.v4f32(<4 x float> %b)
+ %2 = tail call <4 x float> @llvm.maxnum.v4f32(<4 x float> %0, <4 x float> %1)
+ ret <4 x float> %2
}
declare <4 x float> @llvm.fabs.v4f32(<4 x float>) #1
diff --git a/llvm/test/CodeGen/Thumb2/mve-intrinsics/vminnmaq.ll b/llvm/test/CodeGen/Thumb2/mve-intrinsics/vminnmaq.ll
index dec0d9e9d383..cff73c8bb2db 100644
--- a/llvm/test/CodeGen/Thumb2/mve-intrinsics/vminnmaq.ll
+++ b/llvm/test/CodeGen/Thumb2/mve-intrinsics/vminnmaq.ll
@@ -7,9 +7,10 @@ define arm_aapcs_vfpcc <8 x half> @test_vminnmaq_f16(<8 x half> %a, <8 x half> %
; CHECK-NEXT: vminnma.f16 q0, q1
; CHECK-NEXT: bx lr
entry:
- %0 = tail call <8 x half> @llvm.fabs.v8f16(<8 x half> %b)
- %1 = tail call <8 x half> @llvm.minnum.v8f16(<8 x half> %a, <8 x half> %0)
- ret <8 x half> %1
+ %0 = tail call <8 x half> @llvm.fabs.v8f16(<8 x half> %a)
+ %1 = tail call <8 x half> @llvm.fabs.v8f16(<8 x half> %b)
+ %2 = tail call <8 x half> @llvm.minnum.v8f16(<8 x half> %0, <8 x half> %1)
+ ret <8 x half> %2
}
declare <8 x half> @llvm.fabs.v8f16(<8 x half>) #1
@@ -22,9 +23,10 @@ define arm_aapcs_vfpcc <4 x float> @test_vminnmaq_f32(<4 x float> %a, <4 x float
; CHECK-NEXT: vminnma.f32 q0, q1
; CHECK-NEXT: bx lr
entry:
- %0 = tail call <4 x float> @llvm.fabs.v4f32(<4 x float> %b)
- %1 = tail call <4 x float> @llvm.minnum.v4f32(<4 x float> %a, <4 x float> %0)
- ret <4 x float> %1
+ %0 = tail call <4 x float> @llvm.fabs.v4f32(<4 x float> %a)
+ %1 = tail call <4 x float> @llvm.fabs.v4f32(<4 x float> %b)
+ %2 = tail call <4 x float> @llvm.minnum.v4f32(<4 x float> %0, <4 x float> %1)
+ ret <4 x float> %2
}
declare <4 x float> @llvm.fabs.v4f32(<4 x float>) #1
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