[PATCH] D72612: [AArch64][SVE] Add ImmArg property to intrinsics with immediates

[Sander de Smalen via Phabricator via cfe-commits]

sdesmalen added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64InstrFormats.td:1099
+class AsmVectorIndexOpnd<ValueType ty, AsmOperandClass mc, int Val>
+    : Operand<ty>, ComplexPattern<ty, 1, "SelectVectorIndex<" # Val # ">", []> {
   let ParserMatchClass = mc;
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@efriedma  @rengolin The idea here is to use a ComplexPattern to match either a TargetConstant or a Constant (as at this point in selectiondag, it probably no longer matters what kind of constant it is, as we want to match an instruction). This avoids having to duplicate patternfragments for TImmLeaf and ImmLeaf for all the operands deriving from AsmVectorIndexOpnd.

Any thoughts on this approach?


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Comment at: llvm/lib/Target/AArch64/SVEInstrFormats.td:4386
 
-  def : SVE_3_Op_Imm_Pat<nxv16i8, op, nxv16i1, nxv16i8, i32, vecshiftR8,  !cast<Instruction>(NAME # _B)>;
-  def : SVE_3_Op_Imm_Pat<nxv8i16, op, nxv8i1,  nxv8i16, i32, vecshiftR16, !cast<Instruction>(NAME # _H)>;
-  def : SVE_3_Op_Imm_Pat<nxv4i32, op, nxv4i1,  nxv4i32, i32, vecshiftR32, !cast<Instruction>(NAME # _S)>;
-  def : SVE_3_Op_Imm_Pat<nxv2i64, op, nxv2i1,  nxv2i64, i32, vecshiftR64, !cast<Instruction>(NAME # _D)>;
+  def : SVE_3_Op_Cpx_Imm_Pat<nxv16i8, op, nxv16i1, nxv16i8, shiftimm8,  vecshiftR8,  !cast<Instruction>(NAME # _B)>;
+  def : SVE_3_Op_Cpx_Imm_Pat<nxv8i16, op, nxv8i1,  nxv8i16, shiftimm16, vecshiftR16, !cast<Instruction>(NAME # _H)>;
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I think these can just as well use `tvecshiftR8`, `tvecshiftR16`, (etc) as those already exist.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D72612/new/

https://reviews.llvm.org/D72612