[PATCH] D68720: Support -fstack-clash-protection for x86

Craig Topper via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Mon Jan 6 10:54:01 PST 2020


craig.topper added inline comments.


================
Comment at: clang/docs/ClangCommandLineReference.rst:1903
 
+.. option:: -fstack-clash-protection
+
----------------
Probably need a -fno-stack-class-protection as well. Looks like gcc has it. You'll need to update the handling in the driver to make sure the last polarity wins. For cc1 you might be able to support just the positive variant. But try to see what we usually do.


================
Comment at: clang/lib/Basic/Targets/X86.h:152
 
+  const char *getSPRegName() const override { return "rsp"; }
+
----------------
What about 32-bit mode where the register name is "esp"?


================
Comment at: clang/lib/CodeGen/CGStmt.cpp:2254
+        CGM.getDiags().Report(S.getAsmLoc(),
+                              diag::warn_fe_stack_clash_protection_inline_asm);
+      }
----------------
Why is this in the frontend diagnostic list?


================
Comment at: clang/lib/Driver/ToolChains/Clang.cpp:2573
+
+  switch (EffectiveTriple.getArch()) {
+  default:
----------------
Can we use EffectiveTriple.isX86() that was just introduced yesterday?


================
Comment at: clang/lib/Driver/ToolChains/Clang.cpp:2582
+  for (const Arg *A : Args) {
+    switch (A->getOption().getID()) {
+    default:
----------------
Seems like this should just be an if? Or maybe use Args.filtered or args getLastArg?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D68720/new/

https://reviews.llvm.org/D68720





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