[PATCH] D71556: [AArch64][SVE] Implement intrinsic for non-faulting loads

[Sander de Smalen via Phabricator via cfe-commits]

sdesmalen added a comment.

In D71556#1786465 <https://reviews.llvm.org/D71556#1786465>, @efriedma wrote:

> I'm not sure it's legal to transform a non-faulting load to a load with a non-faulting flag?  At least, we'd need to consider the implications of that very carefully.  In particular, I'm concerned about the interaction with intrinsics that read/write FFR.  I mean, you could specify that loads marked MONonFaulting actually write to the FFR register, but that seems confusing.
>
> It seems simpler to preserve the intrinsic until isel, at least for now.


I missed this comment earlier, but that's a valid point. For SVE having side-effects is assumed from the non-faulting flag. We hoped to latch on to the MLOAD here to reuse code and benefit from legalization in case we want to add a more generic mechanism in the future to use such loads directly in the loop-vectorizer.

Perhaps we can clarify the intent that the non-faulting mode may have side-effects by renaming the flag to something like `NonFaultingWithSideEffects`? Otherwise we can stick with the intrinsics as you suggest.


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