[PATCH] D71556: [AArch64][SVE] Implement intrinsic for non-faulting loads
Eli Friedman via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Mon Dec 16 12:43:59 PST 2019
efriedma added a comment.
I'm not sure it's legal to transform a non-faulting load to a load with a non-faulting flag? At least, we'd need to consider the implications of that very carefully. In particular, I'm concerned about the interaction with intrinsics that read/write FFR. I mean, you could specify that loads marked MONonFaulting actually write to the FFR register, but that seems confusing.
It seems simpler to preserve the intrinsic until isel, at least for now.
================
Comment at: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:4490
+ return getConstant(Val.zextOrTrunc(VT.getScalarSizeInBits()), DL, VT,
+ C->isTargetOpcode(), C->isOpaque());
+ case ISD::SIGN_EXTEND:
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I'm not sure how this is related.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D71556/new/
https://reviews.llvm.org/D71556
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