[PATCH] D71000: [AArch64][SVE] Implement intrinsics for non-temporal loads & stores
Kerry McLaughlin via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Mon Dec 9 08:43:03 PST 2019
kmclaughlin updated this revision to Diff 232870.
kmclaughlin added a comment.
- Set 'Size' to MemoryLocation::UnknownSize for scalable vectors in getMemIntrinsicNode
- Ensure MLOAD zeroes inactive lanes by using a zero value for the PassThru in getMaskedLoad
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D71000/new/
https://reviews.llvm.org/D71000
Files:
llvm/include/llvm/IR/IntrinsicsAArch64.td
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/lib/Target/AArch64/AArch64InstrInfo.td
llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
llvm/test/CodeGen/AArch64/sve-intrinsics-loads.ll
llvm/test/CodeGen/AArch64/sve-intrinsics-stores.ll
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