[PATCH] D71000: [AArch64][SVE] Implement intrinsics for non-temporal loads & stores

[Eli Friedman via Phabricator via cfe-commits]

efriedma added inline comments.


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Comment at: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:6587
+  else if (!Size)
+    Size = MemVT.getStoreSize().getKnownMinSize();
 
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In order for alias analysis to correctly handle a MachineMemOperand, the "Size" of an operation has to be conservative, in the sense that the the number of bytes accessed must be at most "Size". Otherwise we'll assume two operations don't alias when they actually do.

For a scaled vector, we don't know the size, so we have to conservatively pass "MemoryLocation::UnknownSize".


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D71000/new/

https://reviews.llvm.org/D71000