[PATCH] D68362: [libunwind][RISCV] Add 64-bit RISC-V support

[Hafiz Abid Qadeer via Phabricator via cfe-commits]

abidh added inline comments.


================
Comment at: libunwind/src/Registers.hpp:3765
+inline void Registers_riscv::setFloatRegister(int regNum, double value) {
+#ifdef __riscv_flen == 64
+  assert(validFloatRegister(regNum));
----------------
I am building these changes and get the following warning.
warning: extra tokens at end of #ifdef directive [-Wextra-tokens]

You probably meant #if here.


================
Comment at: libunwind/src/UnwindRegistersRestore.S:1042
+DEFINE_LIBUNWIND_FUNCTION(_ZN9libunwind15Registers_riscv6jumptoEv)
+#if __riscv_flen == 64
+  fld    f0, (8 * 32 + 8 * 0)(a0)
----------------
This line generates the following warning when compiled without 'd' extension.

warning: '__riscv_flen' is not defined, evaluates to 0 [-Wundef]

Probably better to make it something like
#if defined(__riscv_flen) && __riscv_flen == 64


================
Comment at: libunwind/src/UnwindRegistersSave.S:1020
+
+#if __riscv_flen == 64
+  fsd    f0, (8 * 32 + 8 * 0)(a0)
----------------
Similar problem here as described above.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D68362/new/

https://reviews.llvm.org/D68362