[PATCH] D68862: [ARM] Allocatable Global Register Variables for ARM

[Eli Friedman via Phabricator via cfe-commits]

efriedma added a comment.

Approval is not ever a time-based process; someone appropriate actually has to do the work of reviewing the patch.  If a patch doesn't get reviewed, you "ping" it a couple times, to note that you're waiting for a review.  If it still isn't reviewed at that point, and you're not sure what to do, send an email to cfe-dev.

In this case, it was on me to review; I apologize for not looking at this earlier.



================
Comment at: llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp:438
+  if (STI.isGPRegisterReserved(BasePtr - ARM::R0))
+    return false;
   // We may also need a base pointer if there are dynamic allocas or stack
----------------
I'm a little concerned about this... what happens if r6 is reserved, and the code uses a construct which LLVM implements using a base pointer?  For example:

```
void f(void a(char*, char*), int n) {
  char r[n];
  char r2[16] __attribute((aligned(16)));
  a(r, r2);
}
```

(There are potentially other ways to implement this construct.  But I'm pretty sure using a base pointer is the only method which is currently implemented.)


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D68862/new/

https://reviews.llvm.org/D68862