[PATCH] D69250: [ARM][AArch64] Implement __cls and __clsl intrinsics from ACLE
Victor Campos via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Mon Oct 21 05:02:51 PDT 2019
vhscampos created this revision.
Herald added subscribers: llvm-commits, cfe-commits, hiraditya, kristof.beyls.
Herald added projects: clang, LLVM.
Writing support for two ACLE functions:
unsigned int __cls(uint32_t x)
unsigned int __clsl(unsigned long x)
CLS stands for "Count number of leading sign bits".
In AArch64, these two intrinsics can be translated into the 'cls'
instruction directly. In AArch32, on the other hand, this functionality
is achieved by implementing it in terms of clz (count number of leading
zeros).
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D69250
Files:
clang/include/clang/Basic/BuiltinsAArch64.def
clang/include/clang/Basic/BuiltinsARM.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/Headers/arm_acle.h
clang/test/CodeGen/builtins-arm.c
clang/test/CodeGen/builtins-arm64.c
llvm/include/llvm/IR/IntrinsicsAArch64.td
llvm/include/llvm/IR/IntrinsicsARM.td
llvm/lib/Target/AArch64/AArch64InstrInfo.td
llvm/lib/Target/ARM/ARMISelLowering.cpp
llvm/test/CodeGen/AArch64/cls.ll
llvm/test/CodeGen/ARM/cls.ll
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