[PATCH] D67399: [ARM] Follow AACPS standard for volatile bitfields

JF Bastien via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Fri Sep 13 08:48:07 PDT 2019


jfb added a comment.

In D67399#1669038 <https://reviews.llvm.org/D67399#1669038>, @dnsampaio wrote:

> Indeed our main concern is regarding the access widths of loads. As mentioned by @rjmccall, most volatile bitfields are used to perform memory mapped I/O, and some hardware only support them with a specific access width.
>  The spurious load I am more than glad to leave it disable behind a command flag, so it will only appear if the user requests it. See that volatile accesses might have side effects, and for example, an I/O read counter holding an odd number could define that the data is still being processed.


Are the cases being addressed in the PR actually relevant to real MMIO, or is this patch following the letter of AAPCS which doesn't actually matter?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D67399/new/

https://reviews.llvm.org/D67399





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