[PATCH] D67425: [WebAssembly] Narrowing and widening SIMD ops

[Heejin Ahn via Phabricator via cfe-commits]

aheejin accepted this revision.
aheejin added a comment.
This revision is now accepted and ready to land.

LGTM.

- Maybe we can lower these <https://github.com/llvm/llvm-project/blob/87baae85cdee84b43986f1d8d0fac469c7e9521b/llvm/include/llvm/CodeGen/ISDOpcodes.h#L494-L550> to these new instructions later? (I'm not very sure what the difference between versions with and without `VECTOR`, because the versions without `VECTOR` seem to be able to take vector arguments as well.)
- Will this simplify the complicated lowering of `SIGN_EXTEND_INREG` <https://github.com/llvm/llvm-project/blob/87baae85cdee84b43986f1d8d0fac469c7e9521b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp#L1241-L1279>?


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https://reviews.llvm.org/D67425