[PATCH] D66524: [SVE][Inline-Asm] Add constraints for SVE predicate registers

[Kerry McLaughlin via Phabricator via cfe-commits]

kmclaughlin marked 3 inline comments as done.
kmclaughlin added inline comments.


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Comment at: docs/LangRef.rst:3818
+- ``Upl``: One of the low eight SVE predicate registers (P0 to P7)
+- ``Upa``: Any of the SVE predicate registers (P0 to P15)
 
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greened wrote:
> What do these names mean?  "<something> predicate lower|all?"  I see they are the names used in gcc, so I guess it makes sense to use them here.  Are these names used in the SVE architecture manual somewhere?  I cannot find them.
The length of the constraint depends on the first letter, and for AArch64 'U' was chosen to indicate a 3-letter constraint. These are not in the SVE architecture manual as they are only for compatibility with GCC inline asm (see https://gcc.gnu.org/onlinedocs/gcc/Machine-Constraints.html#Machine-Constraints)


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Comment at: lib/Target/AArch64/AArch64ISelLowering.cpp:5747
+
+PredicateConstraint isPredicateConstraint(StringRef Constraint) {
+  PredicateConstraint P = PredicateConstraint::Invalid;
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greened wrote:
> rovka wrote:
> > Nit: I think get- or parsePredicateConstraint reads better, since this doesn't return a simple yes/no answer.
> +1.
Thanks for the suggestion @rovka - I have changed this to parsePredicateConstraint


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