r370393 - [X86] Remove what little support we had for MPX

Craig Topper via cfe-commits cfe-commits at lists.llvm.org
Thu Aug 29 11:09:02 PDT 2019


Author: ctopper
Date: Thu Aug 29 11:09:02 2019
New Revision: 370393

URL: http://llvm.org/viewvc/llvm-project?rev=370393&view=rev
Log:
[X86] Remove what little support we had for MPX

-Deprecate -mmpx and -mno-mpx command line options
-Remove CPUID detection of mpx for -march=native
-Remove MPX from all CPUs
-Remove MPX preprocessor define

I've left the "mpx" string in the backend so we don't fail on old IR, but its not connected to anything.

gcc has also deprecated these command line options. https://www.phoronix.com/scan.php?page=news_item&px=GCC-Patch-To-Drop-MPX

Differential Revision: https://reviews.llvm.org/D66669

Modified:
    cfe/trunk/docs/ReleaseNotes.rst
    cfe/trunk/include/clang/Driver/Options.td
    cfe/trunk/lib/Basic/Targets/X86.cpp
    cfe/trunk/lib/Basic/Targets/X86.h
    cfe/trunk/test/Driver/x86-target-features.c
    cfe/trunk/test/Preprocessor/predefined-arch-macros.c

Modified: cfe/trunk/docs/ReleaseNotes.rst
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/docs/ReleaseNotes.rst?rev=370393&r1=370392&r2=370393&view=diff
==============================================================================
--- cfe/trunk/docs/ReleaseNotes.rst (original)
+++ cfe/trunk/docs/ReleaseNotes.rst Thu Aug 29 11:09:02 2019
@@ -70,6 +70,10 @@ Deprecated Compiler Flags
 The following options are deprecated and ignored. They will be removed in
 future versions of Clang.
 
+- -mmpx used to enable the __MPX__ preprocessor define for the Intel MPX
+  instructions. There were no MPX intrinsics.
+- -mno-mpx used to disable -mmpx and is the default behavior.
+
 - ...
 
 Modified Compiler Flags

Modified: cfe/trunk/include/clang/Driver/Options.td
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Driver/Options.td?rev=370393&r1=370392&r2=370393&view=diff
==============================================================================
--- cfe/trunk/include/clang/Driver/Options.td (original)
+++ cfe/trunk/include/clang/Driver/Options.td Thu Aug 29 11:09:02 2019
@@ -211,6 +211,10 @@ def clang_ignored_legacy_options_Group :
 def : Flag<["-"], "fslp-vectorize-aggressive">, Group<clang_ignored_legacy_options_Group>;
 def : Flag<["-"], "fno-slp-vectorize-aggressive">, Group<clang_ignored_legacy_options_Group>;
 
+// Retired with clang-10.0. Previously controlled X86 MPX ISA.
+def mmpx : Flag<["-"], "mmpx">, Group<clang_ignored_legacy_options_Group>;
+def mno_mpx : Flag<["-"], "mno-mpx">, Group<clang_ignored_legacy_options_Group>;
+
 // Group that ignores all gcc optimizations that won't be implemented
 def clang_ignored_gcc_optimization_f_Group : OptionGroup<
   "<clang_ignored_gcc_optimization_f_Group>">, Group<f_Group>, Flags<[Ignored]>;
@@ -3000,8 +3004,6 @@ def mmovdiri : Flag<["-"], "mmovdiri">,
 def mno_movdiri : Flag<["-"], "mno-movdiri">, Group<m_x86_Features_Group>;
 def mmovdir64b : Flag<["-"], "mmovdir64b">, Group<m_x86_Features_Group>;
 def mno_movdir64b : Flag<["-"], "mno-movdir64b">, Group<m_x86_Features_Group>;
-def mmpx : Flag<["-"], "mmpx">, Group<m_x86_Features_Group>;
-def mno_mpx : Flag<["-"], "mno-mpx">, Group<m_x86_Features_Group>;
 def mmwaitx : Flag<["-"], "mmwaitx">, Group<m_x86_Features_Group>;
 def mno_mwaitx : Flag<["-"], "mno-mwaitx">, Group<m_x86_Features_Group>;
 def mpku : Flag<["-"], "mpku">, Group<m_x86_Features_Group>;

Modified: cfe/trunk/lib/Basic/Targets/X86.cpp
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets/X86.cpp?rev=370393&r1=370392&r2=370393&view=diff
==============================================================================
--- cfe/trunk/lib/Basic/Targets/X86.cpp (original)
+++ cfe/trunk/lib/Basic/Targets/X86.cpp Thu Aug 29 11:09:02 2019
@@ -198,7 +198,6 @@ IcelakeCommon:
 SkylakeCommon:
     setFeatureEnabledImpl(Features, "xsavec", true);
     setFeatureEnabledImpl(Features, "xsaves", true);
-    setFeatureEnabledImpl(Features, "mpx", true);
     setFeatureEnabledImpl(Features, "clflushopt", true);
     setFeatureEnabledImpl(Features, "aes", true);
     LLVM_FALLTHROUGH;
@@ -277,7 +276,6 @@ SkylakeCommon:
     setFeatureEnabledImpl(Features, "xsavec", true);
     setFeatureEnabledImpl(Features, "xsaves", true);
     setFeatureEnabledImpl(Features, "clflushopt", true);
-    setFeatureEnabledImpl(Features, "mpx", true);
     setFeatureEnabledImpl(Features, "fsgsbase", true);
     setFeatureEnabledImpl(Features, "aes", true);
     LLVM_FALLTHROUGH;
@@ -798,8 +796,6 @@ bool X86TargetInfo::handleTargetFeatures
       HasAVX512VP2INTERSECT = true;
     } else if (Feature == "+sha") {
       HasSHA = true;
-    } else if (Feature == "+mpx") {
-      HasMPX = true;
     } else if (Feature == "+shstk") {
       HasSHSTK = true;
     } else if (Feature == "+movbe") {
@@ -1220,8 +1216,6 @@ void X86TargetInfo::getTargetDefines(con
     Builder.defineMacro("__CLWB__");
   if (HasWBNOINVD)
     Builder.defineMacro("__WBNOINVD__");
-  if (HasMPX)
-    Builder.defineMacro("__MPX__");
   if (HasSHSTK)
     Builder.defineMacro("__SHSTK__");
   if (HasSGX)
@@ -1378,7 +1372,6 @@ bool X86TargetInfo::isValidFeatureName(S
       .Case("movbe", true)
       .Case("movdiri", true)
       .Case("movdir64b", true)
-      .Case("mpx", true)
       .Case("mwaitx", true)
       .Case("pclmul", true)
       .Case("pconfig", true)
@@ -1462,7 +1455,6 @@ bool X86TargetInfo::hasFeature(StringRef
       .Case("movbe", HasMOVBE)
       .Case("movdiri", HasMOVDIRI)
       .Case("movdir64b", HasMOVDIR64B)
-      .Case("mpx", HasMPX)
       .Case("mwaitx", HasMWAITX)
       .Case("pclmul", HasPCLMUL)
       .Case("pconfig", HasPCONFIG)

Modified: cfe/trunk/lib/Basic/Targets/X86.h
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets/X86.h?rev=370393&r1=370392&r2=370393&view=diff
==============================================================================
--- cfe/trunk/lib/Basic/Targets/X86.h (original)
+++ cfe/trunk/lib/Basic/Targets/X86.h Thu Aug 29 11:09:02 2019
@@ -80,7 +80,6 @@ class LLVM_LIBRARY_VISIBILITY X86TargetI
   bool HasAVX512IFMA = false;
   bool HasAVX512VP2INTERSECT = false;
   bool HasSHA = false;
-  bool HasMPX = false;
   bool HasSHSTK = false;
   bool HasSGX = false;
   bool HasCX8 = false;

Modified: cfe/trunk/test/Driver/x86-target-features.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Driver/x86-target-features.c?rev=370393&r1=370392&r2=370393&view=diff
==============================================================================
--- cfe/trunk/test/Driver/x86-target-features.c (original)
+++ cfe/trunk/test/Driver/x86-target-features.c Thu Aug 29 11:09:02 2019
@@ -72,8 +72,8 @@
 
 // RUN: %clang -target i386-unknown-linux-gnu -march=i386 -mmpx %s -### -o %t.o 2>&1 | FileCheck -check-prefix=MPX %s
 // RUN: %clang -target i386-unknown-linux-gnu -march=i386 -mno-mpx %s -### -o %t.o 2>&1 | FileCheck -check-prefix=NO-MPX %s
-// MPX: "-target-feature" "+mpx"
-// NO-MPX: "-target-feature" "-mpx"
+// MPX: the flag '-mmpx' has been deprecated and will be ignored
+// NO-MPX: the flag '-mno-mpx' has been deprecated and will be ignored
 
 // RUN: %clang -target i386-unknown-linux-gnu -march=i386 -mshstk %s -### -o %t.o 2>&1 | FileCheck -check-prefix=CETSS %s
 // RUN: %clang -target i386-unknown-linux-gnu -march=i386 -mno-shstk %s -### -o %t.o 2>&1 | FileCheck -check-prefix=NO-CETSS %s

Modified: cfe/trunk/test/Preprocessor/predefined-arch-macros.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Preprocessor/predefined-arch-macros.c?rev=370393&r1=370392&r2=370393&view=diff
==============================================================================
--- cfe/trunk/test/Preprocessor/predefined-arch-macros.c (original)
+++ cfe/trunk/test/Preprocessor/predefined-arch-macros.c Thu Aug 29 11:09:02 2019
@@ -682,7 +682,6 @@
 // CHECK_SKL_M32: #define __LZCNT__ 1
 // CHECK_SKL_M32: #define __MMX__ 1
 // CHECK_SKL_M32: #define __MOVBE__ 1
-// CHECK_SKL_M32: #define __MPX__ 1
 // CHECK_SKL_M32: #define __PCLMUL__ 1
 // CHECK_SKL_M32: #define __POPCNT__ 1
 // CHECK_SKL_M32: #define __PRFCHW__ 1
@@ -717,7 +716,6 @@
 // CHECK_SKL_M64: #define __LZCNT__ 1
 // CHECK_SKL_M64: #define __MMX__ 1
 // CHECK_SKL_M64: #define __MOVBE__ 1
-// CHECK_SKL_M64: #define __MPX__ 1
 // CHECK_SKL_M64: #define __PCLMUL__ 1
 // CHECK_SKL_M64: #define __POPCNT__ 1
 // CHECK_SKL_M64: #define __PRFCHW__ 1
@@ -912,7 +910,6 @@
 // CHECK_SKX_M32: #define __LZCNT__ 1
 // CHECK_SKX_M32: #define __MMX__ 1
 // CHECK_SKX_M32: #define __MOVBE__ 1
-// CHECK_SKX_M32: #define __MPX__ 1
 // CHECK_SKX_M32: #define __PCLMUL__ 1
 // CHECK_SKX_M32: #define __PKU__ 1
 // CHECK_SKX_M32: #define __POPCNT__ 1
@@ -958,7 +955,6 @@
 // CHECK_SKX_M64: #define __LZCNT__ 1
 // CHECK_SKX_M64: #define __MMX__ 1
 // CHECK_SKX_M64: #define __MOVBE__ 1
-// CHECK_SKX_M64: #define __MPX__ 1
 // CHECK_SKX_M64: #define __PCLMUL__ 1
 // CHECK_SKX_M64: #define __PKU__ 1
 // CHECK_SKX_M64: #define __POPCNT__ 1
@@ -1008,7 +1004,6 @@
 // CHECK_CLX_M32: #define __LZCNT__ 1
 // CHECK_CLX_M32: #define __MMX__ 1
 // CHECK_CLX_M32: #define __MOVBE__ 1
-// CHECK_CLX_M32: #define __MPX__ 1
 // CHECK_CLX_M32: #define __PCLMUL__ 1
 // CHECK_CLX_M32: #define __PKU__ 1
 // CHECK_CLX_M32: #define __POPCNT__ 1
@@ -1055,7 +1050,6 @@
 // CHECK_CLX_M64: #define __LZCNT__ 1
 // CHECK_CLX_M64: #define __MMX__ 1
 // CHECK_CLX_M64: #define __MOVBE__ 1
-// CHECK_CLX_M64: #define __MPX__ 1
 // CHECK_CLX_M64: #define __PCLMUL__ 1
 // CHECK_CLX_M64: #define __PKU__ 1
 // CHECK_CLX_M64: #define __POPCNT__ 1
@@ -1106,7 +1100,6 @@
 // CHECK_CPX_M32: #define __LZCNT__ 1
 // CHECK_CPX_M32: #define __MMX__ 1
 // CHECK_CPX_M32: #define __MOVBE__ 1
-// CHECK_CPX_M32: #define __MPX__ 1
 // CHECK_CPX_M32: #define __PCLMUL__ 1
 // CHECK_CPX_M32: #define __PKU__ 1
 // CHECK_CPX_M32: #define __POPCNT__ 1
@@ -1154,7 +1147,6 @@
 // CHECK_CPX_M64: #define __LZCNT__ 1
 // CHECK_CPX_M64: #define __MMX__ 1
 // CHECK_CPX_M64: #define __MOVBE__ 1
-// CHECK_CPX_M64: #define __MPX__ 1
 // CHECK_CPX_M64: #define __PCLMUL__ 1
 // CHECK_CPX_M64: #define __PKU__ 1
 // CHECK_CPX_M64: #define __POPCNT__ 1
@@ -1205,7 +1197,6 @@
 // CHECK_CNL_M32: #define __LZCNT__ 1
 // CHECK_CNL_M32: #define __MMX__ 1
 // CHECK_CNL_M32: #define __MOVBE__ 1
-// CHECK_CNL_M32: #define __MPX__ 1
 // CHECK_CNL_M32: #define __PCLMUL__ 1
 // CHECK_CNL_M32: #define __PKU__ 1
 // CHECK_CNL_M32: #define __POPCNT__ 1
@@ -1254,7 +1245,6 @@
 // CHECK_CNL_M64: #define __LZCNT__ 1
 // CHECK_CNL_M64: #define __MMX__ 1
 // CHECK_CNL_M64: #define __MOVBE__ 1
-// CHECK_CNL_M64: #define __MPX__ 1
 // CHECK_CNL_M64: #define __PCLMUL__ 1
 // CHECK_CNL_M64: #define __PKU__ 1
 // CHECK_CNL_M64: #define __POPCNT__ 1
@@ -1309,7 +1299,6 @@
 // CHECK_ICL_M32: #define __LZCNT__ 1
 // CHECK_ICL_M32: #define __MMX__ 1
 // CHECK_ICL_M32: #define __MOVBE__ 1
-// CHECK_ICL_M32: #define __MPX__ 1
 // CHECK_ICL_M32: #define __PCLMUL__ 1
 // CHECK_ICL_M32: #define __PKU__ 1
 // CHECK_ICL_M32: #define __POPCNT__ 1
@@ -1367,7 +1356,6 @@
 // CHECK_ICL_M64: #define __LZCNT__ 1
 // CHECK_ICL_M64: #define __MMX__ 1
 // CHECK_ICL_M64: #define __MOVBE__ 1
-// CHECK_ICL_M64: #define __MPX__ 1
 // CHECK_ICL_M64: #define __PCLMUL__ 1
 // CHECK_ICL_M64: #define __PKU__ 1
 // CHECK_ICL_M64: #define __POPCNT__ 1
@@ -1426,7 +1414,6 @@
 // CHECK_ICX_M32: #define __LZCNT__ 1
 // CHECK_ICX_M32: #define __MMX__ 1
 // CHECK_ICX_M32: #define __MOVBE__ 1
-// CHECK_ICX_M32: #define __MPX__ 1
 // CHECK_ICX_M32: #define __PCLMUL__ 1
 // CHECK_ICX_M32: #define __PCONFIG__ 1
 // CHECK_ICX_M32: #define __PKU__ 1
@@ -1485,7 +1472,6 @@
 // CHECK_ICX_M64: #define __LZCNT__ 1
 // CHECK_ICX_M64: #define __MMX__ 1
 // CHECK_ICX_M64: #define __MOVBE__ 1
-// CHECK_ICX_M64: #define __MPX__ 1
 // CHECK_ICX_M64: #define __PCLMUL__ 1
 // CHECK_ICX_M64: #define __PCONFIG__ 1
 // CHECK_ICX_M64: #define __PKU__ 1
@@ -1548,7 +1534,6 @@
 // CHECK_TGL_M32: #define __MOVBE__ 1
 // CHECK_TGL_M32: #define __MOVDIR64B__ 1
 // CHECK_TGL_M32: #define __MOVDIRI__ 1
-// CHECK_TGL_M32: #define __MPX__ 1
 // CHECK_TGL_M32: #define __PCLMUL__ 1
 // CHECK_TGL_M32-NOT: #define __PCONFIG__ 1
 // CHECK_TGL_M32: #define __PKU__ 1
@@ -1611,7 +1596,6 @@
 // CHECK_TGL_M64: #define __MOVBE__ 1
 // CHECK_TGL_M64: #define __MOVDIR64B__ 1
 // CHECK_TGL_M64: #define __MOVDIRI__ 1
-// CHECK_TGL_M64: #define __MPX__ 1
 // CHECK_TGL_M64: #define __PCLMUL__ 1
 // CHECK_TGL_M64-NOT: #define __PCONFIG__ 1
 // CHECK_TGL_M64: #define __PKU__ 1
@@ -1688,7 +1672,6 @@
 // CHECK_GLM_M32: #define __FXSR__ 1
 // CHECK_GLM_M32: #define __MMX__ 1
 // CHECK_GLM_M32: #define __MOVBE__ 1
-// CHECK_GLM_M32: #define __MPX__ 1
 // CHECK_GLM_M32: #define __PCLMUL__ 1
 // CHECK_GLM_M32: #define __POPCNT__ 1
 // CHECK_GLM_M32: #define __PRFCHW__ 1
@@ -1722,7 +1705,6 @@
 // CHECK_GLM_M64: #define __FXSR__ 1
 // CHECK_GLM_M64: #define __MMX__ 1
 // CHECK_GLM_M64: #define __MOVBE__ 1
-// CHECK_GLM_M64: #define __MPX__ 1
 // CHECK_GLM_M64: #define __PCLMUL__ 1
 // CHECK_GLM_M64: #define __POPCNT__ 1
 // CHECK_GLM_M64: #define __PRFCHW__ 1
@@ -1754,7 +1736,6 @@
 // CHECK_GLMP_M32: #define __FXSR__ 1
 // CHECK_GLMP_M32: #define __MMX__ 1
 // CHECK_GLMP_M32: #define __MOVBE__ 1
-// CHECK_GLMP_M32: #define __MPX__ 1
 // CHECK_GLMP_M32: #define __PCLMUL__ 1
 // CHECK_GLMP_M32: #define __POPCNT__ 1
 // CHECK_GLMP_M32: #define __PRFCHW__ 1
@@ -1791,7 +1772,6 @@
 // CHECK_GLMP_M64: #define __FXSR__ 1
 // CHECK_GLMP_M64: #define __MMX__ 1
 // CHECK_GLMP_M64: #define __MOVBE__ 1
-// CHECK_GLMP_M64: #define __MPX__ 1
 // CHECK_GLMP_M64: #define __PCLMUL__ 1
 // CHECK_GLMP_M64: #define __POPCNT__ 1
 // CHECK_GLMP_M64: #define __PRFCHW__ 1
@@ -1830,7 +1810,6 @@
 // CHECK_TRM_M32: #define __MOVBE__ 1
 // CHECK_TRM_M32: #define __MOVDIR64B__ 1
 // CHECK_TRM_M32: #define __MOVDIRI__ 1
-// CHECK_TRM_M32: #define __MPX__ 1
 // CHECK_TRM_M32: #define __PCLMUL__ 1
 // CHECK_TRM_M32: #define __POPCNT__ 1
 // CHECK_TRM_M32: #define __PRFCHW__ 1
@@ -1872,7 +1851,6 @@
 // CHECK_TRM_M64: #define __MOVBE__ 1
 // CHECK_TRM_M64: #define __MOVDIR64B__ 1
 // CHECK_TRM_M64: #define __MOVDIRI__ 1
-// CHECK_TRM_M64: #define __MPX__ 1
 // CHECK_TRM_M64: #define __PCLMUL__ 1
 // CHECK_TRM_M64: #define __POPCNT__ 1
 // CHECK_TRM_M64: #define __PRFCHW__ 1




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