r370073 - [RISCV] Set MaxAtomicInlineWidth and MaxAtomicPromoteWidth for RV32/RV64 targets with atomics
Sam Elliott via cfe-commits
cfe-commits at lists.llvm.org
Tue Aug 27 08:41:16 PDT 2019
Author: lenary
Date: Tue Aug 27 08:41:16 2019
New Revision: 370073
URL: http://llvm.org/viewvc/llvm-project?rev=370073&view=rev
Log:
[RISCV] Set MaxAtomicInlineWidth and MaxAtomicPromoteWidth for RV32/RV64 targets with atomics
Summary: This ensures that libcalls aren't generated when the target supports atomics. Atomics aren't in the base RV32I/RV64I instruction sets, so MaxAtomicInlineWidth and MaxAtomicPromoteWidth are set only when the atomics extension is being targeted. This must be done in setMaxAtomicWidth, as this should be done after handleTargetFeatures has been called.
Reviewers: jfb, jyknight, wmi, asb
Reviewed By: asb
Subscribers: pzheng, MaskRay, s.egerton, lenary, dexonsmith, psnobl, benna, Jim, JohnLLVM, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, lewis-revill, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D57450
Added:
cfe/trunk/test/CodeGen/riscv-atomics.c
Modified:
cfe/trunk/lib/Basic/Targets/RISCV.h
cfe/trunk/test/Driver/riscv32-toolchain.c
cfe/trunk/test/Driver/riscv64-toolchain.c
Modified: cfe/trunk/lib/Basic/Targets/RISCV.h
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets/RISCV.h?rev=370073&r1=370072&r2=370073&view=diff
==============================================================================
--- cfe/trunk/lib/Basic/Targets/RISCV.h (original)
+++ cfe/trunk/lib/Basic/Targets/RISCV.h Tue Aug 27 08:41:16 2019
@@ -93,6 +93,13 @@ public:
}
return false;
}
+
+ void setMaxAtomicWidth() override {
+ MaxAtomicPromoteWidth = 128;
+
+ if (HasA)
+ MaxAtomicInlineWidth = 32;
+ }
};
class LLVM_LIBRARY_VISIBILITY RISCV64TargetInfo : public RISCVTargetInfo {
public:
@@ -110,6 +117,13 @@ public:
}
return false;
}
+
+ void setMaxAtomicWidth() override {
+ MaxAtomicPromoteWidth = 128;
+
+ if (HasA)
+ MaxAtomicInlineWidth = 64;
+ }
};
} // namespace targets
} // namespace clang
Added: cfe/trunk/test/CodeGen/riscv-atomics.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/riscv-atomics.c?rev=370073&view=auto
==============================================================================
--- cfe/trunk/test/CodeGen/riscv-atomics.c (added)
+++ cfe/trunk/test/CodeGen/riscv-atomics.c Tue Aug 27 08:41:16 2019
@@ -0,0 +1,68 @@
+// RUN: %clang_cc1 -triple riscv32 -O1 -emit-llvm %s -o - \
+// RUN: | FileCheck %s -check-prefix=RV32I
+// RUN: %clang_cc1 -triple riscv32 -target-feature +a -O1 -emit-llvm %s -o - \
+// RUN: | FileCheck %s -check-prefix=RV32IA
+// RUN: %clang_cc1 -triple riscv64 -O1 -emit-llvm %s -o - \
+// RUN: | FileCheck %s -check-prefix=RV64I
+// RUN: %clang_cc1 -triple riscv64 -target-feature +a -O1 -emit-llvm %s -o - \
+// RUN: | FileCheck %s -check-prefix=RV64IA
+
+// This test demonstrates that MaxAtomicInlineWidth is set appropriately when
+// the atomics instruction set extension is enabled.
+
+#include <stdatomic.h>
+#include <stdint.h>
+
+void test_i8_atomics(_Atomic(int8_t) * a, int8_t b) {
+ // RV32I: call zeroext i8 @__atomic_load_1
+ // RV32I: call void @__atomic_store_1
+ // RV32I: call zeroext i8 @__atomic_fetch_add_1
+ // RV32IA: load atomic i8, i8* %a seq_cst, align 1
+ // RV32IA: store atomic i8 %b, i8* %a seq_cst, align 1
+ // RV32IA: atomicrmw add i8* %a, i8 %b seq_cst
+ // RV64I: call zeroext i8 @__atomic_load_1
+ // RV64I: call void @__atomic_store_1
+ // RV64I: call zeroext i8 @__atomic_fetch_add_1
+ // RV64IA: load atomic i8, i8* %a seq_cst, align 1
+ // RV64IA: store atomic i8 %b, i8* %a seq_cst, align 1
+ // RV64IA: atomicrmw add i8* %a, i8 %b seq_cst
+ __c11_atomic_load(a, memory_order_seq_cst);
+ __c11_atomic_store(a, b, memory_order_seq_cst);
+ __c11_atomic_fetch_add(a, b, memory_order_seq_cst);
+}
+
+void test_i32_atomics(_Atomic(int32_t) * a, int32_t b) {
+ // RV32I: call i32 @__atomic_load_4
+ // RV32I: call void @__atomic_store_4
+ // RV32I: call i32 @__atomic_fetch_add_4
+ // RV32IA: load atomic i32, i32* %a seq_cst, align 4
+ // RV32IA: store atomic i32 %b, i32* %a seq_cst, align 4
+ // RV32IA: atomicrmw add i32* %a, i32 %b seq_cst
+ // RV64I: call signext i32 @__atomic_load_4
+ // RV64I: call void @__atomic_store_4
+ // RV64I: call signext i32 @__atomic_fetch_add_4
+ // RV64IA: load atomic i32, i32* %a seq_cst, align 4
+ // RV64IA: store atomic i32 %b, i32* %a seq_cst, align 4
+ // RV64IA: atomicrmw add i32* %a, i32 %b seq_cst
+ __c11_atomic_load(a, memory_order_seq_cst);
+ __c11_atomic_store(a, b, memory_order_seq_cst);
+ __c11_atomic_fetch_add(a, b, memory_order_seq_cst);
+}
+
+void test_i64_atomics(_Atomic(int64_t) * a, int64_t b) {
+ // RV32I: call i64 @__atomic_load_8
+ // RV32I: call void @__atomic_store_8
+ // RV32I: call i64 @__atomic_fetch_add_8
+ // RV32IA: call i64 @__atomic_load_8
+ // RV32IA: call void @__atomic_store_8
+ // RV32IA: call i64 @__atomic_fetch_add_8
+ // RV64I: call i64 @__atomic_load_8
+ // RV64I: call void @__atomic_store_8
+ // RV64I: call i64 @__atomic_fetch_add_8
+ // RV64IA: load atomic i64, i64* %a seq_cst, align 8
+ // RV64IA: store atomic i64 %b, i64* %a seq_cst, align 8
+ // RV64IA: atomicrmw add i64* %a, i64 %b seq_cst
+ __c11_atomic_load(a, memory_order_seq_cst);
+ __c11_atomic_store(a, b, memory_order_seq_cst);
+ __c11_atomic_fetch_add(a, b, memory_order_seq_cst);
+}
Modified: cfe/trunk/test/Driver/riscv32-toolchain.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Driver/riscv32-toolchain.c?rev=370073&r1=370072&r2=370073&view=diff
==============================================================================
--- cfe/trunk/test/Driver/riscv32-toolchain.c (original)
+++ cfe/trunk/test/Driver/riscv32-toolchain.c Tue Aug 27 08:41:16 2019
@@ -105,6 +105,10 @@ typedef __builtin_va_list va_list;
typedef __SIZE_TYPE__ size_t;
typedef __PTRDIFF_TYPE__ ptrdiff_t;
typedef __WCHAR_TYPE__ wchar_t;
+typedef __WINT_TYPE__ wint_t;
+
+
+// Check Alignments
// CHECK: @align_c = dso_local global i32 1
int align_c = __alignof(char);
@@ -118,6 +122,9 @@ int align_i = __alignof(int);
// CHECK: @align_wc = dso_local global i32 4
int align_wc = __alignof(wchar_t);
+// CHECK: @align_wi = dso_local global i32 4
+int align_wi = __alignof(wint_t);
+
// CHECK: @align_l = dso_local global i32 4
int align_l = __alignof(long);
@@ -139,6 +146,88 @@ int align_ld = __alignof(long double);
// CHECK: @align_vl = dso_local global i32 4
int align_vl = __alignof(va_list);
+// CHECK: @align_a_c = dso_local global i32 1
+int align_a_c = __alignof(_Atomic(char));
+
+// CHECK: @align_a_s = dso_local global i32 2
+int align_a_s = __alignof(_Atomic(short));
+
+// CHECK: @align_a_i = dso_local global i32 4
+int align_a_i = __alignof(_Atomic(int));
+
+// CHECK: @align_a_wc = dso_local global i32 4
+int align_a_wc = __alignof(_Atomic(wchar_t));
+
+// CHECK: @align_a_wi = dso_local global i32 4
+int align_a_wi = __alignof(_Atomic(wint_t));
+
+// CHECK: @align_a_l = dso_local global i32 4
+int align_a_l = __alignof(_Atomic(long));
+
+// CHECK: @align_a_ll = dso_local global i32 8
+int align_a_ll = __alignof(_Atomic(long long));
+
+// CHECK: @align_a_p = dso_local global i32 4
+int align_a_p = __alignof(_Atomic(void*));
+
+// CHECK: @align_a_f = dso_local global i32 4
+int align_a_f = __alignof(_Atomic(float));
+
+// CHECK: @align_a_d = dso_local global i32 8
+int align_a_d = __alignof(_Atomic(double));
+
+// CHECK: @align_a_ld = dso_local global i32 16
+int align_a_ld = __alignof(_Atomic(long double));
+
+// CHECK: @align_a_s4 = dso_local global i32 4
+int align_a_s4 = __alignof(_Atomic(struct { char s[4]; }));
+
+// CHECK: @align_a_s8 = dso_local global i32 8
+int align_a_s8 = __alignof(_Atomic(struct { char s[8]; }));
+
+// CHECK: @align_a_s16 = dso_local global i32 16
+int align_a_s16 = __alignof(_Atomic(struct { char s[16]; }));
+
+// CHECK: @align_a_s32 = dso_local global i32 1
+int align_a_s32 = __alignof(_Atomic(struct { char s[32]; }));
+
+
+// Check Sizes
+
+// CHECK: @size_a_c = dso_local global i32 1
+int size_a_c = sizeof(_Atomic(char));
+
+// CHECK: @size_a_s = dso_local global i32 2
+int size_a_s = sizeof(_Atomic(short));
+
+// CHECK: @size_a_i = dso_local global i32 4
+int size_a_i = sizeof(_Atomic(int));
+
+// CHECK: @size_a_wc = dso_local global i32 4
+int size_a_wc = sizeof(_Atomic(wchar_t));
+
+// CHECK: @size_a_wi = dso_local global i32 4
+int size_a_wi = sizeof(_Atomic(wint_t));
+
+// CHECK: @size_a_l = dso_local global i32 4
+int size_a_l = sizeof(_Atomic(long));
+
+// CHECK: @size_a_ll = dso_local global i32 8
+int size_a_ll = sizeof(_Atomic(long long));
+
+// CHECK: @size_a_p = dso_local global i32 4
+int size_a_p = sizeof(_Atomic(void*));
+
+// CHECK: @size_a_f = dso_local global i32 4
+int size_a_f = sizeof(_Atomic(float));
+
+// CHECK: @size_a_d = dso_local global i32 8
+int size_a_d = sizeof(_Atomic(double));
+
+// CHECK: @size_a_ld = dso_local global i32 16
+int size_a_ld = sizeof(_Atomic(long double));
+
+
// Check types
// CHECK: zeroext i8 @check_char()
Modified: cfe/trunk/test/Driver/riscv64-toolchain.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Driver/riscv64-toolchain.c?rev=370073&r1=370072&r2=370073&view=diff
==============================================================================
--- cfe/trunk/test/Driver/riscv64-toolchain.c (original)
+++ cfe/trunk/test/Driver/riscv64-toolchain.c Tue Aug 27 08:41:16 2019
@@ -105,6 +105,10 @@ typedef __builtin_va_list va_list;
typedef __SIZE_TYPE__ size_t;
typedef __PTRDIFF_TYPE__ ptrdiff_t;
typedef __WCHAR_TYPE__ wchar_t;
+typedef __WINT_TYPE__ wint_t;
+
+
+// Check Alignments
// CHECK: @align_c = dso_local global i32 1
int align_c = __alignof(char);
@@ -118,6 +122,9 @@ int align_i = __alignof(int);
// CHECK: @align_wc = dso_local global i32 4
int align_wc = __alignof(wchar_t);
+// CHECK: @align_wi = dso_local global i32 4
+int align_wi = __alignof(wint_t);
+
// CHECK: @align_l = dso_local global i32 8
int align_l = __alignof(long);
@@ -139,6 +146,88 @@ int align_ld = __alignof(long double);
// CHECK: @align_vl = dso_local global i32 8
int align_vl = __alignof(va_list);
+// CHECK: @align_a_c = dso_local global i32 1
+int align_a_c = __alignof(_Atomic(char));
+
+// CHECK: @align_a_s = dso_local global i32 2
+int align_a_s = __alignof(_Atomic(short));
+
+// CHECK: @align_a_i = dso_local global i32 4
+int align_a_i = __alignof(_Atomic(int));
+
+// CHECK: @align_a_wc = dso_local global i32 4
+int align_a_wc = __alignof(_Atomic(wchar_t));
+
+// CHECK: @align_a_wi = dso_local global i32 4
+int align_a_wi = __alignof(_Atomic(wint_t));
+
+// CHECK: @align_a_l = dso_local global i32 8
+int align_a_l = __alignof(_Atomic(long));
+
+// CHECK: @align_a_ll = dso_local global i32 8
+int align_a_ll = __alignof(_Atomic(long long));
+
+// CHECK: @align_a_p = dso_local global i32 8
+int align_a_p = __alignof(_Atomic(void*));
+
+// CHECK @align_a_f = dso_local global i32 4
+int align_a_f = __alignof(_Atomic(float));
+
+// CHECK: @align_a_d = dso_local global i32 8
+int align_a_d = __alignof(_Atomic(double));
+
+// CHECK: @align_a_ld = dso_local global i32 16
+int align_a_ld = __alignof(_Atomic(long double));
+
+// CHECK: @align_a_s4 = dso_local global i32 4
+int align_a_s4 = __alignof(_Atomic(struct { char _[4]; }));
+
+// CHECK: @align_a_s8 = dso_local global i32 8
+int align_a_s8 = __alignof(_Atomic(struct { char _[8]; }));
+
+// CHECK: @align_a_s16 = dso_local global i32 16
+int align_a_s16 = __alignof(_Atomic(struct { char _[16]; }));
+
+// CHECK: @align_a_s32 = dso_local global i32 1
+int align_a_s32 = __alignof(_Atomic(struct { char _[32]; }));
+
+
+// Check Sizes
+
+// CHECK: @size_a_c = dso_local global i32 1
+int size_a_c = sizeof(_Atomic(char));
+
+// CHECK: @size_a_s = dso_local global i32 2
+int size_a_s = sizeof(_Atomic(short));
+
+// CHECK: @size_a_i = dso_local global i32 4
+int size_a_i = sizeof(_Atomic(int));
+
+// CHECK: @size_a_wc = dso_local global i32 4
+int size_a_wc = sizeof(_Atomic(wchar_t));
+
+// CHECK: @size_a_wi = dso_local global i32 4
+int size_a_wi = sizeof(_Atomic(wint_t));
+
+// CHECK: @size_a_l = dso_local global i32 8
+int size_a_l = sizeof(_Atomic(long));
+
+// CHECK: @size_a_ll = dso_local global i32 8
+int size_a_ll = sizeof(_Atomic(long long));
+
+// CHECK: @size_a_p = dso_local global i32 8
+int size_a_p = sizeof(_Atomic(void*));
+
+// CHECK: @size_a_f = dso_local global i32 4
+int size_a_f = sizeof(_Atomic(float));
+
+// CHECK: @size_a_d = dso_local global i32 8
+int size_a_d = sizeof(_Atomic(double));
+
+// CHECK: @size_a_ld = dso_local global i32 16
+int size_a_ld = sizeof(_Atomic(long double));
+
+
// Check types
// CHECK: define dso_local zeroext i8 @check_char()
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