[PATCH] D65776: [Clang] Pragma vectorize_predicate implies vectorize

[Florian Hahn via Phabricator via cfe-commits]

fhahn added a comment.

In D65776#1615834 <https://reviews.llvm.org/D65776#1615834>, @Meinersbur wrote:

> Mmmh, I would have expected this to work the same way as `vectorize_width`. According to the docs:
>
> > The following example implicitly enables vectorization and interleaving by specifying a vector width and interleaving count:
> >  `#pragma clang loop vectorize_width(2) interleave_count(2)`
> >  `for(...) {`
> >  ` ...`
> >  `}`
>
> However, `vectorize_width` does not automatically set `llvm.loop.vectorize.enable`. Neither does `llvm.loop.vectorize.width` > 1 imply `LoopVectorizeHints::getForce()`. At some places they are checked together, such as `LoopVectorizeHints::allowReordering()`. Other places, notably `LoopVectorizationCostModel::selectVectorizationFactor()`, only queries `getForce()`. That is, `vectorize_width(2)` does not implicitly force vectorization in practice.


The current behavior with respect to vectorize_width seems a bit counterintuitive. The docs say `vectorize_width implicitly enables vectorization`, I would expect it to behave as if `vectorize(enable)` was also passed. There's also a PR about that mismatch: https://bugs.llvm.org/show_bug.cgi?id=27643

IMO it would make sense to have the more specific pragmas imply vectorize(enable) here (or update the docs accordingly).


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