[PATCH] D65254: Allow prefetching from non-zero address spaces
JF Bastien via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Wed Jul 24 16:28:08 PDT 2019
jfb created this revision.
Herald added subscribers: llvm-commits, cfe-commits, dexonsmith, jkorous, kbarton, hiraditya, javed.absar, nemanjai.
Herald added projects: clang, LLVM.
This is useful for targets which have prefetch instructions for non-default address spaces.
rdar://problem/42662136
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D65254
Files:
clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/Sema/SemaExpr.cpp
clang/test/CodeGen/arm_acle.c
clang/test/CodeGen/builtins-arm.c
clang/test/CodeGen/builtins-arm64.c
clang/test/CodeGen/ppc-xmmintrin.c
clang/test/CodeGen/pr9614.c
clang/test/CodeGen/prefetch-addr-spaces.c
clang/test/CodeGen/prefetchw-builtins.c
clang/test/CodeGen/sse-builtins.c
llvm/include/llvm/IR/Intrinsics.td
llvm/lib/IR/AutoUpgrade.cpp
llvm/lib/Transforms/Scalar/LoopDataPrefetch.cpp
llvm/test/Assembler/auto_upgrade_intrinsics.ll
llvm/test/Bitcode/compatibility-3.6.ll
llvm/test/Bitcode/compatibility-3.7.ll
llvm/test/Bitcode/compatibility-3.8.ll
llvm/test/Bitcode/compatibility-3.9.ll
llvm/test/Bitcode/compatibility-4.0.ll
llvm/test/Bitcode/compatibility-5.0.ll
llvm/test/Bitcode/compatibility-6.0.ll
llvm/test/Bitcode/compatibility.ll
llvm/test/Verifier/intrinsic-immarg.ll
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