[PATCH] D64739: [SVE][Inline-Asm] Add support to specify SVE registers in the clobber list

[Diana Picus via Phabricator via cfe-commits]

rovka added inline comments.


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Comment at: clang/test/CodeGen/aarch64-sve-inline-asm.c:1
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -emit-llvm -target-feature +sve -o - %s | FileCheck %s
+
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sdesmalen wrote:
> rovka wrote:
> > Can you also add a test without +sve, to make sure we get a diagnostic?
> Without the `-emit-llvm` part this test invokes (and tests the diagnostic of) the compiler. I don't think this is what we want. At the same time, this code should probably still continue match the z and p registers even if the target feature is not given, and thus leave it to LLVM to determine whether the use of these registers makes sense or not. So removing `-target-feature +sve` from the RUN line should be sufficient here. @rovka do you agree?
Good point, we probably don't want this to be an integration test of the whole compiler. Removing the target feature altogether sounds good to me.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D64739/new/

https://reviews.llvm.org/D64739