[PATCH] D65000: [ARM] Set default alignment to 64bits
Diogo N. Sampaio via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Mon Jul 22 02:45:39 PDT 2019
dnsampaio updated this revision to Diff 211034.
dnsampaio added a comment.
- Set androideabi alignment to 128 bits
Repository:
rC Clang
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D65000/new/
https://reviews.llvm.org/D65000
Files:
lib/Basic/Targets/ARM.cpp
test/CodeGen/ARM/exception-alignment.cpp
test/SemaCXX/warn-overaligned-type-thrown.cpp
Index: test/SemaCXX/warn-overaligned-type-thrown.cpp
===================================================================
--- test/SemaCXX/warn-overaligned-type-thrown.cpp
+++ test/SemaCXX/warn-overaligned-type-thrown.cpp
@@ -2,11 +2,12 @@
// RUN: %clang_cc1 -triple arm64-apple-ios10 -verify -fsyntax-only -std=c++11 -fcxx-exceptions -fexceptions -DUNDERALIGNED %s
// RUN: %clang_cc1 -triple arm64-apple-tvos10 -verify -fsyntax-only -std=c++11 -fcxx-exceptions -fexceptions -DUNDERALIGNED %s
// RUN: %clang_cc1 -triple arm64-apple-watchos4 -verify -fsyntax-only -std=c++11 -fcxx-exceptions -fexceptions -DUNDERALIGNED %s
+// RUN: %clang_cc1 -triple arm-linux-gnueabi -verify -fsyntax-only -std=c++11 -fcxx-exceptions -fexceptions -DUNDERALIGNED %s
+// RUN: %clang_cc1 -triple arm-linux-androideabi -verify -fsyntax-only -std=c++11 -fcxx-exceptions -fexceptions %s
// RUN: %clang_cc1 -triple x86_64-apple-macosx10.14 -verify -fsyntax-only -std=c++11 -fcxx-exceptions -fexceptions %s
// RUN: %clang_cc1 -triple arm64-apple-ios12 -verify -fsyntax-only -std=c++11 -fcxx-exceptions -fexceptions %s
// RUN: %clang_cc1 -triple arm64-apple-tvos12 -verify -fsyntax-only -std=c++11 -fcxx-exceptions -fexceptions %s
// RUN: %clang_cc1 -triple arm64-apple-watchos5 -verify -fsyntax-only -std=c++11 -fcxx-exceptions -fexceptions %s
-// RUN: %clang_cc1 -triple arm-linux-gnueabi -verify -fsyntax-only -std=c++11 -fcxx-exceptions -fexceptions %s
// RUN: %clang_cc1 -triple aarch64-linux-gnueabi -verify -fsyntax-only -std=c++11 -fcxx-exceptions -fexceptions %s
// RUN: %clang_cc1 -triple mipsel-linux-gnu -verify -fsyntax-only -std=c++11 -fcxx-exceptions -fexceptions %s
// RUN: %clang_cc1 -triple mips64el-linux-gnu -verify -fsyntax-only -std=c++11 -fcxx-exceptions -fexceptions %s
Index: test/CodeGen/ARM/exception-alignment.cpp
===================================================================
--- /dev/null
+++ test/CodeGen/ARM/exception-alignment.cpp
@@ -0,0 +1,18 @@
+// Bug: https://bugs.llvm.org/show_bug.cgi?id=42668
+// REQUIRES: arm-registered-target
+// RUN: %clang --target=arm-arm-none-eabi -march=armv8-a -S -emit-llvm -Os -o - %s | FileCheck --check-prefixes=CHECK,A8 %s
+// RUN: %clang --target=arm-linux-androideabi -march=armv8-a -S -emit-llvm -Os -o - %s | FileCheck --check-prefixes=CHECK,A16 %s
+// CHECK: [[E:%[A-z0-9]+]] = tail call i8* @__cxa_allocate_exception
+// CHECK-NEXT: [[BC:%[A-z0-9]+]] = bitcast i8* [[E]] to <2 x i64>*
+// A16-NEXT: store <2 x i64> <i64 1, i64 2>, <2 x i64>* [[BC]], align 16
+#include <arm_neon.h>
+
+int main(void) {
+ try {
+ throw vld1q_u64(((const uint64_t[2]){1, 2}));
+ } catch (uint64x2_t exc) {
+ return 0;
+ }
+ return 1;
+}
+
Index: lib/Basic/Targets/ARM.cpp
===================================================================
--- lib/Basic/Targets/ARM.cpp
+++ lib/Basic/Targets/ARM.cpp
@@ -325,6 +325,11 @@
: "\01mcount";
SoftFloatABI = llvm::is_contained(Opts.FeaturesAsWritten, "+soft-float-abi");
+
+ // For AArch32, the largest alignment required by the ABI is 64-bit
+ // but Android ABI uses 128-bit alignment as default
+ DefaultAlignForAttributeAligned =
+ (Triple.getEnvironment() == llvm::Triple::Android)?128:64;
}
StringRef ARMTargetInfo::getABI() const { return ABI; }
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D65000.211034.patch
Type: text/x-patch
Size: 3295 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/cfe-commits/attachments/20190722/29aa3885/attachment.bin>
More information about the cfe-commits
mailing list