r365608 - [NFC][AArch64] Fix vector vsqadd intrinsics operands
Diogo N. Sampaio via cfe-commits
cfe-commits at lists.llvm.org
Wed Jul 10 02:58:03 PDT 2019
Author: dnsampaio
Date: Wed Jul 10 02:58:03 2019
New Revision: 365608
URL: http://llvm.org/viewvc/llvm-project?rev=365608&view=rev
Log:
[NFC][AArch64] Fix vector vsqadd intrinsics operands
Summary:
Change the vsqadd vector instrinsics to have the second argument as signed values, not unsigned,
accordingly to https://developer.arm.com/architectures/instruction-sets/simd-isas/neon/intrinsics
Reviewers: LukeCheeseman, ostannard
Reviewed By: ostannard
Subscribers: javed.absar, kristof.beyls, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D64210
Modified:
cfe/trunk/include/clang/Basic/arm_neon.td
Modified: cfe/trunk/include/clang/Basic/arm_neon.td
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/arm_neon.td?rev=365608&r1=365607&r2=365608&view=diff
==============================================================================
--- cfe/trunk/include/clang/Basic/arm_neon.td (original)
+++ cfe/trunk/include/clang/Basic/arm_neon.td Wed Jul 10 02:58:03 2019
@@ -707,7 +707,7 @@ def SUQADD : SInst<"vuqadd", "ddd", "csi
////////////////////////////////////////////////////////////////////////////////
// Unsigned Saturating Accumulated of Signed Value
-def USQADD : SInst<"vsqadd", "ddd", "UcUsUiUlQUcQUsQUiQUl">;
+def USQADD : SInst<"vsqadd", "ddx", "UcUsUiUlQUcQUsQUiQUl">;
////////////////////////////////////////////////////////////////////////////////
// Reciprocal/Sqrt
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