[PATCH] D64119: [PowerPC] Support constraint code "ww"

Jinsong Ji via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Wed Jul 3 13:12:52 PDT 2019


jsji added a comment.

It is great to add `ww` for compatibility. 
However if we are going to add `ww`, looks like we should update `ws` as well?



================
Comment at: clang/lib/Basic/Targets/PPC.h:211
+      case 's': // VSX vector register to hold scalar double data
+      case 'w': // VSX vector register to hold scalar double data
       case 'a': // Any VSX register
----------------
Add some more comments for `w` to distinguish it from `s`?

Do we want to keep compatibility with GCC? 
According to https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/Machine-Constraints.html#Machine-Constraints, 
`ww` is `FP or VSX register to perform float operations under -mvsx or NO_REGS.`, 
while `ws` is `VSX vector register to hold scalar double values `. 

So `ww` can use `FP` while `ws` can NOT ?


================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:14080
     return std::make_pair(0U, &PPC::VSRCRegClass);
-  } else if (Constraint == "ws" && Subtarget.hasVSX()) {
+  } else if ((Constraint == "ws" || Constraint == "ww") && Subtarget.hasVSX()) {
     if (VT == MVT::f32 && Subtarget.hasP8Vector())
----------------
Should we exclude `FP` for `ws` and return `VFRCRegClass` instead of `VSFRCRegClass` ?


================
Comment at: llvm/test/CodeGen/PowerPC/inlineasm-vsx-reg.ll:42
+
+define float @test_ww(float %x, float %y) {
+  %1 = tail call float asm "xsmaxdp ${0:x}, ${1:x}, ${2:x}", "=^ww,^ww,^ww"(float %x, float %y)
----------------
Maybe we should add another test for ws as well? The above test is actually for 'x' modifier?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D64119/new/

https://reviews.llvm.org/D64119





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