[PATCH] D51262: Implement P0553 and P0556

Marshall Clow via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Mon Jul 1 13:05:36 PDT 2019


mclow.lists marked 5 inline comments as done.
mclow.lists added a comment.

I missed a couple of Eric's comments.



================
Comment at: libcxx/include/bit:211
+        ? __t
+        : (__t << (__cnt % __dig)) | (__t >> (__dig - (__cnt % __dig)));
+}
----------------
xbolva00 wrote:
> mclow.lists wrote:
> > Quuxplusone wrote:
> > > No sane compiler would actually generate three `mod` operations for the three instances of repeated subexpression `__cnt % __dig`, would they?
> > At `-O0`? Sure it would.
> Hoist it? 
> Hoist it?

IMHO, people building at `-O0` are not people who care about code size/performance.



================
Comment at: libcxx/include/bit:384
+log2p1(_Tp __t) noexcept
+{ return __t == 0 ? 0 : __bit_log2(__t) + 1; }
+
----------------
Quuxplusone wrote:
> mclow.lists wrote:
> > EricWF wrote:
> > > `__bit_log2` needs to be qualified to prevent ADL.
> > See above. ADL on what? There are no user-defined types here.
> FWIW, my intuition still agrees with Eric's: adding `_VSTD::` throughout might not help anything, but if it wouldn't hurt, //and// if it stops every future code-reviewer from making the same exact comment about ADL, shouldn't you just do it? Wouldn't it save everyone some time?
I disagree. When I review a chunk of code, if I see `_VSTD:`, I think "why is this here?", and I go looking for ADL points. I think it //slows down// reviewing.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D51262/new/

https://reviews.llvm.org/D51262





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