r362806 - [ARM] Add ACLE feature macros for MVE
Sjoerd Meijer via cfe-commits
cfe-commits at lists.llvm.org
Fri Jun 7 08:20:56 PDT 2019
Author: sjoerdmeijer
Date: Fri Jun 7 08:20:56 2019
New Revision: 362806
URL: http://llvm.org/viewvc/llvm-project?rev=362806&view=rev
Log:
[ARM] Add ACLE feature macros for MVE
If MVE is present at all, then the macro __ARM_FEATURE_MVE is defined
to a value which has bit 0 set for integer MVE, and bit 1 set for
floating-point MVE.
(Floating-point MVE implies integer MVE, so if this macro is defined
at all then it will be set to 1 or 3, never 2.)
Patch mostly by Simon Tatham
Differential Revision: https://reviews.llvm.org/D60710
Modified:
cfe/trunk/lib/Basic/Targets/ARM.cpp
cfe/trunk/lib/Basic/Targets/ARM.h
cfe/trunk/test/Preprocessor/arm-target-features.c
Modified: cfe/trunk/lib/Basic/Targets/ARM.cpp
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets/ARM.cpp?rev=362806&r1=362805&r2=362806&view=diff
==============================================================================
--- cfe/trunk/lib/Basic/Targets/ARM.cpp (original)
+++ cfe/trunk/lib/Basic/Targets/ARM.cpp Fri Jun 7 08:20:56 2019
@@ -146,6 +146,14 @@ void ARMTargetInfo::setAtomic() {
}
}
+bool ARMTargetInfo::hasMVE() const {
+ return ArchKind == llvm::ARM::ArchKind::ARMV8_1MMainline && MVE != 0;
+}
+
+bool ARMTargetInfo::hasMVEFloat() const {
+ return hasMVE() && (MVE & MVE_FP);
+}
+
bool ARMTargetInfo::isThumb() const {
return ArchISA == llvm::ARM::ISAKind::THUMB;
}
@@ -460,6 +468,15 @@ bool ARMTargetInfo::handleTargetFeatures
HasLegalHalfType = true;
} else if (Feature == "+dotprod") {
DotProd = true;
+ } else if (Feature == "+mve") {
+ DSP = 1;
+ MVE |= MVE_INT;
+ } else if (Feature == "+mve.fp") {
+ DSP = 1;
+ HasLegalHalfType = true;
+ FPU |= FPARMV8;
+ MVE |= MVE_INT | MVE_FP;
+ HW_FP |= HW_FP_SP | HW_FP_HP;
}
}
@@ -510,6 +527,7 @@ bool ARMTargetInfo::hasFeature(StringRef
.Case("vfp", FPU && !SoftFloat)
.Case("hwdiv", HWDiv & HWDivThumb)
.Case("hwdiv-arm", HWDiv & HWDivARM)
+ .Case("mve", hasMVE())
.Default(false);
}
@@ -725,6 +743,10 @@ void ARMTargetInfo::getTargetDefines(con
"0x" + Twine::utohexstr(HW_FP & ~HW_FP_DP));
}
+ if (hasMVE()) {
+ Builder.defineMacro("__ARM_FEATURE_MVE", hasMVEFloat() ? "3" : "1");
+ }
+
Builder.defineMacro("__ARM_SIZEOF_WCHAR_T",
Twine(Opts.WCharSize ? Opts.WCharSize : 4));
Modified: cfe/trunk/lib/Basic/Targets/ARM.h
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets/ARM.h?rev=362806&r1=362805&r2=362806&view=diff
==============================================================================
--- cfe/trunk/lib/Basic/Targets/ARM.h (original)
+++ cfe/trunk/lib/Basic/Targets/ARM.h Fri Jun 7 08:20:56 2019
@@ -33,6 +33,11 @@ class LLVM_LIBRARY_VISIBILITY ARMTargetI
FPARMV8 = (1 << 4)
};
+ enum MVEMode {
+ MVE_INT = (1 << 0),
+ MVE_FP = (1 << 1)
+ };
+
// Possible HWDiv features.
enum HWDivMode { HWDivThumb = (1 << 0), HWDivARM = (1 << 1) };
@@ -56,6 +61,7 @@ class LLVM_LIBRARY_VISIBILITY ARMTargetI
unsigned ArchVersion;
unsigned FPU : 5;
+ unsigned MVE : 2;
unsigned IsAAPCS : 1;
unsigned HWDiv : 2;
@@ -100,6 +106,8 @@ class LLVM_LIBRARY_VISIBILITY ARMTargetI
bool isThumb() const;
bool supportsThumb() const;
bool supportsThumb2() const;
+ bool hasMVE() const;
+ bool hasMVEFloat() const;
StringRef getCPUAttr() const;
StringRef getCPUProfile() const;
Modified: cfe/trunk/test/Preprocessor/arm-target-features.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Preprocessor/arm-target-features.c?rev=362806&r1=362805&r2=362806&view=diff
==============================================================================
--- cfe/trunk/test/Preprocessor/arm-target-features.c (original)
+++ cfe/trunk/test/Preprocessor/arm-target-features.c Fri Jun 7 08:20:56 2019
@@ -748,6 +748,27 @@
// KRAIT-ALLOW-FP-INSTR:#define __ARM_FEATURE_DSP 1
// KRAIT-ALLOW-FP-INSTR:#define __ARM_VFPV4__ 1
+// RUN: %clang -target arm-arm-none-eabi -march=armv8.1-m.main -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V81M %s
+// CHECK-V81M: #define __ARM_ARCH 8
+// CHECK-V81M: #define __ARM_ARCH_8_1M_MAIN__ 1
+// CHECK-V81M: #define __ARM_ARCH_ISA_THUMB 2
+// CHECK-V81M: #define __ARM_ARCH_PROFILE 'M'
+// CHECK-V81M-NOT: #define __ARM_FEATURE_DSP
+// CHECK-V81M-NOT: #define __ARM_FEATURE_MVE
+// CHECK-V81M-NOT: #define __ARM_FEATURE_SIMD32
+
+// RUN: %clang -target arm-arm-none-eabi -march=armv8.1-m.main+mve -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V81M-MVE %s
+// CHECK-V81M-MVE: #define __ARM_FEATURE_DSP 1
+// CHECK-V81M-MVE: #define __ARM_FEATURE_MVE 1
+// CHECK-V81M-MVE: #define __ARM_FEATURE_SIMD32 1
+
+// RUN: %clang -target arm-arm-none-eabi -march=armv8.1-m.main+mve.fp -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V81M-MVE-FP %s
+// CHECK-V81M-MVE-FP: #define __ARM_FEATURE_DSP 1
+// CHECK-V81M-MVE-FP: #define __ARM_FEATURE_FP16_SCALAR_ARITHMETIC 1
+// CHECK-V81M-MVE-FP: #define __ARM_FEATURE_MVE 3
+// CHECK-V81M-MVE-FP: #define __ARM_FEATURE_SIMD32 1
+// CHECK-V81M-MVE-FP: #define __ARM_FPV5__ 1
+
// RUN: %clang -target armv8.1a-none-none-eabi -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V81A %s
// CHECK-V81A: #define __ARM_ARCH 8
// CHECK-V81A: #define __ARM_ARCH_8_1A__ 1
More information about the cfe-commits
mailing list