[PATCH] D60583: [AArch64] Implement Vector Funtion ABI name mangling.

[Alexey Bataev via Phabricator via cfe-commits]

ABataev added a comment.

In D60583#1529885 <https://reviews.llvm.org/D60583#1529885>, @jdoerfert wrote:

> In D60583#1529882 <https://reviews.llvm.org/D60583#1529882>, @ABataev wrote:
>
> > In D60583#1529878 <https://reviews.llvm.org/D60583#1529878>, @jdoerfert wrote:
> >
> > > Why/Where did we decide to clobber the attribute list with "non-existent function names"?
> > >
> > > This seems to me like an ad-hoc implementation of the RFC that is currently discussed but committed before the discussion is finished.
> >
> >
> > It has nothing to do with the RFC for a variant. It is a standard interface to communicate with the backend to generate vectorized versions of the functions. It relies on Vector ABI, provided by Intel and ARM, it follows the way it is implemented in GCC. There was an RFC for this long time ago which was accepted by the community and later implemented.
>
>
> The RFC states, in a nutshell, let us add one attribute to identify all vector variants. This patch adds all vector variants as attributes. Clearly, these things are related.


This new RFC just follows the scheme that was already accepted and implemented. As I understand, Francesco just wants to reuse the existing solution for SIMD isa of the pragma omp variant (or attribute clang variant)


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https://reviews.llvm.org/D60583