r357466 - [PowerPC] Fix issue with inline asm - soft float mode
Strahinja Petrovic via cfe-commits
cfe-commits at lists.llvm.org
Tue Apr 2 04:00:10 PDT 2019
Author: spetrovic
Date: Tue Apr 2 04:00:09 2019
New Revision: 357466
URL: http://llvm.org/viewvc/llvm-project?rev=357466&view=rev
Log:
[PowerPC] Fix issue with inline asm - soft float mode
This patch prevents floating point register
constraints in soft float mode.
Differential Revision: https://reviews.llvm.org/D59310
Added:
cfe/trunk/test/Driver/ppc-inlineasm-sf.c
Modified:
cfe/trunk/lib/Basic/Targets/PPC.cpp
cfe/trunk/lib/Basic/Targets/PPC.h
Modified: cfe/trunk/lib/Basic/Targets/PPC.cpp
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets/PPC.cpp?rev=357466&r1=357465&r2=357466&view=diff
==============================================================================
--- cfe/trunk/lib/Basic/Targets/PPC.cpp (original)
+++ cfe/trunk/lib/Basic/Targets/PPC.cpp Tue Apr 2 04:00:09 2019
@@ -30,6 +30,7 @@ const Builtin::Info PPCTargetInfo::Built
/// configured set of features.
bool PPCTargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
DiagnosticsEngine &Diags) {
+ FloatABI = HardFloat;
for (const auto &Feature : Features) {
if (Feature == "+altivec") {
HasAltivec = true;
@@ -53,6 +54,8 @@ bool PPCTargetInfo::handleTargetFeatures
HasFloat128 = true;
} else if (Feature == "+power9-vector") {
HasP9Vector = true;
+ } else if (Feature == "-hard-float") {
+ FloatABI = SoftFloat;
}
// TODO: Finish this list and add an assert that we've handled them
// all.
Modified: cfe/trunk/lib/Basic/Targets/PPC.h
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets/PPC.h?rev=357466&r1=357465&r2=357466&view=diff
==============================================================================
--- cfe/trunk/lib/Basic/Targets/PPC.h (original)
+++ cfe/trunk/lib/Basic/Targets/PPC.h Tue Apr 2 04:00:09 2019
@@ -53,6 +53,7 @@ class LLVM_LIBRARY_VISIBILITY PPCTargetI
static const char *const GCCRegNames[];
static const TargetInfo::GCCRegAlias GCCRegAliases[];
std::string CPU;
+ enum PPCFloatABI { HardFloat, SoftFloat } FloatABI;
// Target cpu features.
bool HasAltivec = false;
@@ -183,8 +184,11 @@ public:
return false;
case 'O': // Zero
break;
- case 'b': // Base register
case 'f': // Floating point register
+ // Don't use floating point registers on soft float ABI.
+ if (FloatABI == SoftFloat)
+ return false;
+ case 'b': // Base register
Info.setAllowsRegister();
break;
// FIXME: The following are added to allow parsing.
@@ -192,6 +196,10 @@ public:
// Also, is more specific checking needed? I.e. specific registers?
case 'd': // Floating point register (containing 64-bit value)
case 'v': // Altivec vector register
+ // Don't use floating point and altivec vector registers
+ // on soft float ABI
+ if (FloatABI == SoftFloat)
+ return false;
Info.setAllowsRegister();
break;
case 'w':
Added: cfe/trunk/test/Driver/ppc-inlineasm-sf.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Driver/ppc-inlineasm-sf.c?rev=357466&view=auto
==============================================================================
--- cfe/trunk/test/Driver/ppc-inlineasm-sf.c (added)
+++ cfe/trunk/test/Driver/ppc-inlineasm-sf.c Tue Apr 2 04:00:09 2019
@@ -0,0 +1,16 @@
+// RUN: not %clang -target powerpc-unknown-linux -O2 -fPIC -m32 -msoft-float %s -o %t.o 2>&1 | FileCheck --check-prefix=CHECK-ERRMSG %s
+int foo ()
+{
+ double x,y;
+ int a;
+ __asm__ ("fctiw %0,%1" : "=f"(x) : "f"(y));
+ // CHECK-ERRMSG: error: invalid output constraint '=f' in asm
+ // CHECK-ERRMSG-NEXT: __asm__ ("fctiw %0,%1" : "=f"(x) : "f"(y));
+ __asm__ ("fctiw %0,%1" : "=d"(x) : "d"(y));
+ // CHECK-ERRMSG: error: invalid output constraint '=d' in asm
+ // CHECK-ERRMSG-NEXT: __asm__ ("fctiw %0,%1" : "=d"(x) : "d"(y));
+ __asm__ ("vec_dss %0" : "=v"(a));
+ // CHECK-ERRMSG: error: invalid output constraint '=v' in asm
+ // CHECK-ERRMSG-NEXT: __asm__ ("vec_dss %0" : "=v"(a));
+}
+
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