[PATCH] D59615: [AArch64] When creating SISD intrinsic calls widen scalar args into a zero vectors, not undef
Tim Northover via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Fri Mar 22 03:32:01 PDT 2019
t.p.northover added a comment.
Did you look into a scalar variant of the intrinsic call instead? These instructions have non-vector variants (e.g. `sqadd s0, s0, s0`), and that's actually why the intrinsics exist in the first place. It'd be a shame to always require this extra work.
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https://reviews.llvm.org/D59615/new/
https://reviews.llvm.org/D59615
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