[PATCH] D58344: Enablement for AMD znver2 architecture - skeleton
Ganesh Gopalasubramanian via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Mon Feb 18 04:33:49 PST 2019
GGanesh created this revision.
GGanesh added reviewers: RKSimon, craig.topper.
GGanesh created this object with visibility "All Users".
GGanesh added a project: clang.
Herald added a subscriber: cfe-commits.
This patch enables the following
1. AMD family 17h "znver2" tune flag (-march, -mcpu).
2. ISAs that are enabled for "znver2" architecture.
3. For the time being, it uses the znver1 scheduler model.
4. Tests are updated.
Repository:
rC Clang
https://reviews.llvm.org/D58344
Files:
include/clang/Basic/X86Target.def
lib/Basic/Targets/X86.cpp
test/CodeGen/attr-target-mv.c
test/CodeGen/target-builtin-noerror.c
test/Driver/x86-march.c
test/Frontend/x86-target-cpu.c
test/Misc/target-invalid-cpu-note.c
test/Preprocessor/predefined-arch-macros.c
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D58344.187219.patch
Type: text/x-patch
Size: 14426 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/cfe-commits/attachments/20190218/eef70309/attachment-0001.bin>
More information about the cfe-commits
mailing list