r263048 - ARM & AArch64: convert asm tests to LLVM IR and restrict optimizations.
James Molloy via cfe-commits
cfe-commits at lists.llvm.org
Wed Mar 9 11:18:08 PST 2016
Hi Tim,
I like the general direction - it's one I've argued for before. +1 from me!
James
On Wed, 9 Mar 2016 at 19:00 Tim Northover via cfe-commits <
cfe-commits at lists.llvm.org> wrote:
> Modified: cfe/trunk/test/CodeGen/arm_neon_intrinsics.c
> URL:
> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm_neon_intrinsics.c?rev=263048&r1=263047&r2=263048&view=diff
>
> ==============================================================================
> --- cfe/trunk/test/CodeGen/arm_neon_intrinsics.c (original)
> +++ cfe/trunk/test/CodeGen/arm_neon_intrinsics.c Wed Mar 9 12:54:42 2016
> @@ -1,1611 +1,2446 @@
> // RUN: %clang_cc1 -triple thumbv7s-apple-darwin -target-abi apcs-gnu\
> -// RUN: -target-cpu swift -ffreestanding -Os -S -o - %s\
> -// RUN: | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-SWIFT
> -// RUN: %clang_cc1 -triple armv8-linux-gnu \
> -// RUN: -target-cpu cortex-a57 -mfloat-abi soft -ffreestanding -Os -S -o
> - %s\
> -// RUN: | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-A57
> +// RUN: -target-cpu swift -ffreestanding -emit-llvm -S -o - %s\
> +// RUN: opt -S -mem2reg | FileCheck %s
>
> // REQUIRES: long_tests
>
> #include <arm_neon.h>
>
> -// CHECK-LABEL: test_vaba_s8
> -// CHECK: vaba.s8 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <8 x i8> @test_vaba_s8(<8 x i8> %a, <8 x i8> %b,
> <8 x i8> %c) #0 {
> +// CHECK: [[VABD_I_I:%.*]] = call <8 x i8>
> @llvm.aarch64.neon.sabd.v8i8(<8 x i8> %b, <8 x i8> %c) #4
> +// CHECK: [[ADD_I:%.*]] = add <8 x i8> %a, [[VABD_I_I]]
> +// CHECK: ret <8 x i8> [[ADD_I]]
> int8x8_t test_vaba_s8(int8x8_t a, int8x8_t b, int8x8_t c) {
> return vaba_s8(a, b, c);
> }
>
> -// CHECK-LABEL: test_vaba_s16
> -// CHECK: vaba.s16 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <4 x i16> @test_vaba_s16(<4 x i16> %a, <4 x i16>
> %b, <4 x i16> %c) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <4 x i16> %b to <8 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %c to <8 x i8>
> +// CHECK: [[VABD_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
> +// CHECK: [[VABD1_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>
> +// CHECK: [[VABD2_I_I:%.*]] = call <4 x i16>
> @llvm.aarch64.neon.sabd.v4i16(<4 x i16> [[VABD_I_I]], <4 x i16>
> [[VABD1_I_I]]) #4
> +// CHECK: [[ADD_I:%.*]] = add <4 x i16> %a, [[VABD2_I_I]]
> +// CHECK: ret <4 x i16> [[ADD_I]]
> int16x4_t test_vaba_s16(int16x4_t a, int16x4_t b, int16x4_t c) {
> return vaba_s16(a, b, c);
> }
>
> -// CHECK-LABEL: test_vaba_s32
> -// CHECK: vaba.s32 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <2 x i32> @test_vaba_s32(<2 x i32> %a, <2 x i32>
> %b, <2 x i32> %c) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <2 x i32> %b to <8 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %c to <8 x i8>
> +// CHECK: [[VABD_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>
> +// CHECK: [[VABD1_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>
> +// CHECK: [[VABD2_I_I:%.*]] = call <2 x i32>
> @llvm.aarch64.neon.sabd.v2i32(<2 x i32> [[VABD_I_I]], <2 x i32>
> [[VABD1_I_I]]) #4
> +// CHECK: [[ADD_I:%.*]] = add <2 x i32> %a, [[VABD2_I_I]]
> +// CHECK: ret <2 x i32> [[ADD_I]]
> int32x2_t test_vaba_s32(int32x2_t a, int32x2_t b, int32x2_t c) {
> return vaba_s32(a, b, c);
> }
>
> -// CHECK-LABEL: test_vaba_u8
> -// CHECK: vaba.u8 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <8 x i8> @test_vaba_u8(<8 x i8> %a, <8 x i8> %b,
> <8 x i8> %c) #0 {
> +// CHECK: [[VABD_I_I:%.*]] = call <8 x i8>
> @llvm.aarch64.neon.uabd.v8i8(<8 x i8> %b, <8 x i8> %c) #4
> +// CHECK: [[ADD_I:%.*]] = add <8 x i8> %a, [[VABD_I_I]]
> +// CHECK: ret <8 x i8> [[ADD_I]]
> uint8x8_t test_vaba_u8(uint8x8_t a, uint8x8_t b, uint8x8_t c) {
> return vaba_u8(a, b, c);
> }
>
> -// CHECK-LABEL: test_vaba_u16
> -// CHECK: vaba.u16 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <4 x i16> @test_vaba_u16(<4 x i16> %a, <4 x i16>
> %b, <4 x i16> %c) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <4 x i16> %b to <8 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %c to <8 x i8>
> +// CHECK: [[VABD_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
> +// CHECK: [[VABD1_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>
> +// CHECK: [[VABD2_I_I:%.*]] = call <4 x i16>
> @llvm.aarch64.neon.uabd.v4i16(<4 x i16> [[VABD_I_I]], <4 x i16>
> [[VABD1_I_I]]) #4
> +// CHECK: [[ADD_I:%.*]] = add <4 x i16> %a, [[VABD2_I_I]]
> +// CHECK: ret <4 x i16> [[ADD_I]]
> uint16x4_t test_vaba_u16(uint16x4_t a, uint16x4_t b, uint16x4_t c) {
> return vaba_u16(a, b, c);
> }
>
> -// CHECK-LABEL: test_vaba_u32
> -// CHECK: vaba.u32 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <2 x i32> @test_vaba_u32(<2 x i32> %a, <2 x i32>
> %b, <2 x i32> %c) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <2 x i32> %b to <8 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %c to <8 x i8>
> +// CHECK: [[VABD_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>
> +// CHECK: [[VABD1_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>
> +// CHECK: [[VABD2_I_I:%.*]] = call <2 x i32>
> @llvm.aarch64.neon.uabd.v2i32(<2 x i32> [[VABD_I_I]], <2 x i32>
> [[VABD1_I_I]]) #4
> +// CHECK: [[ADD_I:%.*]] = add <2 x i32> %a, [[VABD2_I_I]]
> +// CHECK: ret <2 x i32> [[ADD_I]]
> uint32x2_t test_vaba_u32(uint32x2_t a, uint32x2_t b, uint32x2_t c) {
> return vaba_u32(a, b, c);
> }
>
> -// CHECK-LABEL: test_vabaq_s8
> -// CHECK: vaba.s8 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <16 x i8> @test_vabaq_s8(<16 x i8> %a, <16 x i8>
> %b, <16 x i8> %c) #0 {
> +// CHECK: [[VABD_I_I:%.*]] = call <16 x i8>
> @llvm.aarch64.neon.sabd.v16i8(<16 x i8> %b, <16 x i8> %c) #4
> +// CHECK: [[ADD_I:%.*]] = add <16 x i8> %a, [[VABD_I_I]]
> +// CHECK: ret <16 x i8> [[ADD_I]]
> int8x16_t test_vabaq_s8(int8x16_t a, int8x16_t b, int8x16_t c) {
> return vabaq_s8(a, b, c);
> }
>
> -// CHECK-LABEL: test_vabaq_s16
> -// CHECK: vaba.s16 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <8 x i16> @test_vabaq_s16(<8 x i16> %a, <8 x i16>
> %b, <8 x i16> %c) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %b to <16 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %c to <16 x i8>
> +// CHECK: [[VABD_I_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>
> +// CHECK: [[VABD1_I_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>
> +// CHECK: [[VABD2_I_I:%.*]] = call <8 x i16>
> @llvm.aarch64.neon.sabd.v8i16(<8 x i16> [[VABD_I_I]], <8 x i16>
> [[VABD1_I_I]]) #4
> +// CHECK: [[ADD_I:%.*]] = add <8 x i16> %a, [[VABD2_I_I]]
> +// CHECK: ret <8 x i16> [[ADD_I]]
> int16x8_t test_vabaq_s16(int16x8_t a, int16x8_t b, int16x8_t c) {
> return vabaq_s16(a, b, c);
> }
>
> -// CHECK-LABEL: test_vabaq_s32
> -// CHECK: vaba.s32 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <4 x i32> @test_vabaq_s32(<4 x i32> %a, <4 x i32>
> %b, <4 x i32> %c) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <4 x i32> %b to <16 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %c to <16 x i8>
> +// CHECK: [[VABD_I_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>
> +// CHECK: [[VABD1_I_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>
> +// CHECK: [[VABD2_I_I:%.*]] = call <4 x i32>
> @llvm.aarch64.neon.sabd.v4i32(<4 x i32> [[VABD_I_I]], <4 x i32>
> [[VABD1_I_I]]) #4
> +// CHECK: [[ADD_I:%.*]] = add <4 x i32> %a, [[VABD2_I_I]]
> +// CHECK: ret <4 x i32> [[ADD_I]]
> int32x4_t test_vabaq_s32(int32x4_t a, int32x4_t b, int32x4_t c) {
> return vabaq_s32(a, b, c);
> }
>
> -// CHECK-LABEL: test_vabaq_u8
> -// CHECK: vaba.u8 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <16 x i8> @test_vabaq_u8(<16 x i8> %a, <16 x i8>
> %b, <16 x i8> %c) #0 {
> +// CHECK: [[VABD_I_I:%.*]] = call <16 x i8>
> @llvm.aarch64.neon.uabd.v16i8(<16 x i8> %b, <16 x i8> %c) #4
> +// CHECK: [[ADD_I:%.*]] = add <16 x i8> %a, [[VABD_I_I]]
> +// CHECK: ret <16 x i8> [[ADD_I]]
> uint8x16_t test_vabaq_u8(uint8x16_t a, uint8x16_t b, uint8x16_t c) {
> return vabaq_u8(a, b, c);
> }
>
> -// CHECK-LABEL: test_vabaq_u16
> -// CHECK: vaba.u16 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <8 x i16> @test_vabaq_u16(<8 x i16> %a, <8 x i16>
> %b, <8 x i16> %c) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %b to <16 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %c to <16 x i8>
> +// CHECK: [[VABD_I_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>
> +// CHECK: [[VABD1_I_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>
> +// CHECK: [[VABD2_I_I:%.*]] = call <8 x i16>
> @llvm.aarch64.neon.uabd.v8i16(<8 x i16> [[VABD_I_I]], <8 x i16>
> [[VABD1_I_I]]) #4
> +// CHECK: [[ADD_I:%.*]] = add <8 x i16> %a, [[VABD2_I_I]]
> +// CHECK: ret <8 x i16> [[ADD_I]]
> uint16x8_t test_vabaq_u16(uint16x8_t a, uint16x8_t b, uint16x8_t c) {
> return vabaq_u16(a, b, c);
> }
>
> -// CHECK-LABEL: test_vabaq_u32
> -// CHECK: vaba.u32 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <4 x i32> @test_vabaq_u32(<4 x i32> %a, <4 x i32>
> %b, <4 x i32> %c) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <4 x i32> %b to <16 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %c to <16 x i8>
> +// CHECK: [[VABD_I_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>
> +// CHECK: [[VABD1_I_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>
> +// CHECK: [[VABD2_I_I:%.*]] = call <4 x i32>
> @llvm.aarch64.neon.uabd.v4i32(<4 x i32> [[VABD_I_I]], <4 x i32>
> [[VABD1_I_I]]) #4
> +// CHECK: [[ADD_I:%.*]] = add <4 x i32> %a, [[VABD2_I_I]]
> +// CHECK: ret <4 x i32> [[ADD_I]]
> uint32x4_t test_vabaq_u32(uint32x4_t a, uint32x4_t b, uint32x4_t c) {
> return vabaq_u32(a, b, c);
> }
>
>
> -// CHECK-LABEL: test_vabal_s8
> -// CHECK: vabal.s8 q{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <8 x i16> @test_vabal_s8(<8 x i16> %a, <8 x i8>
> %b, <8 x i8> %c) #0 {
> +// CHECK: [[VABD_I_I_I:%.*]] = call <8 x i8>
> @llvm.aarch64.neon.sabd.v8i8(<8 x i8> %b, <8 x i8> %c) #4
> +// CHECK: [[VMOVL_I_I_I:%.*]] = zext <8 x i8> [[VABD_I_I_I]] to <8 x
> i16>
> +// CHECK: [[ADD_I:%.*]] = add <8 x i16> %a, [[VMOVL_I_I_I]]
> +// CHECK: ret <8 x i16> [[ADD_I]]
> int16x8_t test_vabal_s8(int16x8_t a, int8x8_t b, int8x8_t c) {
> return vabal_s8(a, b, c);
> }
>
> -// CHECK-LABEL: test_vabal_s16
> -// CHECK: vabal.s16 q{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <4 x i32> @test_vabal_s16(<4 x i32> %a, <4 x i16>
> %b, <4 x i16> %c) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <4 x i16> %b to <8 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %c to <8 x i8>
> +// CHECK: [[VABD_I_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
> +// CHECK: [[VABD1_I_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>
> +// CHECK: [[VABD2_I_I_I:%.*]] = call <4 x i16>
> @llvm.aarch64.neon.sabd.v4i16(<4 x i16> [[VABD_I_I_I]], <4 x i16>
> [[VABD1_I_I_I]]) #4
> +// CHECK: [[TMP2:%.*]] = bitcast <4 x i16> [[VABD2_I_I_I]] to <8 x i8>
> +// CHECK: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>
> +// CHECK: [[VMOVL_I_I_I:%.*]] = zext <4 x i16> [[TMP3]] to <4 x i32>
> +// CHECK: [[ADD_I:%.*]] = add <4 x i32> %a, [[VMOVL_I_I_I]]
> +// CHECK: ret <4 x i32> [[ADD_I]]
> int32x4_t test_vabal_s16(int32x4_t a, int16x4_t b, int16x4_t c) {
> return vabal_s16(a, b, c);
> }
>
> -// CHECK-LABEL: test_vabal_s32
> -// CHECK: vabal.s32 q{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <2 x i64> @test_vabal_s32(<2 x i64> %a, <2 x i32>
> %b, <2 x i32> %c) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <2 x i32> %b to <8 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %c to <8 x i8>
> +// CHECK: [[VABD_I_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>
> +// CHECK: [[VABD1_I_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>
> +// CHECK: [[VABD2_I_I_I:%.*]] = call <2 x i32>
> @llvm.aarch64.neon.sabd.v2i32(<2 x i32> [[VABD_I_I_I]], <2 x i32>
> [[VABD1_I_I_I]]) #4
> +// CHECK: [[TMP2:%.*]] = bitcast <2 x i32> [[VABD2_I_I_I]] to <8 x i8>
> +// CHECK: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x i32>
> +// CHECK: [[VMOVL_I_I_I:%.*]] = zext <2 x i32> [[TMP3]] to <2 x i64>
> +// CHECK: [[ADD_I:%.*]] = add <2 x i64> %a, [[VMOVL_I_I_I]]
> +// CHECK: ret <2 x i64> [[ADD_I]]
> int64x2_t test_vabal_s32(int64x2_t a, int32x2_t b, int32x2_t c) {
> return vabal_s32(a, b, c);
> }
>
> -// CHECK-LABEL: test_vabal_u8
> -// CHECK: vabal.u8 q{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <8 x i16> @test_vabal_u8(<8 x i16> %a, <8 x i8>
> %b, <8 x i8> %c) #0 {
> +// CHECK: [[VABD_I_I_I:%.*]] = call <8 x i8>
> @llvm.aarch64.neon.uabd.v8i8(<8 x i8> %b, <8 x i8> %c) #4
> +// CHECK: [[VMOVL_I_I_I:%.*]] = zext <8 x i8> [[VABD_I_I_I]] to <8 x
> i16>
> +// CHECK: [[ADD_I:%.*]] = add <8 x i16> %a, [[VMOVL_I_I_I]]
> +// CHECK: ret <8 x i16> [[ADD_I]]
> uint16x8_t test_vabal_u8(uint16x8_t a, uint8x8_t b, uint8x8_t c) {
> return vabal_u8(a, b, c);
> }
>
> -// CHECK-LABEL: test_vabal_u16
> -// CHECK: vabal.u16 q{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <4 x i32> @test_vabal_u16(<4 x i32> %a, <4 x i16>
> %b, <4 x i16> %c) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <4 x i16> %b to <8 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %c to <8 x i8>
> +// CHECK: [[VABD_I_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
> +// CHECK: [[VABD1_I_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>
> +// CHECK: [[VABD2_I_I_I:%.*]] = call <4 x i16>
> @llvm.aarch64.neon.uabd.v4i16(<4 x i16> [[VABD_I_I_I]], <4 x i16>
> [[VABD1_I_I_I]]) #4
> +// CHECK: [[TMP2:%.*]] = bitcast <4 x i16> [[VABD2_I_I_I]] to <8 x i8>
> +// CHECK: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>
> +// CHECK: [[VMOVL_I_I_I:%.*]] = zext <4 x i16> [[TMP3]] to <4 x i32>
> +// CHECK: [[ADD_I:%.*]] = add <4 x i32> %a, [[VMOVL_I_I_I]]
> +// CHECK: ret <4 x i32> [[ADD_I]]
> uint32x4_t test_vabal_u16(uint32x4_t a, uint16x4_t b, uint16x4_t c) {
> return vabal_u16(a, b, c);
> }
>
> -// CHECK-LABEL: test_vabal_u32
> -// CHECK: vabal.u32 q{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <2 x i64> @test_vabal_u32(<2 x i64> %a, <2 x i32>
> %b, <2 x i32> %c) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <2 x i32> %b to <8 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %c to <8 x i8>
> +// CHECK: [[VABD_I_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>
> +// CHECK: [[VABD1_I_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>
> +// CHECK: [[VABD2_I_I_I:%.*]] = call <2 x i32>
> @llvm.aarch64.neon.uabd.v2i32(<2 x i32> [[VABD_I_I_I]], <2 x i32>
> [[VABD1_I_I_I]]) #4
> +// CHECK: [[TMP2:%.*]] = bitcast <2 x i32> [[VABD2_I_I_I]] to <8 x i8>
> +// CHECK: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x i32>
> +// CHECK: [[VMOVL_I_I_I:%.*]] = zext <2 x i32> [[TMP3]] to <2 x i64>
> +// CHECK: [[ADD_I:%.*]] = add <2 x i64> %a, [[VMOVL_I_I_I]]
> +// CHECK: ret <2 x i64> [[ADD_I]]
> uint64x2_t test_vabal_u32(uint64x2_t a, uint32x2_t b, uint32x2_t c) {
> return vabal_u32(a, b, c);
> }
>
>
> -// CHECK-LABEL: test_vabd_s8
> -// CHECK: vabd.s8 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <8 x i8> @test_vabd_s8(<8 x i8> %a, <8 x i8> %b)
> #0 {
> +// CHECK: [[VABD_I:%.*]] = call <8 x i8>
> @llvm.aarch64.neon.sabd.v8i8(<8 x i8> %a, <8 x i8> %b) #4
> +// CHECK: ret <8 x i8> [[VABD_I]]
> int8x8_t test_vabd_s8(int8x8_t a, int8x8_t b) {
> return vabd_s8(a, b);
> }
>
> -// CHECK-LABEL: test_vabd_s16
> -// CHECK: vabd.s16 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <4 x i16> @test_vabd_s16(<4 x i16> %a, <4 x i16>
> %b) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <4 x i16> %a to <8 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8>
> +// CHECK: [[VABD_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
> +// CHECK: [[VABD1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>
> +// CHECK: [[VABD2_I:%.*]] = call <4 x i16>
> @llvm.aarch64.neon.sabd.v4i16(<4 x i16> [[VABD_I]], <4 x i16> [[VABD1_I]])
> #4
> +// CHECK: ret <4 x i16> [[VABD2_I]]
> int16x4_t test_vabd_s16(int16x4_t a, int16x4_t b) {
> return vabd_s16(a, b);
> }
>
> -// CHECK-LABEL: test_vabd_s32
> -// CHECK: vabd.s32 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <2 x i32> @test_vabd_s32(<2 x i32> %a, <2 x i32>
> %b) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <2 x i32> %a to <8 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %b to <8 x i8>
> +// CHECK: [[VABD_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>
> +// CHECK: [[VABD1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>
> +// CHECK: [[VABD2_I:%.*]] = call <2 x i32>
> @llvm.aarch64.neon.sabd.v2i32(<2 x i32> [[VABD_I]], <2 x i32> [[VABD1_I]])
> #4
> +// CHECK: ret <2 x i32> [[VABD2_I]]
> int32x2_t test_vabd_s32(int32x2_t a, int32x2_t b) {
> return vabd_s32(a, b);
> }
>
> -// CHECK-LABEL: test_vabd_u8
> -// CHECK: vabd.u8 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <8 x i8> @test_vabd_u8(<8 x i8> %a, <8 x i8> %b)
> #0 {
> +// CHECK: [[VABD_I:%.*]] = call <8 x i8>
> @llvm.aarch64.neon.uabd.v8i8(<8 x i8> %a, <8 x i8> %b) #4
> +// CHECK: ret <8 x i8> [[VABD_I]]
> uint8x8_t test_vabd_u8(uint8x8_t a, uint8x8_t b) {
> return vabd_u8(a, b);
> }
>
> -// CHECK-LABEL: test_vabd_u16
> -// CHECK: vabd.u16 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <4 x i16> @test_vabd_u16(<4 x i16> %a, <4 x i16>
> %b) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <4 x i16> %a to <8 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8>
> +// CHECK: [[VABD_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
> +// CHECK: [[VABD1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>
> +// CHECK: [[VABD2_I:%.*]] = call <4 x i16>
> @llvm.aarch64.neon.uabd.v4i16(<4 x i16> [[VABD_I]], <4 x i16> [[VABD1_I]])
> #4
> +// CHECK: ret <4 x i16> [[VABD2_I]]
> uint16x4_t test_vabd_u16(uint16x4_t a, uint16x4_t b) {
> return vabd_u16(a, b);
> }
>
> -// CHECK-LABEL: test_vabd_u32
> -// CHECK: vabd.u32 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <2 x i32> @test_vabd_u32(<2 x i32> %a, <2 x i32>
> %b) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <2 x i32> %a to <8 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %b to <8 x i8>
> +// CHECK: [[VABD_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>
> +// CHECK: [[VABD1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>
> +// CHECK: [[VABD2_I:%.*]] = call <2 x i32>
> @llvm.aarch64.neon.uabd.v2i32(<2 x i32> [[VABD_I]], <2 x i32> [[VABD1_I]])
> #4
> +// CHECK: ret <2 x i32> [[VABD2_I]]
> uint32x2_t test_vabd_u32(uint32x2_t a, uint32x2_t b) {
> return vabd_u32(a, b);
> }
>
> -// CHECK-LABEL: test_vabd_f32
> -// CHECK: vabd.f32 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <2 x float> @test_vabd_f32(<2 x float> %a, <2 x
> float> %b) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <2 x float> %b to <8 x i8>
> +// CHECK: [[VABD_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float>
> +// CHECK: [[VABD1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x float>
> +// CHECK: [[VABD2_I:%.*]] = call <2 x float>
> @llvm.aarch64.neon.fabd.v2f32(<2 x float> [[VABD_I]], <2 x float>
> [[VABD1_I]]) #4
> +// CHECK: ret <2 x float> [[VABD2_I]]
> float32x2_t test_vabd_f32(float32x2_t a, float32x2_t b) {
> return vabd_f32(a, b);
> }
>
> -// CHECK-LABEL: test_vabdq_s8
> -// CHECK: vabd.s8 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <16 x i8> @test_vabdq_s8(<16 x i8> %a, <16 x i8>
> %b) #0 {
> +// CHECK: [[VABD_I:%.*]] = call <16 x i8>
> @llvm.aarch64.neon.sabd.v16i8(<16 x i8> %a, <16 x i8> %b) #4
> +// CHECK: ret <16 x i8> [[VABD_I]]
> int8x16_t test_vabdq_s8(int8x16_t a, int8x16_t b) {
> return vabdq_s8(a, b);
> }
>
> -// CHECK-LABEL: test_vabdq_s16
> -// CHECK: vabd.s16 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <8 x i16> @test_vabdq_s16(<8 x i16> %a, <8 x i16>
> %b) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %a to <16 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8>
> +// CHECK: [[VABD_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>
> +// CHECK: [[VABD1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>
> +// CHECK: [[VABD2_I:%.*]] = call <8 x i16>
> @llvm.aarch64.neon.sabd.v8i16(<8 x i16> [[VABD_I]], <8 x i16> [[VABD1_I]])
> #4
> +// CHECK: ret <8 x i16> [[VABD2_I]]
> int16x8_t test_vabdq_s16(int16x8_t a, int16x8_t b) {
> return vabdq_s16(a, b);
> }
>
> -// CHECK-LABEL: test_vabdq_s32
> -// CHECK: vabd.s32 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <4 x i32> @test_vabdq_s32(<4 x i32> %a, <4 x i32>
> %b) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <4 x i32> %a to <16 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %b to <16 x i8>
> +// CHECK: [[VABD_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>
> +// CHECK: [[VABD1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>
> +// CHECK: [[VABD2_I:%.*]] = call <4 x i32>
> @llvm.aarch64.neon.sabd.v4i32(<4 x i32> [[VABD_I]], <4 x i32> [[VABD1_I]])
> #4
> +// CHECK: ret <4 x i32> [[VABD2_I]]
> int32x4_t test_vabdq_s32(int32x4_t a, int32x4_t b) {
> return vabdq_s32(a, b);
> }
>
> -// CHECK-LABEL: test_vabdq_u8
> -// CHECK: vabd.u8 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <16 x i8> @test_vabdq_u8(<16 x i8> %a, <16 x i8>
> %b) #0 {
> +// CHECK: [[VABD_I:%.*]] = call <16 x i8>
> @llvm.aarch64.neon.uabd.v16i8(<16 x i8> %a, <16 x i8> %b) #4
> +// CHECK: ret <16 x i8> [[VABD_I]]
> uint8x16_t test_vabdq_u8(uint8x16_t a, uint8x16_t b) {
> return vabdq_u8(a, b);
> }
>
> -// CHECK-LABEL: test_vabdq_u16
> -// CHECK: vabd.u16 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <8 x i16> @test_vabdq_u16(<8 x i16> %a, <8 x i16>
> %b) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %a to <16 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8>
> +// CHECK: [[VABD_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>
> +// CHECK: [[VABD1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>
> +// CHECK: [[VABD2_I:%.*]] = call <8 x i16>
> @llvm.aarch64.neon.uabd.v8i16(<8 x i16> [[VABD_I]], <8 x i16> [[VABD1_I]])
> #4
> +// CHECK: ret <8 x i16> [[VABD2_I]]
> uint16x8_t test_vabdq_u16(uint16x8_t a, uint16x8_t b) {
> return vabdq_u16(a, b);
> }
>
> -// CHECK-LABEL: test_vabdq_u32
> -// CHECK: vabd.u32 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <4 x i32> @test_vabdq_u32(<4 x i32> %a, <4 x i32>
> %b) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <4 x i32> %a to <16 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %b to <16 x i8>
> +// CHECK: [[VABD_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>
> +// CHECK: [[VABD1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>
> +// CHECK: [[VABD2_I:%.*]] = call <4 x i32>
> @llvm.aarch64.neon.uabd.v4i32(<4 x i32> [[VABD_I]], <4 x i32> [[VABD1_I]])
> #4
> +// CHECK: ret <4 x i32> [[VABD2_I]]
> uint32x4_t test_vabdq_u32(uint32x4_t a, uint32x4_t b) {
> return vabdq_u32(a, b);
> }
>
> -// CHECK-LABEL: test_vabdq_f32
> -// CHECK: vabd.f32 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <4 x float> @test_vabdq_f32(<4 x float> %a, <4 x
> float> %b) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <4 x float> %b to <16 x i8>
> +// CHECK: [[VABD_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float>
> +// CHECK: [[VABD1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x float>
> +// CHECK: [[VABD2_I:%.*]] = call <4 x float>
> @llvm.aarch64.neon.fabd.v4f32(<4 x float> [[VABD_I]], <4 x float>
> [[VABD1_I]]) #4
> +// CHECK: ret <4 x float> [[VABD2_I]]
> float32x4_t test_vabdq_f32(float32x4_t a, float32x4_t b) {
> return vabdq_f32(a, b);
> }
>
>
> -// CHECK-LABEL: test_vabdl_s8
> -// CHECK: vabdl.s8 q{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <8 x i16> @test_vabdl_s8(<8 x i8> %a, <8 x i8> %b)
> #0 {
> +// CHECK: [[VABD_I_I:%.*]] = call <8 x i8>
> @llvm.aarch64.neon.sabd.v8i8(<8 x i8> %a, <8 x i8> %b) #4
> +// CHECK: [[VMOVL_I_I:%.*]] = zext <8 x i8> [[VABD_I_I]] to <8 x i16>
> +// CHECK: ret <8 x i16> [[VMOVL_I_I]]
> int16x8_t test_vabdl_s8(int8x8_t a, int8x8_t b) {
> return vabdl_s8(a, b);
> }
>
> -// CHECK-LABEL: test_vabdl_s16
> -// CHECK: vabdl.s16 q{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <4 x i32> @test_vabdl_s16(<4 x i16> %a, <4 x i16>
> %b) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <4 x i16> %a to <8 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8>
> +// CHECK: [[VABD_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
> +// CHECK: [[VABD1_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>
> +// CHECK: [[VABD2_I_I:%.*]] = call <4 x i16>
> @llvm.aarch64.neon.sabd.v4i16(<4 x i16> [[VABD_I_I]], <4 x i16>
> [[VABD1_I_I]]) #4
> +// CHECK: [[TMP2:%.*]] = bitcast <4 x i16> [[VABD2_I_I]] to <8 x i8>
> +// CHECK: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>
> +// CHECK: [[VMOVL_I_I:%.*]] = zext <4 x i16> [[TMP3]] to <4 x i32>
> +// CHECK: ret <4 x i32> [[VMOVL_I_I]]
> int32x4_t test_vabdl_s16(int16x4_t a, int16x4_t b) {
> return vabdl_s16(a, b);
> }
>
> -// CHECK-LABEL: test_vabdl_s32
> -// CHECK: vabdl.s32 q{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <2 x i64> @test_vabdl_s32(<2 x i32> %a, <2 x i32>
> %b) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <2 x i32> %a to <8 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %b to <8 x i8>
> +// CHECK: [[VABD_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>
> +// CHECK: [[VABD1_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>
> +// CHECK: [[VABD2_I_I:%.*]] = call <2 x i32>
> @llvm.aarch64.neon.sabd.v2i32(<2 x i32> [[VABD_I_I]], <2 x i32>
> [[VABD1_I_I]]) #4
> +// CHECK: [[TMP2:%.*]] = bitcast <2 x i32> [[VABD2_I_I]] to <8 x i8>
> +// CHECK: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x i32>
> +// CHECK: [[VMOVL_I_I:%.*]] = zext <2 x i32> [[TMP3]] to <2 x i64>
> +// CHECK: ret <2 x i64> [[VMOVL_I_I]]
> int64x2_t test_vabdl_s32(int32x2_t a, int32x2_t b) {
> return vabdl_s32(a, b);
> }
>
> -// CHECK-LABEL: test_vabdl_u8
> -// CHECK: vabdl.u8 q{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <8 x i16> @test_vabdl_u8(<8 x i8> %a, <8 x i8> %b)
> #0 {
> +// CHECK: [[VABD_I_I:%.*]] = call <8 x i8>
> @llvm.aarch64.neon.uabd.v8i8(<8 x i8> %a, <8 x i8> %b) #4
> +// CHECK: [[VMOVL_I_I:%.*]] = zext <8 x i8> [[VABD_I_I]] to <8 x i16>
> +// CHECK: ret <8 x i16> [[VMOVL_I_I]]
> uint16x8_t test_vabdl_u8(uint8x8_t a, uint8x8_t b) {
> return vabdl_u8(a, b);
> }
>
> -// CHECK-LABEL: test_vabdl_u16
> -// CHECK: vabdl.u16 q{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <4 x i32> @test_vabdl_u16(<4 x i16> %a, <4 x i16>
> %b) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <4 x i16> %a to <8 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8>
> +// CHECK: [[VABD_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
> +// CHECK: [[VABD1_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>
> +// CHECK: [[VABD2_I_I:%.*]] = call <4 x i16>
> @llvm.aarch64.neon.uabd.v4i16(<4 x i16> [[VABD_I_I]], <4 x i16>
> [[VABD1_I_I]]) #4
> +// CHECK: [[TMP2:%.*]] = bitcast <4 x i16> [[VABD2_I_I]] to <8 x i8>
> +// CHECK: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>
> +// CHECK: [[VMOVL_I_I:%.*]] = zext <4 x i16> [[TMP3]] to <4 x i32>
> +// CHECK: ret <4 x i32> [[VMOVL_I_I]]
> uint32x4_t test_vabdl_u16(uint16x4_t a, uint16x4_t b) {
> return vabdl_u16(a, b);
> }
>
> -// CHECK-LABEL: test_vabdl_u32
> -// CHECK: vabdl.u32 q{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <2 x i64> @test_vabdl_u32(<2 x i32> %a, <2 x i32>
> %b) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <2 x i32> %a to <8 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %b to <8 x i8>
> +// CHECK: [[VABD_I_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>
> +// CHECK: [[VABD1_I_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>
> +// CHECK: [[VABD2_I_I:%.*]] = call <2 x i32>
> @llvm.aarch64.neon.uabd.v2i32(<2 x i32> [[VABD_I_I]], <2 x i32>
> [[VABD1_I_I]]) #4
> +// CHECK: [[TMP2:%.*]] = bitcast <2 x i32> [[VABD2_I_I]] to <8 x i8>
> +// CHECK: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x i32>
> +// CHECK: [[VMOVL_I_I:%.*]] = zext <2 x i32> [[TMP3]] to <2 x i64>
> +// CHECK: ret <2 x i64> [[VMOVL_I_I]]
> uint64x2_t test_vabdl_u32(uint32x2_t a, uint32x2_t b) {
> return vabdl_u32(a, b);
> }
>
>
> -// CHECK-LABEL: test_vabs_s8
> -// CHECK: vabs.s8 d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <8 x i8> @test_vabs_s8(<8 x i8> %a) #0 {
> +// CHECK: [[VABS_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.abs.v8i8(<8
> x i8> %a) #4
> +// CHECK: ret <8 x i8> [[VABS_I]]
> int8x8_t test_vabs_s8(int8x8_t a) {
> return vabs_s8(a);
> }
>
> -// CHECK-LABEL: test_vabs_s16
> -// CHECK: vabs.s16 d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <4 x i16> @test_vabs_s16(<4 x i16> %a) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <4 x i16> %a to <8 x i8>
> +// CHECK: [[VABS_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
> +// CHECK: [[VABS1_I:%.*]] = call <4 x i16>
> @llvm.aarch64.neon.abs.v4i16(<4 x i16> [[VABS_I]]) #4
> +// CHECK: ret <4 x i16> [[VABS1_I]]
> int16x4_t test_vabs_s16(int16x4_t a) {
> return vabs_s16(a);
> }
>
> -// CHECK-LABEL: test_vabs_s32
> -// CHECK: vabs.s32 d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <2 x i32> @test_vabs_s32(<2 x i32> %a) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <2 x i32> %a to <8 x i8>
> +// CHECK: [[VABS_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>
> +// CHECK: [[VABS1_I:%.*]] = call <2 x i32>
> @llvm.aarch64.neon.abs.v2i32(<2 x i32> [[VABS_I]]) #4
> +// CHECK: ret <2 x i32> [[VABS1_I]]
> int32x2_t test_vabs_s32(int32x2_t a) {
> return vabs_s32(a);
> }
>
> -// CHECK-LABEL: test_vabs_f32
> -// CHECK: vabs.f32 d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <2 x float> @test_vabs_f32(<2 x float> %a) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8>
> +// CHECK: [[VABS_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float>
> +// CHECK: [[VABS1_I:%.*]] = call <2 x float> @llvm.fabs.v2f32(<2 x
> float> [[VABS_I]]) #4
> +// CHECK: ret <2 x float> [[VABS1_I]]
> float32x2_t test_vabs_f32(float32x2_t a) {
> return vabs_f32(a);
> }
>
> -// CHECK-LABEL: test_vabsq_s8
> -// CHECK: vabs.s8 q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <16 x i8> @test_vabsq_s8(<16 x i8> %a) #0 {
> +// CHECK: [[VABS_I:%.*]] = call <16 x i8>
> @llvm.aarch64.neon.abs.v16i8(<16 x i8> %a) #4
> +// CHECK: ret <16 x i8> [[VABS_I]]
> int8x16_t test_vabsq_s8(int8x16_t a) {
> return vabsq_s8(a);
> }
>
> -// CHECK-LABEL: test_vabsq_s16
> -// CHECK: vabs.s16 q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <8 x i16> @test_vabsq_s16(<8 x i16> %a) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %a to <16 x i8>
> +// CHECK: [[VABS_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>
> +// CHECK: [[VABS1_I:%.*]] = call <8 x i16>
> @llvm.aarch64.neon.abs.v8i16(<8 x i16> [[VABS_I]]) #4
> +// CHECK: ret <8 x i16> [[VABS1_I]]
> int16x8_t test_vabsq_s16(int16x8_t a) {
> return vabsq_s16(a);
> }
>
> -// CHECK-LABEL: test_vabsq_s32
> -// CHECK: vabs.s32 q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <4 x i32> @test_vabsq_s32(<4 x i32> %a) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <4 x i32> %a to <16 x i8>
> +// CHECK: [[VABS_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>
> +// CHECK: [[VABS1_I:%.*]] = call <4 x i32>
> @llvm.aarch64.neon.abs.v4i32(<4 x i32> [[VABS_I]]) #4
> +// CHECK: ret <4 x i32> [[VABS1_I]]
> int32x4_t test_vabsq_s32(int32x4_t a) {
> return vabsq_s32(a);
> }
>
> -// CHECK-LABEL: test_vabsq_f32
> -// CHECK: vabs.f32 q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <4 x float> @test_vabsq_f32(<4 x float> %a) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8>
> +// CHECK: [[VABS_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float>
> +// CHECK: [[VABS1_I:%.*]] = call <4 x float> @llvm.fabs.v4f32(<4 x
> float> [[VABS_I]]) #4
> +// CHECK: ret <4 x float> [[VABS1_I]]
> float32x4_t test_vabsq_f32(float32x4_t a) {
> return vabsq_f32(a);
> }
>
>
> -// CHECK-LABEL: test_vadd_s8
> -// CHECK: vadd.i8 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <8 x i8> @test_vadd_s8(<8 x i8> %a, <8 x i8> %b)
> #0 {
> +// CHECK: [[ADD_I:%.*]] = add <8 x i8> %a, %b
> +// CHECK: ret <8 x i8> [[ADD_I]]
> int8x8_t test_vadd_s8(int8x8_t a, int8x8_t b) {
> return vadd_s8(a, b);
> }
>
> -// CHECK-LABEL: test_vadd_s16
> -// CHECK: vadd.i16 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <4 x i16> @test_vadd_s16(<4 x i16> %a, <4 x i16>
> %b) #0 {
> +// CHECK: [[ADD_I:%.*]] = add <4 x i16> %a, %b
> +// CHECK: ret <4 x i16> [[ADD_I]]
> int16x4_t test_vadd_s16(int16x4_t a, int16x4_t b) {
> return vadd_s16(a, b);
> }
>
> -// CHECK-LABEL: test_vadd_s32
> -// CHECK: vadd.i32 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <2 x i32> @test_vadd_s32(<2 x i32> %a, <2 x i32>
> %b) #0 {
> +// CHECK: [[ADD_I:%.*]] = add <2 x i32> %a, %b
> +// CHECK: ret <2 x i32> [[ADD_I]]
> int32x2_t test_vadd_s32(int32x2_t a, int32x2_t b) {
> return vadd_s32(a, b);
> }
>
> -// CHECK-LABEL: test_vadd_s64
> -// CHECK: vadd.i64 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <1 x i64> @test_vadd_s64(<1 x i64> %a, <1 x i64>
> %b) #0 {
> +// CHECK: [[ADD_I:%.*]] = add <1 x i64> %a, %b
> +// CHECK: ret <1 x i64> [[ADD_I]]
> int64x1_t test_vadd_s64(int64x1_t a, int64x1_t b) {
> return vadd_s64(a, b);
> }
>
> -// CHECK-LABEL: test_vadd_f32
> -// CHECK: vadd.f32 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <2 x float> @test_vadd_f32(<2 x float> %a, <2 x
> float> %b) #0 {
> +// CHECK: [[ADD_I:%.*]] = fadd <2 x float> %a, %b
> +// CHECK: ret <2 x float> [[ADD_I]]
> float32x2_t test_vadd_f32(float32x2_t a, float32x2_t b) {
> return vadd_f32(a, b);
> }
>
> -// CHECK-LABEL: test_vadd_u8
> -// CHECK: vadd.i8 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <8 x i8> @test_vadd_u8(<8 x i8> %a, <8 x i8> %b)
> #0 {
> +// CHECK: [[ADD_I:%.*]] = add <8 x i8> %a, %b
> +// CHECK: ret <8 x i8> [[ADD_I]]
> uint8x8_t test_vadd_u8(uint8x8_t a, uint8x8_t b) {
> return vadd_u8(a, b);
> }
>
> -// CHECK-LABEL: test_vadd_u16
> -// CHECK: vadd.i16 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <4 x i16> @test_vadd_u16(<4 x i16> %a, <4 x i16>
> %b) #0 {
> +// CHECK: [[ADD_I:%.*]] = add <4 x i16> %a, %b
> +// CHECK: ret <4 x i16> [[ADD_I]]
> uint16x4_t test_vadd_u16(uint16x4_t a, uint16x4_t b) {
> return vadd_u16(a, b);
> }
>
> -// CHECK-LABEL: test_vadd_u32
> -// CHECK: vadd.i32 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <2 x i32> @test_vadd_u32(<2 x i32> %a, <2 x i32>
> %b) #0 {
> +// CHECK: [[ADD_I:%.*]] = add <2 x i32> %a, %b
> +// CHECK: ret <2 x i32> [[ADD_I]]
> uint32x2_t test_vadd_u32(uint32x2_t a, uint32x2_t b) {
> return vadd_u32(a, b);
> }
>
> -// CHECK-LABEL: test_vadd_u64
> -// CHECK: vadd.i64 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <1 x i64> @test_vadd_u64(<1 x i64> %a, <1 x i64>
> %b) #0 {
> +// CHECK: [[ADD_I:%.*]] = add <1 x i64> %a, %b
> +// CHECK: ret <1 x i64> [[ADD_I]]
> uint64x1_t test_vadd_u64(uint64x1_t a, uint64x1_t b) {
> return vadd_u64(a, b);
> }
>
> -// CHECK-LABEL: test_vaddq_s8
> -// CHECK: vadd.i8 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <16 x i8> @test_vaddq_s8(<16 x i8> %a, <16 x i8>
> %b) #0 {
> +// CHECK: [[ADD_I:%.*]] = add <16 x i8> %a, %b
> +// CHECK: ret <16 x i8> [[ADD_I]]
> int8x16_t test_vaddq_s8(int8x16_t a, int8x16_t b) {
> return vaddq_s8(a, b);
> }
>
> -// CHECK-LABEL: test_vaddq_s16
> -// CHECK: vadd.i16 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <8 x i16> @test_vaddq_s16(<8 x i16> %a, <8 x i16>
> %b) #0 {
> +// CHECK: [[ADD_I:%.*]] = add <8 x i16> %a, %b
> +// CHECK: ret <8 x i16> [[ADD_I]]
> int16x8_t test_vaddq_s16(int16x8_t a, int16x8_t b) {
> return vaddq_s16(a, b);
> }
>
> -// CHECK-LABEL: test_vaddq_s32
> -// CHECK: vadd.i32 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <4 x i32> @test_vaddq_s32(<4 x i32> %a, <4 x i32>
> %b) #0 {
> +// CHECK: [[ADD_I:%.*]] = add <4 x i32> %a, %b
> +// CHECK: ret <4 x i32> [[ADD_I]]
> int32x4_t test_vaddq_s32(int32x4_t a, int32x4_t b) {
> return vaddq_s32(a, b);
> }
>
> -// CHECK-LABEL: test_vaddq_s64
> -// CHECK: vadd.i64 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <2 x i64> @test_vaddq_s64(<2 x i64> %a, <2 x i64>
> %b) #0 {
> +// CHECK: [[ADD_I:%.*]] = add <2 x i64> %a, %b
> +// CHECK: ret <2 x i64> [[ADD_I]]
> int64x2_t test_vaddq_s64(int64x2_t a, int64x2_t b) {
> return vaddq_s64(a, b);
> }
>
> -// CHECK-LABEL: test_vaddq_f32
> -// CHECK: vadd.f32 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <4 x float> @test_vaddq_f32(<4 x float> %a, <4 x
> float> %b) #0 {
> +// CHECK: [[ADD_I:%.*]] = fadd <4 x float> %a, %b
> +// CHECK: ret <4 x float> [[ADD_I]]
> float32x4_t test_vaddq_f32(float32x4_t a, float32x4_t b) {
> return vaddq_f32(a, b);
> }
>
> -// CHECK-LABEL: test_vaddq_u8
> -// CHECK: vadd.i8 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <16 x i8> @test_vaddq_u8(<16 x i8> %a, <16 x i8>
> %b) #0 {
> +// CHECK: [[ADD_I:%.*]] = add <16 x i8> %a, %b
> +// CHECK: ret <16 x i8> [[ADD_I]]
> uint8x16_t test_vaddq_u8(uint8x16_t a, uint8x16_t b) {
> return vaddq_u8(a, b);
> }
>
> -// CHECK-LABEL: test_vaddq_u16
> -// CHECK: vadd.i16 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <8 x i16> @test_vaddq_u16(<8 x i16> %a, <8 x i16>
> %b) #0 {
> +// CHECK: [[ADD_I:%.*]] = add <8 x i16> %a, %b
> +// CHECK: ret <8 x i16> [[ADD_I]]
> uint16x8_t test_vaddq_u16(uint16x8_t a, uint16x8_t b) {
> return vaddq_u16(a, b);
> }
>
> -// CHECK-LABEL: test_vaddq_u32
> -// CHECK: vadd.i32 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <4 x i32> @test_vaddq_u32(<4 x i32> %a, <4 x i32>
> %b) #0 {
> +// CHECK: [[ADD_I:%.*]] = add <4 x i32> %a, %b
> +// CHECK: ret <4 x i32> [[ADD_I]]
> uint32x4_t test_vaddq_u32(uint32x4_t a, uint32x4_t b) {
> return vaddq_u32(a, b);
> }
>
> -// CHECK-LABEL: test_vaddq_u64
> -// CHECK: vadd.i64 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <2 x i64> @test_vaddq_u64(<2 x i64> %a, <2 x i64>
> %b) #0 {
> +// CHECK: [[ADD_I:%.*]] = add <2 x i64> %a, %b
> +// CHECK: ret <2 x i64> [[ADD_I]]
> uint64x2_t test_vaddq_u64(uint64x2_t a, uint64x2_t b) {
> return vaddq_u64(a, b);
> }
>
>
> -// CHECK-LABEL: test_vaddhn_s16
> -// CHECK: vaddhn.i16 d{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <8 x i8> @test_vaddhn_s16(<8 x i16> %a, <8 x i16>
> %b) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %a to <16 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8>
> +// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>
> +// CHECK: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>
> +// CHECK: [[VADDHN_I:%.*]] = add <8 x i16> [[TMP2]], [[TMP3]]
> +// CHECK: [[VADDHN1_I:%.*]] = lshr <8 x i16> [[VADDHN_I]], <i16 8, i16
> 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>
> +// CHECK: [[VADDHN2_I:%.*]] = trunc <8 x i16> [[VADDHN1_I]] to <8 x i8>
> +// CHECK: ret <8 x i8> [[VADDHN2_I]]
> int8x8_t test_vaddhn_s16(int16x8_t a, int16x8_t b) {
> return vaddhn_s16(a, b);
> }
>
> -// CHECK-LABEL: test_vaddhn_s32
> -// CHECK: vaddhn.i32 d{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <4 x i16> @test_vaddhn_s32(<4 x i32> %a, <4 x i32>
> %b) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <4 x i32> %a to <16 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %b to <16 x i8>
> +// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>
> +// CHECK: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>
> +// CHECK: [[VADDHN_I:%.*]] = add <4 x i32> [[TMP2]], [[TMP3]]
> +// CHECK: [[VADDHN1_I:%.*]] = lshr <4 x i32> [[VADDHN_I]], <i32 16, i32
> 16, i32 16, i32 16>
> +// CHECK: [[VADDHN2_I:%.*]] = trunc <4 x i32> [[VADDHN1_I]] to <4 x i16>
> +// CHECK: ret <4 x i16> [[VADDHN2_I]]
> int16x4_t test_vaddhn_s32(int32x4_t a, int32x4_t b) {
> return vaddhn_s32(a, b);
> }
>
> -// CHECK-LABEL: test_vaddhn_s64
> -// CHECK: vaddhn.i64 d{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <2 x i32> @test_vaddhn_s64(<2 x i64> %a, <2 x i64>
> %b) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to <16 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8>
> +// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>
> +// CHECK: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>
> +// CHECK: [[VADDHN_I:%.*]] = add <2 x i64> [[TMP2]], [[TMP3]]
> +// CHECK: [[VADDHN1_I:%.*]] = lshr <2 x i64> [[VADDHN_I]], <i64 32, i64
> 32>
> +// CHECK: [[VADDHN2_I:%.*]] = trunc <2 x i64> [[VADDHN1_I]] to <2 x i32>
> +// CHECK: ret <2 x i32> [[VADDHN2_I]]
> int32x2_t test_vaddhn_s64(int64x2_t a, int64x2_t b) {
> return vaddhn_s64(a, b);
> }
>
> -// CHECK-LABEL: test_vaddhn_u16
> -// CHECK: vaddhn.i16 d{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <8 x i8> @test_vaddhn_u16(<8 x i16> %a, <8 x i16>
> %b) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %a to <16 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8>
> +// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>
> +// CHECK: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>
> +// CHECK: [[VADDHN_I:%.*]] = add <8 x i16> [[TMP2]], [[TMP3]]
> +// CHECK: [[VADDHN1_I:%.*]] = lshr <8 x i16> [[VADDHN_I]], <i16 8, i16
> 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>
> +// CHECK: [[VADDHN2_I:%.*]] = trunc <8 x i16> [[VADDHN1_I]] to <8 x i8>
> +// CHECK: ret <8 x i8> [[VADDHN2_I]]
> uint8x8_t test_vaddhn_u16(uint16x8_t a, uint16x8_t b) {
> return vaddhn_u16(a, b);
> }
>
> -// CHECK-LABEL: test_vaddhn_u32
> -// CHECK: vaddhn.i32 d{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <4 x i16> @test_vaddhn_u32(<4 x i32> %a, <4 x i32>
> %b) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <4 x i32> %a to <16 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %b to <16 x i8>
> +// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>
> +// CHECK: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>
> +// CHECK: [[VADDHN_I:%.*]] = add <4 x i32> [[TMP2]], [[TMP3]]
> +// CHECK: [[VADDHN1_I:%.*]] = lshr <4 x i32> [[VADDHN_I]], <i32 16, i32
> 16, i32 16, i32 16>
> +// CHECK: [[VADDHN2_I:%.*]] = trunc <4 x i32> [[VADDHN1_I]] to <4 x i16>
> +// CHECK: ret <4 x i16> [[VADDHN2_I]]
> uint16x4_t test_vaddhn_u32(uint32x4_t a, uint32x4_t b) {
> return vaddhn_u32(a, b);
> }
>
> -// CHECK-LABEL: test_vaddhn_u64
> -// CHECK: vaddhn.i64 d{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <2 x i32> @test_vaddhn_u64(<2 x i64> %a, <2 x i64>
> %b) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to <16 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8>
> +// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>
> +// CHECK: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>
> +// CHECK: [[VADDHN_I:%.*]] = add <2 x i64> [[TMP2]], [[TMP3]]
> +// CHECK: [[VADDHN1_I:%.*]] = lshr <2 x i64> [[VADDHN_I]], <i64 32, i64
> 32>
> +// CHECK: [[VADDHN2_I:%.*]] = trunc <2 x i64> [[VADDHN1_I]] to <2 x i32>
> +// CHECK: ret <2 x i32> [[VADDHN2_I]]
> uint32x2_t test_vaddhn_u64(uint64x2_t a, uint64x2_t b) {
> return vaddhn_u64(a, b);
> }
>
>
> -// CHECK-LABEL: test_vaddl_s8
> -// CHECK: vaddl.s8 q{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <8 x i16> @test_vaddl_s8(<8 x i8> %a, <8 x i8> %b)
> #0 {
> +// CHECK: [[VMOVL_I_I:%.*]] = sext <8 x i8> %a to <8 x i16>
> +// CHECK: [[VMOVL_I4_I:%.*]] = sext <8 x i8> %b to <8 x i16>
> +// CHECK: [[ADD_I:%.*]] = add <8 x i16> [[VMOVL_I_I]], [[VMOVL_I4_I]]
> +// CHECK: ret <8 x i16> [[ADD_I]]
> int16x8_t test_vaddl_s8(int8x8_t a, int8x8_t b) {
> return vaddl_s8(a, b);
> }
>
> -// CHECK-LABEL: test_vaddl_s16
> -// CHECK: vaddl.s16 q{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <4 x i32> @test_vaddl_s16(<4 x i16> %a, <4 x i16>
> %b) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <4 x i16> %a to <8 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
> +// CHECK: [[VMOVL_I_I:%.*]] = sext <4 x i16> [[TMP1]] to <4 x i32>
> +// CHECK: [[TMP2:%.*]] = bitcast <4 x i16> %b to <8 x i8>
> +// CHECK: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>
> +// CHECK: [[VMOVL_I4_I:%.*]] = sext <4 x i16> [[TMP3]] to <4 x i32>
> +// CHECK: [[ADD_I:%.*]] = add <4 x i32> [[VMOVL_I_I]], [[VMOVL_I4_I]]
> +// CHECK: ret <4 x i32> [[ADD_I]]
> int32x4_t test_vaddl_s16(int16x4_t a, int16x4_t b) {
> return vaddl_s16(a, b);
> }
>
> -// CHECK-LABEL: test_vaddl_s32
> -// CHECK: vaddl.s32 q{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <2 x i64> @test_vaddl_s32(<2 x i32> %a, <2 x i32>
> %b) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <2 x i32> %a to <8 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>
> +// CHECK: [[VMOVL_I_I:%.*]] = sext <2 x i32> [[TMP1]] to <2 x i64>
> +// CHECK: [[TMP2:%.*]] = bitcast <2 x i32> %b to <8 x i8>
> +// CHECK: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x i32>
> +// CHECK: [[VMOVL_I4_I:%.*]] = sext <2 x i32> [[TMP3]] to <2 x i64>
> +// CHECK: [[ADD_I:%.*]] = add <2 x i64> [[VMOVL_I_I]], [[VMOVL_I4_I]]
> +// CHECK: ret <2 x i64> [[ADD_I]]
> int64x2_t test_vaddl_s32(int32x2_t a, int32x2_t b) {
> return vaddl_s32(a, b);
> }
>
> -// CHECK-LABEL: test_vaddl_u8
> -// CHECK: vaddl.u8 q{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <8 x i16> @test_vaddl_u8(<8 x i8> %a, <8 x i8> %b)
> #0 {
> +// CHECK: [[VMOVL_I_I:%.*]] = zext <8 x i8> %a to <8 x i16>
> +// CHECK: [[VMOVL_I4_I:%.*]] = zext <8 x i8> %b to <8 x i16>
> +// CHECK: [[ADD_I:%.*]] = add <8 x i16> [[VMOVL_I_I]], [[VMOVL_I4_I]]
> +// CHECK: ret <8 x i16> [[ADD_I]]
> uint16x8_t test_vaddl_u8(uint8x8_t a, uint8x8_t b) {
> return vaddl_u8(a, b);
> }
>
> -// CHECK-LABEL: test_vaddl_u16
> -// CHECK: vaddl.u16 q{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <4 x i32> @test_vaddl_u16(<4 x i16> %a, <4 x i16>
> %b) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <4 x i16> %a to <8 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
> +// CHECK: [[VMOVL_I_I:%.*]] = zext <4 x i16> [[TMP1]] to <4 x i32>
> +// CHECK: [[TMP2:%.*]] = bitcast <4 x i16> %b to <8 x i8>
> +// CHECK: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>
> +// CHECK: [[VMOVL_I4_I:%.*]] = zext <4 x i16> [[TMP3]] to <4 x i32>
> +// CHECK: [[ADD_I:%.*]] = add <4 x i32> [[VMOVL_I_I]], [[VMOVL_I4_I]]
> +// CHECK: ret <4 x i32> [[ADD_I]]
> uint32x4_t test_vaddl_u16(uint16x4_t a, uint16x4_t b) {
> return vaddl_u16(a, b);
> }
>
> -// CHECK-LABEL: test_vaddl_u32
> -// CHECK: vaddl.u32 q{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <2 x i64> @test_vaddl_u32(<2 x i32> %a, <2 x i32>
> %b) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <2 x i32> %a to <8 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>
> +// CHECK: [[VMOVL_I_I:%.*]] = zext <2 x i32> [[TMP1]] to <2 x i64>
> +// CHECK: [[TMP2:%.*]] = bitcast <2 x i32> %b to <8 x i8>
> +// CHECK: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x i32>
> +// CHECK: [[VMOVL_I4_I:%.*]] = zext <2 x i32> [[TMP3]] to <2 x i64>
> +// CHECK: [[ADD_I:%.*]] = add <2 x i64> [[VMOVL_I_I]], [[VMOVL_I4_I]]
> +// CHECK: ret <2 x i64> [[ADD_I]]
> uint64x2_t test_vaddl_u32(uint32x2_t a, uint32x2_t b) {
> return vaddl_u32(a, b);
> }
>
>
> -// CHECK-LABEL: test_vaddw_s8
> -// CHECK: vaddw.s8 q{{[0-9]+}}, q{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <8 x i16> @test_vaddw_s8(<8 x i16> %a, <8 x i8>
> %b) #0 {
> +// CHECK: [[VMOVL_I_I:%.*]] = sext <8 x i8> %b to <8 x i16>
> +// CHECK: [[ADD_I:%.*]] = add <8 x i16> %a, [[VMOVL_I_I]]
> +// CHECK: ret <8 x i16> [[ADD_I]]
> int16x8_t test_vaddw_s8(int16x8_t a, int8x8_t b) {
> return vaddw_s8(a, b);
> }
>
> -// CHECK-LABEL: test_vaddw_s16
> -// CHECK: vaddw.s16 q{{[0-9]+}}, q{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <4 x i32> @test_vaddw_s16(<4 x i32> %a, <4 x i16>
> %b) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <4 x i16> %b to <8 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
> +// CHECK: [[VMOVL_I_I:%.*]] = sext <4 x i16> [[TMP1]] to <4 x i32>
> +// CHECK: [[ADD_I:%.*]] = add <4 x i32> %a, [[VMOVL_I_I]]
> +// CHECK: ret <4 x i32> [[ADD_I]]
> int32x4_t test_vaddw_s16(int32x4_t a, int16x4_t b) {
> return vaddw_s16(a, b);
> }
>
> -// CHECK-LABEL: test_vaddw_s32
> -// CHECK: vaddw.s32 q{{[0-9]+}}, q{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <2 x i64> @test_vaddw_s32(<2 x i64> %a, <2 x i32>
> %b) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <2 x i32> %b to <8 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>
> +// CHECK: [[VMOVL_I_I:%.*]] = sext <2 x i32> [[TMP1]] to <2 x i64>
> +// CHECK: [[ADD_I:%.*]] = add <2 x i64> %a, [[VMOVL_I_I]]
> +// CHECK: ret <2 x i64> [[ADD_I]]
> int64x2_t test_vaddw_s32(int64x2_t a, int32x2_t b) {
> return vaddw_s32(a, b);
> }
>
> -// CHECK-LABEL: test_vaddw_u8
> -// CHECK: vaddw.u8 q{{[0-9]+}}, q{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <8 x i16> @test_vaddw_u8(<8 x i16> %a, <8 x i8>
> %b) #0 {
> +// CHECK: [[VMOVL_I_I:%.*]] = zext <8 x i8> %b to <8 x i16>
> +// CHECK: [[ADD_I:%.*]] = add <8 x i16> %a, [[VMOVL_I_I]]
> +// CHECK: ret <8 x i16> [[ADD_I]]
> uint16x8_t test_vaddw_u8(uint16x8_t a, uint8x8_t b) {
> return vaddw_u8(a, b);
> }
>
> -// CHECK-LABEL: test_vaddw_u16
> -// CHECK: vaddw.u16 q{{[0-9]+}}, q{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <4 x i32> @test_vaddw_u16(<4 x i32> %a, <4 x i16>
> %b) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <4 x i16> %b to <8 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
> +// CHECK: [[VMOVL_I_I:%.*]] = zext <4 x i16> [[TMP1]] to <4 x i32>
> +// CHECK: [[ADD_I:%.*]] = add <4 x i32> %a, [[VMOVL_I_I]]
> +// CHECK: ret <4 x i32> [[ADD_I]]
> uint32x4_t test_vaddw_u16(uint32x4_t a, uint16x4_t b) {
> return vaddw_u16(a, b);
> }
>
> -// CHECK-LABEL: test_vaddw_u32
> -// CHECK: vaddw.u32 q{{[0-9]+}}, q{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <2 x i64> @test_vaddw_u32(<2 x i64> %a, <2 x i32>
> %b) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <2 x i32> %b to <8 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>
> +// CHECK: [[VMOVL_I_I:%.*]] = zext <2 x i32> [[TMP1]] to <2 x i64>
> +// CHECK: [[ADD_I:%.*]] = add <2 x i64> %a, [[VMOVL_I_I]]
> +// CHECK: ret <2 x i64> [[ADD_I]]
> uint64x2_t test_vaddw_u32(uint64x2_t a, uint32x2_t b) {
> return vaddw_u32(a, b);
> }
>
>
> -// CHECK-LABEL: test_vand_s8
> -// CHECK: vand d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <8 x i8> @test_vand_s8(<8 x i8> %a, <8 x i8> %b)
> #0 {
> +// CHECK: [[AND_I:%.*]] = and <8 x i8> %a, %b
> +// CHECK: ret <8 x i8> [[AND_I]]
> int8x8_t test_vand_s8(int8x8_t a, int8x8_t b) {
> return vand_s8(a, b);
> }
>
> -// CHECK-LABEL: test_vand_s16
> -// CHECK: vand d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <4 x i16> @test_vand_s16(<4 x i16> %a, <4 x i16>
> %b) #0 {
> +// CHECK: [[AND_I:%.*]] = and <4 x i16> %a, %b
> +// CHECK: ret <4 x i16> [[AND_I]]
> int16x4_t test_vand_s16(int16x4_t a, int16x4_t b) {
> return vand_s16(a, b);
> }
>
> -// CHECK-LABEL: test_vand_s32
> -// CHECK: vand d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <2 x i32> @test_vand_s32(<2 x i32> %a, <2 x i32>
> %b) #0 {
> +// CHECK: [[AND_I:%.*]] = and <2 x i32> %a, %b
> +// CHECK: ret <2 x i32> [[AND_I]]
> int32x2_t test_vand_s32(int32x2_t a, int32x2_t b) {
> return vand_s32(a, b);
> }
>
> -// CHECK-LABEL: test_vand_s64
> -// CHECK: vand d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <1 x i64> @test_vand_s64(<1 x i64> %a, <1 x i64>
> %b) #0 {
> +// CHECK: [[AND_I:%.*]] = and <1 x i64> %a, %b
> +// CHECK: ret <1 x i64> [[AND_I]]
> int64x1_t test_vand_s64(int64x1_t a, int64x1_t b) {
> return vand_s64(a, b);
> }
>
> -// CHECK-LABEL: test_vand_u8
> -// CHECK: vand d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <8 x i8> @test_vand_u8(<8 x i8> %a, <8 x i8> %b)
> #0 {
> +// CHECK: [[AND_I:%.*]] = and <8 x i8> %a, %b
> +// CHECK: ret <8 x i8> [[AND_I]]
> uint8x8_t test_vand_u8(uint8x8_t a, uint8x8_t b) {
> return vand_u8(a, b);
> }
>
> -// CHECK-LABEL: test_vand_u16
> -// CHECK: vand d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <4 x i16> @test_vand_u16(<4 x i16> %a, <4 x i16>
> %b) #0 {
> +// CHECK: [[AND_I:%.*]] = and <4 x i16> %a, %b
> +// CHECK: ret <4 x i16> [[AND_I]]
> uint16x4_t test_vand_u16(uint16x4_t a, uint16x4_t b) {
> return vand_u16(a, b);
> }
>
> -// CHECK-LABEL: test_vand_u32
> -// CHECK: vand d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <2 x i32> @test_vand_u32(<2 x i32> %a, <2 x i32>
> %b) #0 {
> +// CHECK: [[AND_I:%.*]] = and <2 x i32> %a, %b
> +// CHECK: ret <2 x i32> [[AND_I]]
> uint32x2_t test_vand_u32(uint32x2_t a, uint32x2_t b) {
> return vand_u32(a, b);
> }
>
> -// CHECK-LABEL: test_vand_u64
> -// CHECK: vand d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <1 x i64> @test_vand_u64(<1 x i64> %a, <1 x i64>
> %b) #0 {
> +// CHECK: [[AND_I:%.*]] = and <1 x i64> %a, %b
> +// CHECK: ret <1 x i64> [[AND_I]]
> uint64x1_t test_vand_u64(uint64x1_t a, uint64x1_t b) {
> return vand_u64(a, b);
> }
>
> -// CHECK-LABEL: test_vandq_s8
> -// CHECK: vand q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <16 x i8> @test_vandq_s8(<16 x i8> %a, <16 x i8>
> %b) #0 {
> +// CHECK: [[AND_I:%.*]] = and <16 x i8> %a, %b
> +// CHECK: ret <16 x i8> [[AND_I]]
> int8x16_t test_vandq_s8(int8x16_t a, int8x16_t b) {
> return vandq_s8(a, b);
> }
>
> -// CHECK-LABEL: test_vandq_s16
> -// CHECK: vand q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <8 x i16> @test_vandq_s16(<8 x i16> %a, <8 x i16>
> %b) #0 {
> +// CHECK: [[AND_I:%.*]] = and <8 x i16> %a, %b
> +// CHECK: ret <8 x i16> [[AND_I]]
> int16x8_t test_vandq_s16(int16x8_t a, int16x8_t b) {
> return vandq_s16(a, b);
> }
>
> -// CHECK-LABEL: test_vandq_s32
> -// CHECK: vand q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <4 x i32> @test_vandq_s32(<4 x i32> %a, <4 x i32>
> %b) #0 {
> +// CHECK: [[AND_I:%.*]] = and <4 x i32> %a, %b
> +// CHECK: ret <4 x i32> [[AND_I]]
> int32x4_t test_vandq_s32(int32x4_t a, int32x4_t b) {
> return vandq_s32(a, b);
> }
>
> -// CHECK-LABEL: test_vandq_s64
> -// CHECK: vand q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <2 x i64> @test_vandq_s64(<2 x i64> %a, <2 x i64>
> %b) #0 {
> +// CHECK: [[AND_I:%.*]] = and <2 x i64> %a, %b
> +// CHECK: ret <2 x i64> [[AND_I]]
> int64x2_t test_vandq_s64(int64x2_t a, int64x2_t b) {
> return vandq_s64(a, b);
> }
>
> -// CHECK-LABEL: test_vandq_u8
> -// CHECK: vand q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <16 x i8> @test_vandq_u8(<16 x i8> %a, <16 x i8>
> %b) #0 {
> +// CHECK: [[AND_I:%.*]] = and <16 x i8> %a, %b
> +// CHECK: ret <16 x i8> [[AND_I]]
> uint8x16_t test_vandq_u8(uint8x16_t a, uint8x16_t b) {
> return vandq_u8(a, b);
> }
>
> -// CHECK-LABEL: test_vandq_u16
> -// CHECK: vand q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <8 x i16> @test_vandq_u16(<8 x i16> %a, <8 x i16>
> %b) #0 {
> +// CHECK: [[AND_I:%.*]] = and <8 x i16> %a, %b
> +// CHECK: ret <8 x i16> [[AND_I]]
> uint16x8_t test_vandq_u16(uint16x8_t a, uint16x8_t b) {
> return vandq_u16(a, b);
> }
>
> -// CHECK-LABEL: test_vandq_u32
> -// CHECK: vand q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <4 x i32> @test_vandq_u32(<4 x i32> %a, <4 x i32>
> %b) #0 {
> +// CHECK: [[AND_I:%.*]] = and <4 x i32> %a, %b
> +// CHECK: ret <4 x i32> [[AND_I]]
> uint32x4_t test_vandq_u32(uint32x4_t a, uint32x4_t b) {
> return vandq_u32(a, b);
> }
>
> -// CHECK-LABEL: test_vandq_u64
> -// CHECK: vand q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <2 x i64> @test_vandq_u64(<2 x i64> %a, <2 x i64>
> %b) #0 {
> +// CHECK: [[AND_I:%.*]] = and <2 x i64> %a, %b
> +// CHECK: ret <2 x i64> [[AND_I]]
> uint64x2_t test_vandq_u64(uint64x2_t a, uint64x2_t b) {
> return vandq_u64(a, b);
> }
>
>
> -// CHECK-LABEL: test_vbic_s8
> -// CHECK: vbic d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <8 x i8> @test_vbic_s8(<8 x i8> %a, <8 x i8> %b)
> #0 {
> +// CHECK: [[NEG_I:%.*]] = xor <8 x i8> %b, <i8 -1, i8 -1, i8 -1, i8 -1,
> i8 -1, i8 -1, i8 -1, i8 -1>
> +// CHECK: [[AND_I:%.*]] = and <8 x i8> %a, [[NEG_I]]
> +// CHECK: ret <8 x i8> [[AND_I]]
> int8x8_t test_vbic_s8(int8x8_t a, int8x8_t b) {
> return vbic_s8(a, b);
> }
>
> -// CHECK-LABEL: test_vbic_s16
> -// CHECK: vbic d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <4 x i16> @test_vbic_s16(<4 x i16> %a, <4 x i16>
> %b) #0 {
> +// CHECK: [[NEG_I:%.*]] = xor <4 x i16> %b, <i16 -1, i16 -1, i16 -1,
> i16 -1>
> +// CHECK: [[AND_I:%.*]] = and <4 x i16> %a, [[NEG_I]]
> +// CHECK: ret <4 x i16> [[AND_I]]
> int16x4_t test_vbic_s16(int16x4_t a, int16x4_t b) {
> return vbic_s16(a, b);
> }
>
> -// CHECK-LABEL: test_vbic_s32
> -// CHECK: vbic d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <2 x i32> @test_vbic_s32(<2 x i32> %a, <2 x i32>
> %b) #0 {
> +// CHECK: [[NEG_I:%.*]] = xor <2 x i32> %b, <i32 -1, i32 -1>
> +// CHECK: [[AND_I:%.*]] = and <2 x i32> %a, [[NEG_I]]
> +// CHECK: ret <2 x i32> [[AND_I]]
> int32x2_t test_vbic_s32(int32x2_t a, int32x2_t b) {
> return vbic_s32(a, b);
> }
>
> -// CHECK-LABEL: test_vbic_s64
> -// CHECK: vbic d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <1 x i64> @test_vbic_s64(<1 x i64> %a, <1 x i64>
> %b) #0 {
> +// CHECK: [[NEG_I:%.*]] = xor <1 x i64> %b, <i64 -1>
> +// CHECK: [[AND_I:%.*]] = and <1 x i64> %a, [[NEG_I]]
> +// CHECK: ret <1 x i64> [[AND_I]]
> int64x1_t test_vbic_s64(int64x1_t a, int64x1_t b) {
> return vbic_s64(a, b);
> }
>
> -// CHECK-LABEL: test_vbic_u8
> -// CHECK: vbic d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <8 x i8> @test_vbic_u8(<8 x i8> %a, <8 x i8> %b)
> #0 {
> +// CHECK: [[NEG_I:%.*]] = xor <8 x i8> %b, <i8 -1, i8 -1, i8 -1, i8 -1,
> i8 -1, i8 -1, i8 -1, i8 -1>
> +// CHECK: [[AND_I:%.*]] = and <8 x i8> %a, [[NEG_I]]
> +// CHECK: ret <8 x i8> [[AND_I]]
> uint8x8_t test_vbic_u8(uint8x8_t a, uint8x8_t b) {
> return vbic_u8(a, b);
> }
>
> -// CHECK-LABEL: test_vbic_u16
> -// CHECK: vbic d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <4 x i16> @test_vbic_u16(<4 x i16> %a, <4 x i16>
> %b) #0 {
> +// CHECK: [[NEG_I:%.*]] = xor <4 x i16> %b, <i16 -1, i16 -1, i16 -1,
> i16 -1>
> +// CHECK: [[AND_I:%.*]] = and <4 x i16> %a, [[NEG_I]]
> +// CHECK: ret <4 x i16> [[AND_I]]
> uint16x4_t test_vbic_u16(uint16x4_t a, uint16x4_t b) {
> return vbic_u16(a, b);
> }
>
> -// CHECK-LABEL: test_vbic_u32
> -// CHECK: vbic d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <2 x i32> @test_vbic_u32(<2 x i32> %a, <2 x i32>
> %b) #0 {
> +// CHECK: [[NEG_I:%.*]] = xor <2 x i32> %b, <i32 -1, i32 -1>
> +// CHECK: [[AND_I:%.*]] = and <2 x i32> %a, [[NEG_I]]
> +// CHECK: ret <2 x i32> [[AND_I]]
> uint32x2_t test_vbic_u32(uint32x2_t a, uint32x2_t b) {
> return vbic_u32(a, b);
> }
>
> -// CHECK-LABEL: test_vbic_u64
> -// CHECK: vbic d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <1 x i64> @test_vbic_u64(<1 x i64> %a, <1 x i64>
> %b) #0 {
> +// CHECK: [[NEG_I:%.*]] = xor <1 x i64> %b, <i64 -1>
> +// CHECK: [[AND_I:%.*]] = and <1 x i64> %a, [[NEG_I]]
> +// CHECK: ret <1 x i64> [[AND_I]]
> uint64x1_t test_vbic_u64(uint64x1_t a, uint64x1_t b) {
> return vbic_u64(a, b);
> }
>
> -// CHECK-LABEL: test_vbicq_s8
> -// CHECK: vbic q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <16 x i8> @test_vbicq_s8(<16 x i8> %a, <16 x i8>
> %b) #0 {
> +// CHECK: [[NEG_I:%.*]] = xor <16 x i8> %b, <i8 -1, i8 -1, i8 -1, i8
> -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1,
> i8 -1, i8 -1>
> +// CHECK: [[AND_I:%.*]] = and <16 x i8> %a, [[NEG_I]]
> +// CHECK: ret <16 x i8> [[AND_I]]
> int8x16_t test_vbicq_s8(int8x16_t a, int8x16_t b) {
> return vbicq_s8(a, b);
> }
>
> -// CHECK-LABEL: test_vbicq_s16
> -// CHECK: vbic q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <8 x i16> @test_vbicq_s16(<8 x i16> %a, <8 x i16>
> %b) #0 {
> +// CHECK: [[NEG_I:%.*]] = xor <8 x i16> %b, <i16 -1, i16 -1, i16 -1,
> i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
> +// CHECK: [[AND_I:%.*]] = and <8 x i16> %a, [[NEG_I]]
> +// CHECK: ret <8 x i16> [[AND_I]]
> int16x8_t test_vbicq_s16(int16x8_t a, int16x8_t b) {
> return vbicq_s16(a, b);
> }
>
> -// CHECK-LABEL: test_vbicq_s32
> -// CHECK: vbic q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <4 x i32> @test_vbicq_s32(<4 x i32> %a, <4 x i32>
> %b) #0 {
> +// CHECK: [[NEG_I:%.*]] = xor <4 x i32> %b, <i32 -1, i32 -1, i32 -1,
> i32 -1>
> +// CHECK: [[AND_I:%.*]] = and <4 x i32> %a, [[NEG_I]]
> +// CHECK: ret <4 x i32> [[AND_I]]
> int32x4_t test_vbicq_s32(int32x4_t a, int32x4_t b) {
> return vbicq_s32(a, b);
> }
>
> -// CHECK-LABEL: test_vbicq_s64
> -// CHECK: vbic q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <2 x i64> @test_vbicq_s64(<2 x i64> %a, <2 x i64>
> %b) #0 {
> +// CHECK: [[NEG_I:%.*]] = xor <2 x i64> %b, <i64 -1, i64 -1>
> +// CHECK: [[AND_I:%.*]] = and <2 x i64> %a, [[NEG_I]]
> +// CHECK: ret <2 x i64> [[AND_I]]
> int64x2_t test_vbicq_s64(int64x2_t a, int64x2_t b) {
> return vbicq_s64(a, b);
> }
>
> -// CHECK-LABEL: test_vbicq_u8
> -// CHECK: vbic q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <16 x i8> @test_vbicq_u8(<16 x i8> %a, <16 x i8>
> %b) #0 {
> +// CHECK: [[NEG_I:%.*]] = xor <16 x i8> %b, <i8 -1, i8 -1, i8 -1, i8
> -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1,
> i8 -1, i8 -1>
> +// CHECK: [[AND_I:%.*]] = and <16 x i8> %a, [[NEG_I]]
> +// CHECK: ret <16 x i8> [[AND_I]]
> uint8x16_t test_vbicq_u8(uint8x16_t a, uint8x16_t b) {
> return vbicq_u8(a, b);
> }
>
> -// CHECK-LABEL: test_vbicq_u16
> -// CHECK: vbic q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <8 x i16> @test_vbicq_u16(<8 x i16> %a, <8 x i16>
> %b) #0 {
> +// CHECK: [[NEG_I:%.*]] = xor <8 x i16> %b, <i16 -1, i16 -1, i16 -1,
> i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
> +// CHECK: [[AND_I:%.*]] = and <8 x i16> %a, [[NEG_I]]
> +// CHECK: ret <8 x i16> [[AND_I]]
> uint16x8_t test_vbicq_u16(uint16x8_t a, uint16x8_t b) {
> return vbicq_u16(a, b);
> }
>
> -// CHECK-LABEL: test_vbicq_u32
> -// CHECK: vbic q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <4 x i32> @test_vbicq_u32(<4 x i32> %a, <4 x i32>
> %b) #0 {
> +// CHECK: [[NEG_I:%.*]] = xor <4 x i32> %b, <i32 -1, i32 -1, i32 -1,
> i32 -1>
> +// CHECK: [[AND_I:%.*]] = and <4 x i32> %a, [[NEG_I]]
> +// CHECK: ret <4 x i32> [[AND_I]]
> uint32x4_t test_vbicq_u32(uint32x4_t a, uint32x4_t b) {
> return vbicq_u32(a, b);
> }
>
> -// CHECK-LABEL: test_vbicq_u64
> -// CHECK: vbic q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <2 x i64> @test_vbicq_u64(<2 x i64> %a, <2 x i64>
> %b) #0 {
> +// CHECK: [[NEG_I:%.*]] = xor <2 x i64> %b, <i64 -1, i64 -1>
> +// CHECK: [[AND_I:%.*]] = and <2 x i64> %a, [[NEG_I]]
> +// CHECK: ret <2 x i64> [[AND_I]]
> uint64x2_t test_vbicq_u64(uint64x2_t a, uint64x2_t b) {
> return vbicq_u64(a, b);
> }
>
>
> -// CHECK-LABEL: test_vbsl_s8
> -// CHECK: vbsl d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <8 x i8> @test_vbsl_s8(<8 x i8> %a, <8 x i8> %b,
> <8 x i8> %c) #0 {
> +// CHECK: [[VBSL_I:%.*]] = and <8 x i8> %a, %b
> +// CHECK: [[TMP0:%.*]] = xor <8 x i8> %a, <i8 -1, i8 -1, i8 -1, i8 -1,
> i8 -1, i8 -1, i8 -1, i8 -1>
> +// CHECK: [[VBSL1_I:%.*]] = and <8 x i8> [[TMP0]], %c
> +// CHECK: [[VBSL2_I:%.*]] = or <8 x i8> [[VBSL_I]], [[VBSL1_I]]
> +// CHECK: ret <8 x i8> [[VBSL2_I]]
> int8x8_t test_vbsl_s8(uint8x8_t a, int8x8_t b, int8x8_t c) {
> return vbsl_s8(a, b, c);
> }
>
> -// CHECK-LABEL: test_vbsl_s16
> -// CHECK: vbsl d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <4 x i16> @test_vbsl_s16(<4 x i16> %a, <4 x i16>
> %b, <4 x i16> %c) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <4 x i16> %a to <8 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8>
> +// CHECK: [[TMP2:%.*]] = bitcast <4 x i16> %c to <8 x i8>
> +// CHECK: [[VBSL_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
> +// CHECK: [[VBSL1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>
> +// CHECK: [[VBSL2_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>
> +// CHECK: [[VBSL3_I:%.*]] = and <4 x i16> [[VBSL_I]], [[VBSL1_I]]
> +// CHECK: [[TMP3:%.*]] = xor <4 x i16> [[VBSL_I]], <i16 -1, i16 -1, i16
> -1, i16 -1>
> +// CHECK: [[VBSL4_I:%.*]] = and <4 x i16> [[TMP3]], [[VBSL2_I]]
> +// CHECK: [[VBSL5_I:%.*]] = or <4 x i16> [[VBSL3_I]], [[VBSL4_I]]
> +// CHECK: ret <4 x i16> [[VBSL5_I]]
> int16x4_t test_vbsl_s16(uint16x4_t a, int16x4_t b, int16x4_t c) {
> return vbsl_s16(a, b, c);
> }
>
> -// CHECK-LABEL: test_vbsl_s32
> -// CHECK: vbsl d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <2 x i32> @test_vbsl_s32(<2 x i32> %a, <2 x i32>
> %b, <2 x i32> %c) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <2 x i32> %a to <8 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %b to <8 x i8>
> +// CHECK: [[TMP2:%.*]] = bitcast <2 x i32> %c to <8 x i8>
> +// CHECK: [[VBSL_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>
> +// CHECK: [[VBSL1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>
> +// CHECK: [[VBSL2_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x i32>
> +// CHECK: [[VBSL3_I:%.*]] = and <2 x i32> [[VBSL_I]], [[VBSL1_I]]
> +// CHECK: [[TMP3:%.*]] = xor <2 x i32> [[VBSL_I]], <i32 -1, i32 -1>
> +// CHECK: [[VBSL4_I:%.*]] = and <2 x i32> [[TMP3]], [[VBSL2_I]]
> +// CHECK: [[VBSL5_I:%.*]] = or <2 x i32> [[VBSL3_I]], [[VBSL4_I]]
> +// CHECK: ret <2 x i32> [[VBSL5_I]]
> int32x2_t test_vbsl_s32(uint32x2_t a, int32x2_t b, int32x2_t c) {
> return vbsl_s32(a, b, c);
> }
>
> -// CHECK-LABEL: test_vbsl_s64
> -// CHECK: vbsl d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <1 x i64> @test_vbsl_s64(<1 x i64> %a, <1 x i64>
> %b, <1 x i64> %c) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <1 x i64> %a to <8 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8>
> +// CHECK: [[TMP2:%.*]] = bitcast <1 x i64> %c to <8 x i8>
> +// CHECK: [[VBSL_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>
> +// CHECK: [[VBSL1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>
> +// CHECK: [[VBSL2_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <1 x i64>
> +// CHECK: [[VBSL3_I:%.*]] = and <1 x i64> [[VBSL_I]], [[VBSL1_I]]
> +// CHECK: [[TMP3:%.*]] = xor <1 x i64> [[VBSL_I]], <i64 -1>
> +// CHECK: [[VBSL4_I:%.*]] = and <1 x i64> [[TMP3]], [[VBSL2_I]]
> +// CHECK: [[VBSL5_I:%.*]] = or <1 x i64> [[VBSL3_I]], [[VBSL4_I]]
> +// CHECK: ret <1 x i64> [[VBSL5_I]]
> int64x1_t test_vbsl_s64(uint64x1_t a, int64x1_t b, int64x1_t c) {
> return vbsl_s64(a, b, c);
> }
>
> -// CHECK-LABEL: test_vbsl_u8
> -// CHECK: vbsl d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <8 x i8> @test_vbsl_u8(<8 x i8> %a, <8 x i8> %b,
> <8 x i8> %c) #0 {
> +// CHECK: [[VBSL_I:%.*]] = and <8 x i8> %a, %b
> +// CHECK: [[TMP0:%.*]] = xor <8 x i8> %a, <i8 -1, i8 -1, i8 -1, i8 -1,
> i8 -1, i8 -1, i8 -1, i8 -1>
> +// CHECK: [[VBSL1_I:%.*]] = and <8 x i8> [[TMP0]], %c
> +// CHECK: [[VBSL2_I:%.*]] = or <8 x i8> [[VBSL_I]], [[VBSL1_I]]
> +// CHECK: ret <8 x i8> [[VBSL2_I]]
> uint8x8_t test_vbsl_u8(uint8x8_t a, uint8x8_t b, uint8x8_t c) {
> return vbsl_u8(a, b, c);
> }
>
> -// CHECK-LABEL: test_vbsl_u16
> -// CHECK: vbsl d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <4 x i16> @test_vbsl_u16(<4 x i16> %a, <4 x i16>
> %b, <4 x i16> %c) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <4 x i16> %a to <8 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8>
> +// CHECK: [[TMP2:%.*]] = bitcast <4 x i16> %c to <8 x i8>
> +// CHECK: [[VBSL_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
> +// CHECK: [[VBSL1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>
> +// CHECK: [[VBSL2_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>
> +// CHECK: [[VBSL3_I:%.*]] = and <4 x i16> [[VBSL_I]], [[VBSL1_I]]
> +// CHECK: [[TMP3:%.*]] = xor <4 x i16> [[VBSL_I]], <i16 -1, i16 -1, i16
> -1, i16 -1>
> +// CHECK: [[VBSL4_I:%.*]] = and <4 x i16> [[TMP3]], [[VBSL2_I]]
> +// CHECK: [[VBSL5_I:%.*]] = or <4 x i16> [[VBSL3_I]], [[VBSL4_I]]
> +// CHECK: ret <4 x i16> [[VBSL5_I]]
> uint16x4_t test_vbsl_u16(uint16x4_t a, uint16x4_t b, uint16x4_t c) {
> return vbsl_u16(a, b, c);
> }
>
> -// CHECK-LABEL: test_vbsl_u32
> -// CHECK: vbsl d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <2 x i32> @test_vbsl_u32(<2 x i32> %a, <2 x i32>
> %b, <2 x i32> %c) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <2 x i32> %a to <8 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %b to <8 x i8>
> +// CHECK: [[TMP2:%.*]] = bitcast <2 x i32> %c to <8 x i8>
> +// CHECK: [[VBSL_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>
> +// CHECK: [[VBSL1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>
> +// CHECK: [[VBSL2_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x i32>
> +// CHECK: [[VBSL3_I:%.*]] = and <2 x i32> [[VBSL_I]], [[VBSL1_I]]
> +// CHECK: [[TMP3:%.*]] = xor <2 x i32> [[VBSL_I]], <i32 -1, i32 -1>
> +// CHECK: [[VBSL4_I:%.*]] = and <2 x i32> [[TMP3]], [[VBSL2_I]]
> +// CHECK: [[VBSL5_I:%.*]] = or <2 x i32> [[VBSL3_I]], [[VBSL4_I]]
> +// CHECK: ret <2 x i32> [[VBSL5_I]]
> uint32x2_t test_vbsl_u32(uint32x2_t a, uint32x2_t b, uint32x2_t c) {
> return vbsl_u32(a, b, c);
> }
>
> -// CHECK-LABEL: test_vbsl_u64
> -// CHECK: vbsl d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <1 x i64> @test_vbsl_u64(<1 x i64> %a, <1 x i64>
> %b, <1 x i64> %c) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <1 x i64> %a to <8 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8>
> +// CHECK: [[TMP2:%.*]] = bitcast <1 x i64> %c to <8 x i8>
> +// CHECK: [[VBSL_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>
> +// CHECK: [[VBSL1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64>
> +// CHECK: [[VBSL2_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <1 x i64>
> +// CHECK: [[VBSL3_I:%.*]] = and <1 x i64> [[VBSL_I]], [[VBSL1_I]]
> +// CHECK: [[TMP3:%.*]] = xor <1 x i64> [[VBSL_I]], <i64 -1>
> +// CHECK: [[VBSL4_I:%.*]] = and <1 x i64> [[TMP3]], [[VBSL2_I]]
> +// CHECK: [[VBSL5_I:%.*]] = or <1 x i64> [[VBSL3_I]], [[VBSL4_I]]
> +// CHECK: ret <1 x i64> [[VBSL5_I]]
> uint64x1_t test_vbsl_u64(uint64x1_t a, uint64x1_t b, uint64x1_t c) {
> return vbsl_u64(a, b, c);
> }
>
> -// CHECK-LABEL: test_vbsl_f32
> -// CHECK: vbsl d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <2 x float> @test_vbsl_f32(<2 x i32> %a, <2 x
> float> %b, <2 x float> %c) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <2 x i32> %a to <8 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <2 x float> %b to <8 x i8>
> +// CHECK: [[TMP2:%.*]] = bitcast <2 x float> %c to <8 x i8>
> +// CHECK: [[VBSL_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>
> +// CHECK: [[VBSL1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32>
> +// CHECK: [[VBSL2_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x i32>
> +// CHECK: [[VBSL3_I:%.*]] = and <2 x i32> [[VBSL_I]], [[VBSL1_I]]
> +// CHECK: [[TMP3:%.*]] = xor <2 x i32> [[VBSL_I]], <i32 -1, i32 -1>
> +// CHECK: [[VBSL4_I:%.*]] = and <2 x i32> [[TMP3]], [[VBSL2_I]]
> +// CHECK: [[VBSL5_I:%.*]] = or <2 x i32> [[VBSL3_I]], [[VBSL4_I]]
> +// CHECK: [[TMP4:%.*]] = bitcast <2 x i32> [[VBSL5_I]] to <2 x float>
> +// CHECK: ret <2 x float> [[TMP4]]
> float32x2_t test_vbsl_f32(uint32x2_t a, float32x2_t b, float32x2_t c) {
> return vbsl_f32(a, b, c);
> }
>
> -// CHECK-LABEL: test_vbsl_p8
> -// CHECK: vbsl d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <8 x i8> @test_vbsl_p8(<8 x i8> %a, <8 x i8> %b,
> <8 x i8> %c) #0 {
> +// CHECK: [[VBSL_I:%.*]] = and <8 x i8> %a, %b
> +// CHECK: [[TMP0:%.*]] = xor <8 x i8> %a, <i8 -1, i8 -1, i8 -1, i8 -1,
> i8 -1, i8 -1, i8 -1, i8 -1>
> +// CHECK: [[VBSL1_I:%.*]] = and <8 x i8> [[TMP0]], %c
> +// CHECK: [[VBSL2_I:%.*]] = or <8 x i8> [[VBSL_I]], [[VBSL1_I]]
> +// CHECK: ret <8 x i8> [[VBSL2_I]]
> poly8x8_t test_vbsl_p8(uint8x8_t a, poly8x8_t b, poly8x8_t c) {
> return vbsl_p8(a, b, c);
> }
>
> -// CHECK-LABEL: test_vbsl_p16
> -// CHECK: vbsl d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
> +// CHECK-LABEL: define <4 x i16> @test_vbsl_p16(<4 x i16> %a, <4 x i16>
> %b, <4 x i16> %c) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <4 x i16> %a to <8 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8>
> +// CHECK: [[TMP2:%.*]] = bitcast <4 x i16> %c to <8 x i8>
> +// CHECK: [[VBSL_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
> +// CHECK: [[VBSL1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16>
> +// CHECK: [[VBSL2_I:%.*]] = bitcast <8 x i8> [[TMP2]] to <4 x i16>
> +// CHECK: [[VBSL3_I:%.*]] = and <4 x i16> [[VBSL_I]], [[VBSL1_I]]
> +// CHECK: [[TMP3:%.*]] = xor <4 x i16> [[VBSL_I]], <i16 -1, i16 -1, i16
> -1, i16 -1>
> +// CHECK: [[VBSL4_I:%.*]] = and <4 x i16> [[TMP3]], [[VBSL2_I]]
> +// CHECK: [[VBSL5_I:%.*]] = or <4 x i16> [[VBSL3_I]], [[VBSL4_I]]
> +// CHECK: ret <4 x i16> [[VBSL5_I]]
> poly16x4_t test_vbsl_p16(uint16x4_t a, poly16x4_t b, poly16x4_t c) {
> return vbsl_p16(a, b, c);
> }
>
> -// CHECK-LABEL: test_vbslq_s8
> -// CHECK: vbsl q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <16 x i8> @test_vbslq_s8(<16 x i8> %a, <16 x i8>
> %b, <16 x i8> %c) #0 {
> +// CHECK: [[VBSL_I:%.*]] = and <16 x i8> %a, %b
> +// CHECK: [[TMP0:%.*]] = xor <16 x i8> %a, <i8 -1, i8 -1, i8 -1, i8 -1,
> i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8
> -1, i8 -1>
> +// CHECK: [[VBSL1_I:%.*]] = and <16 x i8> [[TMP0]], %c
> +// CHECK: [[VBSL2_I:%.*]] = or <16 x i8> [[VBSL_I]], [[VBSL1_I]]
> +// CHECK: ret <16 x i8> [[VBSL2_I]]
> int8x16_t test_vbslq_s8(uint8x16_t a, int8x16_t b, int8x16_t c) {
> return vbslq_s8(a, b, c);
> }
>
> -// CHECK-LABEL: test_vbslq_s16
> -// CHECK: vbsl q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <8 x i16> @test_vbslq_s16(<8 x i16> %a, <8 x i16>
> %b, <8 x i16> %c) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %a to <16 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8>
> +// CHECK: [[TMP2:%.*]] = bitcast <8 x i16> %c to <16 x i8>
> +// CHECK: [[VBSL_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>
> +// CHECK: [[VBSL1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16>
> +// CHECK: [[VBSL2_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <8 x i16>
> +// CHECK: [[VBSL3_I:%.*]] = and <8 x i16> [[VBSL_I]], [[VBSL1_I]]
> +// CHECK: [[TMP3:%.*]] = xor <8 x i16> [[VBSL_I]], <i16 -1, i16 -1, i16
> -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
> +// CHECK: [[VBSL4_I:%.*]] = and <8 x i16> [[TMP3]], [[VBSL2_I]]
> +// CHECK: [[VBSL5_I:%.*]] = or <8 x i16> [[VBSL3_I]], [[VBSL4_I]]
> +// CHECK: ret <8 x i16> [[VBSL5_I]]
> int16x8_t test_vbslq_s16(uint16x8_t a, int16x8_t b, int16x8_t c) {
> return vbslq_s16(a, b, c);
> }
>
> -// CHECK-LABEL: test_vbslq_s32
> -// CHECK: vbsl q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <4 x i32> @test_vbslq_s32(<4 x i32> %a, <4 x i32>
> %b, <4 x i32> %c) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <4 x i32> %a to <16 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %b to <16 x i8>
> +// CHECK: [[TMP2:%.*]] = bitcast <4 x i32> %c to <16 x i8>
> +// CHECK: [[VBSL_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>
> +// CHECK: [[VBSL1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>
> +// CHECK: [[VBSL2_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x i32>
> +// CHECK: [[VBSL3_I:%.*]] = and <4 x i32> [[VBSL_I]], [[VBSL1_I]]
> +// CHECK: [[TMP3:%.*]] = xor <4 x i32> [[VBSL_I]], <i32 -1, i32 -1, i32
> -1, i32 -1>
> +// CHECK: [[VBSL4_I:%.*]] = and <4 x i32> [[TMP3]], [[VBSL2_I]]
> +// CHECK: [[VBSL5_I:%.*]] = or <4 x i32> [[VBSL3_I]], [[VBSL4_I]]
> +// CHECK: ret <4 x i32> [[VBSL5_I]]
> int32x4_t test_vbslq_s32(uint32x4_t a, int32x4_t b, int32x4_t c) {
> return vbslq_s32(a, b, c);
> }
>
> -// CHECK-LABEL: test_vbslq_s64
> -// CHECK: vbsl q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
> +// CHECK-LABEL: define <2 x i64> @test_vbslq_s64(<2 x i64> %a, <2 x i64>
> %b, <2 x i64> %c) #0 {
> +// CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to <16 x i8>
> +// CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8>
> +// CHECK: [[TMP2:%.*]] = bitcast <2 x i64> %c to <16 x i8>
> +// CHECK: [[VBSL_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>
> +// CHECK: [[VBSL1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64>
> +// CHECK: [[VBSL2_I:%.*]] = bitcast <16 x i8> [[TMP2]] to <2 x i64>
> +// CHECK: [[VBSL3_I:%.*]] = and <2 x i64> [[VBSL_I]], [[VBSL1_I]]
> +// CHECK: [[TMP3:%.*]] = xor <2 x i64> [[VBSL_I]], <i64 -1, i64 -1>
> +// CHECK: [[VBSL4_I:%.*]] = and <2 x i64> [[TMP3]], [[VBSL2_I]]
> +// CHECK: [[VBSL5_I:%.*]] = or <2 x i64> [[VBSL3_I]], [[VBSL4_I]]
> +// CHECK: ret <2 x i64> [[VBSL5_I]]
> int64x2_t test_vbslq_s64(uint64x2_t a, int64x2_t b, int64x2_t c) {
> return vbslq_s64(a, b, c);
> }
>
> -/
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