[all-commits] [llvm/llvm-project] fbe817: [MIR] Serialize register allocation anti-hints

[Syadus Sefat via All-commits]

  Branch: refs/heads/users/mssefat/anti-hints-pr2-mir-serialize
  Home:   https://github.com/llvm/llvm-project
  Commit: fbe8175a54548b1dd83aea6abf6bc9e9a6028041
      https://github.com/llvm/llvm-project/commit/fbe8175a54548b1dd83aea6abf6bc9e9a6028041
  Author: mssefat <syadus.sefat at gmail.com>
  Date:   2026-09-24 (Thu, 24 Sep 2026)

  Changed paths:
    M llvm/include/llvm/CodeGen/MIRParser/MIParser.h
    M llvm/include/llvm/CodeGen/MIRYamlMapping.h
    M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
    M llvm/lib/CodeGen/MIRPrinter.cpp
    A llvm/test/CodeGen/MIR/AMDGPU/register-allocation-antihints-mir-print-parse.mir

  Log Message:
  -----------
  [MIR] Serialize register allocation anti-hints


  Commit: 45770e77c3e30c0565b3d4bf41bbdefb98c9daba
      https://github.com/llvm/llvm-project/commit/45770e77c3e30c0565b3d4bf41bbdefb98c9daba
  Author: mssefat <syadus.sefat at gmail.com>
  Date:   2026-09-24 (Thu, 24 Sep 2026)

  Changed paths:
    M llvm/include/llvm/CodeGen/MIRYamlMapping.h
    M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
    M llvm/test/CodeGen/MIR/AMDGPU/register-allocation-antihints-mir-print-parse.mir

  Log Message:
  -----------
  Addressed review


  Commit: 450cc474f67080928f15344d01a07d2a2cc96ed5
      https://github.com/llvm/llvm-project/commit/450cc474f67080928f15344d01a07d2a2cc96ed5
  Author: mssefat <syadus.sefat at gmail.com>
  Date:   2026-09-24 (Thu, 24 Sep 2026)

  Changed paths:
    M llvm/include/llvm/CodeGen/MIRYamlMapping.h
    M llvm/lib/CodeGen/MIRParser/MIRParser.cpp

  Log Message:
  -----------
  Addressed review


Compare: https://github.com/llvm/llvm-project/compare/1b237056b463...450cc474f670

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