[all-commits] [llvm/llvm-project] d9e8ad: [Hexagon] Use MCRegisterClass::hasSubClassEq in He...

[Jay Foad via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d9e8ad1dc8af2c478f9580e95b81f4cd54a9c6b7
      https://github.com/llvm/llvm-project/commit/d9e8ad1dc8af2c478f9580e95b81f4cd54a9c6b7
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2026-09-24 (Thu, 24 Sep 2026)

  Changed paths:
    M llvm/lib/Target/Hexagon/HexagonBitTracker.cpp

  Log Message:
  -----------
  [Hexagon] Use MCRegisterClass::hasSubClassEq in HexagonBitTracker. NFCI. (#226110)

This avoids depending on the exact names of synthesized register classes
(motivated by #225809 which will change some of these) and generally
feels more future-proof.

Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>

Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>



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