[all-commits] [llvm/llvm-project] a88189: [AMDGPU][NFC] Compute prologue frame size/alignmen...

[ahradwan2-public via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a88189669034268827befe9bb65880a31e91778d
      https://github.com/llvm/llvm-project/commit/a88189669034268827befe9bb65880a31e91778d
  Author: ahradwan2-public <ahmedwahab1997 at gmail.com>
  Date:   2026-09-23 (Wed, 23 Sep 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp

  Log Message:
  -----------
  [AMDGPU][NFC] Compute prologue frame size/alignment in 64-bit (#224734)

In `SIFrameLowering::emitPrologue` the stack-realignment sequence computes its
`S_AND` mask (`-Alignment * scale`), `S_ADD` offset (`(Alignment-1) * scale`)
and the final SP adjustment (`RoundedSize * scale`) from 32-bit locals; the
multiply is done in 32 bits, which CodeGen static analysis flags as a possible
truncation (`cpp/integer-multiplication-cast-to-long`). Widen `NumBytes`,
`RoundedSize` and Alignment to 64-bit. The `AsmPrinter` still truncates via
`printImmediate32`, so emitted asm is unchanged; only the raw MIR immediate of
the realign `S_AND_B32` changes (e.g. `4294443008 -> -524288`). The seven
autogenerated .mir frame tests are regenerated accordingly.

Assisted-by: Cline



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