[all-commits] [llvm/llvm-project] 7962fc: [AMDGPU] Enable CSE in the GlobalISel post-legaliz...

[Keshav Vinayak Jha via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 7962fc367a83caf8442a474660ab93ec5ed1ac22
      https://github.com/llvm/llvm-project/commit/7962fc367a83caf8442a474660ab93ec5ed1ac22
  Author: Keshav Vinayak Jha <31160700+keshavvinayak01 at users.noreply.github.com>
  Date:   2026-09-10 (Thu, 10 Sep 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shl-from-extend-narrow.postlegal.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/crash-stack-address-O0.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f64.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/global-value.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-brcond.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.make.buffer.rsrc.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/no-ctlz-from-umul-to-lshr-in-postlegalizer.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-ubfx.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/sext_inreg.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
    M llvm/test/CodeGen/AMDGPU/call-defs-mode-register.ll
    M llvm/test/CodeGen/AMDGPU/div_i128.ll
    M llvm/test/CodeGen/AMDGPU/fmul-to-ldexp.ll

  Log Message:
  -----------
  [AMDGPU] Enable CSE in the GlobalISel post-legalizer combiner (#217258)

Enable GISel CSE in the legacy AMDGPU post-legalizer combiner so it
matches the new pass-manager path.

Use the standard CSE configuration for the optimization level. Create
correctly constrained virtual registers during legalization instead of
mutating register classes after creation, and notify GlobalISel
observers when register operands are replaced. This also updates the
affected GlobalISel checks.

More context:
https://github.com/llvm/llvm-project/pull/216274#pullrequestreview-4964537468

---------

Signed-off-by: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>



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