[all-commits] [llvm/llvm-project] ab618e: [AMDGPU] Gate 64-bit VGPR copy lowering on operand...

[Valery Pykhtin via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ab618ec375ffe8f2474bac9e4ac82d1f5330fd46
      https://github.com/llvm/llvm-project/commit/ab618ec375ffe8f2474bac9e4ac82d1f5330fd46
  Author: Valery Pykhtin <valery.pykhtin at amd.com>
  Date:   2026-09-10 (Thu, 10 Sep 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp

  Log Message:
  -----------
  [AMDGPU] Gate 64-bit VGPR copy lowering on operand register class in copyPhysReg (#219562)

copyPhysReg lowers a 64-bit VGPR copy to V_MOV_B64_e32 / V_PK_MOV_B32
when available. Emit the wide move only when the destination and source
are members of the move's HwMode-resolved operand classes; otherwise
fall through to the element-wise V_MOV_B32 expansion, to respect
alignment requirements.

Co-authored-by: Claude <noreply at anthropic.com>



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