[all-commits] [llvm/llvm-project] 173a02: [MLIR][LLVM] Enable strict property assembly forma...

Mehdi Amini via All-commits all-commits at lists.llvm.org
Wed Sep 9 13:34:40 PDT 2026


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 173a02c755bf91fecf90ac4df972128baea91da8
      https://github.com/llvm/llvm-project/commit/173a02c755bf91fecf90ac4df972128baea91da8
  Author: Mehdi Amini <joker.eph at gmail.com>
  Date:   2026-09-09 (Wed, 09 Sep 2026)

  Changed paths:
    M flang/test/Driver/tco-test-gen.fir
    M flang/test/Fir/convert-nontemporal-to-llvm.fir
    M flang/test/Fir/convert-to-llvm-access-group.fir
    M flang/test/Fir/convert-to-llvm.fir
    M flang/test/Fir/tbaa.fir
    M flang/test/Fir/vector-always-cfg.fir
    M mlir/docs/SPIRVToLLVMDialectConversion.md
    M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
    M mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.td
    M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
    M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
    M mlir/lib/Conversion/ControlFlowToLLVM/ControlFlowToLLVM.cpp
    M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
    M mlir/lib/Dialect/LLVMIR/IR/LLVMOps.h
    M mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir
    M mlir/test/Conversion/ComplexToLLVM/complex-range-option.mlir
    M mlir/test/Conversion/ComplexToLLVM/convert-to-llvm.mlir
    M mlir/test/Conversion/GPUCommon/lower-memory-space-attrs.mlir
    M mlir/test/Conversion/GPUCommon/transfer_write.mlir
    M mlir/test/Conversion/MathToLLVM/math-to-llvm.mlir
    M mlir/test/Conversion/MemRefToLLVM/memref-to-llvm.mlir
    M mlir/test/Conversion/SPIRVToLLVM/memory-ops-to-llvm.mlir
    M mlir/test/Conversion/VectorToLLVM/use-vector-alignment.mlir
    M mlir/test/Conversion/VectorToLLVM/vector-load-store-to-llvm.mlir
    M mlir/test/Conversion/VectorToLLVM/vector-reduction-to-llvm.mlir
    M mlir/test/Conversion/VectorToLLVM/vector-to-llvm-interface.mlir
    M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
    M mlir/test/Conversion/VectorToLLVM/vector-xfer-to-llvm.mlir
    M mlir/test/Dialect/LLVMIR/bytecode.mlir
    M mlir/test/Dialect/LLVMIR/canonicalize.mlir
    M mlir/test/Dialect/LLVMIR/dereferenceable-invalid.mlir
    M mlir/test/Dialect/LLVMIR/ifunc.mlir
    M mlir/test/Dialect/LLVMIR/inlining-alias-scopes.mlir
    M mlir/test/Dialect/LLVMIR/inlining-loop-annotation.mlir
    M mlir/test/Dialect/LLVMIR/inlining.mlir
    M mlir/test/Dialect/LLVMIR/invalid.mlir
    M mlir/test/Dialect/LLVMIR/loop-metadata.mlir
    M mlir/test/Dialect/LLVMIR/mem2reg-dbginfo.mlir
    M mlir/test/Dialect/LLVMIR/mem2reg-intrinsics.mlir
    M mlir/test/Dialect/LLVMIR/mem2reg.mlir
    M mlir/test/Dialect/LLVMIR/opaque-ptr.mlir
    M mlir/test/Dialect/LLVMIR/roundtrip.mlir
    M mlir/test/Dialect/LLVMIR/tbaa-roundtrip.mlir
    M mlir/test/Dialect/Vector/vector-contract-to-matrix-intrinsics-transforms.mlir
    M mlir/test/Dialect/Vector/vector-transpose-to-matrix-intrinsics-transform.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/flat-transpose-col.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/flat-transpose-row.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/matrix-multiply-col.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/matrix-multiply-row.mlir
    M mlir/test/Target/LLVMIR/Import/fastmath.ll
    M mlir/test/Target/LLVMIR/Import/ifunc.ll
    M mlir/test/Target/LLVMIR/Import/instructions.ll
    M mlir/test/Target/LLVMIR/Import/intrinsic.ll
    M mlir/test/Target/LLVMIR/Import/masked-intrinsic-metadata.ll
    M mlir/test/Target/LLVMIR/Import/metadata-loop.ll
    M mlir/test/Target/LLVMIR/Import/metadata-profiling.ll
    M mlir/test/Target/LLVMIR/Import/metadata-tbaa.ll
    M mlir/test/Target/LLVMIR/Import/target-ext-type.ll
    M mlir/test/Target/LLVMIR/allocatable_gpu_reduction.mlir
    M mlir/test/Target/LLVMIR/allocatable_gpu_reduction_teams.mlir
    M mlir/test/Target/LLVMIR/anonymous-tbaa.mlir
    M mlir/test/Target/LLVMIR/attribute-alias-scopes.mlir
    M mlir/test/Target/LLVMIR/attribute-dereferenceable.mlir
    M mlir/test/Target/LLVMIR/attribute-tbaa.mlir
    M mlir/test/Target/LLVMIR/ifunc.mlir
    M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
    M mlir/test/Target/LLVMIR/llvmir-invalid.mlir
    M mlir/test/Target/LLVMIR/llvmir.mlir
    M mlir/test/Target/LLVMIR/loop-metadata.mlir
    M mlir/test/Target/LLVMIR/masked-intrinsic-metadata.mlir
    M mlir/test/Target/LLVMIR/omptarget-debug-record-pos.mlir
    M mlir/test/Target/LLVMIR/omptarget-multi-reduction.mlir
    M mlir/test/Target/LLVMIR/omptarget-nowait.mlir
    M mlir/test/Target/LLVMIR/opaque-ptr.mlir
    M mlir/test/Target/LLVMIR/openmp-llvm.mlir
    M mlir/test/Target/LLVMIR/openmp-nontemporal.mlir
    M mlir/test/Target/LLVMIR/openmp-reduction-sections.mlir
    M mlir/test/Target/LLVMIR/openmp-simd-private.mlir
    M mlir/test/Target/LLVMIR/openmp-simd-reduction-simple.mlir
    M mlir/test/Target/LLVMIR/openmp-target-private.mlir
    M mlir/test/Target/LLVMIR/openmp-wsloop-private.mlir
    M mlir/test/Target/LLVMIR/target-ext-type.mlir
    M mlir/test/mlir-tblgen/op-format.td
    M mlir/tools/mlir-tblgen/OpFormatGen.cpp

  Log Message:
  -----------
  [MLIR][LLVM] Enable strict property assembly format (#217277)

Enable strict property assembly format mode for the LLVM dialect. Bind
LLVM operation properties directly in declarative assembly formats so
strict parsing does not rely on fallback handling.

Update LLVM dialect, target, and conversion tests to use the direct
property spelling.

Assisted-by: Codex



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