[all-commits] [llvm/llvm-project] 87cbc7: AMDGPU: Migrate tests with regenerated checks to a...

[Matt Arsenault via All-commits]

  Branch: refs/heads/users/arsenm/llvm/amdgpu-migrate-tests-subarch-53
  Home:   https://github.com/llvm/llvm-project
  Commit: 87cbc7982e04af52ba7b29582fb5a3d12af03d82
      https://github.com/llvm/llvm-project/commit/87cbc7982e04af52ba7b29582fb5a3d12af03d82
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2026-07-15 (Wed, 15 Jul 2026)

  Changed paths:
    M llvm/test/Analysis/CostModel/AMDGPU/sin.ll
    M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
    M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-log.ll
    M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-uniform-waterfall.ll
    M llvm/test/CodeGen/AMDGPU/amdgpu-uniform-intrinsic-combine.ll
    M llvm/test/CodeGen/AMDGPU/amdgpu-uniform-temporal-divergence.ll
    M llvm/test/CodeGen/AMDGPU/atomic-optimizer-promote-i8.ll
    M llvm/test/CodeGen/AMDGPU/atomic_optimization_split_dt_update.ll
    M llvm/test/CodeGen/AMDGPU/disable-preload-kernargs.ll
    M llvm/test/CodeGen/AMDGPU/do-not-unify-divergent-exit-nodes-with-musttail.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.load.2dmsaa.ll
    M llvm/test/CodeGen/AMDGPU/loop-vector-sink.ll
    M llvm/test/CodeGen/AMDGPU/lower-intrinsics-barriers.ll
    M llvm/test/CodeGen/AMDGPU/lower-intrinsics-cluster-barrier.ll
    M llvm/test/CodeGen/AMDGPU/lower-intrinsics-split-barriers.ll
    M llvm/test/CodeGen/AMDGPU/prevent-fmul-hoist-ir.ll
    M llvm/test/CodeGen/AMDGPU/printf_builtin.ll
    M llvm/test/CodeGen/AMDGPU/printf_nobuiltin.ll
    M llvm/test/CodeGen/AMDGPU/promote-alloca-budget-exhausted.ll
    M llvm/test/CodeGen/AMDGPU/vni8-live-reg-opt.ll
    M llvm/test/Transforms/AggressiveInstCombine/AMDGPU/fold-consecutive-loads.ll
    M llvm/test/Transforms/AggressiveInstCombine/AMDGPU/fold-loads-multiple-uses.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f32-agent.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f32-system.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f64-agent.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f64-system.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i32-agent.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i32-system.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i64-agent.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i64-system.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-mmra.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-private-gas.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-v2bf16-agent.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-v2bf16-system.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-v2f16-agent.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-v2f16-system.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomicrmw-flat-noalias-addrspace.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomicrmw-fp-vector.ll
    M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomicrmw-integer-ops-0-to-add-0.ll
    M llvm/test/Transforms/InferAddressSpaces/AMDGPU/phinode-address-infer.ll
    M llvm/test/Transforms/InstCombine/AMDGPU/bitcast-fold-lane-ops.ll
    M llvm/test/Transforms/InstCombine/AMDGPU/fmed3.ll
    M llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.readfirstlane.ll
    M llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.readlane.ll
    M llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.wave.shuffle.ll
    M llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.wavefrontsize.ll
    M llvm/test/Transforms/InstCombine/AMDGPU/mbcnt.ll
    M llvm/test/Transforms/InstCombine/AMDGPU/rcp-contract-rsq.ll
    M llvm/test/Transforms/InstCombine/AMDGPU/simplify-demanded-vector-elts-lane-intrinsics.ll
    M llvm/test/Transforms/InstCombine/AMDGPU/trivially-uniform.ll
    M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/load-i1-misaligned.ll
    M llvm/test/Transforms/LoopVectorize/AMDGPU/buffer-fat-pointer.ll
    M llvm/test/Transforms/SLPVectorizer/AMDGPU/exp2-vectorize.ll
    M llvm/test/Transforms/SLPVectorizer/AMDGPU/external-shuffle.ll
    M llvm/test/Transforms/SLPVectorizer/AMDGPU/extract-ordering.ll
    M llvm/test/Transforms/SLPVectorizer/AMDGPU/inst-count-heuristic.ll
    M llvm/test/Transforms/SLPVectorizer/AMDGPU/notriviallyvectorizableintrinsicoperands.ll
    M llvm/test/Transforms/SLPVectorizer/AMDGPU/slp-v2f16.ll
    M llvm/test/Transforms/SLPVectorizer/AMDGPU/vectorize-i8.ll
    M llvm/test/Transforms/SLPVectorizer/AMDGPU/zext-duplicate-shift.ll
    M llvm/test/Transforms/SandboxVectorizer/AMDGPU/basic.ll
    M llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/amdgpu-large-lds-offset.ll
    M llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/rebuild-trunc.ll
    M llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/reorder-gep-inbounds.ll
    M llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/reorder-gep.ll
    M llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/reunite-exts-source-types.ll
    M llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/reunite-exts.ll
    M llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/split-gep-and-gvn.ll
    M llvm/test/Transforms/VectorCombine/AMDGPU/combine-scalar-selects.ll
    M llvm/test/Transforms/VectorCombine/AMDGPU/extract-insert-i8.ll
    M llvm/test/Transforms/VectorCombine/AMDGPU/shuffles-of-length-changing-shuffles.ll

  Log Message:
  -----------
  AMDGPU: Migrate tests with regenerated checks to amdgpu subarch triple (54)

Fold the explicit -mcpu subtarget into the amdgpu subarch triple on autogenerated tests where the folded triple changes output relative to the previous default subtarget (e.g. cost-model BASE lines, scheduling). CHECK lines were regenerated with the update_*_test_checks.py scripts.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)



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