[all-commits] [llvm/llvm-project] f8f37a: [mlir][acc] Introduce acc to gpu codegen pass (#20...

[Razvan Lupusoru via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f8f37a65d472e65561994fb7ae55f6b539c357d4
      https://github.com/llvm/llvm-project/commit/f8f37a65d472e65561994fb7ae55f6b539c357d4
  Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
  Date:   2026-07-15 (Wed, 15 Jul 2026)

  Changed paths:
    M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
    A mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
    M mlir/lib/Dialect/OpenACC/Transforms/CMakeLists.txt
    A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-barrier-gang-private-init.mlir
    A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-launch-mapping.mlir
    A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-predicate-region-reuse-barrier.mlir
    A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-predicate-region.mlir
    A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-private-local-gang-redundant.mlir
    A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-privatize-local.mlir
    A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-privatize-routine-seq.mlir
    A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-privatize-threadprivate.mlir
    A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-array-shared.mlir
    A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-array.mlir
    A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-block-combine-no-reload.mlir
    A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-combine-region-private-dest.mlir
    A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reuse-barrier-sibling-region-privatize.mlir
    A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-routine-call-nested-if.mlir
    A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-routine-worker-call-with-thread-y-reduction.mlir
    A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-private-dynamic-nw.mlir
    A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-vector-reuse-barrier.mlir
    A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-vector-subgroup-align.mlir

  Log Message:
  -----------
  [mlir][acc] Introduce acc to gpu codegen pass (#209606)

Introduce pass that lowers `acc.compute_region` to the GPU dialect. For
host-side kernels it wraps the region in `gpu.launch`; for specialized
ACC routines already inside a `gpu.func`, the body is lowered in place.

The pass maps nested `scf.parallel` / `scf.for` loops carrying
`acc.par_dims` to GPU block and thread parallelism, materializes
privatization and reductions for the device, and handles
synchronization.

Example input IR:
```
func.func @two_sibling_loops() {
  %c4 = arith.constant 4 : index
  %c32 = arith.constant 32 : index
  %grid = acc.par_width %c4 {par_dim = #acc.par_dim<block_x>}
  %block = acc.par_width %c32 {par_dim = #acc.par_dim<thread_x>}

  acc.kernel_environment {
    %priv = acc.privatize [#acc<par_dims[block_x]>] : () ->
!acc.private_type<memref<32xi32>>
    acc.compute_region launch(%g = %grid, %t = %block) ins(%p = %priv)
        : (!acc.private_type<memref<32xi32>>) {
      %slot = acc.private_local %p : (!acc.private_type<memref<32xi32>>)
-> memref<32xi32>
      %c0 = arith.constant 0 : index
      %c1 = arith.constant 1 : index
      %c32_len = arith.constant 32 : index

      scf.parallel (%tx) = (%c0) to (%t) step (%c1) {
        scf.parallel (%i) = (%c0) to (%c32_len) step (%c1) {
          %v = arith.index_cast %i : index to i32
          memref.store %v, %slot[%i] : memref<32xi32>
          scf.reduce
        } {acc.par_dims = #acc<par_dims[sequential]>}
        scf.reduce
      } {acc.par_dims = #acc<par_dims[thread_x]>}

      scf.parallel (%bx) = (%c0) to (%g) step (%c1) {
        scf.parallel (%tx2) = (%c0) to (%t) step (%c1) {
          scf.parallel (%j) = (%c0) to (%c32_len) step (%c1) {
            %loaded = memref.load %slot[%j] : memref<32xi32>
            memref.store %loaded, %slot[%j] : memref<32xi32>
            scf.reduce
          } {acc.par_dims = #acc<par_dims[sequential]>}
          scf.reduce
        } {acc.par_dims = #acc<par_dims[thread_x]>}
        scf.reduce
      } {acc.par_dims = #acc<par_dims[block_x]>}

      acc.yield
    } {origin = "acc.parallel"}
  }
  return
}
```

Output IR:
```
module {
  func.func @two_sibling_loops() {
    %c4 = arith.constant 4 : index
    %c32 = arith.constant 32 : index
    acc.kernel_environment {
      %0 = acc.privatize [#acc<par_dims[block_x]>] : () ->
!acc.private_type<memref<32xi32>>
      %c1 = arith.constant 1 : index
      gpu.launch blocks(%arg0, %arg1, %arg2) in (%arg6 = %c4, %arg7 =
%c1, %arg8 = %c1)
                   threads(%arg3, %arg4, %arg5) in (%arg9 = %c32, %arg10
= %c1, %arg11 = %c1) {
        %grid_dim_x = gpu.grid_dim x
        %grid_dim_y = gpu.grid_dim y
        %grid_dim_z = gpu.grid_dim z
        %block_dim_x = gpu.block_dim x
        %block_dim_y = gpu.block_dim y
        %block_dim_z = gpu.block_dim z
        %1 = acc.gpu_shared_memory {num_copies = 1 : i64,
static_upper_bound_bytes = 128 : i64}
             : () -> memref<32xi32, #gpu.address_space<workgroup>>
        %memspacecast = memref.memory_space_cast %1
             : memref<32xi32, #gpu.address_space<workgroup>> to
memref<32xi32>
        %c0 = arith.constant 0 : index
        %c1_0 = arith.constant 1 : index
        %c32_1 = arith.constant 32 : index

        scf.parallel (%arg12) = (%c0) to (%c32_1) step (%c1_0) {
          %2 = arith.index_cast %arg12 : index to i32
          memref.store %2, %memspacecast[%arg12] : memref<32xi32>
          scf.reduce
        } {acc.par_dims = #acc<par_dims[sequential]>}

        gpu.barrier

        scf.parallel (%arg12) = (%c0) to (%c32_1) step (%c1_0) {
          %2 = memref.load %memspacecast[%arg12] : memref<32xi32>
          memref.store %2, %memspacecast[%arg12] : memref<32xi32>
          scf.reduce
        } {acc.par_dims = #acc<par_dims[sequential]>}

        gpu.barrier
        gpu.terminator
      }
    }
    return
  }
}
```

---------

Co-authored-by: Matsu <kmatsumura at nvidia.com>



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