[all-commits] [llvm/llvm-project] c58ba1: AMDGPU: Migrate CodeGen tests to amdgpu subarch tr...

Wed Jul 15 04:02:32 PDT 2026

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c58ba1cf51d2886994da7e667a05c1bfe4f4396b
      https://github.com/llvm/llvm-project/commit/c58ba1cf51d2886994da7e667a05c1bfe4f4396b
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2026-07-15 (Wed, 15 Jul 2026)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/vgpr-spill-scc-clobber.mir
    M llvm/test/CodeGen/AMDGPU/vgpr-spill.mir
    M llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll
    M llvm/test/CodeGen/AMDGPU/vi-removed-intrinsics.ll
    M llvm/test/CodeGen/AMDGPU/visit-physreg-vgpr-imm-folding-bug.ll
    M llvm/test/CodeGen/AMDGPU/vmem-to-salu-hazard.mir
    M llvm/test/CodeGen/AMDGPU/vmem-vcc-hazard.mir
    M llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll
    M llvm/test/CodeGen/AMDGPU/vop-shrink.ll
    M llvm/test/CodeGen/AMDGPU/vopc-remat.mir
    M llvm/test/CodeGen/AMDGPU/vopc_dpp-true16.mir
    M llvm/test/CodeGen/AMDGPU/vopc_dpp.ll
    M llvm/test/CodeGen/AMDGPU/vopc_dpp.mir
    M llvm/test/CodeGen/AMDGPU/vopd-combine-gfx1250.mir
    M llvm/test/CodeGen/AMDGPU/vopd-combine.mir
    M llvm/test/CodeGen/AMDGPU/vopd-gfx12-f64-relaxed.mir
    M llvm/test/CodeGen/AMDGPU/vopd-src2acc-delay.mir
    M llvm/test/CodeGen/AMDGPU/vselect.ll
    M llvm/test/CodeGen/AMDGPU/wait-before-stores-with-scope_sys.ll
    M llvm/test/CodeGen/AMDGPU/wait-before-stores-with-scope_sys.mir
    M llvm/test/CodeGen/AMDGPU/wait-xcnt-atomic-rmw-optimization.ll
    M llvm/test/CodeGen/AMDGPU/wait-xcnt-drain.mir
    M llvm/test/CodeGen/AMDGPU/wait-xcnt.mir
    M llvm/test/CodeGen/AMDGPU/wait.ll
    M llvm/test/CodeGen/AMDGPU/waitcnt-agpr.mir
    M llvm/test/CodeGen/AMDGPU/waitcnt-back-edge-loop.mir
    M llvm/test/CodeGen/AMDGPU/waitcnt-bvh.mir
    M llvm/test/CodeGen/AMDGPU/waitcnt-debug-output-crash.ll
    M llvm/test/CodeGen/AMDGPU/waitcnt-flat.ll
    M llvm/test/CodeGen/AMDGPU/waitcnt-func-global-inv.mir
    M llvm/test/CodeGen/AMDGPU/waitcnt-gfx1250.mir
    M llvm/test/CodeGen/AMDGPU/waitcnt-global-inv-wb.mir
    M llvm/test/CodeGen/AMDGPU/waitcnt-kmcnt-scc-different-block.mir
    M llvm/test/CodeGen/AMDGPU/waitcnt-loop-ds-prefetch-flushed.ll
    M llvm/test/CodeGen/AMDGPU/waitcnt-loop-ds-prefetch-flushed.mir
    M llvm/test/CodeGen/AMDGPU/waitcnt-loop-ds-prefetch-pattern.ll
    M llvm/test/CodeGen/AMDGPU/waitcnt-loop-ds-store-barrier.mir
    M llvm/test/CodeGen/AMDGPU/waitcnt-loop-irreducible.mir
    M llvm/test/CodeGen/AMDGPU/waitcnt-loop-opt.mir
    M llvm/test/CodeGen/AMDGPU/waitcnt-loop-single-basic-block.mir
    M llvm/test/CodeGen/AMDGPU/waitcnt-looptest.ll
    M llvm/test/CodeGen/AMDGPU/waitcnt-meta-instructions.mir
    M llvm/test/CodeGen/AMDGPU/waitcnt-multiple-funcs.mir
    M llvm/test/CodeGen/AMDGPU/waitcnt-overflow.mir
    M llvm/test/CodeGen/AMDGPU/waitcnt-permute.mir
    M llvm/test/CodeGen/AMDGPU/waitcnt-preexisting-vscnt.mir
    M llvm/test/CodeGen/AMDGPU/waitcnt-preexisting.mir
    M llvm/test/CodeGen/AMDGPU/waitcnt-sample-out-order.mir
    M llvm/test/CodeGen/AMDGPU/waitcnt-sample-waw.mir
    M llvm/test/CodeGen/AMDGPU/waitcnt-skip-meta.mir
    M llvm/test/CodeGen/AMDGPU/waitcnt-unscoped.ll
    M llvm/test/CodeGen/AMDGPU/waitcnt-vinterp.mir
    M llvm/test/CodeGen/AMDGPU/waitcnt-vmcnt-loop.mir
    M llvm/test/CodeGen/AMDGPU/waitcnt-vmem-waw.mir
    M llvm/test/CodeGen/AMDGPU/waitcnt-vscnt.ll
    M llvm/test/CodeGen/AMDGPU/waitcnt-vscnt.mir
    M llvm/test/CodeGen/AMDGPU/waitcnt-wbl2.ll
    M llvm/test/CodeGen/AMDGPU/waitcnt.mir
    M llvm/test/CodeGen/AMDGPU/waterfall-call-inreg-agpr.ll
    M llvm/test/CodeGen/AMDGPU/waterfall-call-inreg-agpr.mir
    M llvm/test/CodeGen/AMDGPU/waterfall-call-target-av-register-failure.ll
    M llvm/test/CodeGen/AMDGPU/waterfall_kills_scc.ll
    M llvm/test/CodeGen/AMDGPU/wave32.ll
    M llvm/test/CodeGen/AMDGPU/wave_dispatch_regs.ll
    M llvm/test/CodeGen/AMDGPU/while-break.ll
    M llvm/test/CodeGen/AMDGPU/whole-wave-functions-pei.mir
    M llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
    M llvm/test/CodeGen/AMDGPU/whole-wave-register-copy.ll
    M llvm/test/CodeGen/AMDGPU/whole-wave-register-spill.ll
    M llvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll
    M llvm/test/CodeGen/AMDGPU/widen_extending_scalar_loads.ll
    M llvm/test/CodeGen/AMDGPU/wmma-coexecution-valu-hazards.mir
    M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-f16-f32-matrix-modifiers.ll
    M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-imm.ll
    M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-iu-modifiers.ll
    M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-swmmac-index_key.ll
    M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32.ll
    M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-f16-f32-matrix-modifiers.ll
    M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-imm.ll
    M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-iu-modifiers.ll
    M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-swmmac-index_key.ll
    M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64.ll
    M llvm/test/CodeGen/AMDGPU/wmma-hazards-gfx12-w32.mir
    M llvm/test/CodeGen/AMDGPU/wmma-hazards-gfx12-w64.mir
    M llvm/test/CodeGen/AMDGPU/wmma-hazards-gfx1250-w32.mir
    M llvm/test/CodeGen/AMDGPU/wmma-hazards-gfx1251-w32.mir
    M llvm/test/CodeGen/AMDGPU/wmma-hazards.mir
    M llvm/test/CodeGen/AMDGPU/wmma-nop-hoisting.mir
    M llvm/test/CodeGen/AMDGPU/wmma_modifiers.ll
    M llvm/test/CodeGen/AMDGPU/wmma_multiple_32.ll
    M llvm/test/CodeGen/AMDGPU/wmma_multiple_64.ll
    M llvm/test/CodeGen/AMDGPU/workgroup-id-in-arch-sgprs.ll
    M llvm/test/CodeGen/AMDGPU/workitem-intrinsic-opts.ll
    M llvm/test/CodeGen/AMDGPU/wqm-debug-instr-terminator.mir
    M llvm/test/CodeGen/AMDGPU/wqm-gfx11.ll
    M llvm/test/CodeGen/AMDGPU/wqm-propagate-for-execz-side-effect.mir
    M llvm/test/CodeGen/AMDGPU/wqm-terminators.mir
    M llvm/test/CodeGen/AMDGPU/wqm.ll

  Log Message:
  -----------
  AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (37) (#209601)

Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)

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