[all-commits] [llvm/llvm-project] 902273: [clang][tablegen] Allow qualifiers on _Vector buil...
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Mon Jul 13 07:16:07 PDT 2026
Branch: refs/heads/users/c8ef/atomic_minmax
Home: https://github.com/llvm/llvm-project
Commit: 902273247db1f8b62613f38fa1a6f93700de517b
https://github.com/llvm/llvm-project/commit/902273247db1f8b62613f38fa1a6f93700de517b
Author: Alexey Karyakin <akaryaki at qti.qualcomm.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M clang/test/TableGen/target-builtins-prototype-parser.td
M clang/utils/TableGen/ClangBuiltinsEmitter.cpp
Log Message:
-----------
[clang][tablegen] Allow qualifiers on _Vector builtin types (#207091)
The builtin prototype parser accepts pointers to _Vector<> template
types but not const/volatile/restrict pointers. Currently, _Vector<>
types are parsed in a special way: first parsing the type itself,
consuming it, and saving the resulting type string. Then, the remaining
qualifiers are parsed while the type is removed from the input. For this
to work, parsing qualifiers must accept empty base type, which was the
case only for plain pointers and references.
This change extends this approach to const/volatile/restrict qualifiers.
Signed-off-by: Alexey Karyakin <akaryaki at qti.qualcomm.com>
Commit: a913e893c3f3e820f413ccd3877f19eb4ab028f6
https://github.com/llvm/llvm-project/commit/a913e893c3f3e820f413ccd3877f19eb4ab028f6
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/externally-used-copyables.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-postpone-for-dependency.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-operands-reordering.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-node-with-in-order-parent.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-before-main.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-with-removed-extracts.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias_external_insert_shuffled.ll
M llvm/test/Transforms/SLPVectorizer/X86/vect_copyable_in_binops.ll
Log Message:
-----------
[SLP]Support Mul as the main copyable instruction
Added support for the missed Mul as a main copyable instruction opcode
Reviewers: RKSimon, hiraditya, bababuck
Pull Request: https://github.com/llvm/llvm-project/pull/207622
Commit: b0d35497b666b3e0c0c4244c1f8c19f2cfdc1fb2
https://github.com/llvm/llvm-project/commit/b0d35497b666b3e0c0c4244c1f8c19f2cfdc1fb2
Author: Quentin Colombet <quentin.colombet at gmail.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/MIRParser/MILexer.cpp
M llvm/lib/CodeGen/MIRParser/MILexer.h
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/test/CodeGen/AArch64/nested-iv-regalloc.mir
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
M llvm/test/CodeGen/AMDGPU/bug-undef-spilled-agpr.mir
M llvm/test/CodeGen/AMDGPU/dead_bundle.mir
M llvm/test/CodeGen/AMDGPU/extend-phi-subrange-not-in-parent.mir
M llvm/test/CodeGen/AMDGPU/greedy-global-heuristic.mir
M llvm/test/CodeGen/AMDGPU/inflate-reg-class-vgpr-mfma-to-agpr-negative-tests.mir
M llvm/test/CodeGen/AMDGPU/inflate-reg-class-vgpr-mfma-to-av-with-load-source.mir
M llvm/test/CodeGen/AMDGPU/inflate-reg-class-vgpr-mfma-to-av.mir
M llvm/test/CodeGen/AMDGPU/inflated-reg-class-snippet-copy-use-after-free.mir
M llvm/test/CodeGen/AMDGPU/infloop-subrange-spill-inspect-subrange.mir
M llvm/test/CodeGen/AMDGPU/infloop-subrange-spill.mir
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/ra-inserted-scalar-instructions.mir
M llvm/test/CodeGen/AMDGPU/ran-out-of-sgprs-allocation-failure.mir
M llvm/test/CodeGen/AMDGPU/regalloc-fail-unsatisfiable-overlapping-tuple-hints.mir
M llvm/test/CodeGen/AMDGPU/regalloc-undef-copy-fold.mir
M llvm/test/CodeGen/AMDGPU/split-liverange-overlapping-copies.mir
M llvm/test/CodeGen/AMDGPU/splitkit-copy-bundle.mir
M llvm/test/CodeGen/AMDGPU/splitkit-copy-live-lanes.mir
M llvm/test/CodeGen/AMDGPU/splitkit-do-not-undo-subclass-split-with-remat.mir
M llvm/test/CodeGen/AMDGPU/splitkit.mir
M llvm/test/CodeGen/AMDGPU/swdev502267-use-after-free-last-chance-recoloring-alloc-succeeds.mir
A llvm/test/CodeGen/MIR/AMDGPU/lr-split-flag.mir
M llvm/test/CodeGen/RISCV/pr176001.ll
M llvm/test/CodeGen/X86/AMX/amx-greedy-ra-spill-shape.ll
M llvm/test/CodeGen/X86/apx/foldmemory.mir
M llvm/test/CodeGen/X86/statepoint-invoke-ra-enter-at-end.mir
M llvm/test/CodeGen/X86/statepoint-invoke-ra-inline-spiller.mir
M llvm/test/CodeGen/X86/statepoint-invoke-ra.mir
M llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-movements.mir
M llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-stackptr.mir
M llvm/utils/UpdateTestChecks/mir.py
Log Message:
-----------
[MIR] Serialize/Deserialize MachineInstr::LRSplit flag (#197362)
The LRSplit MachineInstr flag is set by SplitKit on copies inserted for
live-range splitting.
Until now the flag had no MIR-text representation.
This patch fixes that so that it gets easier to reproduce/capture issues
that involves SplitKit.
Round-trip coverage in
llvm/test/CodeGen/MIR/AMDGPU/lr-split-flag.mir.
Commit: c35cba42e67284a1b6b8609f20782f6d8c692a6c
https://github.com/llvm/llvm-project/commit/c35cba42e67284a1b6b8609f20782f6d8c692a6c
Author: Anshil Gandhi <95053726+gandhi56 at users.noreply.github.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M llvm/include/llvm/SandboxIR/PassManager.h
M llvm/unittests/SandboxIR/PassTest.cpp
Log Message:
-----------
[SandboxIR] Fix pass pipeline parsing after aux arguments (#207237)
## Summary
- Fix `sandboxir::PassManager::setPassPipeline` to resume scanning pass
names after a pass aux argument when the next token is a delimiter.
- Add a unit test covering flat pipelines like `foo(aux1),bar`.
This fixes parsing of region pass pipelines such as
`bottom-up-vec(top-down),tr-accept` that will be used by the
SandboxVectorizer.
## Test plan
- [x] `ninja SandboxIRTests`
- [x] `./unittests/SandboxIR/SandboxIRTests
--gtest_filter=PassTest.SetPassPipeline`
Made with [Cursor](https://cursor.com)
Co-authored-by: Cursor <cursoragent at cursor.com>
Commit: 20e12152f9b218c42791151f0bca93a5a1763b64
https://github.com/llvm/llvm-project/commit/20e12152f9b218c42791151f0bca93a5a1763b64
Author: Jason Eckhardt <jeckhardt at nvidia.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64CallingConvention.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
M llvm/lib/Target/ARC/ARCISelLowering.cpp
M llvm/lib/Target/ARM/ARMCallingConv.cpp
M llvm/lib/Target/AVR/AVRISelLowering.cpp
M llvm/lib/Target/BPF/BPFISelLowering.cpp
M llvm/lib/Target/CSKY/CSKYISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Lanai/LanaiISelLowering.cpp
M llvm/lib/Target/M68k/M68kISelLowering.cpp
M llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
M llvm/lib/Target/Mips/MipsFastISel.cpp
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCCallingConv.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/VE/VEISelLowering.cpp
M llvm/lib/Target/X86/X86CallingConv.cpp
M llvm/lib/Target/XCore/XCoreISelLowering.cpp
M llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
M llvm/utils/TableGen/CallingConvEmitter.cpp
Log Message:
-----------
[TableGen][CC][NFC] Emit idiomatic guards for CallingConv. (#207758)
Emit independent guards for the two existing sections rather than the
if-else done today. This is in preparation for adding other sections
that must be includable exclusive of the other sections.
This also eliminates the current asymmetry between the automatic
IfGuardEmitter for the "if" portion vs the manually emitted "else"
section.
Commit: 78bc590bbc89aa868bcee35982dd3cf70cebea64
https://github.com/llvm/llvm-project/commit/78bc590bbc89aa868bcee35982dd3cf70cebea64
Author: Stefan Mada <smada at nvidia.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M llvm/lib/IR/AsmWriter.cpp
A llvm/test/CodeGen/NVPTX/intrinsic-immarg-print-mismatched-signature.ll
Log Message:
-----------
[IR][NVVM] Fixed null pointer deference in AsmWriter pretty printer (#207223)
ASMWriter can deference a null pointer on intrinsics with pretty printed
args when those intrinsics are called with an invalid number of
arguments. This check avoids the null dereference and turns this into a
graceful failure.
Commit: 9c823964dd43645162d361b16d2ddedc381f5d2d
https://github.com/llvm/llvm-project/commit/9c823964dd43645162d361b16d2ddedc381f5d2d
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXLowerAlloca.cpp
M llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
M llvm/lib/Target/NVPTX/NVPTXLowerUnreachable.cpp
Log Message:
-----------
[NFC][LLVM][NVPTX] Initialize pass-ids to zero (#207547)
Initialize pass::ID values for various passes to canonical zero instead
of 1.
Commit: 2e75acd861aa78755c7a57ab8eca63fde916497a
https://github.com/llvm/llvm-project/commit/2e75acd861aa78755c7a57ab8eca63fde916497a
Author: Aditya Medhane <sherlockedaditya at gmail.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M libc/test/UnitTest/ErrnoSetterMatcher.h
Log Message:
-----------
[libc][test] Remove internal linkage from ErrnoSetterMatcher helpers (NFC) (#207707)
`Succeeds`, `Fails`, and `returns` are static function templates in a
header, so any test TU that includes it without using all of them trips
`-Wunused-template`. Dropping static also matches the neighboring EQ/NE
helpers, which are already non-static.
Part of #202945.
Commit: 42746081459775eb85879cc09361a316ac9e0ea2
https://github.com/llvm/llvm-project/commit/42746081459775eb85879cc09361a316ac9e0ea2
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp
M llvm/test/CodeGen/AMDGPU/opencl-printf.ll
Log Message:
-----------
[AMDGPU] Fix printf %s buffer slot oversized when strlen % 4 == 0 (#207772)
The metadata slot for a constant string %s used alignTo(strlen + 1, 4),
but the store loop only writes ceil(strlen / 4) dwords (no trailing
NUL), so every following argument was read from offset shifted by +4
Commit: 0f0b1c76a4d84594fef4de8ae5c49aa565d8bab0
https://github.com/llvm/llvm-project/commit/0f0b1c76a4d84594fef4de8ae5c49aa565d8bab0
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M .github/workflows/libcxx-run-benchmarks.yml
Log Message:
-----------
[libc++] Run the libcxx-run-benchmarks action on macOS in addition to Linux (#207780)
The libcxx-run-benchmarks action is triggered when a specially formatted
comment is posted on a PR, requesting benchmarks to be run against that
PR. This patch expands the Github action so it also runs benchmarks on
the macOS CI resources that were added recently.
Commit: 804a081a797c953b86503ead745dfde96f1c61c9
https://github.com/llvm/llvm-project/commit/804a081a797c953b86503ead745dfde96f1c61c9
Author: Ömer Sinan Ağacan <omeragacan at gmail.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-phi.mir
Log Message:
-----------
[GlobalISel][AArch64] Legalize PHIs with vectors smaller than 64-bits (#207356)
New legalization rule added as the last to not change legalization of
small vectors in existing tests.
Commit: 82d27f67b6aad3bf72e9db610ab5b6984cb02b76
https://github.com/llvm/llvm-project/commit/82d27f67b6aad3bf72e9db610ab5b6984cb02b76
Author: Nathan Corbyn <n_corbyn at apple.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
R clang/test/Interpreter/emulated-tls.cpp
M llvm/lib/ExecutionEngine/Orc/Layer.cpp
Log Message:
-----------
Revert "[ORC] Track __emutls_t definitions in IRMaterializationUnit" (#207775)
Commit: 96904e83cf69b0a02a5fb7dece9b258f562205e0
https://github.com/llvm/llvm-project/commit/96904e83cf69b0a02a5fb7dece9b258f562205e0
Author: Christopher Ferris <cferris1000 at users.noreply.github.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M compiler-rt/lib/scudo/standalone/tests/chunk_test.cpp
M compiler-rt/lib/scudo/standalone/tests/combined_test.cpp
M compiler-rt/lib/scudo/standalone/tests/flags_test.cpp
M compiler-rt/lib/scudo/standalone/tests/map_test.cpp
M compiler-rt/lib/scudo/standalone/tests/memtag_test.cpp
M compiler-rt/lib/scudo/standalone/tests/report_test.cpp
M compiler-rt/lib/scudo/standalone/tests/scudo_unit_test.h
M compiler-rt/lib/scudo/standalone/tests/secondary_test.cpp
M compiler-rt/lib/scudo/standalone/tests/wrappers_c_test.cpp
M compiler-rt/lib/scudo/standalone/tests/wrappers_cpp_test.cpp
Log Message:
-----------
[scudo] Make death tests use SCUDO_XXX_DEATH_TEST. (#206196)
On Android, we want to disable the tombstone generation on expected
crashes to speed up running the tests. Also, this means that any
tombstone files will be real crashes and it's not necessary to search
for the right tombstone if one of the tests crashes unexpectedly.
In order to do the above, add SCUDO_EXPECT_DEATH_TEST and
SCUDO_ASSERT_DEATH_TEST that will disable tombstoned on Android but do
nothing on all other platforms.
Commit: 69ee64790ed69555264a200a3ae95d644a649e42
https://github.com/llvm/llvm-project/commit/69ee64790ed69555264a200a3ae95d644a649e42
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
A llvm/test/Transforms/InstCombine/frexp-implied-exponent-range-dominating-conditions.ll
Log Message:
-----------
InstCombine: Add baseline test for implied frexp exponent ranges (#206926)
Commit: d1eae28e79d33a4f85bf16a09cbb90aa9b6848e4
https://github.com/llvm/llvm-project/commit/d1eae28e79d33a4f85bf16a09cbb90aa9b6848e4
Author: Kamlesh Kumar <kamleshbhalui at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
A llvm/test/Transforms/InstSimplify/vector-interleave-deinterleave.ll
Log Message:
-----------
[InstSimplify] fold the identity interleave (#206646)
If all the extracvalue of deinterleave used in interleave in same order
then it is an identity.
Commit: 5e265484030eb034a14f4e4fec5abb0209605787
https://github.com/llvm/llvm-project/commit/5e265484030eb034a14f4e4fec5abb0209605787
Author: Aliaksei Urbanski <aliaksei.urbanski at gmail.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M clang-tools-extra/docs/clang-tidy/checks/modernize/avoid-bind.rst
M clang/include/clang/Lex/MultipleIncludeOpt.h
M clang/lib/AST/DeclCXX.cpp
M clang/lib/CodeGen/README.txt
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Headers/avx2intrin.h
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/StaticAnalyzer/Checkers/GenericTaintChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/NullabilityChecker.cpp
M compiler-rt/lib/hwasan/hwasan_tag_mismatch_aarch64.S
M compiler-rt/lib/hwasan/hwasan_tag_mismatch_riscv64.S
M flang/docs/Semantics.md
M flang/lib/Lower/CallInterface.cpp
M flang/lib/Optimizer/Transforms/LoopInvariantCodeMotion.cpp
M libc/src/string/memory_utils/arm/inline_memcpy.h
M libcxx/docs/DesignDocs/FeatureTestMacros.rst
M llvm/docs/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack.md
M llvm/docs/LangRef.rst
M llvm/docs/RISCVUsage.rst
M llvm/lib/Analysis/BlockFrequencyInfoImpl.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/ARM/ARMInstrNEON.td
M llvm/lib/Transforms/Instrumentation/NumericalStabilitySanitizer.cpp
M llvm/test/CodeGen/AArch64/regcoal-physreg.mir
M llvm/test/CodeGen/PowerPC/pgo-ref-directive.ll
M mlir/include/mlir/Dialect/Async/IR/AsyncOps.td
M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.h
M mlir/include/mlir/Dialect/NVGPU/IR/NVGPUOps.td
M polly/lib/External/isl/isl_union_map.c
Log Message:
-----------
[NFC] Fix "is is" typos (#206288)
These changes aim to fix common "is is" typos.
Commit: 03c62ca40d19ba03c7d2b69dbedc95e498d46071
https://github.com/llvm/llvm-project/commit/03c62ca40d19ba03c7d2b69dbedc95e498d46071
Author: Alex Strelnikov <strel at google.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M libc/docs/dev/printf_behavior.rst
M libc/src/__support/float_to_string.h
M libc/src/stdio/printf_core/converter_utils.h
M libc/src/stdio/printf_core/core_structs.h
M libc/src/stdio/printf_core/float_dec_converter.h
M libc/src/stdio/printf_core/float_dec_converter_limited.h
M libc/src/stdio/printf_core/float_hex_converter.h
M libc/src/stdio/printf_core/float_inf_nan_converter.h
M libc/src/stdio/printf_core/parser.h
M libc/src/stdio/printf_core/printf_config.h
M libc/src/stdio/printf_core/write_int_converter.h
M libc/test/UnitTest/CMakeLists.txt
M libc/test/UnitTest/PrintfMatcher.cpp
M libc/test/src/stdio/CMakeLists.txt
M libc/test/src/stdio/sprintf_test.cpp
Log Message:
-----------
[libc] Add Q length modifier to support float128 conversions in printf (#203077)
The spelling follows an existing pattern in e.g. libquadmath for format
printing `__float128` values.
A flag is added to disable float128 conversions and the "Q" length
modifier.
Commit: a4107d67f91946a97d0acd0a70e2ae16513858b9
https://github.com/llvm/llvm-project/commit/a4107d67f91946a97d0acd0a70e2ae16513858b9
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M .github/workflows/libcxx-run-benchmarks.yml
Log Message:
-----------
[libc++] Don't install custom Python on self-hosted macOS runners (#207794)
That shouldn't be necessary, since they already come with Python 3, and
it doesn't work anyway because it requires special setup that the macOS
runners don't currently perform.
Commit: 7b9a58e6cfa0dab49ef417f731ee7a8dc5e3aab5
https://github.com/llvm/llvm-project/commit/7b9a58e6cfa0dab49ef417f731ee7a8dc5e3aab5
Author: Michael Jones <michaelrj at google.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/hdr/CMakeLists.txt
A libc/hdr/dirent_overlay.h
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/DIR.h
A libc/hdr/types/struct_dirent.h
M libc/src/__support/File/dir.cpp
M libc/src/__support/File/dir.h
M libc/src/__support/File/linux/CMakeLists.txt
M libc/src/__support/File/linux/dir.cpp
M libc/src/__support/OSUtil/linux/stat/kernel_statx_types.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/fcntl.h
M libc/src/dirent/CMakeLists.txt
A libc/src/dirent/fdopendir.cpp
A libc/src/dirent/fdopendir.h
M libc/test/src/dirent/CMakeLists.txt
A libc/test/src/dirent/fdopendir_test.cpp
Log Message:
-----------
[libc] Implement fdopendir (#206590)
The fdopendir function takes a file descriptor opened on a directory,
then opens a DIR* on it.
Needed for #191075
Assisted-by: Automated tooling, human reviewed.
Commit: 2590272e5674c300c9438ef5c10a65358b0636e9
https://github.com/llvm/llvm-project/commit/2590272e5674c300c9438ef5c10a65358b0636e9
Author: Alex Langford <alangford at apple.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M lldb/include/lldb/Core/EmulateInstruction.h
M lldb/include/lldb/Core/Value.h
M lldb/include/lldb/Expression/Materializer.h
M lldb/include/lldb/Host/common/NativeRegisterContext.h
M lldb/include/lldb/Symbol/UnwindPlan.h
M lldb/include/lldb/Target/DynamicRegisterInfo.h
M lldb/include/lldb/Target/RegisterContext.h
A lldb/include/lldb/Utility/RegisterInfo.h
M lldb/include/lldb/Utility/RegisterValue.h
M lldb/include/lldb/lldb-private-types.h
M lldb/source/Plugins/Process/Utility/RegisterFlagsDetector_arm64.h
M lldb/source/Plugins/Process/Utility/RegisterInfoInterface.h
Log Message:
-----------
[lldb] Move RegisterInfo and RegisterSet into their own header (#207286)
RegisterInfo holds onto a pointer to RegisterFlags which is in
lldbUtility. My understanding of lldb-private-types is that it contains
types used throughout LLDB but should generally stand on their own (i.e.
without dependencies on specific lldb types and headers). Thus I am
moving it to lldbUtility.
RegisterSet _does_ stand on its own but it is pretty strongly coupled to
RegisterInfo.
Commit: b74512899707cfcf962ebfa21f9209378372e78b
https://github.com/llvm/llvm-project/commit/b74512899707cfcf962ebfa21f9209378372e78b
Author: Andrei Elovikov <andrei.elovikov at sifive.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
Log Message:
-----------
[NFC][PatternMatch] Simplify m_Intrinsic impl using variadic templates (#207211)
Updates both IR/VPlan pattern matchers.
Commit: 76d253e2736c7da493a836c9c150772056dafd73
https://github.com/llvm/llvm-project/commit/76d253e2736c7da493a836c9c150772056dafd73
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
Log Message:
-----------
[docs][AMDGPU] Document amdgpu.buffer.oob.mode more, especially on fat pointers (#134734)
This commit expands the documentation of the amdgpu.buffer.oob.mode so
that fat buffer pointer users are more aware of its effects.
Commit: c8c20662e036099b00469bf26324b93151acb00c
https://github.com/llvm/llvm-project/commit/c8c20662e036099b00469bf26324b93151acb00c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M llvm/include/llvm/Support/KnownFPClass.h
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/Support/KnownFPClass.cpp
M llvm/test/Transforms/Attributor/nofpclass-ldexp.ll
M llvm/test/Transforms/InstCombine/frexp-implied-exponent-range-dominating-conditions.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-ldexp.ll
Log Message:
-----------
ValueTracking: Improve frexp known range from dominating conditions (#206927)
Try to restrict the known range of the exponent result of llvm.frexp
based on dominating conditions. Identify comparisons that imply the
incoming value cannot introduce an overflow in a downstream ldexp
use. This pattern appears in the implementation of some complex math
functions and allows finite only math to prune out more edge case
paths.
One attributor test for ldexp regresses due to the switch from
computeKnownBits to computeConstantRange. computeConstantRange
does not try to handle non-splat vector constants for the binary
operators.
As a side effect, this also improves knowing that ldexp can't
introduce overflow for the 0 case.
Commit: dbd7511ad28819587fc9effc0086abf437279a84
https://github.com/llvm/llvm-project/commit/dbd7511ad28819587fc9effc0086abf437279a84
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-calls.ll
A llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-contents-legalization-alignment.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-contents-legalization.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-mem-transfer.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-unoptimized-debug-data.ll
M llvm/test/CodeGen/AMDGPU/memset-pattern.ll
Log Message:
-----------
[LowerBufferFatPointers] Correctly handle alignment modes (#134329)
Previously, AMDGPULowerBufferFatPointers would emit unaligned buffer
loads/stores, even when such unaligned accesses were disabled (that is,
on non-HSA platforms).
In addition, the lowering did not respect the newly-added
amdgpu.buffer.oob.mode module flag, which now must be enabled in order
to vectorize unaligned loads from buffers.
This commit fixes both issues and adds tests.
Commit: 000f6bf9cb7ec4223ef1de829158d09d4bfa2946
https://github.com/llvm/llvm-project/commit/000f6bf9cb7ec4223ef1de829158d09d4bfa2946
Author: Zhen Wang <zhenw at nvidia.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/CUDA/CUFFunctionRewrite.cpp
M flang/test/Fir/CUDA/cuda-function-rewrite.mlir
Log Message:
-----------
[flang][cuda] Recognize on_device() by its Fortran leaf name in CUFFunctionRewrite (#207298)
CUFFunctionRewrite folds on_device() to a compile-time constant: true
inside a gpu.module (device), false on the host. Match on the callee's
Fortran leaf name, recovered independently of the external name-mangling
convention and of where the pass runs in the pipeline.
Commit: 3ae61eb220dc8f1fa0dd551a9575237b84dae61d
https://github.com/llvm/llvm-project/commit/3ae61eb220dc8f1fa0dd551a9575237b84dae61d
Author: Ken Matsui <26405363+ken-matsui at users.noreply.github.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M llvm/include/llvm/Analysis/ValueTracking.h
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/test/Transforms/InstCombine/add.ll
M llvm/test/Transforms/InstCombine/masked-merge-add.ll
M llvm/test/Transforms/InstCombine/pr53357.ll
M llvm/unittests/Analysis/ValueTrackingTest.cpp
Log Message:
-----------
[InstCombine] Turn Add into Or even when undef (#171556)
Since 03d4a9d94da30590ebfc444cf13a8763f47b7bb9, Add is turned into
DisjointOr, and since 5c3496ff33ce8e4cc6f8c18edd7ae5fc65d23fdf, Add
isn't turned into DisjointOr when undef. However, Add can still be
turned into Or even when undef.
This patch restores the transformation behavior we had in LLVM 17, while
continuing to generate DisjointOr when possible.
Alive2: https://alive2.llvm.org/ce/z/ZT0ZFj
Commit: 5e5490f2df9c9c329689929b62d51ee0fb95fb30
https://github.com/llvm/llvm-project/commit/5e5490f2df9c9c329689929b62d51ee0fb95fb30
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/haddsub-undef.ll
M llvm/test/CodeGen/X86/phaddsub-undef.ll
Log Message:
-----------
[X86] combineToHorizontalAddSub - use PostShuffleMask to determine undemanded subvectors (#207789)
For cases where the middle-end has created a 256-bit HADD/SUB pattern
with unused upper 128-bit subvectors, use the PostShuffleMask undefined
ranges to remove any unused 128-bit HADD/SUB ops.
Commit: 3df6ca69c9e2b22687315a3074857383eefa93b8
https://github.com/llvm/llvm-project/commit/3df6ca69c9e2b22687315a3074857383eefa93b8
Author: Quentin Colombet <quentin.colombet at gmail.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
R llvm/test/CodeGen/AMDGPU/regalloc-hoist-spill-live-range-upd.ll
A llvm/test/CodeGen/AMDGPU/regalloc-hoist-spill-live-range-upd.mir
Log Message:
-----------
[AMDGPU][test] Use mir test for regalloc issue (#197363)
Use the newly introduced split-from flag to produce a more robust test
case for the hoistSpillInsideBB live-range update issue.
NFC
Commit: 2e0c6a254c4a159726f0477bbe3723eafe33382c
https://github.com/llvm/llvm-project/commit/2e0c6a254c4a159726f0477bbe3723eafe33382c
Author: Leandro Lupori <leandro.lupori at linaro.org>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M lldb/test/API/functionalities/scripted_frame_provider/circular_dependency/TestFrameProviderCircularDependency.py
Log Message:
-----------
[lldb] Fix TestFrameProviderCircularDependency.py on Arm (#207804)
After #206987 this test started passing on Windows and 32-bit Linux on
Arm. Remove the expected failure annotation to fix lldb-arm-ubuntu
buildbot.
Commit: 396354a3f7f627aaa5cbfffa2033e1ea8bc00e69
https://github.com/llvm/llvm-project/commit/396354a3f7f627aaa5cbfffa2033e1ea8bc00e69
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M .github/workflows/libcxx-run-benchmarks.yml
Log Message:
-----------
[libc++] Install missing dependencies for running benchmarks on macOS (#207810)
The macOS self-hosted runners don't come with Ninja and CMake installed
out of the box, so we need to install them with Homebrew.
Commit: d2b6f83980ed0428d8342b378f01317acf4510de
https://github.com/llvm/llvm-project/commit/d2b6f83980ed0428d8342b378f01317acf4510de
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M clang/include/clang/Basic/TargetInfo.h
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/AMDGPU.h
M clang/lib/Basic/Targets/ARM.h
M clang/lib/Basic/Targets/DirectX.h
M clang/lib/Basic/Targets/LoongArch.h
M clang/lib/Basic/Targets/NVPTX.h
M clang/lib/Basic/Targets/RISCV.h
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/Basic/Targets/SystemZ.h
M clang/lib/Basic/Targets/WebAssembly.h
M clang/lib/Basic/Targets/X86.h
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/lib/CodeGen/TargetBuiltins/NVPTX.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaExpr.cpp
A clang/test/CIR/CodeGen/fp16-native-args.c
A clang/test/CIR/CodeGen/fp16.c
M clang/test/CodeGen/builtin_float.c
M clang/test/CodeGen/builtin_float_strictfp.c
M clang/test/CodeGen/wasm-fp16.c
Log Message:
-----------
clang: Remove useFP16ConversionIntrinsics target option (#207212)
Follow up to #174494. Remove the remnants of the control to
use llvm.convert.to.fp16/llvm.convert.from.fp16. Prefer
directly using the IR half type.
I did the first 80% of this a long time ago, and AI finished
the last bit and handled the recent rebases and test updates.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 4868f2c1edfede611994a621e8eb0adac46bca1a
https://github.com/llvm/llvm-project/commit/4868f2c1edfede611994a621e8eb0adac46bca1a
Author: Alex Langford <alangford at apple.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbtest.py
Log Message:
-----------
[lldb] Modify test binaries that link against LLDB to use LLVM dylib (#207290)
When LLVM_LINK_LLVM_DYLIB is enabled and we build LLDB.framework, tests
that link against LLDB.framework will fail to load the LLVM dylib
because of a missing rpath.
Commit: 2d0f294d1b272b8976ebd2d90a5252af1af8ca89
https://github.com/llvm/llvm-project/commit/2d0f294d1b272b8976ebd2d90a5252af1af8ca89
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.offset-split.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load-exported.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.ll
Log Message:
-----------
[AMDGPU] Precommit for pulling NUW large buffer offsets into SOFFSET (#207795)
This commit adds tests with larger constant offsets [being added to
VGPRs] in raw.buffer.* instructions to show the movement of such offsets
to SOFFSET after rounding in a future commit if this won't cause errors
because of overflow.
This also necessitated adding gfx1250 tests (to show the different
offset sizes) and moving tests that ctalled "export" into a new file so
that the gfx1250 (which doesn't support that instruction) doesn't trip
ot those tests.
This also adds a few global-isel specific tests for handling `or
disjoint` like an add we can't just stick -global-isel in the normal
buffer intrinsic tests.
AI usage disclosure: AI wrote these, I skimmed them.
---------
Co-authored-by: Codex <codex at openai.com>
Commit: 5dfc35a50514aaa62a34cb17f5be5c6396caf4fb
https://github.com/llvm/llvm-project/commit/5dfc35a50514aaa62a34cb17f5be5c6396caf4fb
Author: Scott Linder <scott.linder at amd.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M llvm/docs/VectorizationPlan.rst
M llvm/docs/conf.py
M utils/docs/llvm_sphinx/__init__.py
Log Message:
-----------
[docs] Disable sphinx's numfig option (#207817)
Benchmarking shows a speedup of about 1.6x for a single file edit:
```bash
source .venv/bin/activate
hyperfine \
--ignore-failure \
--warmup 1 \
--setup 'rm -rf /dev/shm/sphinx-build && cm c -b /dev/shm/sphinx-build' \
--prepare 'touch llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst' \
'cm b -b /dev/shm/sphinx-build docs-llvm-html'
# main:
# Benchmark 1: cm b -b /dev/shm/sphinx-build docs-llvm-html
# Time (mean ± σ): 41.424 s ± 1.652 s [User: 39.534 s, System: 1.876 s]
# Range (min … max): 40.696 s … 46.110 s 10 runs
# no-numfig:
# Benchmark 1: cm b -b /dev/shm/sphinx-build docs-llvm-html
# Time (mean ± σ): 25.808 s ± 2.051 s [User: 24.106 s, System: 1.692 s]
# Range (min … max): 24.287 s … 30.132 s 10 runs
```
There are only two uses of the feature, both in VectorizationPlan, and
the net result of disabling it just changes them from looking like this:
Refer to [Fig. 1] for an overview of the current transformation
pipeline.
To looking like this:
Refer to [VPlan Transformation Pipeline in 2024] for an overview of the
current transformation pipeline.
Where "[...]" denotes the hyperlink to the figure.
See
https://github.com/zephyrproject-rtos/zephyr/pull/37572#discussion_r1102411281
for another project's discussion of the same issue.
Commit: 2ef9c9d02409b02dc2289b4125397cbc40030c74
https://github.com/llvm/llvm-project/commit/2ef9c9d02409b02dc2289b4125397cbc40030c74
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/stdio/BUILD.bazel
Log Message:
-----------
[bazel][libc] Port 03c62ca40d (#207820)
Commit: 642c9f69772dea930c8c035813430d325c96697c
https://github.com/llvm/llvm-project/commit/642c9f69772dea930c8c035813430d325c96697c
Author: Scott Linder <scott.linder at amd.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M utils/docs/llvm_sphinx/__init__.py
Log Message:
-----------
[docs][NFC] Some small cleanup in llvm_sphinx (#207818)
Format the doc-comment suggested import to match what `black` prefers,
and isolate the `import` as the only statement in the `try` for
`myst_parser`.
Commit: ddebfb9d1cbdf2988d118eae889b868024290856
https://github.com/llvm/llvm-project/commit/ddebfb9d1cbdf2988d118eae889b868024290856
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/VPlan/constant-fold.ll
Log Message:
-----------
[VPlan] Add intrinsic constant folding test for replicate recipes. (NFC) (#207792)
Commit: f348d964af441ec454e5fc12ab1b599cfc1e7d14
https://github.com/llvm/llvm-project/commit/f348d964af441ec454e5fc12ab1b599cfc1e7d14
Author: Aditya Medhane <sherlockedaditya at gmail.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/test/Misc/warning-wall.c
M clang/test/SemaCXX/warn-func-not-needed.cpp
M clang/test/SemaCXX/warn-variable-not-needed.cpp
Log Message:
-----------
[Clang] Enable -Wunused-template under -Wall (#206123)
Uncomment `UnusedTemplate` in the `Unused` diagnostic group so
`-Wunused-template` becomes part of `-Wall`.
`-Wunused-template` flags unused function and variable templates with
internal linkage. In a header, such a template gives every translation
unit its own internal-linkage copy, which is a latent ODR violation
(ill-formed, no diagnostic required), so enabling this surfaces a real
class of bugs and keeps the pattern from reappearing.
### Depends on
The in-tree occurrences were cleaned up first in a series of NFC PRs
tracked by #202945. This change only builds clean once those land, so CI
will be red on any area whose cleanup is not yet merged. Remaining
prerequisites:
Approved
- #202969
- #202971
- #202973
- #202974
- #206309
- #206312
Needs to be reviewed
- #202988
- #206308
Closes #202945
cc @AaronBallman @vgvassilev
Commit: 2e1f347c38114f5e2e4fc4355fad9cdc0e1bb205
https://github.com/llvm/llvm-project/commit/2e1f347c38114f5e2e4fc4355fad9cdc0e1bb205
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M libcxx/include/__ranges/zip_transform_view.h
A libcxx/test/libcxx/ranges/range.adaptors/range.zip.transform/nodiscard.verify.cpp
M libcxx/test/std/ranges/range.adaptors/range_adaptor_types.h
M libcxx/test/support/test_iterators.h
Log Message:
-----------
[libc++][ranges] Applied `[[nodiscard]]` to `views::zip_transform` (#207120)
`[[nodiscard]]` should be applied to functions where discarding the
return value is most likely a correctness issue.
- https://libcxx.llvm.org/CodingGuidelines.html
- https://wg21.link/range.zip.transform
Towards #172124
---------
Co-authored-by: Hristo Hristov <zingam at outlook.com>
Commit: 5a74b398d27ecba94fa0acf800af86039bf6a0f5
https://github.com/llvm/llvm-project/commit/5a74b398d27ecba94fa0acf800af86039bf6a0f5
Author: Alex Langford <alangford at apple.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M lldb/include/lldb/Core/Section.h
M lldb/source/API/SBModule.cpp
M lldb/source/API/SBSection.cpp
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Core/Section.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderMacOSXDYLD.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntime.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/Platform/Android/PlatformAndroid.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
M lldb/source/Plugins/Process/minidump/ProcessMinidump.cpp
M lldb/unittests/Core/ModuleTest.cpp
M lldb/unittests/ObjectFile/ELF/TestObjectFileELF.cpp
M lldb/unittests/Symbol/LineTableTest.cpp
Log Message:
-----------
[lldb] Remove ConstString from SectionList::FindSectionByName (#207296)
By having ConstString in this interface, we are forcing callers to
create a ConstString in order to perform a lookup. In many cases,
`FindSectionByName` is a best-effort interface, meaning we're creating
ConstStrings speculatively. In other cases, we were creating a
ConstString at the call-site instead of computing it once and re-using
it.
I audited all the callsites and changed all the callsites that created a
ConstString for the purpose of calling `FindSectionByName`. Other
callsites will take more time to change.
Commit: 09f2062da3b34b7db167268b05c9a9a5bd3c7e17
https://github.com/llvm/llvm-project/commit/09f2062da3b34b7db167268b05c9a9a5bd3c7e17
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenTypes.cpp
Log Message:
-----------
clang: Use getFloatingPointType instead of reinventing it (#207213)
Commit: e64a71f09b016edb834eb45e5c172d1337555803
https://github.com/llvm/llvm-project/commit/e64a71f09b016edb834eb45e5c172d1337555803
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/test/Transforms/LoopVectorize/early_exit_with_outer_loop.ll
Log Message:
-----------
[VPlan] Refine hasEarlyExit check. (#207791)
Currently hasEarlyExit misses cases where we have things like dead exit
blocks or simplified the middle block.
Update to check by counting the predecessors.
This fixes a case where we missed properly updating LoopInfo due to
incorrect results.
Fixes https://github.com/llvm/llvm-project/issues/206007.
Commit: b69ec1023d6604106cb64f9a6a6b04e9c3e5d533
https://github.com/llvm/llvm-project/commit/b69ec1023d6604106cb64f9a6a6b04e9c3e5d533
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/test/Transforms/LoopVectorize/early_exit_with_outer_loop.ll
Log Message:
-----------
Revert "[VPlan] Refine hasEarlyExit check." (#207838)
Reverts llvm/llvm-project#207791
This appears to break multiple build-bots
Commit: f147395634dd21f9f2dfbdcc8c1a2f96c3228a24
https://github.com/llvm/llvm-project/commit/f147395634dd21f9f2dfbdcc8c1a2f96c3228a24
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/ObjectYAML/BUILD.gn
Log Message:
-----------
[gn build] Port commits (#207839)
1b2efd2e079a
9b2d44a51252
Commit: 23a01e949a55d4034dbbcad08c875a1d458464b1
https://github.com/llvm/llvm-project/commit/23a01e949a55d4034dbbcad08c875a1d458464b1
Author: Eli Friedman <efriedma at qti.qualcomm.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/test/CodeGen/AArch64/stack-guard-width.ll
Log Message:
-----------
[AArch64] Support 4-byte stack protector with large code model. (#205956)
This is a simple extension to existing code. We might need this in the
future.
Commit: 61d766817b9ebe9804c84d71aa7a620962436dff
https://github.com/llvm/llvm-project/commit/61d766817b9ebe9804c84d71aa7a620962436dff
Author: Bill Wendling <morbo at google.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CGExpr.cpp
A clang/test/CodeGen/attr-counted-by-nested-structs.c
Log Message:
-----------
[Clang][counted_by] Use the expr's RecordDecl that transitively contains the counter field (#205903)
The counted field could be in nested structs. This can happen when the
Expr is pointing to a field that has a struct type. The original code
didn't do a good job at finding the best RecordDecl to build the GEP off
of. It made too many assumptions about how structs' layouts.
This rewrite finds the RecordDecl that transitively contains the
__counted_by__'s counter field.
Fixes: #205652
Commit: c9c7fdde03d04ab10960db156f832a276411e3b5
https://github.com/llvm/llvm-project/commit/c9c7fdde03d04ab10960db156f832a276411e3b5
Author: yebinchon <86588366+yebinchon at users.noreply.github.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M flang/lib/Optimizer/HLFIR/Transforms/SeparateAllocatableAssign.cpp
M flang/test/HLFIR/separate-allocatable-assign.fir
Log Message:
-----------
[flang] keep runtime allocator for pinned allocations (#207822)
If an allocatable is pinned, use the flang runtime instead of lowering
to normal memcpy/free.
---------
Co-authored-by: Yebin Chon <ychon at nvidia.com>
Commit: 8014a1d208f0f9e58cfeaf022517cf3d69257bff
https://github.com/llvm/llvm-project/commit/8014a1d208f0f9e58cfeaf022517cf3d69257bff
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M llvm/include/llvm/Support/LEB128.h
M llvm/unittests/Support/LEB128Test.cpp
Log Message:
-----------
[Support] Fix undefined shift in decodeULEB128/decodeSLEB128 for overlong encodings (#205907)
When a (signed or unsigned) LEB128 value is encoded with extra trailing
bytes that only carry zero- or sign-extension, the decode loop could
keep
running with the shift amount at 64 or beyond and then evaluate
`Slice << Shift`, which is undefined behavior for a 64-bit type.
The DWARF expression parser feeds attacker-controlled LEB128 operands
(such as `DW_OP_bregN` / `DW_OP_constu`) through
`DataExtractor::getULEB128` / `getSLEB128`, so the
`lldb-dwarf-expression-fuzzer` reaches this under UBSan. The unsigned
case:
```
LEB128.h:152:20: runtime error: shift exponent 70 is too large for
64-bit type 'uint64_t' (aka 'unsigned long long')
#0 llvm::decodeULEB128(...) LEB128.h:152
#1 getLEB128<unsigned long long>(...) DataExtractor.cpp:227
#2 llvm::DataExtractor::getULEB128(...) DataExtractor.cpp:241
#3 llvm::DWARFExpression::Operation::extract(...) DWARFExpression.cpp:218
#7 lldb_private::DWARFExpression::Evaluate(...) DWARFExpression.cpp:1333
#9 LLVMFuzzerTestOneInput lldb-dwarf-expression-fuzzer.cpp:83
SUMMARY: UndefinedBehaviorSanitizer: undefined-behavior LEB128.h:152:20
```
and the signed case, reached the same way:
```
LEB128.h:190:20: runtime error: shift exponent 70 is too large for
64-bit type 'uint64_t' (aka 'unsigned long long')
#0 llvm::decodeSLEB128(...) LEB128.h:190
#1 getLEB128<long long>(...) DataExtractor.cpp:227
#2 llvm::DataExtractor::getSLEB128(...) DataExtractor.cpp:245
#3 llvm::DWARFExpression::Operation::extract(...) DWARFExpression.cpp:216
#7 lldb_private::DWARFExpression::Evaluate(...) DWARFExpression.cpp:1333
```
The existing range checks already guarantee that once `Shift` reaches 64
the remaining bytes are pure extension and contribute nothing to the
result, so skip the accumulating shift in that case. Decoded values are
unchanged for all well-formed inputs.
Adds overlong-encoding regression cases to `LEB128Test`. Without the fix
the signed case is the UBSan diagnostic above in a sanitizer build, and
in a normal build the unsigned case also decodes to the wrong value (the
overlong `1` decodes as `11`).
Commit: 3df648c5678f6add2a813cd5be3dffb4f074115e
https://github.com/llvm/llvm-project/commit/3df648c5678f6add2a813cd5be3dffb4f074115e
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
A llvm/test/Transforms/InstCombine/select-abs-positive-mul.ll
Log Message:
-----------
[InstCombine] Add tests for select-abs through multiply (NFC) (#207833)
Add tests from approved https://github.com/llvm/llvm-project/pull/207539
Commit: 1b6f1528bbb95d47bb2e3fc394b3a4943b1e9708
https://github.com/llvm/llvm-project/commit/1b6f1528bbb95d47bb2e3fc394b3a4943b1e9708
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M llvm/include/llvm/DebugInfo/DWARF/DWARFDie.h
M llvm/lib/DebugInfo/DWARF/DWARFDie.cpp
A llvm/test/tools/llvm-dwarfdump/X86/array-type-lower-bound-dwarf6.s
M llvm/unittests/DebugInfo/DWARF/DWARFDieTest.cpp
Log Message:
-----------
[llvm][DebugInfo] Add DW_LNAME_ support to DWARFDie::getLanguage (#207151)
Currently `DWARFDie::getLanguage` only looks at `DW_AT_language`.
However, with DWARFv6 we may not have such attribute, and instead have a
`DW_AT_language_name` (and optional `DW_AT_language_version`).
This patch adjusts the implementation to also consider the DWARFv6
language name/version codes. In this patch I just convert it back to
`DW_LANG_` (similar to what we do for the `AsmPrinter`'s
`DwarfUnit::getSourceLanguage`). Added a FIXME to investigate whether we
want to return a variant-like type that can be either an DW_LANG vs.
DW_LNAME code.
The way I initially observed this was looking at a DWARFv6 dwarfdump for
a `const char[]` type. It displayed as follows:
```
DW_AT_type (0x... "const char[[?, ? + 3)]")
```
which is our representation for when we [can't derive the default lower
bound for the
language](https://github.com/llvm/llvm-project/blob/ce787718c3c82255825ebe5f95740c24df55f7d0/llvm/include/llvm/DebugInfo/DWARF/DWARFTypePrinter.h#L122-L135).
With this patch, we'd display it as expected:
```
DW_AT_type (0x... "const char[3]")
```
Added unit-tests for the new API and a dwarfdump test.
AI usage:
- Claude wrote the dwarfdump and unit-tests. Manually reviewed and
cleaned them up.
Commit: 94b325469b20255d31879c80204800510ac4fd66
https://github.com/llvm/llvm-project/commit/94b325469b20255d31879c80204800510ac4fd66
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaChecking.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
M clang/test/Analysis/bstring.c
M clang/test/Analysis/malloc.c
M clang/test/Analysis/pr22954.c
M clang/test/Sema/builtin-memcpy.c
M clang/test/Sema/builtin-object-size.c
M clang/test/Sema/warn-fortify-source.c
R clang/test/Sema/warn-stringop-overread.c
M clang/test/SemaCXX/warn-memset-bad-sizeof.cpp
M compiler-rt/test/asan/TestCases/Windows/issue64990.cpp
Log Message:
-----------
Revert "[Clang][Sema] Add -Wstringop-overread warning for source buffer overreads (#183004)" (#207840)
This reverts commit 86f2e71cb8d165b59ad31a442b2391e23826133e.
And revert followup ab1ef459069d1dbf4ee9e5a802537ababe294b25 (#205201).
Causes crashes:
https://github.com/llvm/llvm-project/pull/183004#issuecomment-4897195939
Commit: ff11bbce9e87ab4ef59a789cff1c9b9d771adc1e
https://github.com/llvm/llvm-project/commit/ff11bbce9e87ab4ef59a789cff1c9b9d771adc1e
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M clang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.cpp
M clang-tools-extra/clangd/SemanticHighlighting.cpp
M clang-tools-extra/clangd/refactor/tweaks/DefineInline.cpp
M clang/docs/LibASTMatchersReference.html
M clang/docs/ReleaseNotes.md
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/DeclTemplate.h
M clang/include/clang/AST/JSONNodeDumper.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/include/clang/ASTMatchers/ASTMatchersInternal.h
M clang/include/clang/Basic/Specifiers.h
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTDumper.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/Comment.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclPrinter.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/JSONNodeDumper.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/ASTMatchers/Dynamic/Registry.cpp
M clang/lib/Analysis/ExprMutationAnalyzer.cpp
M clang/lib/CIR/CodeGen/CIRGenVTables.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/Index/IndexingContext.cpp
M clang/lib/InstallAPI/Visitor.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/StaticAnalyzer/Core/BugSuppression.cpp
M clang/lib/Tooling/Syntax/BuildTree.cpp
M clang/test/AST/ast-dump-templates-pattern.cpp
M clang/test/CXX/basic/basic.link/p11.cpp
M clang/test/CXX/drs/cwg18xx.cpp
M clang/test/CXX/drs/cwg7xx.cpp
M clang/test/CXX/temp/temp.arg/temp.arg.template/p3-2a.cpp
M clang/test/CXX/temp/temp.constr/temp.constr.decl/p4.cpp
M clang/test/CXX/temp/temp.decls/temp.spec.partial/temp.spec.partial.member/p2.cpp
M clang/test/CXX/temp/temp.spec/temp.expl.spec/p7.cpp
M clang/test/CodeGenCXX/default-arguments.cpp
M clang/test/CodeGenCXX/explicit-instantiation.cpp
M clang/test/SemaCXX/GH195416.cpp
M clang/test/SemaCXX/constant-expression-cxx14.cpp
M clang/test/SemaCXX/deduced-return-type-cxx14.cpp
M clang/test/SemaCXX/member-class-11.cpp
M clang/test/SemaTemplate/concepts-out-of-line-def.cpp
M clang/test/SemaTemplate/friend-template.cpp
M clang/test/SemaTemplate/instantiate-scope.cpp
M clang/test/Templight/templight-default-func-arg.cpp
M clang/test/Templight/templight-empty-entries-fix.cpp
M clang/tools/libclang/CIndex.cpp
M clang/unittests/AST/ASTImporterTest.cpp
M clang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
Log Message:
-----------
[clang] Reland: fix getTemplateInstantiationArgs (#207825)
Relands https://github.com/llvm/llvm-project/pull/199528
Previous: https://github.com/llvm/llvm-project/pull/202088
This implements a new strategy for collecting the template arguments, by
relying on the qualifiers and template parameter lists to navigate the
template
context of out-of-line definitions.
This greatly simplifies the signature of that function, by removing a
bunch
of workarounds, and simpliffying a couple that weren't removed yet.
Since this now relies on qualifiers and template parameter lists,
this patch expends most of its effort making sure these are placed,
transformed and propagated to template instantiations.
Also makes the explicit specialization AST nodes stop abusing the
template
parameter lists by storing it's own template parameter list, creating a
dedicated field for them, similar to partial specializations.
Fixes #202106
Fixes #202109
Commit: c63adb28aa78ecb300bf06c1d0893ae6259765dd
https://github.com/llvm/llvm-project/commit/c63adb28aa78ecb300bf06c1d0893ae6259765dd
Author: mzukovec <martin.zukovec at xlab.si>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/AST/MicrosoftMangle.cpp
M clang/test/CodeGenCXX/mangle-ms-md5.cpp
Log Message:
-----------
[clang] Cap MS RTTI TypeDescriptor name strings like MSVC does (#206317)
On the Microsoft ABI, an RTTI TypeDescriptor stores the type's decorated
name as an inline string. Unlike symbol names, this string was never run
through the MD5 shortening that MSVC applies to over-long decorated
names. Deeply nested template types therefore produced unbounded
writable .data COMDATs: for example a type whose template arguments
contain a local lambda, whose mangled name re-spells the enclosing
template context at every level of nesting, grows exponentially with
depth. A five-level repro emitted an 82 MB object file.
Wrap the TypeDescriptor name string in the same msvc_hashing_ostream
already used for the RTTI symbol. When the name reaches the length limit
it is replaced by ??@<md5>@, mimicking MSVC. MSVC counts the leading .
of the name string toward the 4096-character limit but excludes it from
the hashed input, so the threshold here is one lower than for symbols.
Fixes #206313
Commit: e27218ee24231abd4f4d3231fc682745a71a0657
https://github.com/llvm/llvm-project/commit/e27218ee24231abd4f4d3231fc682745a71a0657
Author: David Blaikie <dblaikie at gmail.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M llvm/lib/DebugInfo/DWARF/DWARFDebugAbbrev.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp
M llvm/lib/DebugInfo/DWARF/DWARFUnit.cpp
M llvm/lib/DebugInfo/GSYM/DwarfTransformer.cpp
Log Message:
-----------
Reapply "DebugInfo: Shrink-to-fit some containers to reduce peak memory usage" (#199145) (#201160)
Starting with posting this as a draft PR to run presubmit checks to
understand what failed.
This reverts commit #199145,
effectively reapplying #198935.
Commit: 1fd46543f6b8aa0017d814301e0b019aa7144468
https://github.com/llvm/llvm-project/commit/1fd46543f6b8aa0017d814301e0b019aa7144468
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/session_helpers.py
M lldb/test/API/tools/lldb-dap/exception/TestDAP_exception.py
M lldb/test/API/tools/lldb-dap/exception/asan/TestDAP_asan.py
M lldb/test/API/tools/lldb-dap/exception/cpp/TestDAP_exception_cpp.py
M lldb/test/API/tools/lldb-dap/exception/cpp/main.cpp
M lldb/test/API/tools/lldb-dap/exception/objc/TestDAP_exception_objc.py
M lldb/test/API/tools/lldb-dap/exception/ubsan/TestDAP_ubsan.py
Log Message:
-----------
[lldb-dap] Migrate DAP exceptions test. (#207029)
Migrate all the tests in the `lldb-dap/exception` folder.
Commit: 5275ff2efaa9b729aebdfbfc4219f0d109cf03e5
https://github.com/llvm/llvm-project/commit/5275ff2efaa9b729aebdfbfc4219f0d109cf03e5
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/lib/Headers/CMakeLists.txt
A clang/lib/Headers/__clang_gpu_builtin_vars.h
A clang/lib/Headers/__clang_gpu_device_functions.h
A clang/lib/Headers/__clang_gpu_intrinsics.h
M clang/test/Driver/hip-device-libs-llvm-env.hip
A clang/test/Headers/gpu-device-functions.cpp
M clang/test/Preprocessor/predefined-macros.c
Log Message:
-----------
[Clang][HIP] Add LLVM vendored device headers for `*-llvm` triple (#203980)
Summary:
We already have the `*-llvm` vendor triple to imply a hermetic LLVM
toolchain for HIP. This adds the device portion of the headers that can
be used without a ROCm installation. These are vendored just like the
CUDA ones. Despite being HIP, these are actually generic because it onyl
uses clang builtins and the `gpuintrin` shims.
Commit: 6f47c92a82cc142fe5b728a4d90987e15876b372
https://github.com/llvm/llvm-project/commit/6f47c92a82cc142fe5b728a4d90987e15876b372
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/test/Misc/warning-wall.c
M clang/test/SemaCXX/warn-func-not-needed.cpp
M clang/test/SemaCXX/warn-variable-not-needed.cpp
Log Message:
-----------
Revert "[Clang] Enable -Wunused-template under -Wall" (#207848)
Reverts llvm/llvm-project#206123
See the Flang Runtime unit test failures, we probably should fix those
before merging this to keep buildbots green.
Commit: 1e7e166e39f4515a4cea1dcd07d016b4e2315e31
https://github.com/llvm/llvm-project/commit/1e7e166e39f4515a4cea1dcd07d016b4e2315e31
Author: Kyungtak Woo <kevinwkt at google.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/flang/lib/Optimizer/Transforms/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
Log Message:
-----------
[bazel][libc] Port 03c62ca40d pt2 (#207846)
This was missed in https://github.com/llvm/llvm-project/pull/207820 adding dep. Along with flang deps.
Commit: 8475e376043ddacc53b7062c71438ea4e2a082e0
https://github.com/llvm/llvm-project/commit/8475e376043ddacc53b7062c71438ea4e2a082e0
Author: tedwoodward <56049650+tedwoodward at users.noreply.github.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M lldb/bindings/python/get-python-config.py
Log Message:
-----------
[lldb] Change Python site-packages path (#207771)
On POSIX systems, traditionally the lldb Python module is in
lib/pythonx.x/site-packages. We only ever have 1 Python in a given
build, so we don't need to specify the version.
On Windows, we've always had the Python module in lib\site-packages.
Change the behavior on POSIX to match the Windows behavior, and put the
lldb Python module in lib/site-packages.
---------
Co-authored-by: Ted Woodward <tedwood at quicinc.com>
Commit: 6e0311f077601350d5cc70e59c49432d985ca631
https://github.com/llvm/llvm-project/commit/6e0311f077601350d5cc70e59c49432d985ca631
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/include/llvm/Object/COFF.h
M llvm/lib/Object/ArchiveWriter.cpp
M llvm/lib/Object/COFFObjectFile.cpp
A llvm/test/tools/llvm-ar/arm64x-hybridobj.yaml
A llvm/test/tools/llvm-ar/arm64x-split.yaml
A llvm/test/tools/llvm-lib/arm64x-hybridobj.yaml
Log Message:
-----------
[Archive][COFF] Split hybrid COFF files when adding them to an archive (#205160)
Create a separate member for the embedded hybrid object so that it's
properly reflected in the archive's symbol map and can be correctly
processed by tools unaware of multi-arch object files. Prefix the
embedded member name with 'obj.arm64x/' to avoid name collisions.
The split is performed only when targeting COFF archive format.
Commit: 6da965ce85fc9c14ecad4d6d15cb6bb57776d979
https://github.com/llvm/llvm-project/commit/6da965ce85fc9c14ecad4d6d15cb6bb57776d979
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M mlir/examples/standalone/pyproject.toml
Log Message:
-----------
[mlir][python] Set a static version in the standalone example pyproject.toml (#207860)
The standalone example's pyproject.toml declares `dynamic = ["version"]` but does not configure a `tool.scikit-build metadata.version.provider`. Newer versions of scikit-build-core reject this combination with:
```
AssertionError: project.version is not specified, must be statically present or tool.scikit-build metadata.version.provider configured when dynamic
```
Just pin a static placeholder version instead of adding a "provider".
Assisted by: Claude
Commit: 3d517ee6486553b3ecbabdb46c0496abcf9ad20a
https://github.com/llvm/llvm-project/commit/3d517ee6486553b3ecbabdb46c0496abcf9ad20a
Author: Damyan Pepper <damyanp at microsoft.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M llvm/test/tools/dxil-dis/waveactiveballot.ll
Log Message:
-----------
[NFC] Fix dxil-dis/waveactiveballot.ll test (#207446)
It looks like #204478 introduced new intrinsic signature verification,
but since it didn't touch any of the HLSL/DXIL related paths the tests
were never run on a runner that has dxil-dis installed on it.
Assisted-by: copilot
Commit: f7f06613d4fc68620076a48341acf22dc05fbd82
https://github.com/llvm/llvm-project/commit/f7f06613d4fc68620076a48341acf22dc05fbd82
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M clang/lib/CodeGen/Targets/RISCV.cpp
A clang/test/CodeGen/RISCV/attr-rvv-vector-bits-struct-call.c
A clang/test/CodeGenCXX/riscv-rvv-fixed-length-struct-call.cpp
Log Message:
-----------
[RISCV] Pass structs containing riscv_rvv_vector_bits types using vector registers. (#203601)
The ABI for this isn't documented. The riscv_rvv_vector_bits feature was
copied from aarch_sve_vector_bits which passes the types in vector
registers. At the time I implemented RISC-V I didn't think about struct
arguments so no ABI support was added.
I think it makes sense to pass structs of these types in vector
registers similar to the vls_cc ABI. We already do use vector registers
for these types when the vls_cc ABI is enabled for a function(unclear if
that was intentional), but we should do it unconditionally.
I will work with gcc maintainers to see if they can do the same. In
practice, there probably isn't much compiler mixing with these types.
This patch was heavily assisted by AI, but I've reviewed it and the
changes seem reasonable to me.
Commit: 81200d780eb6f9d8c9cf319d04ca5d7039dff944
https://github.com/llvm/llvm-project/commit/81200d780eb6f9d8c9cf319d04ca5d7039dff944
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.cpp
M llvm/lib/Target/NVPTX/NVVMProperties.cpp
Log Message:
-----------
[NFC][LLVM][NVPTX] Use namespace qualifiers to define functions (#207546)
Use namespace qualifiers to define functions in `llvm` namespace, per
https://llvm.org/docs/CodingStandards.html#use-namespace-qualifiers-to-define-previously-declared-symbols.
Commit: 06f4b027b2df1febf3cd496573b8739074e8aa29
https://github.com/llvm/llvm-project/commit/06f4b027b2df1febf3cd496573b8739074e8aa29
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVVMReflect.cpp
Log Message:
-----------
[NFC][LLVM][NVPTX] Minor code cleanup in NVVMReflect (#207549)
Use explicit types instead of auto when the type is not obvious. Use
`StringRef` type in the range for loop over `ReflectList`, allowing
additional code cleanups.
Commit: 8f3e6197f676831794bfa7a7b4619c59c7915c42
https://github.com/llvm/llvm-project/commit/8f3e6197f676831794bfa7a7b4619c59c7915c42
Author: Michael Jones <michaelrj at google.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M libc/config/linux/riscv/entrypoints.txt
Log Message:
-----------
[libc][RISC-V] Temporarily disable dirent (#207867)
The RISC-V 32 QEMU buildbot is failing due to missing SYS_fcntl, which
is needed for fdopendir. Since that syscall is referenced in the shared
dir code it's easiest to just disable all the dirent functions for now.
Commit: cc048e80b670a5262500612069d1c2d065b53f15
https://github.com/llvm/llvm-project/commit/cc048e80b670a5262500612069d1c2d065b53f15
Author: Neil Nair <neilnair4 at gmail.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M clang-tools-extra/clang-doc/CMakeLists.txt
A clang-tools-extra/clang-doc/markdown/CMakeLists.txt
A clang-tools-extra/clang-doc/markdown/Markdown.cpp
A clang-tools-extra/clang-doc/markdown/Markdown.h
M clang-tools-extra/clang-doc/support/CMakeLists.txt
R clang-tools-extra/clang-doc/support/Markdown.cpp
R clang-tools-extra/clang-doc/support/Markdown.h
M clang-tools-extra/unittests/clang-doc/MarkdownParserTest.cpp
Log Message:
-----------
[clang-doc] Move Markdown into its own subdirectory (#207856)
Removes the need for PARTIAL_SOURCES_INTENDED by giving clangDocMarkdown
its own directory. Addresses post-merge feedback on #205609.
Commit: a2dbd23cdc562f5307e81789e770a290e863a91f
https://github.com/llvm/llvm-project/commit/a2dbd23cdc562f5307e81789e770a290e863a91f
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang-tools-extra/clang-doc/BUILD.bazel
M utils/bazel/llvm-project-overlay/clang-tools-extra/unittests/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes cc048e8 (#207873)
This fixes cc048e80b670a5262500612069d1c2d065b53f15.
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: a37bb291fd9ca6c19a809196d074eaddae041353
https://github.com/llvm/llvm-project/commit/a37bb291fd9ca6c19a809196d074eaddae041353
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
A llvm/test/CodeGen/NVPTX/lower-byval-args-mem-attrs.ll
Log Message:
-----------
[NVPTX] Assign correct memory attrs to args in NVPTXLowerArgs (#207461)
Commit: 52f1b754dddb740a553166acb9a5d40c38cc74e5
https://github.com/llvm/llvm-project/commit/52f1b754dddb740a553166acb9a5d40c38cc74e5
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/bindings/python/tests/cindex/test_source_range.py
M clang/bindings/python/tests/cindex/test_translation_unit.py
Log Message:
-----------
[clang] workaround libclang-python windows CI failures (#207875)
Commit: a42a1c84c1305d785ca58d271d5f2f87f1daeeb0
https://github.com/llvm/llvm-project/commit/a42a1c84c1305d785ca58d271d5f2f87f1daeeb0
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/unittests/ExecutionEngine/Orc/InProcessEPCTest.cpp
Log Message:
-----------
[ORC] Fix reinterpret_cast warning. (#207874)
https://github.com/llvm/llvm-project/pull/206725#issuecomment-4896222897
reported warnings on windows builds due to reinterpret_cast:
warning C4312: 'reinterpret_cast': conversion from 'unsigned int' to
'void *' of greater size
This commit fixes the issue by using ExecutorAddr::toPtr for conversion
instead of reinterpret_cast.
Commit: 5cd8f2f847101effad54a88936abe5e3bcb7e884
https://github.com/llvm/llvm-project/commit/5cd8f2f847101effad54a88936abe5e3bcb7e884
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M flang/test/Driver/fsave-optimization-record.f90
M lld/test/ELF/lto/stats-file-option.ll
M llvm/docs/Remarks.rst
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/PrologEpilogInserter.cpp
M llvm/test/CodeGen/AArch64/aarch64-large-stack-spbump.mir
M llvm/test/CodeGen/AArch64/aarch64-vector-pcs.mir
M llvm/test/CodeGen/AArch64/addg_subg.mir
M llvm/test/CodeGen/AArch64/cfi_restore.mir
M llvm/test/CodeGen/AArch64/chkstk.ll
M llvm/test/CodeGen/AArch64/debug-info-sve-dbg-declare.mir
M llvm/test/CodeGen/AArch64/debug-info-sve-dbg-value.mir
M llvm/test/CodeGen/AArch64/emit-prologue-clobber-verification.mir
M llvm/test/CodeGen/AArch64/extra-callee-save.mir
M llvm/test/CodeGen/AArch64/framelayout-fpr128-spill.mir
M llvm/test/CodeGen/AArch64/framelayout-frame-record.mir
M llvm/test/CodeGen/AArch64/framelayout-offset-immediate-change.mir
M llvm/test/CodeGen/AArch64/framelayout-scavengingslot-stack-hazard.mir
M llvm/test/CodeGen/AArch64/framelayout-scavengingslot.mir
M llvm/test/CodeGen/AArch64/framelayout-split-sve.mir
M llvm/test/CodeGen/AArch64/framelayout-sve-basepointer.mir
M llvm/test/CodeGen/AArch64/framelayout-sve-calleesaves-fix.mir
M llvm/test/CodeGen/AArch64/framelayout-sve-fixed-width-access.mir
M llvm/test/CodeGen/AArch64/framelayout-sve-scavengingslot.mir
M llvm/test/CodeGen/AArch64/framelayout-sve-win.mir
M llvm/test/CodeGen/AArch64/framelayout-sve.mir
M llvm/test/CodeGen/AArch64/large-stack-offset-calcs.mir
M llvm/test/CodeGen/AArch64/live-debugvalues-sve.mir
M llvm/test/CodeGen/AArch64/lr-reserved-for-ra-live-in.ll
M llvm/test/CodeGen/AArch64/machine-outliner-bti.mir
M llvm/test/CodeGen/AArch64/machine-outliner-calls.mir
M llvm/test/CodeGen/AArch64/machine-outliner-no-noreturn-no-stack.mir
M llvm/test/CodeGen/AArch64/machine-outliner-noreturn-no-stack.mir
M llvm/test/CodeGen/AArch64/machine-outliner-regsave.mir
M llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-regsave.mir
M llvm/test/CodeGen/AArch64/machine-outliner-size-info.mir
M llvm/test/CodeGen/AArch64/machine-outliner.mir
M llvm/test/CodeGen/AArch64/memtag-stg-loop-reg-pressure.mir
M llvm/test/CodeGen/AArch64/no-xzr-liveins.mir
M llvm/test/CodeGen/AArch64/pr157252.mir
M llvm/test/CodeGen/AArch64/preserve.ll
M llvm/test/CodeGen/AArch64/prologue-epilogue-remarks.mir
M llvm/test/CodeGen/AArch64/reg-scavenge-frame.mir
M llvm/test/CodeGen/AArch64/reloc-specifiers.mir
M llvm/test/CodeGen/AArch64/settag-merge.mir
M llvm/test/CodeGen/AArch64/spill-stack-realignment.mir
M llvm/test/CodeGen/AArch64/stack-guard-reassign-sve.mir
M llvm/test/CodeGen/AArch64/stack-guard-reassign.mir
M llvm/test/CodeGen/AArch64/stack-id-pei-alloc.mir
M llvm/test/CodeGen/AArch64/stack-id-stackslot-scavenging.mir
M llvm/test/CodeGen/AArch64/stack-probing-last-in-block.mir
M llvm/test/CodeGen/AArch64/stack-probing-no-scratch-reg.mir
M llvm/test/CodeGen/AArch64/stack-probing-shrink-wrap.mir
M llvm/test/CodeGen/AArch64/stack-tagging-epilogue-fold.mir
M llvm/test/CodeGen/AArch64/stack-tagging-merge-past-memcpy.mir
M llvm/test/CodeGen/AArch64/statepoint-call-lowering-lr.ll
M llvm/test/CodeGen/AArch64/statepoint-call-lowering-sp.ll
M llvm/test/CodeGen/AArch64/sve-calling-convention.ll
M llvm/test/CodeGen/AArch64/sve-ld1r.mir
M llvm/test/CodeGen/AArch64/sve-ldN.mir
M llvm/test/CodeGen/AArch64/sve-ldnf1.mir
M llvm/test/CodeGen/AArch64/sve-ldst-multi-vec.mir
M llvm/test/CodeGen/AArch64/sve-ldstnt1.mir
M llvm/test/CodeGen/AArch64/sve-stN.mir
M llvm/test/CodeGen/AArch64/unreachable-emergency-spill-slot.mir
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M llvm/test/CodeGen/AArch64/wineh-frame-predecrement.mir
M llvm/test/CodeGen/AArch64/wineh-frame-scavenge.mir
M llvm/test/CodeGen/AArch64/wineh-frame0.mir
M llvm/test/CodeGen/AArch64/wineh-frame1.mir
M llvm/test/CodeGen/AArch64/wineh-frame2.mir
M llvm/test/CodeGen/AArch64/wineh-frame3.mir
M llvm/test/CodeGen/AArch64/wineh-frame4.mir
M llvm/test/CodeGen/AArch64/wineh-frame5.mir
M llvm/test/CodeGen/AArch64/wineh-frame6.mir
M llvm/test/CodeGen/AArch64/wineh-frame7.mir
M llvm/test/CodeGen/AArch64/wineh-frame8.mir
M llvm/test/CodeGen/AArch64/wineh-save-lrpair1.mir
M llvm/test/CodeGen/AArch64/wineh-save-lrpair2.mir
M llvm/test/CodeGen/AArch64/wineh-save-lrpair3.mir
M llvm/test/CodeGen/AArch64/wineh1.mir
M llvm/test/CodeGen/AArch64/wineh2.mir
M llvm/test/CodeGen/AArch64/wineh3.mir
M llvm/test/CodeGen/AArch64/wineh4.mir
M llvm/test/CodeGen/AArch64/wineh5.mir
M llvm/test/CodeGen/AArch64/wineh6.mir
M llvm/test/CodeGen/AArch64/wineh7.mir
M llvm/test/CodeGen/AArch64/wineh8.mir
M llvm/test/CodeGen/AArch64/wineh_shrinkwrap.mir
M llvm/test/CodeGen/AArch64/wrong-callee-save-size-after-livedebugvariables.mir
M llvm/test/CodeGen/AMDGPU/SRSRC-GIT-clobber-check.mir
M llvm/test/CodeGen/AMDGPU/accvgpr-spill-scc-clobber.mir
M llvm/test/CodeGen/AMDGPU/agpr-copy-reuse-writes.mir
M llvm/test/CodeGen/AMDGPU/agpr-spill-copy.mir
M llvm/test/CodeGen/AMDGPU/av-spill-expansion-with-machine-cp.mir
M llvm/test/CodeGen/AMDGPU/av_spill_cross_bb_usage.mir
M llvm/test/CodeGen/AMDGPU/bug-undef-spilled-agpr.mir
M llvm/test/CodeGen/AMDGPU/copy-vgpr-clobber-spill-vgpr.mir
M llvm/test/CodeGen/AMDGPU/csr-sgpr-spill-live-ins.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-i32.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-u32.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-mov-b32.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-scalar-bit-ops.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-scalar-scc-clobber.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-select.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32-wave32.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-u32.mir
M llvm/test/CodeGen/AMDGPU/entry-function-cfi.mir
M llvm/test/CodeGen/AMDGPU/fix-frame-ptr-reg-copy-livein.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-fold-fi-gfx1250.mir
M llvm/test/CodeGen/AMDGPU/frame-index-elimination-tied-operand.mir
M llvm/test/CodeGen/AMDGPU/frame-index.mir
M llvm/test/CodeGen/AMDGPU/frame-lowering-entry-all-sgpr-used.mir
M llvm/test/CodeGen/AMDGPU/frame-lowering-fp-adjusted.mir
M llvm/test/CodeGen/AMDGPU/ipra-regmask.ll
M llvm/test/CodeGen/AMDGPU/kernel-mubuf-with-voffset.mir
M llvm/test/CodeGen/AMDGPU/machine-function-info-cwsr.ll
M llvm/test/CodeGen/AMDGPU/mcinstlower-external-symbol-reloc.mir
M llvm/test/CodeGen/AMDGPU/mir-print-dead-csr-fi.mir
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/pei-amdgpu-cs-chain-preserve.mir
M llvm/test/CodeGen/AMDGPU/pei-amdgpu-cs-chain.mir
M llvm/test/CodeGen/AMDGPU/pei-build-av-spill.mir
M llvm/test/CodeGen/AMDGPU/pei-build-spill-offset-overflow-gfx950.mir
M llvm/test/CodeGen/AMDGPU/pei-build-spill-partial-agpr.mir
M llvm/test/CodeGen/AMDGPU/pei-build-spill.mir
M llvm/test/CodeGen/AMDGPU/pei-reg-scavenger-position.mir
M llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-carry-out.mir
M llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-gfx9.mir
M llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr.mir
M llvm/test/CodeGen/AMDGPU/pei-scavenge-vgpr-spill.mir
M llvm/test/CodeGen/AMDGPU/pei-vgpr-block-spill-csr.mir
M llvm/test/CodeGen/AMDGPU/preserve-only-inactive-lane.mir
M llvm/test/CodeGen/AMDGPU/same-slot-agpr-sgpr.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill-dead-frame-in-dbg-value.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill-overlap-wwm-reserve.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill-to-vmem-scc-clobber-unhandled.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill-to-vmem-scc-clobber.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill-vmem-large-frame.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill.mir
M llvm/test/CodeGen/AMDGPU/spill-agpr-partially-undef.mir
M llvm/test/CodeGen/AMDGPU/spill-agpr.mir
M llvm/test/CodeGen/AMDGPU/spill-reg-tuple-super-reg-use.mir
M llvm/test/CodeGen/AMDGPU/spill-restore-partial-copy.mir
M llvm/test/CodeGen/AMDGPU/spill-sgpr-used-for-exec-copy.mir
M llvm/test/CodeGen/AMDGPU/spill-special-sgpr.mir
M llvm/test/CodeGen/AMDGPU/spill-to-agpr-partial.mir
M llvm/test/CodeGen/AMDGPU/spill_kill_v16.mir
M llvm/test/CodeGen/AMDGPU/spillv16.mir
M llvm/test/CodeGen/AMDGPU/spillv16Kernel.mir
M llvm/test/CodeGen/AMDGPU/tied-op-for-wwm-scratch-reg-spill-restore.mir
M llvm/test/CodeGen/AMDGPU/track-spilled-vgpr-liveness.mir
M llvm/test/CodeGen/AMDGPU/use_restore_frame_reg.mir
M llvm/test/CodeGen/AMDGPU/vector-spill-restore-to-other-vector-type.mir
M llvm/test/CodeGen/AMDGPU/vgpr-blocks-funcinfo.mir
M llvm/test/CodeGen/AMDGPU/vgpr-spill-dead-frame-in-dbg-value.mir
M llvm/test/CodeGen/AMDGPU/vgpr-spill-fi-skip-processing-stack-arg-dbg-value-list.mir
M llvm/test/CodeGen/AMDGPU/vgpr-spill-fi-skip-processing-stack-arg-dbg-value.mir
M llvm/test/CodeGen/AMDGPU/vgpr-spill-scc-clobber.mir
M llvm/test/CodeGen/AMDGPU/vgpr-spill.mir
M llvm/test/CodeGen/AMDGPU/whole-wave-functions-pei.mir
M llvm/test/CodeGen/AMDGPU/wwm-reg-shift-down-gfx11plus.mir
M llvm/test/CodeGen/ARM/execute-only-save-cpsr.mir
M llvm/test/CodeGen/ARM/fpoffset_overflow.mir
M llvm/test/CodeGen/ARM/interrupt-save-fp-attr-status-regs.mir
M llvm/test/CodeGen/ARM/machine-outliner-calls.mir
M llvm/test/CodeGen/ARM/machine-outliner-stack-fixup-arm.mir
M llvm/test/CodeGen/ARM/machine-outliner-stack-fixup-thumb.mir
M llvm/test/CodeGen/ARM/nonreserved-callframe-with-basereg.mir
M llvm/test/CodeGen/ARM/noreturn-csr-skip.mir
M llvm/test/CodeGen/ARM/pei-swiftself.mir
M llvm/test/CodeGen/ARM/register-scavenger-exceptions.mir
M llvm/test/CodeGen/ARM/stack_frame_offset.mir
M llvm/test/CodeGen/ARM/tldrlit_ga_size.mir
M llvm/test/CodeGen/BPF/BTF/func-nocall-undef-dead-arg.ll
M llvm/test/CodeGen/Hexagon/aligna-prologue-expansion.mir
M llvm/test/CodeGen/Hexagon/livephysregs-regmask-clobber.mir
M llvm/test/CodeGen/Hexagon/spill-vector-alignment.mir
M llvm/test/CodeGen/LoongArch/stack-probing-frame-setup.mir
M llvm/test/CodeGen/LoongArch/statepoint-call-lowering-r1.ll
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M llvm/test/CodeGen/M68k/is-pcrel-register-operand-legal.mir
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M llvm/test/CodeGen/MIR/AArch64/return-address-signing.mir
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M llvm/test/CodeGen/MIR/AMDGPU/stack-id-assert.mir
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M llvm/test/CodeGen/PowerPC/aix-csr-vector.ll
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M llvm/test/CodeGen/RISCV/zcmp-prolog-epilog-crash.mir
M llvm/test/CodeGen/RISCV/zdinx-large-spill.mir
M llvm/test/CodeGen/RISCV/zdinx-spill.ll
M llvm/test/CodeGen/RISCV/zilsd-csr-duplicate.mir
M llvm/test/CodeGen/RISCV/zilsd-spill.ll
M llvm/test/CodeGen/SystemZ/frame-26.mir
M llvm/test/CodeGen/SystemZ/frame-27.mir
M llvm/test/CodeGen/SystemZ/frame-28.mir
M llvm/test/CodeGen/SystemZ/scavenge-clobbered-reg.mir
M llvm/test/CodeGen/SystemZ/tls-11.mir
M llvm/test/CodeGen/Thumb2/fp16-stacksplot.mir
M llvm/test/CodeGen/Thumb2/frame-index-addrmode-t2i8s4.mir
M llvm/test/CodeGen/Thumb2/mve-stacksplot.mir
M llvm/test/CodeGen/Thumb2/scavenge-lr.mir
M llvm/test/CodeGen/X86/cfi-epilogue-with-return.mir
M llvm/test/CodeGen/X86/cfi-epilogue-without-return.mir
M llvm/test/CodeGen/X86/cfi-xmm.ll
M llvm/test/CodeGen/X86/epilogue-cfi-fp.ll
M llvm/test/CodeGen/X86/ipra-inline-asm.ll
M llvm/test/CodeGen/X86/ipra-reg-usage.ll
M llvm/test/CodeGen/X86/prologepilog_deref_size.mir
M llvm/test/CodeGen/X86/prologue-epilogue-remarks.mir
M llvm/test/CodeGen/X86/push-cfi.ll
M llvm/test/CodeGen/X86/throws-cfi-fp.ll
M llvm/test/CodeGen/X86/virtual-registers-cleared-in-machine-functions-liveins.ll
M llvm/test/CodeGen/X86/win_coreclr_chkstk_liveins.mir
M llvm/test/CodeGen/X86/zero-call-used-regs-debug-info.mir
M llvm/test/DebugInfo/MIR/X86/bit-piece-dh.mir
M llvm/test/DebugInfo/MIR/X86/no-cfi-loc.mir
M llvm/test/DebugInfo/MIR/X86/prolog-epilog-indirection.mir
M llvm/test/DebugInfo/X86/prolog-params.mir
M llvm/test/tools/dsymutil/Inputs/private/tmp/remarks/basic1.macho.remarks.arm64.opt.yaml
M llvm/test/tools/dsymutil/Inputs/private/tmp/remarks/basic2.macho.remarks.arm64.opt.yaml
M llvm/test/tools/dsymutil/Inputs/private/tmp/remarks/basic3.macho.remarks.arm64.opt.yaml
M llvm/test/tools/dsymutil/Inputs/private/tmp/remarks/fat.macho.remarks.x86_64.opt.yaml
M llvm/test/tools/dsymutil/Inputs/private/tmp/remarks/fat.macho.remarks.x86_64h.opt.yaml
M llvm/test/tools/llvm-remarkutil/Inputs/two-remarks.bitstream
M llvm/test/tools/llvm-remarkutil/Inputs/two-remarks.yaml
M llvm/test/tools/llvm-remarkutil/convert.test
M llvm/test/tools/llvm-remarkutil/size-diff/Inputs/1-func-1-instr-1-stack.yaml
M llvm/test/tools/llvm-remarkutil/size-diff/Inputs/1-func-2-instr-2-stack.yaml
M llvm/test/tools/llvm-remarkutil/size-diff/Inputs/2-identical-func-1-instr-1-stack.yaml
M llvm/test/tools/llvm-remarkutil/size-diff/Inputs/inconvertible-integer.yaml
M llvm/test/tools/llvm-remarkutil/size-diff/Inputs/no-instruction-count-remarks.yaml
M llvm/test/tools/llvm-remarkutil/size-diff/Inputs/unexpected-key.yaml
M llvm/tools/llvm-exegesis/lib/Assembler.cpp
M llvm/tools/llvm-remarkutil/RemarkSizeDiff.cpp
Log Message:
-----------
[CodeGen] Rename prologpeilog to prolog-epilog (#207870)
This is primarily to ensure consistenct with the new pass manager where
the name of the pass is already prolog-epilog, which is more consistent
with our existing naming scheme. This is necessary to be able to run
existing llc invocations that explicitly specify prolog-epilog under the
NewPM automatically.
Assisted by Gemini.
Commit: 0ad19f403165d8fc1596fb2fef9c940e941c54df
https://github.com/llvm/llvm-project/commit/0ad19f403165d8fc1596fb2fef9c940e941c54df
Author: hulxv <hulxxv at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M libc/shared/builtins.h
A libc/shared/builtins/subsf3.h
M libc/src/__support/builtins/CMakeLists.txt
A libc/src/__support/builtins/subsf3.h
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_builtins_test.cpp
Log Message:
-----------
[libc] add shared subsf3 builtin (#205677)
Re-exposes LLVM-libc's `__subsf3` as `shared::subsf3` for reuse by
compiler-rt's builtins.
Stacked change - merge these first:
- #200094
- #205669
- #205670
- #205671
- #205672
- #205673
- #205674
- #205675
- #205676
Part of #197824
Commit: d49c6da56c60e3859b686ed2434fed7cab92bff9
https://github.com/llvm/llvm-project/commit/d49c6da56c60e3859b686ed2434fed7cab92bff9
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M .ci/compute_projects.py
M .ci/compute_projects_test.py
R .github/workflows/libclang-python-tests.yml
Log Message:
-----------
CI: move libclang python bindings tests to main CI (#201677)
This removes the separate python bindings CI, which run on the GitHub
free runners and take more than one hour to build libclang.
The tests are executed instead in the monolithic pipelines, whenever
clang would be tested.
That only tests whatever python version we set up for that pipeline.
This is fine in terms of resources because all the dependencies are
built anyway, and the tests themselves take less than one second to run
on the free runners.
Commit: 1b9723b3cd661b53f8ea891204efdb95a9c1c678
https://github.com/llvm/llvm-project/commit/1b9723b3cd661b53f8ea891204efdb95a9c1c678
Author: Yi Zhang <cathyzhyi at google.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/APInt.h
M llvm/unittests/ADT/APIntTest.cpp
Log Message:
-----------
Fix APInt::concat for zero-width operands (#207475)
APInt::concat triggered undefined behavior (invalid shift exponent) when
concatenating a zero-width operand with a 64-bit operand on the fast
path (combined width <= 64). For example, `I0.concat(I64)` resulted in
`U.VAL << 64`, which is UB.
Fix by checking for zero-width operands early and returning the other
operand. Added regression tests to `APIntTest.cpp`.
Commit: 5c715d56884364a3b05acb4d3e6b52a911f14667
https://github.com/llvm/llvm-project/commit/5c715d56884364a3b05acb4d3e6b52a911f14667
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang-tools-extra/docs/ReleaseNotes.rst
M clang/lib/Tooling/Tooling.cpp
M clang/unittests/Tooling/ToolingTest.cpp
Log Message:
-----------
[Tooling] Preserve backslashes in POSIX source paths (#207499)
On POSIX, backslashes are valid filename characters. Avoid converting
them to slashes when computing absolute source paths in LibTooling,
since doing so changes paths such as `a\b.cc` into `a/b.cc`.
Closes #207396
Commit: 664e704bd5da24971bfdedee410415537e8d2e45
https://github.com/llvm/llvm-project/commit/664e704bd5da24971bfdedee410415537e8d2e45
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M flang/include/flang/Semantics/semantics.h
M flang/lib/Semantics/resolve-names.cpp
A flang/test/Driver/bbc-implicit-use-module.f90
M flang/tools/bbc/bbc.cpp
Log Message:
-----------
[flang] Add ability to implicitly use a module (#207824)
Add parser and semantics plumbing for configured implicit USE modules,
reusing
the normal USE-association path so public symbols and common blocks are
imported
consistently.
Commit: c45ff74fbe38151a21e1877b7e0c703b1590f101
https://github.com/llvm/llvm-project/commit/c45ff74fbe38151a21e1877b7e0c703b1590f101
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSystemOperands.td
Log Message:
-----------
[RISCV] Sync RISCVSystemOperands.td order/sections with priv-csrs.adoc from riscv-isa-manual. NFC (#207803)
Commit: c392657d4992148cb7cd5ebd94f12d2ffab949b4
https://github.com/llvm/llvm-project/commit/c392657d4992148cb7cd5ebd94f12d2ffab949b4
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
A llvm/test/CodeGen/SPIRV/pointers/array-stride-subbyte.ll
Log Message:
-----------
[SPIR-V] Fix ArrayStride truncation to 0 for sub-byte element types (#207140)
addArrayStrideDecorations computed the stride as `getTypeSizeInBits/8`
which truncates to 0 for sub-byte element types such as i1
0 strides are disallowed in spec
---------
Co-authored-by: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Commit: 2ef13ce61b9625080e20df1e13763aa4d4fb5964
https://github.com/llvm/llvm-project/commit/2ef13ce61b9625080e20df1e13763aa4d4fb5964
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/test/CodeGen/AMDGPU/whole-wave-functions-pei.mir
M llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
Log Message:
-----------
[AMDGPU] Fix whole-wave function prologue to set EXEC to -1 (#207781)
A whole-wave function body must run with all lanes on. With no WWM
spills the prologue emitted `S_XOR_SAVEEXEC`, giving `EXEC` =
`~entryEXEC`
Commit: b068ae9e376b1e3d721064e140e638cad076d0bc
https://github.com/llvm/llvm-project/commit/b068ae9e376b1e3d721064e140e638cad076d0bc
Author: Zachary Yedidia <zyedidia at gmail.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M clang/lib/Basic/Targets/X86.cpp
M llvm/docs/LFI.rst
M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/MC/MCLFI.cpp
M llvm/lib/Target/X86/MCTargetDesc/CMakeLists.txt
A llvm/lib/Target/X86/MCTargetDesc/X86MCLFIRewriter.cpp
A llvm/lib/Target/X86/MCTargetDesc/X86MCLFIRewriter.h
M llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/Target/X86/X86Subtarget.h
M llvm/lib/TargetParser/Triple.cpp
A llvm/test/CodeGen/X86/lfi-sibcall.ll
A llvm/test/MC/X86/LFI/abi-note.s
A llvm/test/MC/X86/LFI/syscall.s
A llvm/test/MC/X86/LFI/thread-pointer-errors.s
A llvm/test/MC/X86/LFI/thread-pointer.s
Log Message:
-----------
[LFI][X86] Add X86 LFI target and system instruction rewrites (#189569)
This PR introduces an x86-64 backend for Lightweight Fault Isolation
(LFI), similar to the one being developed for AArch64. LFI is a
compiler-based mechanism that enables efficient in-process sandboxing.
See the RFC from last fall for details.
This PR adds the `x86_64_lfi` target (similar to `aarch64_lfi`), sets up
reserved registers, and implements some initial rewrites for system
instructions (system calls and TLS accesses). The rewrites are done at
the MC level, using the `MCLFIRewriter` infrastructure. I have updated
the documentation to describe the x86-64 sandboxing scheme and to list
rewrites that will be implemented in future PRs (to keep each individual
PR small).
For performance and compatibility reasons, the plan is currently to use
bundling for maintaining control-flow integrity in the sandbox, which
is not yet supported. For now we are setting up the rewrites without using
bundling, but we can also use a CFI mechanism based on shadow
stack+endbr in order to have something usable while bundling is
in progress.
Commit: a849f52b7930ead34ce6337763cff9977f5f61aa
https://github.com/llvm/llvm-project/commit/a849f52b7930ead34ce6337763cff9977f5f61aa
Author: rdevshp <rdevshp at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
M llvm/test/Transforms/InstCombine/conditional-variable-length-signext-after-high-bit-extract.ll
Log Message:
-----------
[InstCombine] Fix assertion failure in `foldVariableSignZeroExtensionOfVariableHighBitExtract` (#205148)
This PR fixes crash for the following program:
```
define i16 @d(i16 %x, i4 %n) {
entry:
%highbits = lshr i16 %x, 1
%sub1 = sub i4 0, %n
%z1 = zext i4 %sub1 to i16
%shl = shl i16 %highbits, %z1
%sub2 = sub i4 0, %n
%z2 = zext i4 %sub2 to i16
%ashr = ashr i16 %shl, %z2
ret i16 %ashr
}
```
when running `opt -passes=instcombine prog.ll -S`.
Assisted-by: Codex
Commit: fa9fac7ae909053993e96a1c2aecc981b08f70cb
https://github.com/llvm/llvm-project/commit/fa9fac7ae909053993e96a1c2aecc981b08f70cb
Author: Zachary Yedidia <zyedidia at gmail.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M clang/lib/Basic/Targets/X86.cpp
M llvm/docs/LFI.rst
M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/MC/MCLFI.cpp
M llvm/lib/Target/X86/MCTargetDesc/CMakeLists.txt
R llvm/lib/Target/X86/MCTargetDesc/X86MCLFIRewriter.cpp
R llvm/lib/Target/X86/MCTargetDesc/X86MCLFIRewriter.h
M llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/Target/X86/X86Subtarget.h
M llvm/lib/TargetParser/Triple.cpp
R llvm/test/CodeGen/X86/lfi-sibcall.ll
R llvm/test/MC/X86/LFI/abi-note.s
R llvm/test/MC/X86/LFI/syscall.s
R llvm/test/MC/X86/LFI/thread-pointer-errors.s
R llvm/test/MC/X86/LFI/thread-pointer.s
Log Message:
-----------
Revert "[LFI][X86] Add X86 LFI target and system instruction rewrites" (#207891)
Reverts llvm/llvm-project#189569
Commit: 025e2adf1c774d17415b72244722aa740fe4d712
https://github.com/llvm/llvm-project/commit/025e2adf1c774d17415b72244722aa740fe4d712
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M lldb/source/Host/freebsd/Host.cpp
Log Message:
-----------
[LLDB][FreeBSD] Fix build from FileSpec change (#207819)
FileSpec now returns llvm::StringRef instead of ConstString. As a
result, we don't need to use GetCString to get the raw string. Remove it
to fix build failure.
Fixes: f9b5264523b1 (#206802)
Commit: b838b0cc1c76c34e57d70d5d259382ac0d764cca
https://github.com/llvm/llvm-project/commit/b838b0cc1c76c34e57d70d5d259382ac0d764cca
Author: Ying Chen <chenying at inchitech.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoZclsd.td
M llvm/test/MC/RISCV/rv32zclsd-invalid.s
Log Message:
-----------
[RISCV][MC] Improve diagnostics for Zclsd RV32 GPR pair operands (#207639)
Add dedicated assembler diagnostics for the RV32 GPR pair operands used
by
Zclsd compressed load/store pair instructions.
After the RISC-V asm parser started reporting multiple near-miss
reasons, these
operands still fell back to the generic "invalid operand for
instruction" note.
Give them explicit diagnostic types and messages so invalid register
pairs report
the expected pair constraints.
Commit: 26fbd61932b41a36a1fee3bcdfbb6800ca5c09b3
https://github.com/llvm/llvm-project/commit/26fbd61932b41a36a1fee3bcdfbb6800ca5c09b3
Author: Ying Chen <chenying at inchitech.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M lld/test/ELF/gc-sections-keep-shared-start.s
Log Message:
-----------
[ELF,test] Fix FileCheck RUN line in gc-sections-keep-shared-start.s (#207678)
Fix a malformed multiline RUN line.
---------
Co-authored-by: Fangrui Song <i at maskray.me>
Commit: 25b205eb9413e418732d0d5b526511c3ce37c6d9
https://github.com/llvm/llvm-project/commit/25b205eb9413e418732d0d5b526511c3ce37c6d9
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/FIRToMemRef.cpp
Log Message:
-----------
[FIRToMemRef] Doc collectSliceInfoFrom, getMemrefIndices, canonicalizeIndex (#207699)
Also drops the unused `converted` parameter from getMemrefIndices. The
internal workings of these functions were not easy to understand for me
so I worked with Claude to document with examples. Hopefully, that makes
the code easier to read. I reviewed the docs and corrected some obvious
hallucinations produced by the agent.
Co-Authored-By: Claude Sonnet 4.6 noreply at anthropic.com
Commit: 51a378885ae5f48c2b1521700fd5732a5aae00aa
https://github.com/llvm/llvm-project/commit/51a378885ae5f48c2b1521700fd5732a5aae00aa
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/TableGen/StringToOffsetTable.cpp
Log Message:
-----------
[TableGen] Separate string when digit follows octal escape (#207807)
Silence MSVC warning C4125 by separating the string literals when an
octal escape sequence is followed by a decimal char.
Commit: cb19f2b288a94e62c93f3e862cb697c14a7326fb
https://github.com/llvm/llvm-project/commit/cb19f2b288a94e62c93f3e862cb697c14a7326fb
Author: Ian Anderson <iana at apple.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M clang/test/OffloadTools/clang-offload-bundler/zstd.c
Log Message:
-----------
[clang][test][darwin] Driver/clang-offload-bundler-zstd.c fails on macOS (#207876)
Driver/clang-offload-bundler-zstd.c isn't supported on Darwin, but
neglected to list the macosx target.
Commit: cbf8048aa1427166045a602e0bc29127c1d8274c
https://github.com/llvm/llvm-project/commit/cbf8048aa1427166045a602e0bc29127c1d8274c
Author: SiHuaN <liyongtai at iscas.ac.cn>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
Log Message:
-----------
[RISCV][P-ext] Add codegen for packed absolute difference sum (#207314)
The pabdsumu/pabdsumau instructions compute the sum of absolute differences
of packed unsigned bytes; pabdsumau also accumulates into rd.
Add the llvm.riscv.pabdsumu and pabdsumau intrinsics. A single-GPR source is
selected directly to pabdsumu.b/pabdsumau.b with isel patterns. A 64-bit
GPRPair source on RV32 has no paired instruction, so it is split during
lowering into two v4i8 halves: reduce the low half (folding in rd when
accumulating), then accumulate the high half into that partial sum.
Cases with a target-illegal result are handled in ReplaceNodeResults:
RV64, i32 result: reduce at i64 and truncate (a 32-bit source is
zero-extended first).
RV32, i64 result: reduce each half with pabdsumu.b and combine the
partial sums with a widening add (waddu/waddau).
Commit: 0fc9beeadf2a415553047989154a8df7f89fd8dc
https://github.com/llvm/llvm-project/commit/0fc9beeadf2a415553047989154a8df7f89fd8dc
Author: Lucas Mellone <github.snugness349 at passinbox.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M libcxx/include/__ranges/adjacent_transform_view.h
A libcxx/test/libcxx/ranges/range.adaptors/range.adjacent.transform/nodiscard.verify.cpp
Log Message:
-----------
[libc++][ranges] Applied [[nodiscard]] to `adjacent_transform_view` (#205900)
[[nodiscard]] should be applied to functions where discarding the return
value is most likely a correctness issue.
- https://libcxx.llvm.org/CodingGuidelines.html
- https://wg21.link/range.adjacent.transform
Towards https://github.com/llvm/llvm-project/issues/172124
---------
Co-authored-by: Hristo Hristov <zingam at outlook.com>
Commit: 8992cdf458f78c5ef9b018c92234658fc78cfd80
https://github.com/llvm/llvm-project/commit/8992cdf458f78c5ef9b018c92234658fc78cfd80
Author: Lucas Mellone <github.snugness349 at passinbox.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M libcxx/include/__ranges/join_view.h
A libcxx/test/libcxx/ranges/range.adaptors/range.join/nodiscard.verify.cpp
Log Message:
-----------
[libc++][ranges] Applied [[nodiscard]] to `join_view` (#206838)
[[nodiscard]] should be applied to functions where discarding the return
value is most likely a correctness issue.
- https://libcxx.llvm.org/CodingGuidelines.html
- https://wg21.link/range.join
Towards https://github.com/llvm/llvm-project/issues/172124
Commit: 347e97f815e2b866aa07b8e0f6364a79280ad2fb
https://github.com/llvm/llvm-project/commit/347e97f815e2b866aa07b8e0f6364a79280ad2fb
Author: quic-k <kushpal at qti.qualcomm.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/test/Driver/hexagon-toolchain-picolibc.c
Log Message:
-----------
[Clang][Hexagon] Use flat library directory layout for Picolibc (#201326)
Signed-off-by: Kushal Pal <kushpal at qti.qualcomm.com>
Commit: a6575e8ea5a638259d4051ebfb1430bf1cc2795b
https://github.com/llvm/llvm-project/commit/a6575e8ea5a638259d4051ebfb1430bf1cc2795b
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
Log Message:
-----------
[clang][bytecode] Use `PtrView` in `CheckActive()` (#207756)
Commit: bc2b50fbca41852434db4c3f066989e036b9b962
https://github.com/llvm/llvm-project/commit/bc2b50fbca41852434db4c3f066989e036b9b962
Author: David Green <david.green at arm.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/arith-overflow.ll
M llvm/test/Analysis/CostModel/AArch64/arith.ll
M llvm/test/Analysis/CostModel/AArch64/div.ll
M llvm/test/Analysis/CostModel/AArch64/mul.ll
M llvm/test/Analysis/CostModel/AArch64/rem.ll
Log Message:
-----------
[AArch64] Add a basic i128 mul cost. (#203271)
This adds a basic cost for i128 multiply instructions, which has a basic
cost of 4 and scales n^2 with bitsize.
Commit: 08ed6acb7e0d328ee02d4c15b7b6bcdd943323e3
https://github.com/llvm/llvm-project/commit/08ed6acb7e0d328ee02d4c15b7b6bcdd943323e3
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M libc/src/__support/File/CMakeLists.txt
M libc/src/__support/File/dir.cpp
M libc/src/__support/File/dir.h
M libc/src/__support/File/linux/dir.cpp
Log Message:
-----------
[libc] Improve Dir class safety, performance, and style (#207214)
Addressed issues in the Dir class identified during review:
* Safety: Added bounds and validation checks in Dir::read to prevent
out-of-bounds reads on corrupted input.
* Performance: Aligned the internal buffer to struct dirent to prevent
unaligned memory access, and increased the buffer size to 4096 to reduce
syscall overhead.
* Style: Replaced the system <dirent.h> include with a new proxy header
(struct_dirent.h) to avoid system dependencies, and fixed relative
includes.
* Refactoring: Moved platform-specific record length access to a
platform helper (platform_dir_reclen).
* CMake: Updated dependencies for the dir target.
Assisted-by: Automated tooling, human reviewed.
Commit: a2031641ed0db092d7f7a5371f4710b9e260ec4a
https://github.com/llvm/llvm-project/commit/a2031641ed0db092d7f7a5371f4710b9e260ec4a
Author: David Green <david.green at arm.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
R llvm/test/CodeGen/AArch64/arm64-2013-02-12-shufv8i8.ll
M llvm/test/CodeGen/AArch64/arm64-zip.ll
M llvm/test/CodeGen/AArch64/bf16-shuffle.ll
M llvm/test/CodeGen/AArch64/build-vector-two-dup.ll
M llvm/test/CodeGen/AArch64/implicitly-set-zero-high-64-bits.ll
M llvm/test/CodeGen/AArch64/insert-subvector.ll
M llvm/test/CodeGen/AArch64/insertshuffleload.ll
M llvm/test/CodeGen/AArch64/neon-extracttruncate.ll
M llvm/test/CodeGen/AArch64/neon-shuffle-vector-tbl.ll
M llvm/test/CodeGen/AArch64/neon-wide-splat.ll
M llvm/test/CodeGen/AArch64/neon-widen-shuffle.ll
M llvm/test/CodeGen/AArch64/shuffle-extend.ll
M llvm/test/CodeGen/AArch64/shuffle-slide-to-shift.ll
M llvm/test/CodeGen/AArch64/shuffle-tbl34.ll
M llvm/test/CodeGen/AArch64/shuffles.ll
Log Message:
-----------
[AArch64][GlobalISel] Add more shuffle test coverage. NFC (#207907)
Commit: 39f64b9045441225f6229d3ea5502ae5a03307f8
https://github.com/llvm/llvm-project/commit/39f64b9045441225f6229d3ea5502ae5a03307f8
Author: Sam Elliott <aelliott at qti.qualcomm.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
M llvm/test/CodeGen/RISCV/short-forward-branch-opt-with-branch-with-immediates_32_eq.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt-with-branch-with-immediates_32_ne.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt-with-branch-with-immediates_32_sge.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt-with-branch-with-immediates_32_slt.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt-with-branch-with-immediates_32_uge.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt-with-branch-with-immediates_32_ult.ll
Log Message:
-----------
[RISCV] Fix Predicates in SFB to MVccI (#207806)
Commit: 93509a564b4dda593766f4395873175ede1a30ed
https://github.com/llvm/llvm-project/commit/93509a564b4dda593766f4395873175ede1a30ed
Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
A llvm/test/CodeGen/LoongArch/get-rounding.ll
M llvm/test/CodeGen/LoongArch/set-rounding.ll
Log Message:
-----------
[LoongArch] Support ISD::GET_ROUNDING (llvm.get.rounding) (#207319)
Commit: c6cadf901add7de1751cb27856aec90e47849cf4
https://github.com/llvm/llvm-project/commit/c6cadf901add7de1751cb27856aec90e47849cf4
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M flang-rt/lib/runtime/CMakeLists.txt
M runtimes/cmake/config-Fortran.cmake
Log Message:
-----------
[Fortran] Use INTERFACE targets for options and dependencies (#193469)
Use CMake INTERFACE libraries to express dependencies and common build
options.
Using INTERFACE libraries was proposed here:
https://github.com/llvm/llvm-project/pull/171610#discussion_r3122187957
Since such libraries can also propagate build options use this instead
of `target_compile_options`. Unfortunately this does not mean we can get
rid of `flang_module_target` because it also needs to set the module
output directory.
---------
Co-authored-by: Tarun Prabhu <tarunprabhu at gmail.com>
Commit: 1a5376e062e3f3b99ffce25e24e53182202e06b9
https://github.com/llvm/llvm-project/commit/1a5376e062e3f3b99ffce25e24e53182202e06b9
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/AVR/AVRISelLowering.cpp
A llvm/test/CodeGen/AVR/cmp-sgt-i128.ll
Log Message:
-----------
[AVR] Fix overflow in SETGT lowering (#207737)
https://github.com/llvm/llvm-project/pull/182690 fixed this for the
SETUGT case, but the same issue exists for SETGT, so fix it in the same
way.
Similar to the SETUGT case this needs a i128 comparison to reproduce,
otherwise the comparison gets folded away too early.
Commit: 47b819b866636fb1770f78da3f45ebd64d5f9875
https://github.com/llvm/llvm-project/commit/47b819b866636fb1770f78da3f45ebd64d5f9875
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvpermi.ll
Log Message:
-----------
[LoongArch] Fix vpermi.w legalization with undef elements (#207751)
For the MaskSize==8 case, the code was comparing mask elements that
could be undef (-1). This could result in a miscompile (where -1 + 4 ==
3, which crosses from the high half to the low half) or the pattern not
matching (because -1 doesn't match the other mask element).
Fix this by explicitly handling undef elements in the code. If the high
half is undef, we can just ignore. If the low half is undef, we need to
use the value from the high half shifted down by 4. If neither are
undef, use the original check.
Commit: 5bca42d7d7cd55642e9e63fa3b4da11245d025c3
https://github.com/llvm/llvm-project/commit/5bca42d7d7cd55642e9e63fa3b4da11245d025c3
Author: Jaydeep Chauhan <chauhan.jaydeep.ashwinbhai at intel.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/BuiltinsX86_64.td
M clang/include/clang/Options/Options.td
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/Basic/Targets/X86.h
M clang/lib/Headers/CMakeLists.txt
R clang/lib/Headers/amxtf32intrin.h
M clang/lib/Headers/immintrin.h
M clang/lib/Sema/SemaX86.cpp
R clang/test/CodeGen/X86/amx_tf32.c
R clang/test/CodeGen/X86/amx_tf32_api.c
R clang/test/CodeGen/X86/amx_tf32_errors.c
R clang/test/CodeGen/X86/amx_tf32_inline_asm.c
M clang/test/Driver/x86-target-features.c
M clang/test/Preprocessor/predefined-arch-macros.c
M clang/test/Preprocessor/x86_target_features.c
M compiler-rt/lib/builtins/cpu_model/x86.c
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/lib/Target/X86/X86.td
M llvm/lib/Target/X86/X86ExpandPseudo.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrAMX.td
M llvm/lib/Target/X86/X86InstrPredicates.td
M llvm/lib/Target/X86/X86LowerAMXType.cpp
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/X86TargetParser.cpp
R llvm/test/CodeGen/X86/amx-tf32-internal.ll
R llvm/test/CodeGen/X86/amx-tf32-intrinsics.ll
R llvm/test/MC/Disassembler/X86/AMX/x86-64-amx-tf32.txt
R llvm/test/MC/X86/AMX/x86-64-amx-tf32-att.s
R llvm/test/MC/X86/AMX/x86-64-amx-tf32-intel.s
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
Log Message:
-----------
[X86] Remove AMX-TF32 (#207673)
Per Intel Architecture Instruction Set Extensions Programming Reference
rev. 62 https://cdrdv2.intel.com/v1/dl/getContent/922690 Revision
History entry for revision -062
Commit: 5c01d66e97208cd8acf6d7db72d9cfcbb4cd883f
https://github.com/llvm/llvm-project/commit/5c01d66e97208cd8acf6d7db72d9cfcbb4cd883f
Author: Folkert de Vries <folkert at folkertdev.nl>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/CodeGen/Targets/AArch64.cpp
M clang/test/CodeGen/win64-i128.c
Log Message:
-----------
[AArch64][msvc] allow higher align than slot size in va_arg (#207591)
Fixes https://github.com/llvm/llvm-project/issues/207584
On aarch64 windows, an `__int128` argument is passed with alignment 16,
but was read with an alignment of 8. Based on the MSVC assembly and how
e.g. aarch64 darwin handles this, I think it's correct to set
`AllowHigherAlign = true`.
Commit: 57a7e7538cfc73184b8280160e8d89cedab04c5d
https://github.com/llvm/llvm-project/commit/57a7e7538cfc73184b8280160e8d89cedab04c5d
Author: Folkert de Vries <folkert at folkertdev.nl>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/fp128-cast.ll
Log Message:
-----------
[X86][Windows] use `LowerWin64_INT128_TO_FP` for `u128` to `f128` conversion (#207285)
This change fixes an ABI issue where the signed conversion passes a
`i128` different from a `u128`, and crucially different from GCC.
https://godbolt.org/z/x3daY3rej
```diff
--- <unnamed>
+++ <unnamed>
@@ -1,15 +1,15 @@
-conv_from_i128:
+conv_from_u128:
push rsi
- sub rsp, 64
+ sub rsp, 48
mov rsi, rcx
- movaps xmm0, xmmword ptr [rdx]
- movaps xmmword ptr [rsp + 48], xmm0
+ mov rax, qword ptr [rdx]
+ mov r8, qword ptr [rdx + 8]
lea rcx, [rsp + 32]
- lea rdx, [rsp + 48]
- call __floattitf
+ mov rdx, rax
+ call __floatuntitf
movaps xmm0, xmmword ptr [rsp + 32]
movaps xmmword ptr [rsi], xmm0
mov rax, rsi
- add rsp, 64
+ add rsp, 48
pop rsi
ret
```
The signed case being correct is apparently due to a special
windows-specific path being chosen. The unsigned version bailed out too
early. So, I've changed `LowerUINT_TO_FP` to be more like
`LowerSINT_TO_FP`. In particular this moves the "Bail out when we don't
have native conversion instructions." down a bit, so that
`LowerWin64_INT128_TO_FP` is actually used.
I've then also added some testing for win64 SSE. I'm not sure if the
other target features are as relevant but I can add those too if
helpful.
This was found by running the `rust-lang/compiler-builtins` tests with a
build that includes https://github.com/llvm/llvm-project/pull/204887.
Commit: c5026e4e3332acf88bb304c37137bd247fa12b25
https://github.com/llvm/llvm-project/commit/c5026e4e3332acf88bb304c37137bd247fa12b25
Author: Sudharsan Veeravalli <svs at qti.qualcomm.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M lldb/source/Plugins/Architecture/CMakeLists.txt
A lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.cpp
A lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.h
A lldb/source/Plugins/Architecture/RISCV/CMakeLists.txt
A lldb/unittests/Architecture/CMakeLists.txt
A lldb/unittests/Architecture/RISCV/ArchitectureRISCVTest.cpp
A lldb/unittests/Architecture/RISCV/CMakeLists.txt
M lldb/unittests/CMakeLists.txt
Log Message:
-----------
[RISCV][LLDB] Add RISC-V Architecture plugin for trap validation (#207675)
Add a minimal `RISC-V Architecture` plugin and implement
`IsValidTrapInstruction` for trap opcodes. The plugin recognizes riscv32
and riscv64 targets and validates 32-bit `EBREAK` and 16-bit `C.EBREAK`.
On RISC-V, `EBREAK` traps with the PC still pointing at the `EBREAK`
instruction. A plain continue resumes from that same PC and traps again.
This issue was found while trying to run the `TestBuiltinDebugTrap` test
case locally on a `RISC-V QEMU`.
Added a cpp unit test to verify the behaviour of
`IsValidTrapInstruction`. I've chosen to verify `EBREAK` on `riscv32`
and `C.EBREAK` on `riscv64` so that there is some coverage for both
targets.
Assisted by gpt-5.5
Commit: 70646dd3eda3e64fc94b44d7403f946cd7455b92
https://github.com/llvm/llvm-project/commit/70646dd3eda3e64fc94b44d7403f946cd7455b92
Author: lianjinfeng2003 <101249452+mygitljf at users.noreply.github.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/AST/StmtPrinter.cpp
M clang/unittests/AST/StmtPrinterTest.cpp
M clang/unittests/AST/TypePrinterTest.cpp
Log Message:
-----------
[clang][AST] Qualify DeclRefExpr printing (#206041)
I updated DeclRefExpr printing so fully-qualified printing consistently
uses declaration ownership rather than only the written qualifier. This
also preserves existing behavior for local names and cleaned parameter
names.
The added tests cover both the direct expression printer behavior and
the original type-printing scenario that exposed the missing
qualification.
Fixes #205925
Commit: 64df722400e57118436776be2b897e70d12e8553
https://github.com/llvm/llvm-project/commit/64df722400e57118436776be2b897e70d12e8553
Author: walkerkd <keith.walker at arm.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SchedC1Nano.td
Log Message:
-----------
[AArch64] C1-Nano scheduler cleanup in preparation for SME [NFC] (#207738)
Change are in preparation for a forthcoming addition of SME to the
C1-Nano scheduling model. This is restructuring of the code which does
not involve the actual SME changes. By separating out these NFC changes
it will make review of the SME specific changes easier.
- Defined resource names to match the form now used in the C1-Ultra
scheduling model which has the throughput information on the end of the
name rather than in the middle:
C1NanoWrite_1c_1r_2ALU => C1NanoWrite_1c_2ALU_1rc
- Moved definitions so that they more closely match the order they are
defined in the C1-Nano SWOG. This make it easier to match entries in the
code to the tables in the SWOG.
These changes also make the C1-Nano scheduling model more closely match
the forms and layout used in the C1-Ultra scheduling model.
Commit: ff518705c4c5d1e6e7a94d6ab7819618708d5bcd
https://github.com/llvm/llvm-project/commit/ff518705c4c5d1e6e7a94d6ab7819618708d5bcd
Author: Chandana Mudda <quic_csinderi at quicinc.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonPatterns.td
A llvm/test/CodeGen/Hexagon/sext-mul-splat-v2i16.ll
Log Message:
-----------
[Hexagon] Optimize sext + mul pattern for splatted scalar sext i16 (#206893)
Extend the existing vmpyh pattern to handle the case where one operand
of a v2i32 nsw mul is a splatted scalar sext i16 value. When the splat
is hoisted out of a loop, it arrives as assertsext v2i32, i16 in the DAG
rather than sext v2i16. The existing pattern did not match this form,
causing the multiply to expand to two scalar mpyi instructions.
Add a PatFrag assertsext_v2i32_i16 to match assertsext nodes of type
v2i32 extended from i16, and two new patterns (both operand orderings)
that recover the v2i16 using A2_combine_ll before feeding into
M2_vmpy2s_s0.
Commit: adc3969513100367bd4b2cf6add8935cd308432b
https://github.com/llvm/llvm-project/commit/adc3969513100367bd4b2cf6add8935cd308432b
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
Log Message:
-----------
[AMDGPU] Use APFloat::getOne instead of parsing "1.0" (NFC) (#207916)
Commit: 4e43cd6339934945e829ddc4ec3ef81c381a0423
https://github.com/llvm/llvm-project/commit/4e43cd6339934945e829ddc4ec3ef81c381a0423
Author: Mel Chen <mel.chen at sifive.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/Transforms/LoopVectorize/RISCV/reductions.ll
Log Message:
-----------
[LV][RISCV] Enable FSub reduction for scalable VFs (#207698)
#197134 introduced a change to FAdd reduction recognition, causing fsub
instructions to be classified as FSub reductions instead of FAdd
reductions. This patch fixes the regression by enabling FSub reduction
support for scalable VFs in TTI.
Commit: ec9e62cb609a0382c817112e983c461827056dfd
https://github.com/llvm/llvm-project/commit/ec9e62cb609a0382c817112e983c461827056dfd
Author: Artem Kroviakov <71938912+akroviakov at users.noreply.github.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
Log Message:
-----------
[MLIR][XeGPU] Move arch-specific topology under uArch check (#207449)
Commit: 503f0ca19cfcc9c0c88d6918939a2c0038ad0498
https://github.com/llvm/llvm-project/commit/503f0ca19cfcc9c0c88d6918939a2c0038ad0498
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
Log Message:
-----------
[SPIR-V] Simplify and fix sign-extension bug in convertCharsToWord (#207769)
Commit: 81e317971d50396fc68a602a505eb85572c51373
https://github.com/llvm/llvm-project/commit/81e317971d50396fc68a602a505eb85572c51373
Author: DaanishD20 <daanish.dhillip at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/AST/ExprConstant.cpp
M clang/test/SemaCXX/constant-expression-cxx2a.cpp
Log Message:
-----------
[clang] Fix constant-evaluator crash on array new with no size (#207730)
An array new-expression whose bound is neither specified nor deducible
from its initializer (for example `new int[]()`) is ill-formed and is
already diagnosed by Sema with `error: cannot determine allocated array
size from initializer`. However, the constant evaluator still tried to
evaluate the recovery expression. In
`PointerExprEvaluator::VisitCXXNewExpr`
the array size is unavailable (`E->getArraySize()` is `nullopt`), so the
allocation fell through to the scalar-new path, producing an array
`APValue` stored under a scalar type. Reading that object later asserted
in `Type::castAsArrayTypeUnsafe()` (`isa<ArrayType>(CanonicalType)`)
from
`CheckEvaluationResult`.
This patch detects an array new-expression whose size could not be
determined and bails out of constant evaluation.
Fixes #200139
Commit: d6a4a97cb7a198121e5058d6c4c6b4552259a79d
https://github.com/llvm/llvm-project/commit/d6a4a97cb7a198121e5058d6c4c6b4552259a79d
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
Log Message:
-----------
[NFC][SPIRV] Remove dead helper `addStringImm(const StringRef &Str, IRBuilder<> &B, std::vector<Value *> &Args)` (#207923)
The helper was unused.
Commit: ee2f8649c1be2702a79d2249d2e4f7a9befb115b
https://github.com/llvm/llvm-project/commit/ee2f8649c1be2702a79d2249d2e4f7a9befb115b
Author: Luke Lau <luke at igalia.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/early-exit-live-out.ll
A llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses-i64-rv32.ll
A llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses-i64-rv32.ll
Log Message:
-----------
[RISCV] Fix interleaved + strided costs for e64 elements on rv32 (#207927)
This is the same fix as #176105 for interleaved + strided memory op
costs.
We currently compute the cost of interleaved + strided ops as N *
scalar element memory ops, but on rv32 the scalar memory access will
be on an illegal type for 64 bit elements, even with zve64x. Prevent
it from overcosting by just using TCC_Basic.
Commit: 62cb33ee38d748e16e95bc6e90fa747ae7f6c49b
https://github.com/llvm/llvm-project/commit/62cb33ee38d748e16e95bc6e90fa747ae7f6c49b
Author: Mel Chen <mel.chen at sifive.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
Log Message:
-----------
[RISCV] Enumerate all RecurKind cases in isLegalToVectorizeReduction. nfc (#207932)
Commit: 5318bd4123261b716c8a0750076495b77e3614dc
https://github.com/llvm/llvm-project/commit/5318bd4123261b716c8a0750076495b77e3614dc
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M libc/include/CMakeLists.txt
M libc/include/elf.yaml
M libc/include/llvm-libc-macros/sys-auxv-macros.h
Log Message:
-----------
[libc] Add auxiliary vector and note macros to elf.h (#207914)
Added missing macros to elf.h:
* sys-auxv-macros.h: Added AT_RSEQ_FEATURE_SIZE and AT_RSEQ_ALIGN.
* elf.yaml: Added PT_AARCH64_MEMTAG_MTE, PN_XNUM, ELFCLASSNUM, EV_NUM,
and AT_* macros (via sys-auxv-macros.h). Also added NN_* and NT_* note
macros (including NT_FPREGSET and NT_SIGINFO) to match system headers.
* CMakeLists.txt: Added sys_auxv_macros dependency to elf target.
Assisted-by: Automated tooling, human reviewed.
Commit: 6e0de1cea1c8c567304e5e539ba480cada3e28f5
https://github.com/llvm/llvm-project/commit/6e0de1cea1c8c567304e5e539ba480cada3e28f5
Author: Sergey Semenov <sergey.semenov at intel.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M libsycl/docs/index.rst
M libsycl/include/sycl/__impl/async_handler.hpp
M libsycl/include/sycl/__impl/detail/obj_utils.hpp
M libsycl/include/sycl/__impl/queue.hpp
M libsycl/src/detail/offload/offload_topology.cpp
M libsycl/src/detail/platform_impl.cpp
M libsycl/src/detail/queue_impl.cpp
M libsycl/src/detail/queue_impl.hpp
M libsycl/src/queue.cpp
A libsycl/test/usm/memcpy.cpp
M libsycl/unittests/mock/helpers.cpp
M libsycl/unittests/mock/helpers.hpp
M libsycl/unittests/mock/mock.cpp
M libsycl/unittests/queue/CMakeLists.txt
A libsycl/unittests/queue/memcpy.cpp
Log Message:
-----------
[libsycl] Implement memcpy API (#205369)
Commit: fcd02ae7caf28f99357521cafaa6cc7be216ad02
https://github.com/llvm/llvm-project/commit/fcd02ae7caf28f99357521cafaa6cc7be216ad02
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
M mlir/test/Conversion/SPIRVToLLVM/control-flow-ops-to-llvm.mlir
Log Message:
-----------
[mlir][SPIRVToLLVM] Add spirv.Unreachable to llvm.unreachable conversion (#207762)
Commit: d8bc45049075791aa291ef0d6298061308506346
https://github.com/llvm/llvm-project/commit/d8bc45049075791aa291ef0d6298061308506346
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M lldb/source/Plugins/Process/Utility/LinuxSignals.cpp
Log Message:
-----------
[lldb][Linux] Show si_addr for SIGBUS signals (#207718)
The general rule is if si_addr is the same as the PC, we don't show it
because it doesn't add any new information.
SIGBUS signals are caused by an instruction trying to do something, but
si_addr is not the address of the instruction. It's some virtual
address, which is the important bit so add it to the description.
https://man7.org/linux/man-pages/man7/signal.7.html
> SIGBUS <...> Bus error (bad memory access)
Before:
```
* thread #1, name = 'test.o', stop reason = signal SIGBUS: illegal address
* frame #0: 0x0000aaaaaaaa0b80 test.o`main at test.c:42:13
```
After:
```
* thread #1, name = 'test.o', stop reason = signal SIGBUS: illegal address (fault address=0xfffff7ff6000)
* frame #0: 0x0000aaaaaaaa0b80 test.o`main at test.c:42:13
```
I am not adding test cases for this because:
* They would be architecture specific.
* Reliably generating BUS_OBJERR seems difficult.
* Signal reporting has good coverage as it is, so we know that
si_code/si_addr are handled correctly.
Commit: 3f3276ea30babdca38cbfa1188c3b8302819641f
https://github.com/llvm/llvm-project/commit/3f3276ea30babdca38cbfa1188c3b8302819641f
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.h
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVMetadata.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
Log Message:
-----------
[NFC][SPIRV] Use `StringRef` by value (no `const`, no `&`) (#207940)
A `StringRef` is non-modifiable and it acts as a reference, so there is
no need to declare it as `const` nor `&`.
---------
Co-authored-by: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Commit: 5aa3f7d5ca15ef942e2735555724a65358d0a30d
https://github.com/llvm/llvm-project/commit/5aa3f7d5ca15ef942e2735555724a65358d0a30d
Author: Amit Tiwari <amtiwari at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopDistribute.cpp
M llvm/lib/Transforms/Scalar/LoopLoadElimination.cpp
M llvm/lib/Transforms/Utils/LoopVersioning.cpp
A llvm/test/Transforms/LoopDistribute/non-lcssa-input.ll
A llvm/test/Transforms/LoopLoadElim/non-lcssa-input.ll
Log Message:
-----------
[LLE][LoopDistribution][LoopVersioning] Form LCSSA at Caller Invoking LoopVersioning Utility (#202296)
LoopVersioning utility `versionLoop()` expects the input form to be
LCSSA. However, passes like Loop distribution, Loop-load-elimination,
may invoke versioning with a non-LCSSA IR. Versioning updates exit-block
PHIs to handle both the original loop and the cloned loop. However, a
raw non-LCSSA use in the exit block (such as `switch i1 %C`) still
points to the original loop’s `%C`. On the cloned-loop path, control
reaches the exit block without executing the original `%C`, resulting in
error: `Instruction does not dominate all uses!`.
The fix is to form LCSSA at the caller pass.
Commit: d4cf0c375dadd830c27a2b16e0283c4e31beac1a
https://github.com/llvm/llvm-project/commit/d4cf0c375dadd830c27a2b16e0283c4e31beac1a
Author: David Green <david.green at arm.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/GlobalISel/store-merging.mir
M llvm/test/CodeGen/AArch64/GlobalISel/store-wro-addressing-modes.mir
M llvm/test/CodeGen/AArch64/GlobalISel/subreg-copy.mir
M llvm/test/CodeGen/AArch64/GlobalISel/uaddo-8-16-bits.mir
M llvm/test/CodeGen/AArch64/GlobalISel/vararg.mir
M llvm/test/CodeGen/AArch64/GlobalISel/widen-narrow-tbz-tbnz.mir
M llvm/test/CodeGen/AArch64/GlobalISel/xro-addressing-mode-constant.mir
Log Message:
-----------
[AArch64][GlobalISel] Update some tests to use concrete types. NFC (#207960)
Commit: bc5d5f369d127f8b029a81e4fcd874d4b6454347
https://github.com/llvm/llvm-project/commit/bc5d5f369d127f8b029a81e4fcd874d4b6454347
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang-tools-extra/clang-tidy/misc/ThrowByValueCatchByReferenceCheck.cpp
M clang-tools-extra/docs/clang-tidy/checks/bugprone/command-processor.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/float-loop-counter.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/std-namespace-modification.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/throwing-static-initialization.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/unchecked-string-to-number-conversion.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/dcl50-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/dcl58-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/env33-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/err52-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/err58-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/fio38-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/flp30-c.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/new-delete-overloads.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/non-copyable-objects.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/avoid-setjmp-longjmp.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/avoid-variadic-functions.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/copy-constructor-mutates-argument.cpp
Log Message:
-----------
[clang-tidy][docs] Update CERT links to current SEI URLs. NFC. (#207893)
Commit: ac60c83fc60a86c01eaaafd82bb19bc41649bcfa
https://github.com/llvm/llvm-project/commit/ac60c83fc60a86c01eaaafd82bb19bc41649bcfa
Author: walkerkd <keith.walker at arm.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-streaming-cme-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-sve-sme-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Inputs/streaming-cme-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Inputs/sve-sme-instructions.s
Log Message:
-----------
[AArch64] llvm-mca C1-Ultra tests: SVE instructions added by SME when not streaming [NFC] (#207948)
In the C1-Ultra llvm-mca test, moves some instructions that were
incorrectly in the test file for "Instructions available with no SME but
will be sent to CME when in streaming SVE mode" into a file specifically
for instruction that are "SVE instructions added by SME and available
when not in Streaming SVE mode".
This is in preparation for forthcoming C1-Nano SME support to the
scheduling model that currently has no information about these
instruction due to lack of information in the C1-Nano SWOG.
This change is currently NFC because the C1-Ultra is still running the
the same tests, just from different test files.
Commit: baddc8f7778881120a2a206de817454e13f762bc
https://github.com/llvm/llvm-project/commit/baddc8f7778881120a2a206de817454e13f762bc
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_args.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_commands.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_cwd.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_debuggerRoot.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_disableSTDIO.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_environment_with_array.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_environment_with_object.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_extra_launch_commands.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_failing_console.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_failing_launch_commands.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_invalid_launch_commands_and_console.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_invalid_program.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_no_lldbinit_flag.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_shellExpandArguments_disabled.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_shellExpandArguments_enabled.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_sourcePath.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_stdio_redirection.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_stdio_redirection_and_console.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_stopOnEntry.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_terminate_commands.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_termination.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_version.py
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp
Log Message:
-----------
[lldb-dap] Migrate DAP launch tests (#207023)
Migrate all the tests in `lldb-dap/launch` base directory only. Fixes
any grammar if needed.
Commit: 7b4fd8762aa76e8b256afb51043a1508af2646fe
https://github.com/llvm/llvm-project/commit/7b4fd8762aa76e8b256afb51043a1508af2646fe
Author: Connector Switch <c8ef at outlook.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M libcxx/docs/Status/Cxx23Issues.csv
Log Message:
-----------
[libc++] Mark LWG3585 as resolved (#207717)
- Close: https://github.com/llvm/llvm-project/issues/104934.
- Commit:
https://github.com/llvm/llvm-project/commit/0d3d8de014f1012dd0b2c2c077099cf6face44e5
- Test:
https://github.com/llvm/llvm-project/blob/52271a5c11f6abde1fa1221db304212b5eb8ec7c/libcxx/test/std/utilities/variant/variant.variant/variant.assign/copy.pass.cpp#L29-L34
Commit: 38a4eef07180d1d9a3216a7ea9d71c50ee4f3c0e
https://github.com/llvm/llvm-project/commit/38a4eef07180d1d9a3216a7ea9d71c50ee4f3c0e
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/test/CodeGen/AMDGPU/whole-wave-functions-pei.mir
M llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
Log Message:
-----------
[AMDGPU] Save entry EXEC in whole-wave prologue with no WWM spills (#207924)
PR #207781 replaced the prologue S_XOR_SAVEEXEC (which set EXEC to
~entryEXEC) with a plain S_MOV EXEC, -1, but dropped the save of the
entry EXEC that the return restores from, leaving an undefined register
read
se S_OR_SAVEEXEC to both save entry EXEC and set EXEC to -1
Commit: 4db63ee847f2a9154a9869da51a8c575eb123923
https://github.com/llvm/llvm-project/commit/4db63ee847f2a9154a9869da51a8c575eb123923
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/hdr/CMakeLists.txt
A libc/hdr/inet-address-macros.h
M libc/include/arpa/inet.yaml
M libc/src/__support/net/CMakeLists.txt
M libc/src/__support/net/address.cpp
M libc/src/__support/net/address.h
M libc/src/arpa/inet/CMakeLists.txt
A libc/src/arpa/inet/inet_ntop.cpp
A libc/src/arpa/inet/inet_ntop.h
M libc/test/src/arpa/inet/CMakeLists.txt
A libc/test/src/arpa/inet/inet_ntop_test.cpp
Log Message:
-----------
[libc] Add inet_ntop (#204143)
The function converts from IPv4/6 addresses to their string forms. The
complication comes from the v6 part due to address compression and
v4-mapping.
The traditional implementation of this is to sprintf the address into a
temporary buffer. We cannot do that here due to the ban on calling other
entry points. Using the lower-level constructs is possible, but a
straight forward application of IntegerToString does not result in
particularly impressive performance: 50%-100% slower than what's in this
patch (and slower than glibc). It also doesn't make the code much
smaller as the majority of it is dedicated to v6 compression.
The IPv6 implementation uses a temporary buffer, but it also has a
fast-path which skips the buffer if its size is guaranteed to be
sufficient. The IPv4 implementation also has a fast path, but the
fallback here is to compute the precise length of the string instead
(the buffer option was slower and IPv4 makes it easier to compute the
precise length).
The v6 compression code is unrolled to make it easier to optimize. While
it is possible to write a single printing loop that handles all cases,
its branchiness does not make it amenable for optimization.
The resulting function is faster than its glibc counterpart, though the
exact ratio varies depending on the input:
- random IPv4: 15% faster
- random IPv6: 6% faster
- "::": 50% faster
Commit: de348bcd5f7898dc7478fed6bbd95c97a1848d98
https://github.com/llvm/llvm-project/commit/de348bcd5f7898dc7478fed6bbd95c97a1848d98
Author: Andrei Golubev <andrey.golubev at intel.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/IR/BufferizableOpInterface.h
M mlir/lib/Dialect/Arith/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Bufferization/IR/BufferizableOpInterface.cpp
M mlir/lib/Dialect/Bufferization/IR/BufferizationOps.cpp
M mlir/lib/Dialect/Bufferization/Transforms/Bufferize.cpp
M mlir/lib/Dialect/MLProgram/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/SCF/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Tensor/Transforms/BufferizableOpInterfaceImpl.cpp
Log Message:
-----------
[NFC][mlir][bufferization] Align alloc/memcpy/cast options hooks to the rest (#206966)
There are three hooks that have a different, more complicated API than
the other ones: allocationFn, memCpyFn, castFn. All three are called via
"helper" functions that check whether the hooks are set to call them and
fall back to default implementations otherwise.
Other hooks (e.g. unknownTypeConverterFn) in the bufferization options
have a different "API": they are always set to some default
implementation and can be overwritten by the user. This is a simpler API
overall and seems it can be universal.
Note for LLVM integration: BufferizationOptions::{createAlloc,
createMemCpy, createCast} functions are "replaced" with direct calls to
the underlying std::function objects. At any call-site that relied on
any of the removed APIs, a call to the respective hook should now be
used instead. The exception is the `allocationFn` hook which needs an
explicit "bufferAlignment" parameter. Beforehand, it was implicitly
taken from BufferizationOptions::bufferAlignment field, so a
non-functional migration path is to go from
`options.createAlloc(builder, loc, destType, value)` to
`options.allocationFn(builder, loc, destType, value,
options.bufferAlignment)`.
Commit: 8f7019acdd29270a0a51006a6cbdb43d6844dd20
https://github.com/llvm/llvm-project/commit/8f7019acdd29270a0a51006a6cbdb43d6844dd20
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/test/AST/ByteCode/typeid.cpp
Log Message:
-----------
[clang][bytecode] Fix getting typeid pointers of struct fields (#207946)
`getDeclPtr()` will return the declaration pointer, which might be
unrelated to the pointer we actually care about.
Commit: f8defb1033fefe4a62e2f71540e3bea16c20e09f
https://github.com/llvm/llvm-project/commit/f8defb1033fefe4a62e2f71540e3bea16c20e09f
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
Log Message:
-----------
[NFC][SPIRV] Remove dead helper `buildOpMemberDecorate(Register, MachineInstr &, ...)` (#207952)
Another dead helper.
Commit: b4c4fd9ee380b00000ab3fd6e71f9a8c807fb96a
https://github.com/llvm/llvm-project/commit/b4c4fd9ee380b00000ab3fd6e71f9a8c807fb96a
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
Log Message:
-----------
[NFC][SPIRV] Make `getVacantFunctionName` static (#207954)
The function is only used inside `SPIRVUtils.cpp`.
Commit: 12c36c7abb1600638d976258c1c0d3517df59226
https://github.com/llvm/llvm-project/commit/12c36c7abb1600638d976258c1c0d3517df59226
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/hdr/CMakeLists.txt
A libc/hdr/net_if_macros.h
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/struct_ifreq.h
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-macros/CMakeLists.txt
M libc/include/llvm-libc-macros/linux/CMakeLists.txt
A libc/include/llvm-libc-macros/linux/net-if-macros.h
A libc/include/llvm-libc-macros/net-if-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/struct_ifreq.h
A libc/include/net/if.yaml
M libc/src/CMakeLists.txt
A libc/src/net/CMakeLists.txt
A libc/src/net/if_indextoname.h
A libc/src/net/if_nametoindex.h
A libc/src/net/linux/CMakeLists.txt
A libc/src/net/linux/if_indextoname.cpp
A libc/src/net/linux/if_nametoindex.cpp
M libc/test/src/CMakeLists.txt
A libc/test/src/net/CMakeLists.txt
A libc/test/src/net/linux/CMakeLists.txt
A libc/test/src/net/linux/if_indextoname_test.cpp
A libc/test/src/net/linux/if_nametoindex_test.cpp
Log Message:
-----------
[libc] Implement if_nametoindex and if_indextoname (#206082)
This patch implements if_nametoindex and if_indextoname for Linux.
Both functions work by creating a temporary AF_UNIX socket and issuing
ioctl calls (SIOCGIFINDEX and SIOCGIFNAME, respectively).
The main implementation details:
- for if_nametoindex, I check that the interface name fits within
IF_NAMESIZE before issuing the ioctl
- for if_indextoname, if the kernel returns ENODEV for an unknown index,
I map it to ENXIO to comply with POSIX requirements
- added the definition of struct ifreq to support these operations.
Similar to the other net structure definitions, I'm using an anonymous
union to avoid #defining members.
Assisted by Gemini.
Commit: 149e219bf87f31f0a209037e52b0412d0e8cb5a8
https://github.com/llvm/llvm-project/commit/149e219bf87f31f0a209037e52b0412d0e8cb5a8
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/test/AST/ByteCode/cxx2a.cpp
Log Message:
-----------
[clang][bytecode] Add more checks for pseudo dtors (#207959)
Rename the `EndLifetimePop` op (which was only used for pseudo dtors) to
`PseudoDtor` and call `checkDestructor()` in there, so we get the full
suite of checks.
Commit: 5506a59c7ff2a3a066d1ec6c3fb0ce69754923d4
https://github.com/llvm/llvm-project/commit/5506a59c7ff2a3a066d1ec6c3fb0ce69754923d4
Author: fengfeng <153487255+fengfeng09 at users.noreply.github.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/StraightLineStrengthReduce.cpp
M llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
M llvm/test/CodeGen/AMDGPU/barrier-signal-wait-latency.ll
M llvm/test/Transforms/StraightLineStrengthReduce/NVPTX/slsr-var-delta.ll
A llvm/test/Transforms/StraightLineStrengthReduce/slsr-gep-sext-wrap.ll
Log Message:
-----------
[SLSR] Fix slsr gep stride delta miscompile (#204278)
Signed-off-by: feng.feng <feng.feng at iluvatar.com>
Commit: 132aa1fcb68f5bedc9e15d47a2d90b06ebf7727b
https://github.com/llvm/llvm-project/commit/132aa1fcb68f5bedc9e15d47a2d90b06ebf7727b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUBarrierLatency.cpp
M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.cpp
M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.h
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCKernelDescriptor.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/test/CodeGen/AMDGPU/lds-dma-workgroup-release.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-av-none.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-fence-mmra-global.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-fence-mmra-local.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-fence.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-workgroup.ll
M llvm/test/CodeGen/AMDGPU/schedule-barrier-latency-gfx9.mir
M llvm/test/CodeGen/AMDGPU/tgsplit.ll
M llvm/test/MC/AMDGPU/hsa-tg-split.s
Log Message:
-----------
AMDGPU: Replace tgsplit subtarget feature with attribute (#204216)
This is a per-entrypoint property and has a corresponding
assembler directive, so it should not be baked into the
subtarget. I couldn't find much documentation on what this
actually does, so the description isn't great.
Fixes #204149
Co-authored-by: Claude Opus 4.6 <noreply at anthropic.com>
Commit: 8c97a2edd20343c7729f76f7b119e024eb6530cc
https://github.com/llvm/llvm-project/commit/8c97a2edd20343c7729f76f7b119e024eb6530cc
Author: Wenju He <wenju.he at intel.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/lib/Serialization/ASTReaderDecl.cpp
A clang/test/PCH/dllexport-ctor-closure-copy.cpp
Log Message:
-----------
[Clang] Fix null-pointer assertion reading CtorClosureDefaultArgs (#207917)
BuildCtorClosureDefaultArgs deliberately leaves the first default-arg
slot null for MS ABI copy-constructor closures (the closure itself
supplies that argument), and ASTWriterDecl.cpp serializes the null. But
e7924d50db0a deserialized it with cast<>, which asserts on null. This
only triggers under the MS C++ ABI, e.g. when throwing a class with a
non-trivial copy constructor by value across a PCH boundary, as in test
https://github.com/intel/llvm/blob/cb9b7b7/clang-tools-extra/clangd/test/sycl.test
Assisted by: Claude
Commit: e16f4895b18d4bac812326416dbb774d5b4162ad
https://github.com/llvm/llvm-project/commit/e16f4895b18d4bac812326416dbb774d5b4162ad
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
A llvm/test/CodeGen/SPIRV/malformed-mangled-builtin-name.ll
Log Message:
-----------
[SPIR-V] Avoid crash on malformed mangled builtin name length (#207939)
Replace the assert on invalid length parsing with a graceful bail-out
since malformed names can potentially come from outside, it is not
necessarily always an error
All usages of `getOclOrSpirvBuiltinDemangledName` are being checked for
emptiness where it is needed anyway
Commit: d8a9bfb0b39d2d331bd6e587016c779552caaffc
https://github.com/llvm/llvm-project/commit/d8a9bfb0b39d2d331bd6e587016c779552caaffc
Author: ayrai-gb <ayrai at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86AsmPrinter.cpp
M llvm/test/CodeGen/X86/asm-modifier.ll
Log Message:
-----------
[X86] Fix inline asm modifier printing across dialects (#204558)
X86AsmPrinter handles several inline asm operand modifiers differently
depending on whether the asm block uses AT&T or Intel syntax.
For `%a` and `%A`, the scalar/register operand path used AT&T
punctuation unconditionally. In Intel-dialect inline asm this could
print invalid forms such as `(rdi)` for an address operand or `*rdi` for
an indirect call operand.
For `%P`, `PrintAsmMemoryOperand` passed `"disp-only"` to both the Intel
and AT&T memory printers, but only the Intel path honored it for
global/symbol displacements with a base register. The AT&T path could
therefore print `g(%rdi)` even though `%P` requested displacement-only
output.
Make the affected X86 asm-printer paths dialect-aware/consistent:
- print Intel `%a` register operands as `[reg]`
- print Intel `%A` register operands without AT&T `*`
- make AT&T `%P` honor `"disp-only"` for global/symbol displacements,
matching the existing Intel behavior
Found via @jlebar's X86 LLVM bug-hunt / FuzzX effort.
cc @jlebar
Co-authored-by: Ayush Rai <your-email at amd.com>
Commit: 670c3c0adc6487654d0fd857e6666fe5576f5a68
https://github.com/llvm/llvm-project/commit/670c3c0adc6487654d0fd857e6666fe5576f5a68
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M orc-rt/CMakeLists.txt
Log Message:
-----------
[orc-rt] Fix indentation in CMakeLists.txt. NFC. (#207980)
Commit: 17d7bf22294173609c3a711a223713780055ed66
https://github.com/llvm/llvm-project/commit/17d7bf22294173609c3a711a223713780055ed66
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
Log Message:
-----------
[clang][bytecode] Try to avoid temporaries in (compound) assignments (#207652)
This is only needed if the RHS has side-effects. If we can easily and
cheaply prove that it doesn't, avoid the temporary variable. This saves
memory and is slightly faster.
Commit: 7cb8692cc1455e983bdd7312d3bcc2f2f5222760
https://github.com/llvm/llvm-project/commit/7cb8692cc1455e983bdd7312d3bcc2f2f5222760
Author: Gaëtan Bossu <gaetan.bossu at arm.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
A llvm/test/CodeGen/AArch64/sve2-mull-acc.ll
Log Message:
-----------
[AArch64] Select SVE2 multiply-add long from mull and add/sub (#207951)
Both multiple-add long and multiple long are part of SVE2.
Commit: e0093262487e101d3c13773bf313cd3641544cd8
https://github.com/llvm/llvm-project/commit/e0093262487e101d3c13773bf313cd3641544cd8
Author: AZero13 <gfunni234 at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/ARM/ARMInstrThumb2.td
M llvm/test/CodeGen/ARM/atomic-ops-v8.ll
A llvm/test/CodeGen/ARM/cmn-shift.ll
M llvm/test/CodeGen/ARM/cmp-peephole.ll
M llvm/test/CodeGen/ARM/umulo-32.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/reductions.ll
Log Message:
-----------
[ARM] Swap sides of cmp/cmn based on folding ability (#191915)
If we can fold lsl, lsr, rotr, or asr into the right side of the
compare, we should do so.
Commit: 9588dfe546b81a76a79c571ca0740cab494ff707
https://github.com/llvm/llvm-project/commit/9588dfe546b81a76a79c571ca0740cab494ff707
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Transforms/InstCombine/select-abs-positive-mul.ll
Log Message:
-----------
[InstCombine] Recognize abs through positive-K nsw multiply. (#207539)
Generalize matchSelectPattern to also consider multiplies that do not
change sign when trying to from llvm.abs.
End-to-end, this allows vectorizing with narrower element types for code
such as below. This triggers in some ffmpeg kernels on AArch64.
```
void scaled_absdiff_u8(uint8_t * __restrict out,
const uint8_t * __restrict a,
const uint8_t * __restrict b,
size_t n) {
for (size_t i = 0; i < n; ++i) {
int32_t d = 4 * ((int32_t)a[i] - (int32_t)b[i]);
if (d < 0) d = -d;
if (d > 255) d = 255;
out[i] = (uint8_t)d;
}
}
```
Alive2 proof:
* Mul - https://alive2.llvm.org/ce/z/pGYQ36
* Shl - https://alive2.llvm.org/ce/z/WBU2mw
PR: https://github.com/llvm/llvm-project/pull/207539
Commit: 0d9f3f41d6a45e0673c04a01e64d24a76ccffe60
https://github.com/llvm/llvm-project/commit/0d9f3f41d6a45e0673c04a01e64d24a76ccffe60
Author: David Truby <david.truby at arm.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M openmp/runtime/cmake/arm64x.cmake
M openmp/runtime/src/CMakeLists.txt
Log Message:
-----------
[openmp][arm64ec] Fix arm64x when PER_TARGET_RUNTIME_DIR=On (#207747)
This patch fixes an issue where the combination of LIBOMP_ENABLE_ARM64X
and LLVM_PER_TARGET_RUNTIME_DIR=On led to only the arm64 library being
installed. With this fix, the arm64ec and arm64 .lib files are both
installed, and the arm64x dll is the one installed to the binary dir.
Commit: 884d9277e89834a9a76a8891de6624c791e5ee08
https://github.com/llvm/llvm-project/commit/884d9277e89834a9a76a8891de6624c791e5ee08
Author: Hans Wennborg <hans at hanshq.net>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/docs/PDB/MsfFile.rst
Log Message:
-----------
[docs][pdb] Fix description of FileMagic (#207972)
There are no spaces around the slash:
https://github.com/microsoft/microsoft-pdb/blob/master/PDB/msf/msf.cpp#L962
Fixes #158492
Commit: d847e2f19b7dfb63c4f73fefcc69cf328b9c18d7
https://github.com/llvm/llvm-project/commit/d847e2f19b7dfb63c4f73fefcc69cf328b9c18d7
Author: Cyrus Ding <91178148+dingcyrus at users.noreply.github.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/include/clang/Basic/IdentifierTable.h
Log Message:
-----------
[Clang] Renumber TokenKey enum values to close gap left by KEYNOZOS removal (#207906)
The previous commit (#207132) removed the unused KEYNOZOS flag
(0x4000000) but left a gap between KEYZOS (0x2000000) and KEYHLSL
(0x8000000). This patch renumbers the subsequent TokenKey values to
close the gap:
KEYHLSL: 0x8000000 -> 0x4000000
KEYFIXEDPOINT: 0x10000000 -> 0x8000000
KEYDEFERTS: 0x20000000 -> 0x10000000
KEYNOHLSL: 0x40000000 -> 0x20000000
The ~0x4000000u exclusion in KEYALL and the associated reserved-bit
comment are removed, since the renumbering eliminates the orphaned bit.
This is a follow-up to #207132, as suggested by @perry-ca.
AI assistance was used for code review analysis and CI failure
debugging.
Co-authored-by: Chenguang Ding <dingchenguang at kylinos.cn>
Commit: 91578461e8a112941afeed18679efb168b81f796
https://github.com/llvm/llvm-project/commit/91578461e8a112941afeed18679efb168b81f796
Author: Mikołaj Piróg <mikolaj.maciej.pirog at intel.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/CodeGen/TargetBuiltins/X86.cpp
A clang/test/CodeGen/builtin-cpu-is-cputype.c
A clang/test/CodeGen/builtin-cpu-is-subtype.c
A clang/test/CodeGen/builtin-cpu-is-vendor.c
R clang/test/CodeGen/builtin-cpu-is.c
A clang/test/CodeGen/builtin-cpu-supports-all.c
M compiler-rt/lib/builtins/cpu_model/x86.c
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/include/llvm/TargetParser/X86TargetParser.h
M llvm/lib/TargetParser/X86TargetParser.cpp
Log Message:
-----------
[X86] Sync compiler-rt cpu subtypes and vendors with libgcc and refactor internal cpu type tables in LLVM (#171172)
This is a continuation of previous PR:
https://github.com/llvm/llvm-project/pull/168750
compiler-rt was synced with libgcc on ProcessorVendor and
ProcessorSubtype fields and so was llvm. Cpu type, subtype and vendor
entries in X86TargetParser.def were refactored to use ABI_VALUE.
LLVM doesn't set the ABI_VALUE for its enums -- clang now takes care of
that by reading the ABI_VALUE.
I've removed and added some comments to better explain what is going on.
While at it, I've added tests to check that right values are passed for
vendor, subtypes, types and features (the last ones weren't added in
feature sync PR: https://github.com/llvm/llvm-project/pull/168750)
Parts of the PR (test) have been realized using Claude Code
Commit: 5343b204252d7bf5bdfcacd664e78e9f7f9fd745
https://github.com/llvm/llvm-project/commit/5343b204252d7bf5bdfcacd664e78e9f7f9fd745
Author: Martin Storsjö <martin at martin.st>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M libcxxabi/src/CMakeLists.txt
Log Message:
-----------
[libcxxabi] Don't enable -fvisibility=hidden on Windows (#207943)
This option is supported (and hence gets added by the
target_add_compile_flags_if_supported function) on Windows, but if using
dllexport, there's no point in using hidden visibility. (However if
building both static and shared libraries at the same time, it could be
beneficial to have hidden visibilty in the static libraries.)
In asserts enabled builds of Clang, building with -fvisibility=hidden
caused errors like this:
dllexport GlobalValue must have default or protected visibility
ptr @_ZTIv
[...]
fatal error: error in backend: Broken module found, compilation aborted!
Normally, combining -fvisibility=hidden with dllexport is not a problem,
but specifically for `__cxxabiv1:: __fundamental_type_info` it does make
Clang trigger an inconsistency, visible in asserts enabled builds of
Clang - see https://github.com/llvm/llvm-project/issues/207963.
This fixes Windows builds with Clang with asserts enabled, after
cb942d009a5ed029ce20d9b75b3604f551f0cb56.
Commit: 849d90b64e2a91892d45d2fa75f405fa075d3c3d
https://github.com/llvm/llvm-project/commit/849d90b64e2a91892d45d2fa75f405fa075d3c3d
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaType.cpp
M clang/test/C/C23/n3007.c
M clang/test/Parser/c2x-auto.c
Log Message:
-----------
[C23] Allow deducing restrict and _Atomic qualifiers (#207994)
We were limiting the logic to __auto_type when it should apply to auto
as well.
Fixes #207466
Commit: 980f51a9b264a836b1a145366f17cd1b6d843f7c
https://github.com/llvm/llvm-project/commit/980f51a9b264a836b1a145366f17cd1b6d843f7c
Author: Tomohiro Kashiwada <kikairoya at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonPostRAHandleQFP.cpp
Log Message:
-----------
[Hexagon] Don't use reserved identifiers (#207967)
All identifiers that begin with an underscore followed by a capital
letter or by another underscore are reserved.
Commit: 90dd76bf36f5d8c5ab4dccabee444229e461e7be
https://github.com/llvm/llvm-project/commit/90dd76bf36f5d8c5ab4dccabee444229e461e7be
Author: Barbara Mitic <bmitic at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/float-to-arbitrary-fp.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/idot8s.ll
M llvm/test/CodeGen/AMDGPU/idot8u.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.make.buffer.rsrc.ll
A llvm/test/CodeGen/AMDGPU/pack-half-to-lshl-or.ll
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll
Log Message:
-----------
[AMDGPU] Select the high-half 16-bit packing idiom to v_lshl_or_b32 (#206058)
The (hi << 16) | z high-half packing idiom is not fused by the existing
(or (shl x, y), z) selection. By the time it reaches ISel the DAG
combiner has rewritten (ext i16) << 16 into bitcast(build_vector (i16
0), hi), so there is no shl node left to match and the build_vector and
or are selected separately.
Add ISel patterns that match the build_vector form directly. On the
non-real-true16 path the high-half source is a VGPR_32, so fold into
v_lshl_or_b32. On the real-true16 path the high-half source is a VGPR_16
and 16-bit ops are native, so OR it into the high half of the other
operand with v_or_b16 and assemble the result with a REG_SEQUENCE.
Co-authored-by: Barbara Mitic <Barbara.Mitic at amd.com>
Commit: 0ac35389e9d47fb9aa2934cbfab274aa69d05317
https://github.com/llvm/llvm-project/commit/0ac35389e9d47fb9aa2934cbfab274aa69d05317
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/test/AST/ByteCode/cxx20.cpp
M clang/test/AST/ByteCode/cxx2a.cpp
M clang/test/CXX/dcl.decl/dcl.init/dcl.init.general/p16-cxx20.cpp
Log Message:
-----------
[clang][bytecode] Fix `getDynamicDecl()` wrt. multiple base classes (#207722)
The previous code did not consider that the base class we're getting
might not be on the path from `TypePtr` to `TypePtr.stripBaseCasts()` at
all, because of multiple bases.
Commit: 9f4c43747f86f29efa397ad7f172d21dee5ecbe1
https://github.com/llvm/llvm-project/commit/9f4c43747f86f29efa397ad7f172d21dee5ecbe1
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/invalid-addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/strict_fsub.f64.ll
Log Message:
-----------
[NFC][AMDGPU] Fix orphaned SDAG/GISEL check prefixes in tests (#207964)
Commit: 5db2a39854f32632fb406b1b25a4b0df4842630e
https://github.com/llvm/llvm-project/commit/5db2a39854f32632fb406b1b25a4b0df4842630e
Author: unexpectedlydefined <91391114+unexpectedlydefined at users.noreply.github.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/docs/CommandGuide/llvm-dwarfdump.rst
M llvm/test/tools/llvm-dwarfdump/X86/coverage.test
M llvm/tools/llvm-dwarfdump/CMakeLists.txt
M llvm/tools/llvm-dwarfdump/Coverage.cpp
M llvm/tools/llvm-dwarfdump/llvm-dwarfdump.cpp
M llvm/tools/llvm-dwarfdump/llvm-dwarfdump.h
Log Message:
-----------
Reapply: [llvm-dwarfdump][LineCov 3/3] Add IR analysis for variable coverage (#207974)
Reapplies 5f4940ef. The original patch caused failures on buildbots due to
adding uses of functions defined in LLVMCore and LLVMIRReader without
adding those libraries to the dwarfdump link components.
Patch 3 of 3 to add to llvm-dwarfdump the ability to measure DWARF
coverage of local variables in terms of source lines, as discussed in
this RFC:
https://discourse.llvm.org/t/rfc-debug-info-coverage-tool-v2/83266
This patch adds an IR-level analysis in order to more accurately compute
the defined ranges for each variable. This avoids the problem of the
more naïve approach relying on source scopes, which overcounts as
coverable those lines where the variable is not yet defined (e.g. stack
variables).
The IR analysis requires IR to be provided to llvm-dwarfdump as a
separate `--variable-coverage-bitcode-file` argument (either textual IR
or bitcode; can be produced by various means e.g. `--save-temps
--emit-llvm`, `-ffat-lto-objects`,
[wllvm](https://github.com/travitch/whole-program-llvm)). The
recommended way to obtain a whole-program bitcode file is to use wllvm
as follows:
```sh
$ export LLVM_COMPILER=clang
$ CC=wllvm make # build as usual, but replace clang/clang++ with wllvm/wllvm++
$ extract-bc binfile # produces binfile.bc, which can be passed to llvm-dwarfdump
```
Commit: 17c9f2ea943cb65e1afd02d60c67f7928c9b36c2
https://github.com/llvm/llvm-project/commit/17c9f2ea943cb65e1afd02d60c67f7928c9b36c2
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/semanticly-same.ll
Log Message:
-----------
[SLP][NFC]Add a new test for fadd/fsub combination, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/208004
Commit: d1cd1de72a8f88c3b44c2eacb18146ffd3adee2e
https://github.com/llvm/llvm-project/commit/d1cd1de72a8f88c3b44c2eacb18146ffd3adee2e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
A llvm/test/CodeGen/X86/apx/peephole-fold-subreg-tied-copy.mir
Log Message:
-----------
X86: Fix mishandling subregisters in ndd memory fold (#207997)
Defends against regressions in a future change.
Commit: 3c7727f1269e5986915aacf4ee1ae117843bd573
https://github.com/llvm/llvm-project/commit/3c7727f1269e5986915aacf4ee1ae117843bd573
Author: Mikhail R. Gadelha <mikhail at igalia.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M libc/src/spawn/linux/CMakeLists.txt
M libc/src/spawn/linux/posix_spawn.cpp
Log Message:
-----------
[libc] Use the dup2 syscall wrapper in posix_spawn (#207879)
posix_spawn's local dup2 helper fell back to a bare dup3 on targets
without SYS_dup2. dup3 fails with EINVAL when oldfd == newfd, where dup2
must instead return oldfd if it is valid, so
posix_spawn_file_actions_adddup2 with equal fds misbehaved on those
targets. linux_syscalls::dup2 already implements the correct fallback,
so call it directly and drop the local helper.
Commit: e16c737a52fa9c5144299282f4da519e898af2a5
https://github.com/llvm/llvm-project/commit/e16c737a52fa9c5144299282f4da519e898af2a5
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
A llvm/test/CodeGen/SPIRV/instructions/phi-aggregate-call.ll
A llvm/test/CodeGen/SPIRV/instructions/phi-aggregate-with-overflow-zeroinitializer.ll
A llvm/test/CodeGen/SPIRV/instructions/phi-aggregate-with-overflow.ll
A llvm/test/CodeGen/SPIRV/instructions/select-freeze-aggregate-with-overflow.ll
Log Message:
-----------
[SPIRV] Expand aggregate instructions with mutated-type uses (#206835)
This is a workaround for the problem in GH issue
https://github.com/llvm/llvm-project/issues/203586.
The problem is that we need to mutate aggregate-typed PHI nodes to
`i32`, however that means all incoming values need to have a matching
type, but we can't always easily mutate the incoming types to i32, as in
the case in the GH issue with a math intrinsic that returns a struct
by-value.
We do the same mutation for some other cases like `freeze`, the
workaround is the same.
The workaround is to expand the incoming values to a form that will also
be mutated to i32 so the types match. An example transformation is
below:
Before
```
...
bb1: ; preds = %entry
%0 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %a, i64 %b)
br label %epilog
...
%2 = phi { i64, i1 } [ %1, %bb0 ], [ %0, %bb1 ]
```
After
```
...
bb1: ; preds = %entry
%0 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %a, i64 %b)
%1 = extractvalue { i64, i1 } %0, 0
%2 = insertvalue { i64, i1 } poison, i64 %1, 0
%3 = extractvalue { i64, i1 } %0, 1
%4 = insertvalue { i64, i1 } %2, i1 %3, 1
br label %epilog
...
%10 = phi { i64, i1 } [ %9, %bb0 ], [ %4, %bb1 ]
```
`insertvalue` get replaced with a SPIR-V intrinsic later in the pass
which is also type-mutated, so the IR is correct:
```
...
bb1: ; preds = %entry
%0 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %a, i64 %b)
call void @llvm.spv.value.md(metadata !0)
call void (...) @llvm.fake.use({ i64, i1 } %0)
%1 = extractvalue { i64, i1 } %0, 0
call void @llvm.spv.assign.type.i64(i64 %1, metadata i64 poison)
call void @llvm.spv.assign.type.i32(i32 undef, metadata { i64, i1 } poison)
%2 = call i32 (i32, i64, ...) @llvm.spv.insertv.i64(i32 undef, i64 %1, i32 0)
call void @llvm.spv.assign.type.i32(i32 %2, metadata { i64, i1 } poison)
%3 = extractvalue { i64, i1 } %0, 1
call void @llvm.spv.assign.type.i1(i1 %3, metadata i1 poison)
%4 = call i32 (i32, i1, ...) @llvm.spv.insertv.i1(i32 %2, i1 %3, i32 1)
call void @llvm.spv.assign.type.i32(i32 %4, metadata { i64, i1 } poison)
br label %epilog
...
%10 = phi i32 [ %9, %bb0 ], [ %4, %bb1 ]
```
This is the simplest change I could come up with, my other ideas were
much more complicated and/or risky.
This fix is important for us because this pattern comes up in libc's
implementation on FMA, so this is blocking SPIR-V libc support.
Fixes: https://github.com/llvm/llvm-project/issues/203586
Co-Authored-By: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
Co-authored-by: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
Commit: cb668bb3632d06bbcd736ec8999811c8b6b06dd5
https://github.com/llvm/llvm-project/commit/cb668bb3632d06bbcd736ec8999811c8b6b06dd5
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
A llvm/test/CodeGen/SPIRV/capability-Int64Atomics-weak-cmpxchg.ll
Log Message:
-----------
[SPIR-V] Add missing Int64Atomics requirement for OpAtomicCompareExchangeWeak (#207965)
Commit: 250a554f05e54f2bf4f2c2ba736ed2e06429aba2
https://github.com/llvm/llvm-project/commit/250a554f05e54f2bf4f2c2ba736ed2e06429aba2
Author: Matthew Devereau <matthew.devereau at arm.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
A llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-opts-cmpeq.ll
Log Message:
-----------
[AArch64][InstCombine] Fold xor(cmpeq, pg) to cmpne (#207759)
Extend the existing xor(cmpne(pg, lhs, rhs), pg) fold to also handle
cmpeq to cmpne
Commit: 999b3cfbe21747aa952f79814e7dfd1a7b3fd891
https://github.com/llvm/llvm-project/commit/999b3cfbe21747aa952f79814e7dfd1a7b3fd891
Author: Ankit Kumar Tiwari <141545455+ankit-cybertron at users.noreply.github.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/RISCV/rvv/fold-binary-reduce.ll
A llvm/test/CodeGen/RISCV/rvv/vecreduce-add-constant-fold.ll
Log Message:
-----------
[SelectionDAG] Fold VECREDUCE_ADD of a constant BUILD_VECTOR (#207560)
This PR implements constant folding for ISD::VECREDUCE_ADD when the
input is a BUILD_VECTOR of integer constants. The fold computes the sum
at compile time using APInt arithmetic and returns a folded constant
scalar, instead of emitting real vector materialization and reduction
instructions for a value that's already known.
Folding is skipped if any element is undef or opaque, since the result
can't be assumed at compile time in that case.
Fixes #206743
Commit: 047b145c0cfe2ebcf73694f0ab39a0fc11dc9d09
https://github.com/llvm/llvm-project/commit/047b145c0cfe2ebcf73694f0ab39a0fc11dc9d09
Author: hulxv <hulxxv at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M libc/shared/builtins.h
A libc/shared/builtins/mulsf3.h
M libc/src/__support/builtins/CMakeLists.txt
A libc/src/__support/builtins/mulsf3.h
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_builtins_test.cpp
Log Message:
-----------
[libc] add shared mulsf3 builtin (#205678)
Re-exposes LLVM-libc's `__mulsf3` as `shared::mulsf3` for reuse by
compiler-rt's builtins.
Stacked change - merge these first:
- #200094
- #205669
- #205670
- #205671
- #205672
- #205673
- #205674
- #205675
- #205676
- #205677
Part of #197824
Commit: 2f7a3a032cb0ff5347135c59914733fc04b20d35
https://github.com/llvm/llvm-project/commit/2f7a3a032cb0ff5347135c59914733fc04b20d35
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/signed_arithmetic_overflow.ll
Log Message:
-----------
[SPIR-V] Fix crash on direct aggregate return of an intrinsic call result (#206491)
Commit: 012523d96b30a9a6d7148825fe307919a9c4753c
https://github.com/llvm/llvm-project/commit/012523d96b30a9a6d7148825fe307919a9c4753c
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/VPlan/constant-fold.ll
Log Message:
-----------
[VPlan] Support VPInstruction for intrinsic calls in live-in folding. (#207836)
Use getIntrinsicID in getOpcodeOrIntrinsicID. This enables constant
folding for VPInstructions calling intrinsics.
PR: https://github.com/llvm/llvm-project/pull/207836
Commit: 3a6d3f77960b4dded18d15e28eaa3f953be18faa
https://github.com/llvm/llvm-project/commit/3a6d3f77960b4dded18d15e28eaa3f953be18faa
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
[mlir][LLVM] Add arithmetic fence intrinsic op (#207975)
Add a generated LLVM dialect op for llvm.arithmetic.fence, including
LLVM IR import and export coverage for scalar and vector floating-point
forms.
Assisted-by: Codex
Commit: 43ccdbc84774da0ae4cb5131f2245a9633d977b9
https://github.com/llvm/llvm-project/commit/43ccdbc84774da0ae4cb5131f2245a9633d977b9
Author: Scott Manley <rscottmanley at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/FIRToSCF.cpp
M flang/test/Fir/FirToSCF/do-loop.fir
Log Message:
-----------
[FIRToSCF] propagate acc.par_dims during fir.do_loop conversion (#207973)
Copy any OpenACC parallel dimensions from the fir.do_loop to the scf op
Commit: 35db7fd565138b4756193b36750f052e27359baf
https://github.com/llvm/llvm-project/commit/35db7fd565138b4756193b36750f052e27359baf
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/addo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_optimizations_mul_one.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmin.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_udec_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bitcast_38_i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fabs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch-init.gfx.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fma.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fneg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpext.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/implicit-kernarg-backend-usage-global-isel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-copy-scc-vcc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-global-value.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2darraymsaa.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.store.2d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.atomic.cmpxchg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-unaligned.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-uniform-in-vgpr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mad.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mubuf-global.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/or.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbanklegalize-amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/subo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/widen-i8-i16-scalar-loads.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-imm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-imm.ll
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomic-cmpxchg.ll
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/a-v-global-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/abi-attribute-hints-undefined-behavior.ll
M llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir
M llvm/test/CodeGen/AMDGPU/add.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-vgprs.mir
M llvm/test/CodeGen/AMDGPU/agpr-copy-reuse-writes.mir
M llvm/test/CodeGen/AMDGPU/agpr-copy-sgpr-no-vgprs.mir
M llvm/test/CodeGen/AMDGPU/agpr-csr.ll
M llvm/test/CodeGen/AMDGPU/always-uniform.ll
M llvm/test/CodeGen/AMDGPU/amd.endpgm.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.ptr.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/and.ll
M llvm/test/CodeGen/AMDGPU/andorn2.ll
M llvm/test/CodeGen/AMDGPU/any_extend_vector_inreg.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw_usub_cond.ll
M llvm/test/CodeGen/AMDGPU/av-split-dead-valno-crash.ll
M llvm/test/CodeGen/AMDGPU/bfi_int.ll
M llvm/test/CodeGen/AMDGPU/bitreverse.ll
M llvm/test/CodeGen/AMDGPU/blender-no-live-segment-at-def-implicit-def.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-usub_cond.ll
M llvm/test/CodeGen/AMDGPU/buffer-rsrc-ptr-ops.ll
M llvm/test/CodeGen/AMDGPU/build_vector.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/cluster_stores.ll
M llvm/test/CodeGen/AMDGPU/codegen-prepare-addrspacecast-non-null.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/copy-overlap-sgpr-kill.mir
M llvm/test/CodeGen/AMDGPU/copy-overlap-vgpr-kill.mir
M llvm/test/CodeGen/AMDGPU/copy-phys-reg-implicit-operand-kills-subregs.mir
M llvm/test/CodeGen/AMDGPU/copy_phys_vgpr64.mir
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_poison.ll
M llvm/test/CodeGen/AMDGPU/ctpop64.ll
M llvm/test/CodeGen/AMDGPU/cttz.ll
M llvm/test/CodeGen/AMDGPU/cttz_zero_poison.ll
M llvm/test/CodeGen/AMDGPU/d16-write-vgpr32.ll
M llvm/test/CodeGen/AMDGPU/dag-divergence.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/ds_read2.ll
M llvm/test/CodeGen/AMDGPU/ds_write2.ll
M llvm/test/CodeGen/AMDGPU/ds_write2_a_v.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i8.ll
M llvm/test/CodeGen/AMDGPU/fabs.bf16.ll
M llvm/test/CodeGen/AMDGPU/fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fabs.ll
M llvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.global.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
M llvm/test/CodeGen/AMDGPU/fceil64.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f64.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.ll
M llvm/test/CodeGen/AMDGPU/fence-lds-read2-write2.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_noprivate.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system_noprivate.ll
M llvm/test/CodeGen/AMDGPU/fmaximum.ll
M llvm/test/CodeGen/AMDGPU/fmaxnum.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fminimum.ll
M llvm/test/CodeGen/AMDGPU/fminnum.ll
M llvm/test/CodeGen/AMDGPU/fmul-2-combine-multi-use.ll
M llvm/test/CodeGen/AMDGPU/fnearbyint.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.new.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.bf16.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.f64.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.ll
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
M llvm/test/CodeGen/AMDGPU/fneg.bf16.ll
M llvm/test/CodeGen/AMDGPU/fneg.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx942.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/fshl.ll
M llvm/test/CodeGen/AMDGPU/fshr.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global_atomics.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/half.ll
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
M llvm/test/CodeGen/AMDGPU/implicit-kernarg-backend-usage.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-merge.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
M llvm/test/CodeGen/AMDGPU/issue130120-eliminate-frame-index.ll
M llvm/test/CodeGen/AMDGPU/itofp.i128.ll
M llvm/test/CodeGen/AMDGPU/kernel-args.ll
M llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.av.load.b128.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.av.store.b128.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bvh8_intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scale.pk.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dead.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.bpermute.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dual_intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.simple.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.d16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.inverse.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx942.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.pops.exiting.wave.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.quadmask.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.and.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.max.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.or.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx11.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx12.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sendmsg.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imm.gfx1250.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imm.gfx1251.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/load-global-f32.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
M llvm/test/CodeGen/AMDGPU/load-global-i8.ll
M llvm/test/CodeGen/AMDGPU/load-select-ptr.ll
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-hsa.ll
M llvm/test/CodeGen/AMDGPU/mad_64_32.ll
M llvm/test/CodeGen/AMDGPU/max-hard-clause-length.ll
M llvm/test/CodeGen/AMDGPU/memcpy-crash-issue63986.ll
M llvm/test/CodeGen/AMDGPU/memcpy-libcall.ll
M llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
M llvm/test/CodeGen/AMDGPU/memmove-var-size.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-single-wave-workgroup-memops.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-store-infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/memory_clause.ll
M llvm/test/CodeGen/AMDGPU/memset-pattern.ll
M llvm/test/CodeGen/AMDGPU/mfma-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-loop.ll
M llvm/test/CodeGen/AMDGPU/min.ll
M llvm/test/CodeGen/AMDGPU/module-lds-false-sharing.ll
M llvm/test/CodeGen/AMDGPU/no-folding-imm-to-inst-with-fi.ll
M llvm/test/CodeGen/AMDGPU/optimize-negated-cond.ll
M llvm/test/CodeGen/AMDGPU/or.ll
M llvm/test/CodeGen/AMDGPU/packed-fp64.ll
M llvm/test/CodeGen/AMDGPU/packed-u64.ll
M llvm/test/CodeGen/AMDGPU/pal-simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-vector-dynamic-idx-bitcasts-llc.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/ptradd-sdag.ll
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/AMDGPU/rotl.ll
M llvm/test/CodeGen/AMDGPU/rotr.ll
M llvm/test/CodeGen/AMDGPU/sad.ll
M llvm/test/CodeGen/AMDGPU/saddo.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/AMDGPU/sgpr-phys-copy.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill-update-only-slot-indexes.ll
M llvm/test/CodeGen/AMDGPU/shift-and-i128-ubfe.ll
M llvm/test/CodeGen/AMDGPU/shift-and-i64-ubfe.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
M llvm/test/CodeGen/AMDGPU/sign_extend.ll
M llvm/test/CodeGen/AMDGPU/siloadstoreopt-misaligned-regsequence.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/smfmac_no_agprs.ll
M llvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll
M llvm/test/CodeGen/AMDGPU/spill-agpr.ll
M llvm/test/CodeGen/AMDGPU/spill-scavenge-offset.ll
M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask-phi-extend.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/ssubo.ll
M llvm/test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll
M llvm/test/CodeGen/AMDGPU/stacksave_stackrestore.ll
M llvm/test/CodeGen/AMDGPU/store-local.128.ll
M llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll
M llvm/test/CodeGen/AMDGPU/structurize-hoist.ll
M llvm/test/CodeGen/AMDGPU/sub.ll
M llvm/test/CodeGen/AMDGPU/subreg-coalescer-undef-use.ll
M llvm/test/CodeGen/AMDGPU/swdev380865.ll
M llvm/test/CodeGen/AMDGPU/trap-abis.ll
M llvm/test/CodeGen/AMDGPU/trunc.ll
M llvm/test/CodeGen/AMDGPU/uaddo.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/udivrem.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/umin-sub-to-usubo-select-combine.ll
M llvm/test/CodeGen/AMDGPU/unspill-vgpr-after-rewrite-vgpr-mfma.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/usubo.ll
M llvm/test/CodeGen/AMDGPU/v_cndmask.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
M llvm/test/CodeGen/AMDGPU/valu-i1.ll
M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
M llvm/test/CodeGen/AMDGPU/vgpr-mark-last-scratch-load.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
M llvm/test/CodeGen/AMDGPU/wqm.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
M llvm/test/CodeGen/AMDGPU/xor.ll
Log Message:
-----------
[AMDGPU] Stop adding implicit def of superreg in copyPhysReg (#125255)
Previously when copyPhysReg expanded a COPY into multiple MOV
instructions it added an implicit def of the destination superreg to the
first MOV. Removing these does not cause any liveness verification
problems and still passes Vulkan CTS for correctness testing.
Commit: 863be135eb5261fc85007492a5f26de926802a81
https://github.com/llvm/llvm-project/commit/863be135eb5261fc85007492a5f26de926802a81
Author: Simon Tatham <simon.tatham at arm.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M libc/src/stdio/printf_core/float_hex_converter.h
Log Message:
-----------
[libc] Fix build failure with ASSUME_ROUND_NEAREST_ONLY (#207991)
Commit 03c62ca40d19ba0 moved some local variables of
`convert_float_hex_exp` into a struct called `properties`, but didn't
edit the #ifdef branch for `LIBC_MATH_HAS_ASSUME_ROUND_NEAREST_ONLY`, so
builds with that definition failed.
Commit: 5ee85101a70dd2628d5b65a6a8a1e5d697d6c757
https://github.com/llvm/llvm-project/commit/5ee85101a70dd2628d5b65a6a8a1e5d697d6c757
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/mul-shl-nsw-intmin.ll
Log Message:
-----------
[SLP][NFC]Add tests with mul to shl transformations, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/208020
Commit: 31fc40b0904861d33b926dfd6ea04432e7690c49
https://github.com/llvm/llvm-project/commit/31fc40b0904861d33b926dfd6ea04432e7690c49
Author: Benjamin Luke <benjamin.luke at sony.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/CodeGen/Targets/X86.cpp
M clang/test/CodeGen/X86/mmx-inline-asm-error.c
A clang/test/CodeGen/target-avx-abi-diag-knr.c
M clang/test/CodeGen/target-builtin-error-3.c
M clang/test/CodeGen/target-features-error-2.c
A clang/test/CodeGenCXX/target-avx-abi-diag.cpp
M libcxx/include/__algorithm/simd_utils.h
Log Message:
-----------
[clang][X86] Emit AVX level mismatch psABI warnings on function definitions (#199091)
Emit -WpsABI for x86_64 function definitions whose return type or
parameter type uses a vector wider than 128 bits without the required
ABI feature enabled. 256-bit vectors require avx, and 512-bit vectors
require avx512f.
Previously this diagnostic was only emitted at call sites, so
definitions with wide vector signatures could be introduced without a
warning until they were called. Use the function feature map so
attribute(target("avx/avx512f")) definitions are accepted, and emit no
warnings for prototype-only declarations.
Commit: e702ecb84930e1d7d8ed1869c713566de2262a63
https://github.com/llvm/llvm-project/commit/e702ecb84930e1d7d8ed1869c713566de2262a63
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
R llvm/test/Transforms/SLPVectorizer/X86/mul-shl-nsw-intmin.ll
Log Message:
-----------
Revert "[SLP][NFC]Add tests with mul to shl transformations, NFC"
This reverts commit 5ee85101a70dd2628d5b65a6a8a1e5d697d6c757, incorrect
checks in the test
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/208022
Commit: e390e6b7a64353c72dbe1ff3f4bd3382412daca5
https://github.com/llvm/llvm-project/commit/e390e6b7a64353c72dbe1ff3f4bd3382412daca5
Author: sohail <sohailraj.satapathy at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M libc/docs/headers/stdfix.rst
R libc/src/stdfix/bitusk.cpp
M libc/test/src/stdfix/CMakeLists.txt
A libc/test/src/stdfix/IdivFxTest.h
R libc/test/src/stdfix/IdivTest.h
M libc/test/src/stdfix/idivk_test.cpp
M libc/test/src/stdfix/idivlk_test.cpp
M libc/test/src/stdfix/idivlr_test.cpp
M libc/test/src/stdfix/idivr_test.cpp
M libc/test/src/stdfix/idivuk_test.cpp
M libc/test/src/stdfix/idivulk_test.cpp
M libc/test/src/stdfix/idivulr_test.cpp
M libc/test/src/stdfix/idivur_test.cpp
Log Message:
-----------
[libc][stdfix] Fix idiv* doc table, rename idivfx test helpers and remove duplicate bitsuk source (#206729)
Two small cleanups in libc/src/stdfix.
1. `idiv*` in `stdfix.rst` was marked as implemented for all 12 type
variants but only the 8 non-short width variants (ur, r, ulr, lr, uk, k,
ulk, lk) exist in the directory and are built. Updated the table to
match.
2. Removed `bitusk.cpp` which is an orphaned duplicate of `bitsuk.cpp`
with a typo in the file name. It isn't referenced in the CMakeLists.txt
and has no corresponding .h file.
3. Rename the idivfx test header and helpers.
Commit: c1822d6104d7b2cb2093a5273d6ceccd9ebb2fb1
https://github.com/llvm/llvm-project/commit/c1822d6104d7b2cb2093a5273d6ceccd9ebb2fb1
Author: Yanzuo Liu <zwuis at outlook.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/lib/Sema/SemaCXXScopeSpec.cpp
Log Message:
-----------
[clang][Sema][NFC] Improve readability in `computeDeclContext` (#208010)
Split off from #190495.
Co-authored-by: Matheus Izvekov <mizvekov at gmail.com>
Commit: 93ff6992c68766a1def33a8a074f9bce544fc102
https://github.com/llvm/llvm-project/commit/93ff6992c68766a1def33a8a074f9bce544fc102
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/mul-shl-nsw-intmin.ll
Log Message:
-----------
[SLP][NFC]Add tests with mul to shl transformations, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/208027
Commit: cde011852d0b7d08c820f7d623655e5f354a50c8
https://github.com/llvm/llvm-project/commit/cde011852d0b7d08c820f7d623655e5f354a50c8
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/mul-shl-nsw-intmin.ll
Log Message:
-----------
[SLP] Drop nsw when mul by INT_MIN is converted to shl
mul nsw X, INT_MIN is valid, but shl X, BW-1 is not nsw-safe. Drop nsw on
the vector shl when a mul lane with INT_MIN is unified into shl during
opcode interchange.
Fixes #207990
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/208028
Commit: 94a8d4cbf13810e9f4fee03488312dee8869c074
https://github.com/llvm/llvm-project/commit/94a8d4cbf13810e9f4fee03488312dee8869c074
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
M llvm/test/CodeGen/AMDGPU/sched.barrier.inverted.mask.ll
Log Message:
-----------
[AMDGPU] Clear DS aggregate in inverted sched_barrier mask when LDSDMA allowed (#207779)
The DS clause was missing the LDSDMA check that the VMEM clause has
Commit: 6053d19eb3bc2391fcab76eb20a8ea0462568224
https://github.com/llvm/llvm-project/commit/6053d19eb3bc2391fcab76eb20a8ea0462568224
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/PhaseOrdering/X86/avg.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/long-non-power-of-2.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/partial-vec-invalid-cost.ll
M llvm/test/Transforms/SLPVectorizer/X86/bad-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-postpone-for-dependency.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-reused-with-bv-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/commutable-node-with-non-sched-parent.ll
M llvm/test/Transforms/SLPVectorizer/X86/debug-info-salvage.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-power-of-2-subvectors-insert.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-parent-multi-copyables.ll
M llvm/test/Transforms/SLPVectorizer/X86/recalc-copyable-operand-deps-shared-inst.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-ordered-values-update.ll
Log Message:
-----------
[SLP] Retune look-ahead scores for constants
Rescale LookAheadHeuristics scores and add ScoreSameConstants /
ScoreConstantScaleFactor so identical constants no longer score the
same as same-opcode instruction matches, fixing suboptimal operand
reordering around repeated constants (shift amounts, splat values).
Also retry a SplitVectorize alt-shuffle build for copyable-element
bundles when scheduling fails, instead of always falling back to a
gather, to fix regressions.
Reviewers: hiraditya, bababuck, RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/207548
Commit: a00f7be392d9468779af59d86bed12d17aa578c0
https://github.com/llvm/llvm-project/commit/a00f7be392d9468779af59d86bed12d17aa578c0
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SLPVectorizer.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll
M llvm/test/Transforms/SLPVectorizer/X86/c-ray.ll
M llvm/test/Transforms/SLPVectorizer/X86/delayed-gather-emission.ll
M llvm/test/Transforms/SLPVectorizer/X86/poor-throughput-seeds.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction2.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec3-reorder-reshuffle.ll
Log Message:
-----------
[SLP]Use poor-throughput instructions as vectorization seeds
Seed vectorization from expensive poor-throughput ops (fdiv/frem/fsqrt
and target-expensive calls) even when they do not feed a store or reduction.
Compile time effect https://llvm-compile-time-tracker.com/compare.php?from=8cdf6346f46c505928a9fb9d3ef9e8ce125a2108&to=27a3f0a5c0489c91bf386e480289fdcc9dc9c8b7&stat=instructions:u
These compile time regressions are the side effects of the vectorization
vectorization gains and cannot be reduced further (note Bullet).
Fixes #38780
Reviewers: hiraditya, bababuck, RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/206518
Commit: 29f1a71a8d3f12232ccd53bca2442e35396a11a3
https://github.com/llvm/llvm-project/commit/29f1a71a8d3f12232ccd53bca2442e35396a11a3
Author: Aditya Medhane <sherlockedaditya at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M openmp/runtime/src/kmp_dispatch.h
Log Message:
-----------
[OpenMP] Remove internal linkage from __kmp_wait template (NFC) (#207983)
__kmp_wait in kmp_dispatch.h is a static function template in a header,
so any TU that includes it without instantiating it trips
-Wunused-template (kmp_runtime.cpp, kmp_affinity.cpp, kmp_global.cpp,
kmp_settings.cpp). It is used by kmp_dispatch.cpp and
kmp_dispatch_hier.h. Drop static, which the comment above it already
suggests.
Part of #202945
Commit: 72e1037c32e22759b682a0e973af6b95b0630a01
https://github.com/llvm/llvm-project/commit/72e1037c32e22759b682a0e973af6b95b0630a01
Author: AnthonyCalandraGeotab <anthonycalandra at geotab.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M libcxx/docs/ReleaseNotes/23.rst
M libcxx/include/__configuration/attributes.h
M libcxx/include/__mutex/lock_guard.h
M libcxx/include/__mutex/mutex.h
M libcxx/include/mutex
M libcxx/include/shared_mutex
A libcxx/test/extensions/clang/thread/thread.mutex/thread_safety_scoped_lock.pass.cpp
A libcxx/test/extensions/clang/thread/thread.mutex/thread_safety_scoped_lock.verify.cpp
Log Message:
-----------
[libc++][ThreadSafety] Add thread safety annotations for variadic std::scoped_lock (#204462)
The thread safety annotations on std::scoped_lock were previously only
applied to the empty and single-mutex specializations. The general
variadic specialization carried no annotations, so -Wthread-safety
considered none of the mutexes held inside a multi-mutex scoped_lock
block and reported the guarded data accessed there as unprotected.
Now that Clang supports pack expansion inside thread safety attributes
(landed for Clang 21), annotate the variadic scoped_lock with
acquire_capability/requires_capability on its constructors,
release_capability on its destructor, and scoped_lockable on the class.
Fixes #42000.
Co-authored-by: Anthony Calandra <anthony at anthony-calandra.com>
Commit: e4e2a9346b60e3805b63cec888f6de022db5b271
https://github.com/llvm/llvm-project/commit/e4e2a9346b60e3805b63cec888f6de022db5b271
Author: Jacob Crawley <jacob.crawley at arm.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
A llvm/test/CodeGen/AArch64/sve-interleave-low-vf.ll
M llvm/test/Transforms/LoopVectorize/AArch64/first-order-recurrence.ll
A llvm/test/Transforms/LoopVectorize/AArch64/sve-interleave-low-vf-cost.ll
A llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-access-low-vf.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
Log Message:
-----------
[AArch64][LV] Cost low-VF interleaved access (#205844)
Adds a case to getInterleavedMemoryOpCost to cost scalable interleaved
memory accesses where the interleave factor is larger than the VF.
Previously for these cases, memory operations would be costed as
individual gathers and scatters, which may result in the LoopVectorizer
choosing a wider VF than necessary.
This changes proposes an alternative approach of using a contiguous
load/store of the interleaved vector followed by shuffles to get
the elements into place.
Commit: 1045d1ebca559d7e6dee49b002142e52bb61b49e
https://github.com/llvm/llvm-project/commit/1045d1ebca559d7e6dee49b002142e52bb61b49e
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M libcxx/include/__ranges/zip_view.h
M libcxx/test/libcxx/ranges/range.adaptors/range.zip.transform/nodiscard.verify.cpp
A libcxx/test/libcxx/ranges/range.adaptors/range.zip/nodiscard.verify.cpp
A libcxx/test/libcxx/ranges/range.adaptors/range_adaptor_types.h
Log Message:
-----------
[libc++][ranges] Applied `[[nodiscard]]` to `zip_view` (#207667)
`[[nodiscard]]` should be applied to functions where discarding the
return value is most likely a correctness issue.
- https://libcxx.llvm.org/CodingGuidelines.html
- https://wg21.link/range.zip
Towards #172124
Commit: 3046fb3de4b067179bcb8f933942aafea2c0d46f
https://github.com/llvm/llvm-project/commit/3046fb3de4b067179bcb8f933942aafea2c0d46f
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
A offload/test/Inputs/declare-target-common-block-sub.f90
A offload/test/offloading/fortran/declare-target-common-block-2.f90
A offload/test/offloading/fortran/declare-target-common-block-main.f90
Log Message:
-----------
[Flang][OpenMP][Offload] Add Flang offload tests for common block and declare target (#202949)
This PR adds a couple of tests revolving around the usage of common
block with declare target in Fortran OpenMP.
Commit: 3b3f6b56dba47ce53afa6340b27355a94a483e8c
https://github.com/llvm/llvm-project/commit/3b3f6b56dba47ce53afa6340b27355a94a483e8c
Author: Frederik Harwath <frederik.harwath at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
Log Message:
-----------
[AMDGPU] SIFoldOperands: Print instructions/operands in debug output (NFC) (#207945)
Print instructions/operands instead of their addresses in debug output.
---------
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: da9377fad1764dd7f654676aba1fef49205ccc6d
https://github.com/llvm/llvm-project/commit/da9377fad1764dd7f654676aba1fef49205ccc6d
Author: UebelAndre <github at uebelandre.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M utils/bazel/MODULE.bazel
M utils/bazel/MODULE.bazel.lock
Log Message:
-----------
[bazel] Sort bazel_deps into 'compat floor' and 'latest' sections (#207605)
Some dependencies have big knock-on effects and to the benefit of
consumers should best be tracked as min-supported-version. This change
divides the `MODULE.bazel` file into two sections where one contains
known sensitive dependencies that should only be bumped as needed and
the second are flex dependencies that can freely be updated with minimal
impact to external consumers.
Commit: 2bb0c2d1e86c6bd008c3dc23040fb9081289deff
https://github.com/llvm/llvm-project/commit/2bb0c2d1e86c6bd008c3dc23040fb9081289deff
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
Log Message:
-----------
PPC: Use SmallVector for tracking operands instead of DenseMap (#208034)
This is just tracking registers by operand index, which doesn't
need a heavy map.
Commit: 301060211315e9eadb39e17872c2b9d696d72fd6
https://github.com/llvm/llvm-project/commit/301060211315e9eadb39e17872c2b9d696d72fd6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
Log Message:
-----------
PPC: Fix querying TargetInstrInfo from PPCInstrInfo (#208030)
Commit: 3a9778bbf2d78d95bd1d330390187922c6956c78
https://github.com/llvm/llvm-project/commit/3a9778bbf2d78d95bd1d330390187922c6956c78
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M lldb/bindings/python/get-python-config.py
Log Message:
-----------
Revert "[lldb] Change Python site-packages path" (#207910)
Reverts llvm/llvm-project#207771.
`/usr/lib/pythonN.M/site-packages` is a standard path that everyone uses
to install python modules on posix systems. There is no such thing as
`/usr/lib/site-packages`. This change breaks lldb packaging for Linux
distros.
Commit: 17e8068444b58be6935b05200961c984e52989cb
https://github.com/llvm/llvm-project/commit/17e8068444b58be6935b05200961c984e52989cb
Author: Ivo Popov <popov.ivo at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/AST/ASTContext.cpp
A clang/test/Modules/modules-using-enum-class-scope.cppm
Log Message:
-----------
[clang][Modules] Support ODR merging of `UsingEnumDecl` (#207071)
Fixes https://github.com/llvm/llvm-project/issues/207066.
`UsingEnumDecl` (representing C++20 `using enum` declarations)
was not handled in `ASTContext::isSameEntity`.
Consequently, identical class definitions containing
a `using enum` statement failed to merge, resulting in spurious ODR
mismatch errors such as: `error: 'MyStruct::MyEnum' from module
'ModuleB' is not present in definition of 'MyStruct' in module
'ModuleA'`.
This patch implements merging support for `UsingEnumDecl` in
`ASTContext::isSameEntity` by comparing the nested-name-specifier
qualifiers and the underlying `EnumDecl` target.
---------
Co-authored-by: ipopov <ipopov at google.com>
Commit: 87a5682c92f69c87704487670d49db4ca65db21c
https://github.com/llvm/llvm-project/commit/87a5682c92f69c87704487670d49db4ca65db21c
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/X86/vect_copyable_in_binops.ll
Log Message:
-----------
[SLP][NFC]Update test checks, add some more tests, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/208048
Commit: 221cd6295224c93bed2bdfcc113eba5b64325c06
https://github.com/llvm/llvm-project/commit/221cd6295224c93bed2bdfcc113eba5b64325c06
Author: Folkert de Vries <folkert at folkertdev.nl>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.cpp
A llvm/test/CodeGen/WebAssembly/f128-minmax.ll
Log Message:
-----------
[WebAssembly] support `f{min, max}imum.f128` and `f{min, max}imumnum.f128` (#207160)
fixes https://github.com/llvm/llvm-project/issues/207100
As far as I can see `wasi-libc` does not currently export the dedicated
libcalls, so I went with a custom expansion. It emits more code, but
will work without any linker errors etc.
The `long double` type is actually `f128` for webassembly, so at least
the libcalls should work.
Commit: 24688c6a67dc5293c2e75ca9ec991dd0c2a23e59
https://github.com/llvm/llvm-project/commit/24688c6a67dc5293c2e75ca9ec991dd0c2a23e59
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
Log Message:
-----------
PPC: Fix querying TargetRegisterInfo in PPCInstrInfo (#208031)
Use the direct PPCRegisterInfo member
Commit: 9e22a5950e51ace7f50729d7f556ca99d06fa8bb
https://github.com/llvm/llvm-project/commit/9e22a5950e51ace7f50729d7f556ca99d06fa8bb
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/lib/Analysis/MemoryDependenceAnalysis.cpp
M llvm/lib/Analysis/MemorySSA.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/test/Analysis/MemorySSA/invariant-load-intrinsic.ll
M llvm/test/Transforms/GVN/invariant-load-intrinsic.ll
M llvm/test/Transforms/InstCombine/invariant-load-like-sink.ll
M llvm/test/Transforms/Sink/invariant-load.ll
A llvm/test/Verifier/invariant-load-metadata-invalid.ll
Log Message:
-----------
[llvm] Support invariant.load on readonly intrinsics (#205916)
Update passes and analyses that look at invariant.load (ex. MemorySSA)
to also consider the possibility that `!invariant.load` may be present
on intrinsic calls.
Updates the verifier to indicate that `!invariant.load` is only legal
for loads and readonly intrinsics (and moves the definition of the
metadata out of the definition of `load`).
This has not been extended to arbitrary function calls since it's less
clear what the semantics of !invariant.load on them would be.
Furthermore, extension to read/write intrinsics like memcpy() is planned
as a followup.
This PR also deletes tests that were pre-committed in
https://github.com/llvm/llvm-project/pull/205894 but that become invalid
with the verifier changes in this PR
AI disclosure: I've reviewed the code but all the actual generation was
done by AI.
---------
Co-authored-by: Codex <codex at openai.com>
Commit: dda9dc50945006189f5fabe08a165640c289f0e7
https://github.com/llvm/llvm-project/commit/dda9dc50945006189f5fabe08a165640c289f0e7
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M .github/workflows/libcxx-run-benchmarks.yml
Log Message:
-----------
[libc++] Use a median-of-3 for the A/B comparison benchmarking job (#208023)
After a bit of testing, I think this provides a good tradeoff between
resource utilization and noise reduction. Furthermore, the comparison
script (which produces the output) will be augmented to surface the
variability of the results in a separate PR.
Commit: 0fba09ca6c856f7ec043689c62198166a0b0321e
https://github.com/llvm/llvm-project/commit/0fba09ca6c856f7ec043689c62198166a0b0321e
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/ashr-main-opcode-copyables.ll
Log Message:
-----------
[SLP][NFC]Add an extra test with ashr vectorization, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/208057
Commit: 100a1fb9d628dc9969ca8f7aef774f61e168f9e9
https://github.com/llvm/llvm-project/commit/100a1fb9d628dc9969ca8f7aef774f61e168f9e9
Author: Chi-Chun, Chen <chichun.chen at hpe.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-dsa.h
M flang/lib/Semantics/openmp-dsa.cpp
M flang/lib/Semantics/resolve-directives.cpp
Log Message:
-----------
[flang][OpenMP][NFC] Share SetSymbolDSA between semantics and lowering (#207826)
Move the DSA helper from the private OmpAttributeVisitor::SetSymbolDSA
into the public openmp-dsa header next to GetSymbolDSA, and share the
DSA flag set through a single GetDataSharingAttributeFlags().
This lets an upcoming metadirective lowering change reuse the helper to
set the predetermined DSA of the loop induction variables of a selected
variant. A loop-associated variant is resolved during lowering, so the
usual semantic DSA resolution never runs on its loop nest and lowering
must set those flags itself.
Assisted with Copilot.
Commit: 5da6b3c590792a069c40d8982c8b0fb3557f241a
https://github.com/llvm/llvm-project/commit/5da6b3c590792a069c40d8982c8b0fb3557f241a
Author: Alex Langford <alangford at apple.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M lldb/include/lldb/Target/DynamicRegisterInfo.h
M lldb/source/Target/DynamicRegisterInfo.cpp
Log Message:
-----------
[lldb] DynamicRegisterInfo::Dump should take a Stream argument (#207863)
Otherwise, it creates its own Stream dumping to stdout.
Commit: 29495e193f67cb88704f97bae906c21464148c7d
https://github.com/llvm/llvm-project/commit/29495e193f67cb88704f97bae906c21464148c7d
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
A .github/workflows/libcxx-pr-benchmark.yml
R .github/workflows/libcxx-run-benchmarks.yml
Log Message:
-----------
[libc++][NFC] Rename workflow file for libc++ A/B performance comparisons (#208070)
I want to introduce another workflow that allows running benchmarks on
historical commits of libc++ for LNT submission, so having an
unambiguous name is desirable.
Commit: 6d1566cecf40143012674376f5c9250316c29634
https://github.com/llvm/llvm-project/commit/6d1566cecf40143012674376f5c9250316c29634
Author: Petr Hosek <phosek at google.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.cpp
M clang-tools-extra/clangd/SemanticHighlighting.cpp
M clang-tools-extra/clangd/refactor/tweaks/DefineInline.cpp
M clang/docs/LibASTMatchersReference.html
M clang/docs/ReleaseNotes.md
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/DeclTemplate.h
M clang/include/clang/AST/JSONNodeDumper.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/include/clang/ASTMatchers/ASTMatchersInternal.h
M clang/include/clang/Basic/Specifiers.h
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTDumper.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/Comment.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclPrinter.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/JSONNodeDumper.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/ASTMatchers/Dynamic/Registry.cpp
M clang/lib/Analysis/ExprMutationAnalyzer.cpp
M clang/lib/CIR/CodeGen/CIRGenVTables.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/Index/IndexingContext.cpp
M clang/lib/InstallAPI/Visitor.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/StaticAnalyzer/Core/BugSuppression.cpp
M clang/lib/Tooling/Syntax/BuildTree.cpp
M clang/test/AST/ast-dump-templates-pattern.cpp
M clang/test/CXX/basic/basic.link/p11.cpp
M clang/test/CXX/drs/cwg18xx.cpp
M clang/test/CXX/drs/cwg7xx.cpp
M clang/test/CXX/temp/temp.arg/temp.arg.template/p3-2a.cpp
M clang/test/CXX/temp/temp.constr/temp.constr.decl/p4.cpp
M clang/test/CXX/temp/temp.decls/temp.spec.partial/temp.spec.partial.member/p2.cpp
M clang/test/CXX/temp/temp.spec/temp.expl.spec/p7.cpp
M clang/test/CodeGenCXX/default-arguments.cpp
M clang/test/CodeGenCXX/explicit-instantiation.cpp
M clang/test/SemaCXX/GH195416.cpp
M clang/test/SemaCXX/constant-expression-cxx14.cpp
M clang/test/SemaCXX/deduced-return-type-cxx14.cpp
M clang/test/SemaCXX/member-class-11.cpp
M clang/test/SemaTemplate/concepts-out-of-line-def.cpp
M clang/test/SemaTemplate/friend-template.cpp
M clang/test/SemaTemplate/instantiate-scope.cpp
M clang/test/Templight/templight-default-func-arg.cpp
M clang/test/Templight/templight-empty-entries-fix.cpp
M clang/tools/libclang/CIndex.cpp
M clang/unittests/AST/ASTImporterTest.cpp
M clang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
Log Message:
-----------
Revert "[clang] Reland: fix getTemplateInstantiationArgs" (#208064)
Reverts llvm/llvm-project#207825 since it's causing a crash in Clang.
Commit: 585f04f2bf11c84367641f62a5e280a0241a71de
https://github.com/llvm/llvm-project/commit/585f04f2bf11c84367641f62a5e280a0241a71de
Author: Derek Schuff <dschuff at chromium.org>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Support/CrashRecoveryContext.cpp
Log Message:
-----------
[Support] Add missing include for MacOS defines (#208065)
https://github.com/llvm/llvm-project/pull/142733 removed several
includes, including
llvm/Support/ProgramStack.h. This was indirectly including headers that
defined
PRIO_DARWIN_THREAD and PRIO_DARWIN_BG.
Add back sys/resource.h to define them locally.
Commit: d8f56af5fecb3d431efa801b80a87a6547638fd8
https://github.com/llvm/llvm-project/commit/d8f56af5fecb3d431efa801b80a87a6547638fd8
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusNameParser.cpp
M lldb/unittests/Language/CPlusPlus/CPlusPlusLanguageTest.cpp
Log Message:
-----------
[lldb] Support MS style `struct`/`class` in C++ name parser (#196525)
If a type is declared as a `class` or a `struct` is part of the mangled
name in the Microsoft ABI. This is also reflected in the demangled name.
There, it shows up before the qualified name. For example, you could
have `class ns1::ns2::MyClass`. It will show up like this in return
types and function/template arguments.
This adds a check in `CPlusPlusNameParser::ParseFullNameImpl` for these
cases.
Commit: c098e41b8de197330454afd5ce8cf05ee8e57b39
https://github.com/llvm/llvm-project/commit/c098e41b8de197330454afd5ce8cf05ee8e57b39
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/unittests/Transforms/Vectorize/VPDomTreeTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
Log Message:
-----------
[VPlan] Use StepVector without operands, VPBuilder in C++ tests (NFC) (#208075)
Update unit tests construction VScale for VPInstructions without
operands to use StepVector where possible. When VScale is needed,
construct with VPBuilder. Also update constructing other recipes in same
function to use VPBuilder, for consistency.
Split off from approved https://github.com/llvm/llvm-project/pull/207541
Commit: eba2fde4d5409ae861587552ddc8c6837de2ad82
https://github.com/llvm/llvm-project/commit/eba2fde4d5409ae861587552ddc8c6837de2ad82
Author: Zachary Yedidia <zyedidia at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/lib/Basic/Targets/X86.cpp
M llvm/docs/LFI.rst
M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/MC/MCLFI.cpp
M llvm/lib/Target/X86/MCTargetDesc/CMakeLists.txt
A llvm/lib/Target/X86/MCTargetDesc/X86MCLFIRewriter.cpp
A llvm/lib/Target/X86/MCTargetDesc/X86MCLFIRewriter.h
M llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/Target/X86/X86Subtarget.h
M llvm/lib/TargetParser/Triple.cpp
A llvm/test/CodeGen/X86/lfi-sibcall.ll
A llvm/test/MC/X86/LFI/abi-note.s
A llvm/test/MC/X86/LFI/syscall.s
A llvm/test/MC/X86/LFI/thread-pointer-errors.s
A llvm/test/MC/X86/LFI/thread-pointer.s
Log Message:
-----------
Reland: [LFI][X86] Add X86 LFI target and system instruction rewrites (#207892)
Reintroduction of #189569 using the MCRegisterClass accessor API, which
was recently modified and caused a build error when the previous PR
was merged since it was not rebased onto the latest commit.
Commit: 9a1f5b76b4af5c99f4c60456abcc95f5640b35df
https://github.com/llvm/llvm-project/commit/9a1f5b76b4af5c99f4c60456abcc95f5640b35df
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/OpenACC/Analysis/FIROpenACCSupportAnalysis.h
M flang/lib/Optimizer/OpenACC/Analysis/CMakeLists.txt
M flang/lib/Optimizer/OpenACC/Analysis/FIROpenACCSupportAnalysis.cpp
M flang/unittests/Optimizer/CMakeLists.txt
A flang/unittests/Optimizer/OpenACC/FIROpenACCSupportAnalysisTest.cpp
M mlir/include/mlir/Dialect/OpenACC/Analysis/OpenACCSupport.h
A mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsType.h
M mlir/lib/Dialect/OpenACC/Analysis/OpenACCSupport.cpp
M mlir/lib/Dialect/OpenACC/Utils/CMakeLists.txt
A mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsType.cpp
M mlir/unittests/Dialect/OpenACC/CMakeLists.txt
A mlir/unittests/Dialect/OpenACC/OpenACCUtilsTypeTest.cpp
Log Message:
-----------
[mlir][acc][flang] Add type sizing utilities (#208074)
Add a general acc utility for computing the size and alignment of a
type. It works for simple scalar types as well as nested and aggregate
types like arrays, tuples, and structures.
Because some types come from other dialects, the utility can hand those
off to a specialized helper that understands them. This lets sizing work
seamlessly even for mixed types, such as an aggregate whose members come
from a different dialect.
Add a Fortran-specific helper so Fortran types are sized correctly,
falling back to the general utility for everything else.
Include unit tests covering a range of scenarios, including scalars,
arrays, aggregates, and mixed-dialect types.
Commit: 9ff1d7a21e6d23088eb5dac38f95edd4329c50b7
https://github.com/llvm/llvm-project/commit/9ff1d7a21e6d23088eb5dac38f95edd4329c50b7
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Utils/CallPromotionUtils.cpp
R llvm/test/Transforms/SampleProfile/icp_target_feature.ll
Log Message:
-----------
Revert "[PGO][ICP] Prevent indirect call promotion to functions with incompatible target features" (#208079)
Reverts llvm/llvm-project#192142
Now that https://github.com/llvm/llvm-project/pull/205113 has landed, we
will not inline functions with incompatible target features, even if the
callee is marked `alwaysinline`, so we can promote calls to such
functions while also removing the extra complexity from ICP.
Commit: 6d34e50b88ecce3d5e9ef7e0ed0b54e8f9818019
https://github.com/llvm/llvm-project/commit/6d34e50b88ecce3d5e9ef7e0ed0b54e8f9818019
Author: Alex Langford <alangford at apple.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M lldb/source/Utility/FileSpec.cpp
M lldb/source/Utility/FileSpecList.cpp
Log Message:
-----------
[lldb] Remove uses of ConstString in FileSpec methods (#206851)
After this, FileSpec only uses ConstString for storage. In a subsequent
commit, I will change FileSpec's storage.
Commit: ee745070b05e2474ea27f2268b5e7d52be933c4e
https://github.com/llvm/llvm-project/commit/ee745070b05e2474ea27f2268b5e7d52be933c4e
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M lldb/source/Plugins/Process/wasm/UnwindWasm.cpp
M lldb/test/API/functionalities/gdb_remote_client/TestWasm.py
Log Message:
-----------
[lldb] Give Wasm stack frames a synthetic call frame address (#208061)
UnwindWasm reported a call frame address of zero for every Wasm frame.
StackID orders frames by their CFA, assuming the stack grows downward so
that a younger frame compares below its caller. With every CFA equal to
zero that ordering collapsed, and CompareCurrentFrameToStartFrame
treated a step into a function as a step out, which silently disabled
step-in avoid-regexp and confused other thread plans.
WebAssembly keeps its call stack inside the engine and exposes no
linear-memory frame address, so synthesize a CFA from each frame's
distance to the outermost frame. That distance is invariant as frames
are pushed and popped above it, so a given frame keeps a stable, ordered
CFA across steps.
Commit: c7d45caea0faba51223feb08e2224bf845724b17
https://github.com/llvm/llvm-project/commit/c7d45caea0faba51223feb08e2224bf845724b17
Author: Adam Nemet <anemet at apple.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
A llvm/test/CodeGen/ARM/unaligned_load_store_no_aeabi.ll
M llvm/utils/UpdateTestChecks/asm.py
Log Message:
-----------
[ARM] Don't try to emit AEABI libcalls for non-AEABI targets (#207813)
PR #172672 added ARMTargetLowering::LowerAEABIUnalignedLoad/Store which
lowers some of the unaligned i32/i64 stores to
__aeabi_u{read,write}{4,8}. The libcall is emitted unconditionally, with
no check whether the target environment actually has these AEABI
helpers.
We don't have it for Apple/MachO which leads to a compiler crash.
rdar://175136625
Commit: 8fbf94a21b69770091c73381be24fff43e89d93e
https://github.com/llvm/llvm-project/commit/8fbf94a21b69770091c73381be24fff43e89d93e
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/lib/Lex/LiteralSupport.cpp
Log Message:
-----------
Silence a signed/unsigned mismatch diagnostic; NFC (#208088)
Commit: d2888890b513e757916e8e20c06146d2b9b6b4a0
https://github.com/llvm/llvm-project/commit/d2888890b513e757916e8e20c06146d2b9b6b4a0
Author: Anshul Nigham <nigham at google.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/docs/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack.md
Log Message:
-----------
Update AMD DWARF ext doc headers to only have a single title-level header (#208103)
This ensures no leakage of individual headings on the page to the global
TOC, see https://github.com/llvm/llvm-project/pull/184440
Commit: 4c93275445c698b4290ef48f98f256adf2a90f39
https://github.com/llvm/llvm-project/commit/4c93275445c698b4290ef48f98f256adf2a90f39
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M libc/src/__support/CPP/string.h
M libc/test/src/__support/CPP/string_test.cpp
Log Message:
-----------
[libc][cpp::string] Fix off-by-one bug in resize and a memory leak (#208077)
AFAICT, `cpp::string` is only used in tests, so these bugs were mostly
inconsequential.
Commit: 448b57d52e77950e0cfc9d81fb0e65f7143c27d1
https://github.com/llvm/llvm-project/commit/448b57d52e77950e0cfc9d81fb0e65f7143c27d1
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/test/CodeGen/X86/vector-trunc.ll
Log Message:
-----------
[X86] vector-trunc.ll - regenerate checks to add missing ADD constant pool comments (#207827)
Commit: 73867dce09789f8de6d38edcfa8101f2ae2138e4
https://github.com/llvm/llvm-project/commit/73867dce09789f8de6d38edcfa8101f2ae2138e4
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M clang/include/clang/Driver/Action.h
M clang/include/clang/Options/Options.td
M clang/lib/Driver/Action.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/MSVC.cpp
M clang/lib/Driver/ToolChains/MSVC.h
M clang/lib/Driver/ToolChains/MinGW.cpp
M clang/lib/Driver/ToolChains/MinGW.h
A clang/test/Driver/arm64x.c
M clang/test/Driver/msvc-link.c
Log Message:
-----------
[clang][ARM64X] Support compiling both native and EC objects with -marm64x (#207612)
When -marm64x is used during the assembly phase, construct jobs for both
native and EC targets and merge their outputs using llvm-objcopy.
Allow passing ArchName to computeTargetTriple on non-Darwin targets to
enable BindArchAction on other platforms. Additionally, allow passing
multiple inputs to ObjcopyJobAction and use this capability to construct
ARM64X merge jobs.
Commit: 8b93782d2da3d651a1774f96acf747c5b2181cd4
https://github.com/llvm/llvm-project/commit/8b93782d2da3d651a1774f96acf747c5b2181cd4
Author: Anshul Nigham <nigham at google.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/docs/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack.md
Log Message:
-----------
Add explicit anchors to deep headers for AMD DWARF ext doc (#208110)
Anchors get auto-generated only upto level 6, and
https://github.com/llvm/llvm-project/pull/208103 added another level,
causing sphinx to complain about no targets for these anchors.
Commit: 39dcb0ff91b312bb269334168d5e32be78b60417
https://github.com/llvm/llvm-project/commit/39dcb0ff91b312bb269334168d5e32be78b60417
Author: Mircea Trofin <mtrofin at google.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGCUDANV.cpp
M clang/test/CodeGen/cfi-icall-trap-recover-runtime.c
M clang/test/CodeGen/lto-newpm-pipeline.c
M clang/test/CodeGenCXX/cfi-vcall-trap-recover-runtime.cpp
M lld/test/ELF/lto/devirt_vcall_vis_export_dynamic.ll
M lld/test/ELF/lto/devirt_vcall_vis_public.ll
M lld/test/ELF/lto/devirt_vcall_vis_shared_def.ll
M llvm/include/llvm/Analysis/CtxProfAnalysis.h
M llvm/include/llvm/Bitcode/BitcodeReader.h
M llvm/include/llvm/Bitcode/LLVMBitCodes.h
M llvm/include/llvm/IR/GlobalObject.h
M llvm/include/llvm/IR/GlobalValue.h
M llvm/include/llvm/IR/Module.h
M llvm/include/llvm/IR/ModuleSummaryIndex.h
M llvm/include/llvm/LTO/LTO.h
M llvm/include/llvm/Passes/PassBuilder.h
A llvm/include/llvm/Transforms/Utils/AssignGUID.h
M llvm/lib/Analysis/CtxProfAnalysis.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/BitcodeAnalyzer.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/CodeGen/GlobalMerge.cpp
M llvm/lib/IR/Globals.cpp
M llvm/lib/LTO/LTO.cpp
M llvm/lib/LTO/LTOBackend.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Transforms/IPO/ConstantMerge.cpp
M llvm/lib/Transforms/IPO/FunctionImport.cpp
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/lib/Transforms/Instrumentation/PGOCtxProfFlattening.cpp
M llvm/lib/Transforms/Instrumentation/PGOCtxProfLowering.cpp
M llvm/lib/Transforms/Scalar/JumpTableToSwitch.cpp
A llvm/lib/Transforms/Utils/AssignGUID.cpp
M llvm/lib/Transforms/Utils/CMakeLists.txt
M llvm/lib/Transforms/Utils/CallPromotionUtils.cpp
M llvm/lib/Transforms/Utils/CloneModule.cpp
M llvm/lib/Transforms/Utils/FunctionImportUtils.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
R llvm/test/Analysis/CtxProfAnalysis/flatten-prethinlink-requires-guid-metadata.ll
M llvm/test/Assembler/index-value-order.ll
M llvm/test/Bitcode/thinlto-alias.ll
M llvm/test/Bitcode/thinlto-function-summary-callgraph-partial-sample-profile-summary.ll
M llvm/test/Bitcode/thinlto-function-summary-callgraph-pgo.ll
M llvm/test/Bitcode/thinlto-function-summary-callgraph-profile-summary.ll
M llvm/test/Bitcode/thinlto-function-summary-callgraph-sample-profile-summary.ll
M llvm/test/Bitcode/thinlto-function-summary-callgraph.ll
M llvm/test/Bitcode/thinlto-function-summary-refgraph.ll
M llvm/test/Bitcode/thinlto-function-summary.ll
M llvm/test/CodeGen/X86/fat-lto-section.ll
M llvm/test/LTO/Resolution/X86/not-prevailing-alias.ll
M llvm/test/LTO/Resolution/X86/not-prevailing-weak-aliasee.ll
M llvm/test/Linker/funcimport2.ll
M llvm/test/Other/new-pm-O0-defaults.ll
M llvm/test/Other/new-pm-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
M llvm/test/ThinLTO/AArch64/aarch64_inline.ll
M llvm/test/ThinLTO/X86/Inputs/cache-typeid-resolutions1.ll
M llvm/test/ThinLTO/X86/Inputs/cache-typeid-resolutions2.ll
M llvm/test/ThinLTO/X86/Inputs/cache-typeid-resolutions3.ll
M llvm/test/ThinLTO/X86/ctor-dtor-alias.ll
M llvm/test/ThinLTO/X86/ctor-dtor-alias2.ll
M llvm/test/ThinLTO/X86/deadstrip.ll
M llvm/test/ThinLTO/X86/devirt_function_alias.ll
M llvm/test/ThinLTO/X86/devirt_function_alias2.ll
M llvm/test/ThinLTO/X86/devirt_pure_virtual_base.ll
M llvm/test/ThinLTO/X86/devirt_vcall_vis_public.ll
M llvm/test/ThinLTO/X86/distributed_import.ll
M llvm/test/ThinLTO/X86/funcattrs-prop-exported-internal.ll
M llvm/test/ThinLTO/X86/funcattrs-prop-unknown.ll
M llvm/test/ThinLTO/X86/funcattrs-prop-weak.ll
M llvm/test/ThinLTO/X86/globals-import.ll
M llvm/test/ThinLTO/X86/hidden-escaped-symbols-alt.ll
M llvm/test/ThinLTO/X86/hidden-escaped-symbols.ll
M llvm/test/ThinLTO/X86/import-ro-constant.ll
M llvm/test/ThinLTO/X86/index-const-prop-alias.ll
M llvm/test/ThinLTO/X86/index-const-prop.ll
M llvm/test/ThinLTO/X86/linkonce_resolution_comdat.ll
M llvm/test/ThinLTO/X86/memprof-dups.ll
M llvm/test/ThinLTO/X86/memprof_callee_type_mismatch.ll
M llvm/test/ThinLTO/X86/memprof_imported_internal.ll
M llvm/test/ThinLTO/X86/memprof_imported_internal2.ll
M llvm/test/ThinLTO/X86/prevailing_weak_globals_import.ll
M llvm/test/ThinLTO/X86/visibility-elf.ll
M llvm/test/ThinLTO/X86/visibility-macho.ll
M llvm/test/ThinLTO/X86/weak_resolution.ll
M llvm/test/ThinLTO/X86/windows-vftable.ll
M llvm/test/ThinLTO/X86/writeonly.ll
A llvm/test/Transforms/AssignGUID/assign_guid.ll
M llvm/test/Transforms/ConstantMerge/merge-dbg.ll
M llvm/test/Transforms/EmbedBitcode/embed-wpd.ll
M llvm/test/Transforms/EmbedBitcode/embed.ll
M llvm/test/Transforms/FunctionImport/funcimport-debug-retained-nodes.ll
M llvm/test/Transforms/FunctionImport/funcimport.ll
A llvm/test/Transforms/GlobalMerge/guid.ll
M llvm/test/Transforms/LowerTypeTests/cfi-icall-alias.ll
M llvm/test/Transforms/LowerTypeTests/export-icall.ll
M llvm/test/Transforms/PGOProfile/thinlto_indirect_call_promotion.ll
M llvm/test/Transforms/PhaseOrdering/speculative-devirt-then-inliner.ll
M llvm/test/Transforms/SampleProfile/ctxsplit.ll
M llvm/test/Transforms/ThinLTOBitcodeWriter/split-internal-typeid.ll
M llvm/test/Transforms/ThinLTOBitcodeWriter/split-internal1.ll
M llvm/test/Transforms/ThinLTOBitcodeWriter/split-internal2.ll
M llvm/test/Transforms/ThinLTOBitcodeWriter/split-vfunc-internal.ll
M llvm/test/Transforms/ThinLTOBitcodeWriter/split-vfunc.ll
M llvm/test/Transforms/ThinLTOBitcodeWriter/split.ll
M llvm/test/Transforms/ThinLTOBitcodeWriter/unsplittable.ll
M llvm/test/Transforms/WholeProgramDevirt/branch-funnel-profile.ll
M llvm/test/Transforms/WholeProgramDevirt/export-single-impl.ll
M llvm/test/Transforms/WholeProgramDevirt/export-vcp.ll
M llvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-interposable.ll
M llvm/test/tools/gold/X86/devirt_vcall_vis_export_dynamic.ll
M llvm/test/tools/gold/X86/devirt_vcall_vis_public.ll
M llvm/test/tools/gold/X86/devirt_vcall_vis_shared_def.ll
M llvm/test/tools/gold/X86/thinlto_weak_library.ll
M llvm/test/tools/gold/X86/thinlto_weak_resolution.ll
M llvm/test/tools/gold/X86/v1.16/devirt_vcall_vis_export_dynamic.ll
M llvm/tools/llvm-link/llvm-link.cpp
M llvm/tools/opt/NewPMDriver.cpp
M llvm/tools/opt/optdriver.cpp
Log Message:
-----------
Reland "Compute GUIDs once and store in metadata" (#184065) (#201849)
This reverts #201194, thus relanding @orodley's PR #184065 (and
#200323):
> This allows us to keep GUIDs consistent across compilation phases
which may change the name or linkage type.
> See
https://discourse.llvm.org/t/rfc-keep-globalvalue-guids-stable/84801
The CFI issues that triggered the original revert are fixed by #201370,
together with the addressing of the TODOs in `LowerTypeTests.cpp` left
in the latter. The [graphite
diff](https://app.graphite.com/github/pr/llvm/llvm-project/201849/Reland-%23184065)
between this change's V1 and V2 shows what's been added:
- the `TODO`s from #201370 are done
- in LowerTypeTests.cpp, passing `!guid` when creating a new declaration
and when converting a definition to a declaration.
- `llvm/test/Transforms/LowerTypeTests/export-icall.ll` tests also the
above def->decl conversion
- removed
`test/Analysis/CtxProfAnalysis/flatten-prethinlink-requires-guid-metadata.ll`
introduced in #194383 (this was between the revert and this PR), as now
the general expectation is that GUID assignment happens appropriately
and all passes use `getGUID`, so there's no reason for `CtxProfAnalysis`
to do something different.
Currently, we reassign GUIDs when CFI promotes internal linkage symbols,
which is counter to the goal of the RFC. This is addressed in PR
#203171. The reason for this split fix can be explained on
`compiler-rt/test/cfi/icall/wrong-signature-mixed-lto.c`. Here, a module
with the exact same source path is compiled twice, under different
conditional compilation, to produce 2 objects. Each object defines an
internal linkage symbol with the same name (this is
`install_trap_loop_detection` from
`compiler-rt/test/cfi/trap_loop_signal_handler.inc` which is
`-include`\-d by both - see how `%clang_cfi` is defined). The ThinLTO
GUID of this symbol will be the same. Its name won't be - because CFI
promotes it and renames it using a hash that is based on the IR Module
content (rather than the source path). During thinlink,
`LTO::addThinLTO`will mark each of the 2 exported symbols as prevailing
in their corresponding modules. But that is done by associating their
GUID to the module. So whichever comes last wins. The other symbol will
be marked available externally and its body DCEd later in backend. But
each module will refer to its copy of `install_trap_loop_detection`, and
so we end up with a linker error.
As mentioned, the fix is in PR #203171, and this relanding PR just
maintains the existing ThinLTO behavior by rewriting the GUIDs. Since we
haven't yet leveraged the GUID mechanics for e.g. simplifying PGO, this
aspect of this change is essentially NFC.
Co-authored-by: Owen Rodley <orodley at google.com>
Commit: 2a8e0e1abbdc558f3a4b43d5a9432c07b5d01387
https://github.com/llvm/llvm-project/commit/2a8e0e1abbdc558f3a4b43d5a9432c07b5d01387
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/X86/reassociate-ops.ll
Log Message:
-----------
[SLP][NFC]Add tests with some preferred reassociation, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/208118
Commit: cc27a240be812f854801c24aefbea1243c5efde8
https://github.com/llvm/llvm-project/commit/cc27a240be812f854801c24aefbea1243c5efde8
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M lldb/include/lldb/Target/Process.h
M lldb/include/lldb/Utility/Policy.h
M lldb/source/Expression/FunctionCaller.cpp
M lldb/source/Expression/IRInterpreter.cpp
M lldb/source/Expression/LLVMUserExpression.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/StackFrameList.cpp
M lldb/source/Target/StopInfo.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/Thread.cpp
M lldb/source/Utility/Policy.cpp
M lldb/unittests/Utility/PolicyTest.cpp
Log Message:
-----------
[lldb] Push ExpressionEvaluation policy and remove identity check fallbacks (#195775)
Push `PolicyStack::Get().PushPublicStateRunningExpression()` at all
three expression evaluation entry points
(`LLVMUserExpression::DoExecute`, `FunctionCaller::ExecuteFunction`,
`IRInterpreter`). This policy sets `can_run_breakpoint_actions=false`,
preventing recursive breakpoint callback execution during expression
eval.
Push `PolicyStack::Get().PushPrivateState()` unconditionally for all
PSTs in `RunPrivateStateThread` (not just overrides), giving every PST
the private view while keeping frame providers and recognizers enabled
for normal stop processing. Override PSTs use
`PushPrivateStateRunningExpression()` which additionally disables
providers and recognizers.
With all PSTs and expression eval sites now covered by the policy,
remove all host thread identity check fallbacks:
- `CurrentThreadPosesAsPrivateStateThread()` in `Process::GetState()`
- `CurrentThreadIsPrivateStateThread()` in `Target::GetAPIMutex()`
- `IsOnThread()` in `PrivateStateThread::GetRunLock()`
- `CurrentThreadPosesAsPrivateStateThread()` in
`SelectMostRelevantFrame()`
- `IsRunningExpression()` in `StopInfoBreakpoint::PerformAction()`
`SelectMostRelevantFrame` now checks `!can_run_frame_recognizers`
instead of `View::Private`, so recognizers run during normal PST stop
processing but are skipped during expression evaluation.
----
The following PRs are related to the Policy feature:
- #195762
- #195771
- #198897
- #195774
- #195775
rdar://176223894
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: d1ad52f0ca135b972f352b38fbc813404efb91ac
https://github.com/llvm/llvm-project/commit/d1ad52f0ca135b972f352b38fbc813404efb91ac
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M flang/include/flang/Common/constexpr-bitset.h
M flang/include/flang/Common/idioms.h
M flang/include/flang/Decimal/binary-floating-point.h
M flang/include/flang/Evaluate/expression.h
M flang/include/flang/Evaluate/fold-designator.h
M flang/include/flang/Evaluate/fold.h
M flang/include/flang/Evaluate/intrinsics.h
M flang/include/flang/Evaluate/rewrite.h
M flang/include/flang/Evaluate/shape.h
M flang/include/flang/Evaluate/traverse.h
M flang/include/flang/Evaluate/type.h
M flang/include/flang/Frontend/CodeGenOptions.h
M flang/include/flang/Frontend/TextDiagnostic.h
M flang/include/flang/Lower/Allocatable.h
M flang/include/flang/Lower/CUDA.h
M flang/include/flang/Lower/CallInterface.h
M flang/include/flang/Lower/ConvertExprToHLFIR.h
M flang/include/flang/Lower/ConvertType.h
M flang/include/flang/Lower/DirectivesCommon.h
M flang/include/flang/Lower/HostAssociations.h
M flang/include/flang/Lower/Mangler.h
M flang/include/flang/Lower/OpenMP.h
M flang/include/flang/Lower/Runtime.h
M flang/include/flang/Lower/Support/Utils.h
M flang/include/flang/Lower/SymbolMap.h
M flang/include/flang/Optimizer/Builder/DirectivesCommon.h
M flang/include/flang/Optimizer/Builder/Factory.h
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/include/flang/Optimizer/Builder/MIFCommon.h
M flang/include/flang/Optimizer/Builder/Runtime/Character.h
M flang/include/flang/Optimizer/Builder/Runtime/RTBuilder.h
M flang/include/flang/Optimizer/Builder/Todo.h
M flang/include/flang/Optimizer/CodeGen/CodeGenOpenMP.h
M flang/include/flang/Optimizer/CodeGen/TypeConverter.h
M flang/include/flang/Optimizer/Dialect/CUF/CUFDialect.h
M flang/include/flang/Optimizer/Dialect/FIRCG/CGOps.h
M flang/include/flang/Optimizer/Dialect/MIF/MIFDialect.h
M flang/include/flang/Optimizer/Dialect/SafeTempArrayCopyAttrInterface.h
M flang/include/flang/Optimizer/Passes/Pipelines.h
M flang/include/flang/Optimizer/Support/InitFIR.h
M flang/include/flang/Optimizer/Support/InternalNames.h
M flang/include/flang/Optimizer/Support/Utils.h
M flang/include/flang/Optimizer/Transforms/CUDA/CUFAllocationConversion.h
M flang/include/flang/Optimizer/Transforms/CUFGPUToLLVMConversion.h
M flang/include/flang/Optimizer/Transforms/CUFOpConversion.h
M flang/include/flang/Optimizer/Transforms/MIFOpConversion.h
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Parser/char-block.h
M flang/include/flang/Parser/char-buffer.h
M flang/include/flang/Parser/openmp-utils.h
M flang/include/flang/Parser/parse-state.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Parser/token-sequence.h
M flang/include/flang/Parser/unparse.h
M flang/include/flang/Parser/user-state.h
M flang/include/flang/Runtime/CUDA/common.h
M flang/include/flang/Runtime/CUDA/kernel.h
M flang/include/flang/Runtime/array-constructor-consts.h
M flang/include/flang/Runtime/random.h
M flang/include/flang/Runtime/reduce.h
M flang/include/flang/Runtime/reduction.h
M flang/include/flang/Runtime/support.h
M flang/include/flang/Semantics/attr.h
M flang/include/flang/Semantics/expression.h
M flang/include/flang/Semantics/openmp-utils.h
M flang/include/flang/Semantics/runtime-type-info.h
M flang/include/flang/Semantics/semantics.h
M flang/include/flang/Semantics/type.h
M flang/include/flang/Semantics/unparse-with-symbols.h
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/include/flang/Tools/TargetSetup.h
M flang/lib/Decimal/big-radix-floating-point.h
M flang/lib/Decimal/decimal-to-binary.cpp
M flang/lib/Evaluate/expression.cpp
M flang/lib/Evaluate/fold-implementation.h
M flang/lib/Evaluate/host.h
M flang/lib/Evaluate/intrinsics-library.cpp
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Evaluate/real.cpp
M flang/lib/Evaluate/variable.cpp
M flang/lib/Frontend/CodeGenOptions.cpp
M flang/lib/Frontend/CompilerInstance.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendAction.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/FrontendTool/ExecuteCompilerInvocation.cpp
M flang/lib/Lower/Allocatable.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/CallInterface.cpp
M flang/lib/Lower/ConvertArrayConstructor.cpp
M flang/lib/Lower/ConvertExpr.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/CustomIntrinsicCall.cpp
M flang/lib/Lower/HostAssociations.cpp
M flang/lib/Lower/IO.cpp
M flang/lib/Lower/Mangler.cpp
M flang/lib/Lower/MultiImageFortran.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/OpenMP/Atomic.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/Decomposer.cpp
M flang/lib/Lower/OpenMP/Decomposer.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/PFTBuilder.cpp
M flang/lib/Lower/Runtime.cpp
M flang/lib/Lower/SymbolMap.cpp
M flang/lib/Lower/VectorSubscripts.cpp
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
M flang/lib/Optimizer/Builder/CUFCommon.cpp
M flang/lib/Optimizer/Builder/MIFCommon.cpp
M flang/lib/Optimizer/Builder/Runtime/Character.cpp
M flang/lib/Optimizer/Builder/Runtime/Derived.cpp
M flang/lib/Optimizer/Builder/Runtime/Intrinsics.cpp
M flang/lib/Optimizer/Builder/Runtime/Main.cpp
M flang/lib/Optimizer/CodeGen/BoxedProcedure.cpp
M flang/lib/Optimizer/CodeGen/CodeGenOpenMP.cpp
M flang/lib/Optimizer/CodeGen/FIROpPatterns.cpp
M flang/lib/Optimizer/CodeGen/PassDetail.h
M flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
M flang/lib/Optimizer/CodeGen/TBAABuilder.cpp
M flang/lib/Optimizer/CodeGen/Target.cpp
M flang/lib/Optimizer/Dialect/CUF/Attributes/CUFAttr.cpp
M flang/lib/Optimizer/Dialect/CUF/CUFOps.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/Dialect/MIF/MIFOps.cpp
M flang/lib/Optimizer/HLFIR/IR/HLFIROps.cpp
M flang/lib/Optimizer/HLFIR/Transforms/BufferizeHLFIR.cpp
M flang/lib/Optimizer/HLFIR/Transforms/ConvertToFIR.cpp
M flang/lib/Optimizer/HLFIR/Transforms/InlineHLFIRAssign.cpp
M flang/lib/Optimizer/HLFIR/Transforms/LowerHLFIRIntrinsics.cpp
M flang/lib/Optimizer/HLFIR/Transforms/LowerHLFIROrderedAssignments.cpp
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
M flang/lib/Optimizer/HLFIR/Transforms/PropagateFortranVariableAttributes.cpp
M flang/lib/Optimizer/HLFIR/Transforms/ScheduleOrderedAssignments.cpp
M flang/lib/Optimizer/HLFIR/Transforms/SimplifyHLFIRIntrinsics.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCAttributes.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.cpp
M flang/lib/Optimizer/OpenMP/DeleteUnreachableTargets.cpp
M flang/lib/Optimizer/OpenMP/FunctionFiltering.cpp
M flang/lib/Optimizer/OpenMP/LowerWorkdistribute.cpp
M flang/lib/Optimizer/OpenMP/LowerWorkshare.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/lib/Optimizer/OpenMP/MapsForPrivatizedSymbols.cpp
M flang/lib/Optimizer/OpenMP/Support/FIROpenMPAttributes.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Support/DataLayout.cpp
M flang/lib/Optimizer/Support/InternalNames.cpp
M flang/lib/Optimizer/Transforms/AddAliasTags.cpp
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
M flang/lib/Optimizer/Transforms/AffineDemotion.cpp
M flang/lib/Optimizer/Transforms/AffinePromotion.cpp
M flang/lib/Optimizer/Transforms/AssumedRankOpConversion.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFAllocationConversion.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFComputeSharedMemoryOffsetsAndSize.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFDeviceFuncTransform.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFDeviceGlobal.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFFunctionRewrite.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFGPUToLLVMConversion.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFLaunchAttachAttr.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFOpConversion.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFOpConversionLate.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFPredefinedVarToGPU.cpp
M flang/lib/Optimizer/Transforms/CompilerGeneratedNames.cpp
M flang/lib/Optimizer/Transforms/ControlFlowConverter.cpp
M flang/lib/Optimizer/Transforms/ConvertComplexPow.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.h
M flang/lib/Optimizer/Transforms/ExternalNameConversion.cpp
M flang/lib/Optimizer/Transforms/FIRToMemRef.cpp
M flang/lib/Optimizer/Transforms/FIRToSCF.cpp
M flang/lib/Optimizer/Transforms/GenRuntimeCallsForTest.cpp
M flang/lib/Optimizer/Transforms/LoopInvariantCodeMotion.cpp
M flang/lib/Optimizer/Transforms/LoopVersioning.cpp
M flang/lib/Optimizer/Transforms/MIFOpConversion.cpp
M flang/lib/Optimizer/Transforms/MemRefDataFlowOpt.cpp
M flang/lib/Optimizer/Transforms/MemoryAllocation.cpp
M flang/lib/Optimizer/Transforms/MemoryUtils.cpp
M flang/lib/Optimizer/Transforms/OptimizeArrayRepacking.cpp
M flang/lib/Optimizer/Transforms/PolymorphicOpConversion.cpp
M flang/lib/Optimizer/Transforms/SetRuntimeCallAttributes.cpp
M flang/lib/Optimizer/Transforms/SimplifyIntrinsics.cpp
M flang/lib/Optimizer/Transforms/SimplifyRegionLite.cpp
M flang/lib/Optimizer/Transforms/StackReclaim.cpp
M flang/lib/Optimizer/Transforms/VScaleAttr.cpp
M flang/lib/Parser/basic-parsers.h
M flang/lib/Parser/executable-parsers.cpp
M flang/lib/Parser/expr-parsers.cpp
M flang/lib/Parser/message.cpp
M flang/lib/Parser/openmp-utils.cpp
M flang/lib/Parser/parse-tree.cpp
M flang/lib/Parser/preprocessor.cpp
M flang/lib/Parser/prescan.cpp
M flang/lib/Parser/program-parsers.cpp
M flang/lib/Parser/source.cpp
M flang/lib/Parser/token-parsers.h
M flang/lib/Semantics/assignment.cpp
M flang/lib/Semantics/canonicalize-omp.cpp
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/check-case.cpp
M flang/lib/Semantics/check-data.cpp
M flang/lib/Semantics/check-data.h
M flang/lib/Semantics/check-deallocate.cpp
M flang/lib/Semantics/check-do-forall.cpp
M flang/lib/Semantics/check-if-stmt.cpp
M flang/lib/Semantics/check-nullify.cpp
M flang/lib/Semantics/check-select-rank.cpp
M flang/lib/Semantics/check-select-type.cpp
M flang/lib/Semantics/check-stop.cpp
M flang/lib/Semantics/compute-offsets.cpp
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/pointer-assignment.cpp
M flang/lib/Semantics/resolve-labels.cpp
M flang/lib/Semantics/resolve-names-utils.cpp
M flang/lib/Semantics/resolve-names-utils.h
M flang/lib/Semantics/runtime-type-info.cpp
M flang/lib/Semantics/scope.cpp
M flang/lib/Support/LangOptions.cpp
M flang/lib/Support/Version.cpp
M flang/lib/Testing/fp-testing.cpp
Log Message:
-----------
[flang][NFC] Remove unnecessary #include directives across flang (#207640)
Audit of every #include directive in flang/lib/ and
flang/include/flang/:
- Remove 423 #include directives (293 from lib/ translation units, 23
from lib-private headers, 107 from public headers) that are not needed:
no entity declared by the removed header is used - directly or in any
conditional-compilation branch (Windows, macOS, ARM/PowerPC,
REAL(16)/REAL(2) configuration macros) - in the including file, and for
headers no consumer in flang/lib, flang/tools, flang/unittests, or
flang-rt relies on the include as a re-export. Load-bearing includes
were examined and retained: textual .inc/.def expansions, tablegen
pass-header declaration/definition pairings, dialect headers carrying
generated-op interface dependencies, config-macro providers (e.g.
float128.h ahead of matmul-instances.inc guards), and ADL formatting
machinery (Evaluate/formatting.h).
- Add 5 missing direct #includes in lib translation units that used
entities only via now-removed transitive includes, and drop one
vestigial 'using namespace Fortran::runtime;' whose declaring header no
longer arrives transitively (nothing namespace-qualified from it was
used), per the include rules in flang/docs/C++style.md.
Assisted-by: AI
Commit: aaeac36566967650fcd63797a10da065eaedd90f
https://github.com/llvm/llvm-project/commit/aaeac36566967650fcd63797a10da065eaedd90f
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M flang/lib/Optimizer/CodeGen/TargetRewrite.cpp
M flang/test/Fir/target-rewrite-arg-position.fir
Log Message:
-----------
[flang][TargetRewrite] Keep argument attributes consistent after ABI arg shift (#208124)
When target-rewrite expands an argument into several arguments
(for example splitting a complex value into two scalars),
the arguments after it shift to the right.
Argument attributes were only moved for a shift introduced
by result lowering, so an attribute on a later argument
(e.g. fir.host_assoc) could stay on its old index and end up
on an unrelated argument. Remap every saved argument
attribute to the new index of its argument.
This is a consistency fix and may not cause a miscompile today.
Commit: d6c0a0a6a5c762fd327001c177490ee4c49ca718
https://github.com/llvm/llvm-project/commit/d6c0a0a6a5c762fd327001c177490ee4c49ca718
Author: jinge90 <ge.jin at intel.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M libc/config/gpu/amdgpu/entrypoints.txt
M libc/config/gpu/nvptx/entrypoints.txt
Log Message:
-----------
[libc][complex] Add basic complex ops including carg/cabs for GPU (#207887)
This PR adds carg and cabs for AMD GPU and also add all other basic
complex ops for NV GPU.
Signed-off-by: jinge90 <ge.jin at intel.com>
Commit: 478bbbeb0bdd7d186f308dccfa634280afaf0c00
https://github.com/llvm/llvm-project/commit/478bbbeb0bdd7d186f308dccfa634280afaf0c00
Author: hev <wangrui at loongson.cn>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
A llvm/test/CodeGen/LoongArch/lasx/xvexth.ll
A llvm/test/CodeGen/LoongArch/lsx/vexth.ll
Log Message:
-----------
[LoongArch][NFC] Add vector widening extends tests (#207315)
Commit: e60dc90e3134975afb1a951f792b71d4b648877f
https://github.com/llvm/llvm-project/commit/e60dc90e3134975afb1a951f792b71d4b648877f
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
M llvm/test/CodeGen/Hexagon/shadow-call-stack.ll
Log Message:
-----------
[Hexagon] Disable restore stubs when ShadowCallStack is active (#206302)
The returning restore stubs (e.g.
__restore_r16_through_r17_and_deallocframe) perform deallocframe+jumpr
r31 internally, returning via the on-stack return address. This is
incompatible with ShadowCallStack, which must restore r31 from the
shadow stack before returning.
Fix by having useRestoreFunction() return false when the ShadowCallStack
attribute is present, forcing inline callee-saved restores so the SCS
epilogue is properly emitted.
Commit: 4708581453ead90685a55e343cc5ace1e1ddabb1
https://github.com/llvm/llvm-project/commit/4708581453ead90685a55e343cc5ace1e1ddabb1
Author: hev <wangrui at loongson.cn>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/test/CodeGen/LoongArch/lasx/xvexth.ll
M llvm/test/CodeGen/LoongArch/lsx/vexth.ll
Log Message:
-----------
[LoongArch] Add DAG combines for vector widening extends (#207316)
Lower:
```
SEXT/ZEXT(High-Half-128-Bit-Lanes(vec))
```
to:
```
LSX: VEXTH.H.B, VEXTH.W.H, VEXTH.D.W
VEXTH.HU.BU, VEXTH.WU.HU, VEXTH.DU.WU
LASX: XVEXTH.H.B, XVEXTH.W.H, XVEXTH.D.W
XVEXTH.HU.BU, XVEXTH.WU.HU, XVEXTH.DU.WU
```
Commit: 63122f54df24161899609449e92589f3db556bf4
https://github.com/llvm/llvm-project/commit/63122f54df24161899609449e92589f3db556bf4
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
Log Message:
-----------
[NFC][ELF] Don't reimplement addReloc in MipsGotSection::addConstant (#208130)
This is a repeat of d48eb719d240 ("[NFC][ELF] Don't reimplement addReloc
in GotSection::addConstant") but for MipsGotSection. Unfortunately,
9fb61d972213 ("[NFCI][ELF][Mips] Refactor MipsGotSection to avoid
explicit writes (#178561)") was put up for review before, and was landed
after, that commit, and I did not think to update it, so it ended up
copying the old GotSection code. Although there's no motivation to
support CHERI in this code (even though CHERI-MIPS existed it never used
the highly-specialised MipsGotSection to hold capabilities), it's still
better to use our own abstractions, and to be consistent.
Fixes: 9fb61d972213 ("[NFCI][ELF][Mips] Refactor MipsGotSection to avoid
explicit writes (#178561)")
Commit: 5a924bf3962c7f0c84e2de46172cd1d01ae3a67d
https://github.com/llvm/llvm-project/commit/5a924bf3962c7f0c84e2de46172cd1d01ae3a67d
Author: Orphic Dreamer <160723353+Siya-05 at users.noreply.github.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenCUDANV.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/CodeGen/CMakeLists.txt
M clang/lib/CIR/CodeGen/TargetInfo.cpp
M clang/lib/CIR/CodeGen/TargetInfo.h
A clang/lib/CIR/CodeGen/Targets/NVPTX.cpp
A clang/test/CIR/CodeGenCUDA/surface.cu
Log Message:
-----------
[CIR][CUDA] Support built-in CUDA surface type (#196079)
Related: #179278
This patch adds initial support for CUDA built-in surface types in CIR
for device-side compilation.
CUDA surface references are lowered to the NVPTX device-handle
representation (`i64`), matching existing Clang CodeGen behavior.
Changes
* Add `getCUDADeviceBuiltinSurfaceDeviceType()` target hook to
`TargetCIRGenInfo`
* Implement NVPTX surface lowering in `NVPTXTargetCIRGenInfo`
* Handle CUDA built-in surface types in `CIRGenTypes::convertType`
* Add CIR CUDA test coverage for device-side surface lowering
Notes
* This patch only implements device-side surface type lowering support
* Texture types remain unsupported
* TBAA handling for surface/texture types is left for follow-up work
---------
Co-authored-by: mencotton <mencotton0410 at gmail.com>
Co-authored-by: David Rivera <davidriverg at gmail.com>
Co-authored-by: Andy Kaylor <akaylor at nvidia.com>
Commit: 1cefbacdaa0156880d8363b24ae04638a8fd31c8
https://github.com/llvm/llvm-project/commit/1cefbacdaa0156880d8363b24ae04638a8fd31c8
Author: Petr Hosek <phosek at google.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M libcxx/src/include/overridable_function.h
Log Message:
-----------
[libc++] Replace the of use custom sections for detecting overriden functions (#175896)
This is a follow up to #133876 and an alternative to #120805 which
doesn't rely on aliases and works across both ELF and Mach-O. This
mechanism is preferable in baremetal environments since it doesn't
require special handling of the custom sections.
Commit: 333edde4e80e02d6fe5e866abf317969b66c0b8e
https://github.com/llvm/llvm-project/commit/333edde4e80e02d6fe5e866abf317969b66c0b8e
Author: yonghong-song <yhs at fb.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/lib/CodeGen/Targets/BPF.cpp
A clang/test/CodeGen/bpf-struct-return-regs.c
A clang/test/CodeGen/bpf-struct-return.c
A llvm/test/CodeGen/BPF/aggr_ret_regs.ll
Log Message:
-----------
[BPF] Return small aggregates directly in registers (#206876)
Previously the BPF ABI always returned aggregate (struct/union) types
indirectly through an sret pointer, regardless of size. This is
inconsistent with how classifyArgumentType() already passes small
aggregates: arguments up to 128 bits are coerced into one or two 64-bit
registers, while only larger aggregates use an indirect reference.
Make classifyReturnType() mirror that convention by factoring the shared
aggregate handling into a classifyAggregateType() helper used by both:
- empty aggregates (0 bits) are ignored;
- aggregates up to 64 bits are returned directly, coerced to an integer
of the padded size;
- aggregates of 65..128 bits are returned directly as [2 x i64];
- aggregates larger than 128 bits are returned indirectly via sret.
This keeps each returned value within the backend's two-register return
convention and avoids an unnecessary memory round-trip for small
structs.
This also aligns BPF with the general-purpose C ABIs of other targets:
both x86-64 (System V, RAX:RDX) and AArch64 (AAPCS64, X0:X1) return
aggregates up to 16 bytes in a pair of registers and only fall back to
an indirect sret pointer for larger ones.
Co-authored-by: Yonghong Song <yonghong.song at linux.dev>
Commit: 2b080317511d3285c7376e25ee9668edcc41c06e
https://github.com/llvm/llvm-project/commit/2b080317511d3285c7376e25ee9668edcc41c06e
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/flang/lib/Optimizer/OpenACC/Analysis/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Port 9a1f5b76b4 (#208126)
Commit: 6eb35326147077a18f6fc56540059d779d7e3d4b
https://github.com/llvm/llvm-project/commit/6eb35326147077a18f6fc56540059d779d7e3d4b
Author: Shreeyash Pandey <shrpand at qti.qualcomm.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M libunwind/test/aarch64_za_unwind.pass.cpp
Log Message:
-----------
[libunwind] include alloca.h in test/aarch64_za_unwind.pass.cpp (#207376)
Glibc provides the alloca function as a part of stdlib.h when
_GNU_SOURCE is declared (which is the case with standard linux builds).
[1]
On non-glibc systems, this may not be the case (for example, picolibc).
These libraries may not implicitly include alloca.h as a part of the
standard lib.
[1]
https://github.com/bminor/glibc/blob/04e750e75b73957cf1c791535a3f4319534a52fc/stdlib/stdlib.h#L728
Signed-off-by: Shreeyash Pandey <shrpand at qti.qualcomm.com>
Commit: 7ca17050c766ff1a1bd4bc74525f018ba1d9a104
https://github.com/llvm/llvm-project/commit/7ca17050c766ff1a1bd4bc74525f018ba1d9a104
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CGCoroutine.cpp
M clang/test/CodeGenCoroutines/coro-elide.cpp
M clang/test/CodeGenCoroutines/coro-halo.cpp
M clang/test/CodeGenCoroutines/pr65018.cpp
Log Message:
-----------
[CodeGen] Set attributes on coroutine wrapper functions (#207961)
Call SetInternalFunctionAttributes() so that target feature attributes
get set. This ensures that inlining works without having to reason about
target-specific inline compatibility logic.
Commit: e6525149c347a4787dd82ce5d2663bc577afd4a3
https://github.com/llvm/llvm-project/commit/e6525149c347a4787dd82ce5d2663bc577afd4a3
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M clang-tools-extra/clang-tidy/cppcoreguidelines/SpecialMemberFunctionsCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/special-member-functions-implicit-delete.cpp
Log Message:
-----------
[clang-tidy] Fix AllowImplicitlyDeletedCopyOrMove missing-move false positive (#207586)
The documentation for `cppcoreguidelines-special-member-functions` says
that `AllowImplicitlyDeletedCopyOrMove` suppresses diagnostics for
classes which implicitly delete copy or move operations.
In practice, the move operations are missing because the user-declared
destructor prevents their implicit declaration. This commit suppresses
that missing-move diagnostic when both copy operations are implicitly
deleted and no move operation is user-declared.
Godbolt: https://clang-tidy.godbolt.org/z/h1nT84Tee
Closes https://github.com/llvm/llvm-project/issues/196615
Commit: 70df3ccef10d336d3644df293fddb2adcb36e097
https://github.com/llvm/llvm-project/commit/70df3ccef10d336d3644df293fddb2adcb36e097
Author: Petr Hosek <phosek at google.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M libcxx/src/include/overridable_function.h
Log Message:
-----------
Revert "[libc++] Replace the of use custom sections for detecting overriden functions" (#208157)
Reverts llvm/llvm-project#175896 since it broke the build of internal
symbolizer used by sanitizers.
Commit: e7195d5d23adf9336555e7244e2fcf397111c57e
https://github.com/llvm/llvm-project/commit/e7195d5d23adf9336555e7244e2fcf397111c57e
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
A llvm/test/Transforms/LoopInterchange/debug-record-after-phi.ll
Log Message:
-----------
[LoopInterchange] Fix crash when dbg_value exists right after PHI (#208147)
When enabling reduction2mem with `-loop-interchange-reduction-to-mem`
and the input IR contains `dbg_value`s immediately after a certain PHI
node, assertion failure could be triggered due to the insertion position
of newly created PHI node. This patch fixes the issue by changing
IRBuilder ctor to be called. TBH, I'm not entirely sure what the
difference is between `IRBuilder::IRBuilder(Instruction *)` and
`IRBuilder::IRBuilder(BasicBlock *, BasicBlock::iterator)`, but judging
from the generated code, the behavior with this patch seems reasonable.
Taken over from #183273
Commit: c279890c85da307abe34f10333442bbf72a60644
https://github.com/llvm/llvm-project/commit/c279890c85da307abe34f10333442bbf72a60644
Author: Haibo Jiang <jianghaibo9 at huawei.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/lib/Passes/IndirectCallPromotion.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
A bolt/test/AArch64/icp-inline.c
A bolt/test/AArch64/icp.c
M bolt/test/AArch64/unsupported-passes.test
Log Message:
-----------
[BOLT][AArch64] Support call ICP (#208158)
* extends MCPlusBuilder with comparision between registers.
* updates the ICP pass to request a scavenged register for AArch64
callsites.
* wires ICP code generation on AArch64.
Commit: 475f7026055c77007d19c708ed13465a4206dfee
https://github.com/llvm/llvm-project/commit/475f7026055c77007d19c708ed13465a4206dfee
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaExpr.cpp
M clang/test/SemaTemplate/fun-template-def.cpp
Log Message:
-----------
[Clang] No longer reject call expression whose type is a not-yet-deduced auto type. (#208007)
This fixes a regression introduced in #139246
Fixes #207565
Commit: 62907d4a3bb330f79f41f548bfa836223c12735e
https://github.com/llvm/llvm-project/commit/62907d4a3bb330f79f41f548bfa836223c12735e
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/test/CodeGen/PowerPC/test-issue-98598.ll
Log Message:
-----------
[PowerPC] Fix combineSignExtendSetCC() for large/small types (#207721)
The code should reject larger types (like i128) and zero-extend smaller
types (like i8 and i16). Consolidate the handling based on being
smaller/larger than OpVT to reduce the number of PPC64 conditions.
Commit: 35678db1b4dbf7e14ad5238eee5590bf32aebb87
https://github.com/llvm/llvm-project/commit/35678db1b4dbf7e14ad5238eee5590bf32aebb87
Author: SiHuaN <liyongtai at iscas.ac.cn>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsRISCV.td
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
Log Message:
-----------
[Clang][RISCV] packed absolute difference sum intrinsics (#207936)
Add the __riscv_pabdsumu/pabdsumau_* header wrappers over new
__builtin_riscv_* builtins, lowering to the
llvm.riscv.pabdsumu/pabdsumau intrinsics.
Commit: ea6d5c6a2e37705688c74167990115e535058065
https://github.com/llvm/llvm-project/commit/ea6d5c6a2e37705688c74167990115e535058065
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/test/Dialect/XeGPU/xegpu-blocking.mlir
Log Message:
-----------
[MLIR][XeGPU] Fix blocking pass for scf.if distribution (#207060)
Commit: b5ed0ae6bc70792cb9749444b2803c3fa72276e4
https://github.com/llvm/llvm-project/commit/b5ed0ae6bc70792cb9749444b2803c3fa72276e4
Author: Javed Absar <javed.absar at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/IR/BufferizationEnums.td
M mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.td
A mlir/include/mlir/Dialect/Bufferization/Transforms/StaticMemoryPlanning.h
M mlir/lib/Dialect/Bufferization/Transforms/CMakeLists.txt
M mlir/lib/Dialect/Bufferization/Transforms/StaticMemoryPlannerAnalysis.cpp
A mlir/lib/Dialect/Bufferization/Transforms/StaticMemoryPlanning.cpp
A mlir/test/Dialect/Bufferization/Transforms/static-memory-planner-best-fit.mlir
Log Message:
-----------
[mlir][bufferization] Add best-fit algorithm to static memory planner (#207403)
Introduces an algorithm selection option to the static memory planner
pass and adds a best-fit algorithm that reuses memory from expired allocations by
finding the smallest suitable gap.
I have tested the correctness of the best-fit algorithm with an
independent randomized verifier.
Signed-off-by: mabsar <mabsar at qti.qualcomm.com>
Commit: f02b48182be73c531fb83312da15c85031fadde3
https://github.com/llvm/llvm-project/commit/f02b48182be73c531fb83312da15c85031fadde3
Author: Krisitan Erik Olsen <kristian.erik at outlook.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Analysis/AssumptionCache.cpp
A llvm/test/Transforms/DropUnnecessaryAssumes/duplicate-affected-value.ll
Log Message:
-----------
[AssumptionCache] Deduplicate affected values in removeAffectedValues (#205441)
removeAffectedValues can encounter duplicate entries in the Affected
list when a separate_storage bundle uses the same pointer for both
arguments (e.g. "separate_storage"(ptr %p, ptr %p)). The duplicate
entries share both the same value and the same bundle index. The first
iteration handles the value completely and may erase the AffectedValues
entry, causing the second iteration to fail the assertion.
This patch deduplicates entries in removeAffectedValues by (Value *,
Index) pair, matching the deduplication already done in
updateAffectedValues. This also fixes the ExpectedMatches counting in
the debug logic added by #205275, which otherwise miscounts when
duplicates are present.
Fixes #205378.
Commit: 063ac503e44ff17dda84698375091fa5b8b53557
https://github.com/llvm/llvm-project/commit/063ac503e44ff17dda84698375091fa5b8b53557
Author: lrzlin <linrunze at loongson.cn>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
A llvm/test/CodeGen/LoongArch/lasx/vec-shuffle-any-ext.ll
M llvm/test/CodeGen/LoongArch/lasx/vxi1-masks.ll
Log Message:
-----------
[LoongArch] Lower ANY_EXTEND to ZERO_EXTEND under LASX to avoid scalarization (#201099)
Some integer/floating-point conversion will generate ANY_EXTEND under
LASX, lowering it to ZERO_EXTEND to avoid scalarization.
Commit: 459cadfaf12cde6b1fda2fde932b277f1630c124
https://github.com/llvm/llvm-project/commit/459cadfaf12cde6b1fda2fde932b277f1630c124
Author: Emmett <emmettzhang2020 at outlook.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M libcxx/docs/Status/Cxx26Issues.csv
M libcxx/include/__chrono/duration.h
M libcxx/include/chrono
A libcxx/test/std/time/time.duration/duration.verify.cpp
Log Message:
-----------
[libc++][chrono] Implement LWG 4481: Disallow `chrono::duration<const T, P>` (#207558)
Commit: 006423944b8efdb115d8fd001cffca888605cd7f
https://github.com/llvm/llvm-project/commit/006423944b8efdb115d8fd001cffca888605cd7f
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M mlir/lib/Conversion/ArithToSPIRV/ArithToSPIRV.cpp
M mlir/test/Conversion/ArithToSPIRV/arith-to-spirv.mlir
M mlir/test/Conversion/ArithToSPIRV/fast-math.mlir
Log Message:
-----------
[mlir][SPIR-V] Lower arith.maxnumf/minnumf to spirv.GL.NMax/NMin (#205975)
The previous lowering targeted spirv.GL.FMax/FMin + NaN guards
spirv.GL.NMax/NMin natively treat NaN as missing, matching
arith.maxnumf/minnumf exactly (no guards required)
Commit: 1d387731334d04f677804a09f29e0863ca977e0c
https://github.com/llvm/llvm-project/commit/1d387731334d04f677804a09f29e0863ca977e0c
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-epilogue-vec.ll
A llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-vscale-x-UF-step.ll
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
Log Message:
-----------
[LV] Allow setting scalable VFs for `-epilogue-vectorization-force-VF` (#205081)
Follow up to #204953. This allows replacing a unit test with an IR test.
Commit: 736771b6a017b5a18c03819a3348ff793c473261
https://github.com/llvm/llvm-project/commit/736771b6a017b5a18c03819a3348ff793c473261
Author: Chirag Patel <chirag198838 at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGenTypes/MachineValueType.h
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
Log Message:
-----------
[DAG] Adding MVT::widenIntegerElementType to widen both Scalar and Vectors of integer type. (#207148)
Adding MVT::widenIntegerElementType to widen both Scalar and Vectors of
integer type. e.g. i16 -> i32, v8i32->v8i64.
fixes #206730
Commit: e1187834d342ae7890884dbc1ef69de7b5d9fdc1
https://github.com/llvm/llvm-project/commit/e1187834d342ae7890884dbc1ef69de7b5d9fdc1
Author: zip-stack-debug <doremyalt at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/div-i256.ll
M llvm/test/CodeGen/AArch64/sbc-add-constant.ll
Log Message:
-----------
[AArch64][DAG] Port adde and sube combine to AArch64 (#202227)
Same principles apply in AArch64 as they do in ARM.
Commit: 529c7d563bac018b8ea43ea8017c113ee384c004
https://github.com/llvm/llvm-project/commit/529c7d563bac018b8ea43ea8017c113ee384c004
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/PassManagerInternal.h
Log Message:
-----------
[IR][NFC] Make PassConcept immovable (#208167)
PassConcept is only ever created as a unique_ptr when added to the pass
list of a pass manager. The instances are never copied or moved. Due to
inheritance, this also wouldn't work anyway. Explicitly forbid
copying/moving and remove the dead functions.
Preliminary work for removing the vtable from PassConcept/PassModel.
Commit: 32d06af3ea6d05c0f8b5820da3f651d4e03bb80d
https://github.com/llvm/llvm-project/commit/32d06af3ea6d05c0f8b5820da3f651d4e03bb80d
Author: David Green <david.green at arm.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/test/CodeGen/Thumb2/vqabs.ll
M llvm/test/CodeGen/Thumb2/vqneg.ll
Log Message:
-----------
[ARM][MVE] Tests for new sqabs and sqneg tests. NFC (#208180)
Commit: 3451dd23d9b098e8cf7201ab303874dab2d88c19
https://github.com/llvm/llvm-project/commit/3451dd23d9b098e8cf7201ab303874dab2d88c19
Author: Ricardo Jesus <rjj at nvidia.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/arm64-fp128.ll
M llvm/test/CodeGen/AArch64/arm64-neon-v1i1-setcc.ll
M llvm/test/CodeGen/AArch64/extract-vector-cmp.ll
M llvm/test/CodeGen/AArch64/fcmp.ll
M llvm/test/CodeGen/AArch64/sme-aarch64-svcount.ll
M llvm/test/CodeGen/AArch64/sve-select.ll
Log Message:
-----------
[AArch64] Fold any/sign-extend of CSET. (#207414)
This is useful to enable selecting i64 CSETM when legalisation places an
extend between a CSET and sext_inreg.
Commit: 302f7aa18e0d68d9db74c2586bd66ef8e4d98e53
https://github.com/llvm/llvm-project/commit/302f7aa18e0d68d9db74c2586bd66ef8e4d98e53
Author: Aayush Shrivastava <iamaayushrivastava at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
A llvm/test/Transforms/VectorCombine/X86/shuffle-of-binops-i1.ll
Log Message:
-----------
[VectorCombine] Fold concat(binop(a,c), binop(b,d)) -> binop(concat(a,b), concat(c,d)) for i1 vectors (#206087)
Fixes #205707
`VectorCombine::foldShuffleOfBinops` rewrites `shuffle(binop(a,c),
binop(b,d))` into `binop(shuffle(a,b), shuffle(c,d))` but only when the
new form is strictly cheaper. For concat shuffles of i1 vectors, both
forms have equal cost, so the transform was silently rejected.
This fix allows the equal-cost transform when both binops are single-use
`BinaryOperators` (not icmps, to avoid widening narrow AVX-512
comparisons), canonicalising the IR to a wider binop.
The motivating case is AVX-512 mask operations: `NOT(concat(XOR(a,c),
XOR(b,d)))` becomes `NOT(XOR(concat(a,b), concat(c,d)))`, which the
backend naturally selects as `kxnorq`, reducing `kxord + kxord +
kunpckdq + knotq` (4 instructions) to `kunpckdq + kunpckdq + kxnorq` (3
instructions).
Commit: 764645b5ef49b18b2ca7c3efc3ca6954e1337f1b
https://github.com/llvm/llvm-project/commit/764645b5ef49b18b2ca7c3efc3ca6954e1337f1b
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/avx512fp16-combine-shuffle-fma.ll
M llvm/test/CodeGen/X86/vector-narrow-binop.ll
M llvm/test/CodeGen/X86/vector-reduce-fmul-fast.ll
Log Message:
-----------
[SDAG][X86] Support shrinking target-independent nodes (#206721)
X86 generally tries to shrink operations to work on smaller vector sizes
if possible. This happens in
SimplifyDemandedVectorEltsForTargetNode() for target-specific opcodes,
but it's currently not possible to do this for generic opcodes.
This introduces a getPreferredShrunkVectorSize() TLI hook to allow
shrinking generic ops based on demanded elements.
The primary motivation for this is to avoid regressions due to
https://github.com/llvm/llvm-project/pull/188489, which uplifts a
previously x86-specific node to become target-independent.
This PR enables the shrinking for fsub and fmul as examples.
Unfortunately, for many other ops we get various regressions, mostly
because horizontal operations are no longer formed.
Commit: 3fc15b50c6e5b79332023fe7ccacb35b2ed5614e
https://github.com/llvm/llvm-project/commit/3fc15b50c6e5b79332023fe7ccacb35b2ed5614e
Author: Sean Clarke <sclarke at tenstorrent.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Analysis/HashRecognize.cpp
M llvm/test/Analysis/HashRecognize/cyclic-redundancy-check.ll
M llvm/test/Transforms/LoopIdiom/cyclic-redundancy-check.ll
Log Message:
-----------
[HashRecognize] Make `LHSAux` null if it is dead (#207231)
HashRecognize detects big-endian CRC loops with auxiliary data where the
bitwidth of `LHS` exceeds that of `LHSAux`. However, in this case,
`LHSAux` is zero-extended for the most significant bit check in each
iteration, and as such is effectively dead. Later optimization may even
miscompile in this case: for example, in the included
`crc16.be.tc8.zext.data` and `crc16.be.tc8.misalign` test cases,
`optimizeCRCLoop` emits `lshr i8 %crc.data.indexer, 8`, thereby creating
poison.
Since `LHSAux` is dead in this case, the user should receive a null
`LHSAux` instead.
Commit: 475cef62595255a34b795472bba330a60058abb0
https://github.com/llvm/llvm-project/commit/475cef62595255a34b795472bba330a60058abb0
Author: Keshav Vinayak Jha <31160700+keshavvinayak01 at users.noreply.github.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/function-returns.ll
Log Message:
-----------
[SelectionDAG][AMDGPU] Preserve known bits for demoted sret pointers (#203468)
AMDGPU marks sret pointers with high-zero known bits so stores can be
folded into MUBUF base+offset addressing. Explicit sret arguments keep
this information through an AssertZext, but implicit sret lowering
passes the hidden return pointer through `DemoteRegister` as a
`CopyToReg/CopyFromReg` pair, where the fact is not visible to
SelectionDAG known-bits queries.
Add a `TargetLowering` hook for sret pointer known bits and use a shared
helper to materialize those bits as an `AssertZext` for both explicit
and demoted sret pointers.
Validated with llvm-test-depends, the AMDGPU function-returns test, and
the full llvm/test/CodeGen suite.
Assisted-by: Codex
---------
Signed-off-by: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
Commit: 29553517d044e1864b6dd00b0236006ae999d043
https://github.com/llvm/llvm-project/commit/29553517d044e1864b6dd00b0236006ae999d043
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rvp-reverse.ll
Log Message:
-----------
[RISCV][P-ext] Improve codegen for packed reverse intrinsics (#207575)
This patch improves the codegen for vector reverse for RVP.
Commit: 74e44e433a8e1da3da263833e32adde77889f734
https://github.com/llvm/llvm-project/commit/74e44e433a8e1da3da263833e32adde77889f734
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/test/tools/llvm-ar/arm64x-hybridobj.yaml
M llvm/test/tools/llvm-lib/arm64x-hybridobj.yaml
M llvm/test/tools/llvm-readobj/COFF/arm64x-hybridobj.yaml
Log Message:
-----------
[llvm-readobj][llvm-ar][COFF] Use exclude for .obj.arm64ec section in tests (NFC) (#208116)
For consistency with #207612.
Commit: cab8bab9642c33ea42355806730ed431d5cbf205
https://github.com/llvm/llvm-project/commit/cab8bab9642c33ea42355806730ed431d5cbf205
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Forbid CSE'ing writes (NFC) (#207443)
CSE'ing two identical writes does not consider the fact that there could
be another write that writes an aliasing memory location. Fix the
potential miscompile. Note that there is currently no miscompile, as we
never remove a write, but the patch has the benefit of not processing
writes unnecessarily.
Commit: 17b27e7c2cb6267695733969bfca2d5ebb4a0c23
https://github.com/llvm/llvm-project/commit/17b27e7c2cb6267695733969bfca2d5ebb4a0c23
Author: David Green <david.green at arm.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64Processors.td
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/mul.ll
Log Message:
-----------
[AArch64] Increase the relative cost of vector i64 multiply on Neoverse V3ae. (#207723)
The throughput of vector nxv2i64 multiplies on neoverse v3ae is 1/2, compared
to the throughput of 2 for integer multiplies. This large difference can mean
it is more profitable than normal to use scalar loops as opposed to vectorization.
This adds a subtarget feature that increases the cost multiple by 4 for 64bit
vector multiplies for specific CPUs. The cost model of llvm does not mean that
we can model throughputs correctly, but this should help. The same feature is
added to N2 as it has a similar difference between vector and scalar multiply
cost throughputs.
Commit: 9ab13dc4f7ff3c536e493947781ae344bb4be69a
https://github.com/llvm/llvm-project/commit/9ab13dc4f7ff3c536e493947781ae344bb4be69a
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M mlir/lib/Conversion/ComplexToSPIRV/ComplexToSPIRV.cpp
M mlir/test/Conversion/ComplexToSPIRV/complex-to-spirv.mlir
Log Message:
-----------
[mlir][ComplexToSPIRV] Add lowering for complex.eq and complex.neq (#206279)
Commit: e1f7b53881066bfd6b6d1628e873002bd8ff99a7
https://github.com/llvm/llvm-project/commit/e1f7b53881066bfd6b6d1628e873002bd8ff99a7
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M lld/COFF/Driver.cpp
A lld/test/COFF/arm64x-hybridobj.s
Log Message:
-----------
[LLD][COFF] Add support for multi-arch ARM64X object files (#207868)
Commit: eb4690c251141b7d4ef31f321acc6fb3dc09a1bf
https://github.com/llvm/llvm-project/commit/eb4690c251141b7d4ef31f321acc6fb3dc09a1bf
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M flang/include/flang/Evaluate/tools.h
M flang/lib/Evaluate/tools.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertExprToHLFIR.cpp
A flang/test/Lower/split-sum-expression-tree-lowering.f90
Log Message:
-----------
[flang][Lower] Add alternative real expression lowering (#207371)
This is opt-in by an engineering option and disabled by default.
In section 10.1.5.2.4 of the 2023 Fortran standard "Evaluation of
numerical intrinsic operations", the standard explicitly allows
alternate mathematically equivalent lowerings. For example the source
expression X + Y + Z could be evaluated (X + Y) + Z, X + (Y + Z) or even
(X + Z) + Y, etc.
The open source benchmark SNBone shows significantly better results with
classic flang because classic flang emits real arithmetic expressions in
a different order. In the case of this benchmark it reduces dependency
depth for instructions issued to the vector unit, allowing for more of
the arithmetic to be parallelised over multiple vector execution units
in the ALU.
The lowering added by this patch tries to mimic the way classic flang
orders instructions for these expressions. I did not read any classic
flang source when writing this patch. There is still a notable
difference in that classic flang uses FMA intrinsics whereas LLVM Flang
relies on the rest of the pipeline to introduce FMA when it is safe to
do so.
This is a much less aggressive optimisation than simply enabling reassoc
in the fast-math flags because it does not allow reassociation between
Fortran language statements. This is why I implemented it in lowering.
The new option enables an experimental lowering path for scalar real
top-level addition chains. When enabled with
-enable-split-sum-expression-tree-lowering, eligible sums are split
after the first two terms and rebuilt as a right-associated tail plus
head. This lets the independent tail terms be evaluated before the
assignment-related head, giving the backend a different expression tree
while leaving the default lowering unchanged.
The transform is deliberately narrow. It only applies to scalar real RHS
expressions in assignments and rejects cases with vector subscripts,
parentheses, subtraction, procedure references, or volatile/asynchronous
symbols on either side of the assignment. Subtraction is left out
because the split would need to carry signed terms; division stays
within an individual additive term and does not change the top-level
chain.
In testing I have found some tests in the Fujitsu test suite miscompare
due to small changes in floating point rounding. There are no failures
or regressions in SPEC2017 or SPEC2026. I think it would be legal
according to the Fortran standard to enable this by default, but I am
not proposing that here, and will not consider it until after the LLVM
release branch point.
Assisted-by: Codex
Commit: dcf1b8f2c00b38777f71297afc7b575cd2d9300a
https://github.com/llvm/llvm-project/commit/dcf1b8f2c00b38777f71297afc7b575cd2d9300a
Author: Oleksandr Tarasiuk <oleksandr.tarasiuk at outlook.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M clang-tools-extra/clang-doc/Serialize.cpp
M clang/docs/ReleaseNotes.md
M clang/include/clang/AST/ASTStructuralEquivalence.h
M clang/include/clang/AST/DeclFriend.h
M clang/include/clang/AST/DeclTemplate.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/Basic/DeclNodes.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/Template.h
M clang/include/clang/Sema/TemplateDeduction.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ASTStructuralEquivalence.cpp
M clang/lib/AST/DeclFriend.cpp
M clang/lib/AST/DeclPrinter.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/ODRHash.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaAccess.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/test/CXX/class.access/class.friend/p3-cxx0x.cpp
M clang/test/CXX/drs/cwg18xx.cpp
M clang/test/CXX/drs/cwg19xx.cpp
M clang/test/CXX/drs/cwg28xx.cpp
M clang/test/CXX/drs/cwg6xx.cpp
M clang/test/CXX/temp/temp.decls/temp.friend/p5.cpp
A clang/test/CXX/temp/temp.decls/temp.friend/p6.cpp
M clang/test/Parser/cxx2c-variadic-friends.cpp
M clang/test/SemaCXX/many-template-parameter-lists.cpp
M clang/test/SemaTemplate/GH71595.cpp
M clang/test/SemaTemplate/concepts-friends.cpp
M clang/test/SemaTemplate/ctad.cpp
M clang/test/SemaTemplate/friend-template.cpp
Log Message:
-----------
[Clang] support friend declarations with a dependent nested-name-specifier (#191268)
Fixes #104057
---
This patch adds support for friend declarations with a dependent NNS
Commit: 293a55ce46a56accc10965712e77f4ba09f15322
https://github.com/llvm/llvm-project/commit/293a55ce46a56accc10965712e77f4ba09f15322
Author: Ömer Sinan Ağacan <omeragacan at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/GlobalISel/inline-memcpy.mir
M llvm/test/CodeGen/AArch64/GlobalISel/inline-memmove.mir
Log Message:
-----------
[GlobalISel][AArch64] Remove IRs from inline-{memcpy,memmove} tests (NFC) (#208066)
Commit: cd854821ae5550350431146b8fe88005b29da257
https://github.com/llvm/llvm-project/commit/cd854821ae5550350431146b8fe88005b29da257
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64MacroFusion.cpp
M llvm/test/CodeGen/AArch64/misched-fusion-arith-cbz.ll
M llvm/test/CodeGen/AArch64/misched-fusion-arith-cbz.mir
Log Message:
-----------
[AArch64] Add missing arithmetic to arith+cb(n)z clustering (#203721)
This patch adds a few missing opcodes for arithmetic+CB(N)Z clustering.
Most of them complement an already existing rr/rs variant for
pre/post-RA coverage. The only one which is completely new is ORN which
I think can be reasonably expected to behave similarly on AArch64
targets.
Commit: dd37265910a290887a16696de6f0dea1731ab4c8
https://github.com/llvm/llvm-project/commit/dd37265910a290887a16696de6f0dea1731ab4c8
Author: Jolyon <yangjian.c at bytedance.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/BasicBlockUtils.h
M llvm/include/llvm/Transforms/Utils/Local.h
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/Local.cpp
Log Message:
-----------
[CodeGenPrepare] Cache known-live PHIs when deleting dead PHI chains (#207191)
This patch fixes a compile-time issue in CodeGenPrepare for huge
functions.
`DeleteDeadPHIs` may repeatedly prove overlapping PHI chains non-dead.
For very large functions, many PHIs can share the same non-dead def-use
suffix, causing the same suffix to be scanned many times.
Add an `KnownNonDeadPHIs` cache to `RecursivelyDeleteDeadPHINode`
and `DeleteDeadPHIs`. When a chain is proven non-dead, visited PHIs are
recorded so later queries can stop once they reach one of them.
This reduces the pathological CodeGenPrepare case from ~30mins to ~30s.
Commit: d582a7d2196077d98b97e74a537ec56120d7704c
https://github.com/llvm/llvm-project/commit/d582a7d2196077d98b97e74a537ec56120d7704c
Author: David Truby <david.truby at arm.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M flang-rt/lib/runtime/io-api-server.cpp
Log Message:
-----------
[flang-rt] Fix io-api-server when building for arm64ec (#207998)
Commit: 5f33a29bebe42a032a163a80e311d8ba305de3f6
https://github.com/llvm/llvm-project/commit/5f33a29bebe42a032a163a80e311d8ba305de3f6
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanValue.h
Log Message:
-----------
[VPlan] Introduce VPConstant VPIRValue (NFC) (#207387)
There a gap in the VPIRValue class hierarchy, where constant live-ins
are absent, when this is in fact a very common case. The motivation of
introducing this new class is to refine optimizations to account for the
fact that non-constant live-ins need broadcast.
Commit: 2f07e6be216858d15e691b2a59514aa73db0f8dc
https://github.com/llvm/llvm-project/commit/2f07e6be216858d15e691b2a59514aa73db0f8dc
Author: Piotr Fusik <p.fusik at samsung.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M clang/include/clang/AST/TypeBase.h
M clang/lib/AST/Type.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/CodeGenCXX/dynamic-cast-exact.cpp
Log Message:
-----------
[Clang] Fix missing vtable for `dynamic_cast<FinalClass &>(*this)` in a function template (#207349)
This is a follow-up to #202594, which fixed a pointer cast, but not
a reference cast. Surprisingly, `CXXDynamicCastExpr::getType()`
for a reference cast is a `RecordType` and not a `ReferenceType`.
How this happens:
In `Sema::BuildCXXNamedCast`, a `CastOperation Op` variable
is constructed. The `CastOperation` constructor initializes
`ResultType(destType.getNonLValueExprType(S.Context))`
where `QualType::getNonLValueExprType` turns a `ReferenceType` into
a `RecordType`. `Sema::BuildCXXNamedCast` then passes `Op.ResultType`
to `CXXDynamicCastExpr::Create`.
Commit: 024a691e7784e7ebe3783ddaf557ee07a127d934
https://github.com/llvm/llvm-project/commit/024a691e7784e7ebe3783ddaf557ee07a127d934
Author: Luke Lau <luke at igalia.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/test/Transforms/LoopVectorize/AArch64/alias-mask.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-option.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse-mask4.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse-mask4.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-gather-scatter-tailpred.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-counting-down.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/VPlan/RISCV/vplan-riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/runtime-checks-hoist.ll
Log Message:
-----------
[VPlan] Pull out reverses and splice.lefts from elementwise operations (#199234)
InstCombine pulls reverses up and out of operations, e.g.
`binop(reverse(x), reverse(y)) -> reverse(binop(x,y))`. This reduces the
overall number of reverses, and also allows the `reverse(reverse(x))`
combine to kick in much more.
This implements the same canonicalization in VPlan which allows for more
vectorization due to cost model improvements, and generally handles more
cases when there's predication involved.
If we have a reversed load and reversed store whose stores are now
eliminated, we will be left with just two reversed masks on the load and
store. But with EVL tail folding this will leave behind a
`splice.right(ops(splice.left(...)))` pair on the value from memory.
InstCombine can fold away a pair of `vp.reverse(ops(vp.reverse(...)))`,
but it can't fold a pair of splices. So to prevent regressions we also
have to pull splice.lefts like `ops(splice.left(poison, x, evl)) ->
splice.left(poison, ops(x), evl)`. The `splice.right(splice.left(x)) ->
x` VPlan transform will then kick in and remove it. We don't need to
pull splice.rights since they are only emitted at stores.
Commit: 4ddfd96314507b6a829b1df5afc5455f345ba38d
https://github.com/llvm/llvm-project/commit/4ddfd96314507b6a829b1df5afc5455f345ba38d
Author: ayrai-gb <ayrai at amd.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/IR/Instruction.cpp
M llvm/test/Transforms/SimplifyCFG/hoist-with-metadata.ll
Log Message:
-----------
[IR] Preserve !nofpclass in dropUBImplyingAttrsAndMetadata (#208186)
`!nofpclass` is a poison-generating metadata kind, so it should be
preserved by dropUBImplyingAttrsAndMetadata().
Commit: 9a465c3f2493bbdca2becb79450d4ee33306bd5d
https://github.com/llvm/llvm-project/commit/9a465c3f2493bbdca2becb79450d4ee33306bd5d
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M orc-rt/CMakeLists.txt
Log Message:
-----------
[orc-rt] Refactor CMakeLists.txt for readability. NFCI. (#208156)
Groups related options, adds comments and separators.
Commit: 0f174998859cfaa48e848bb44400522acd0c4dc3
https://github.com/llvm/llvm-project/commit/0f174998859cfaa48e848bb44400522acd0c4dc3
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Log Message:
-----------
[CodeGen][NFC] Remove stray SDag BFI computation with NewPM (#208181)
This looks like an accident -- there's no need to compute the
BlockFrequencyInfo unconditionally and then discarding it. After this,
enabling the NewPM CodeGen pipeline is faster than the legacy PM.
Commit: c1fd542e61749f3c6765f4d8293094e7064ebb18
https://github.com/llvm/llvm-project/commit/c1fd542e61749f3c6765f4d8293094e7064ebb18
Author: Ayaan <138162656+def3r at users.noreply.github.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/Transforms/InstCombine/rotate.ll
A llvm/test/Transforms/InstCombine/zext-sub-trunc.ll
Log Message:
-----------
[InstCombine] Fold zext(sub(0, trunc(X))) to and(sub(0, X), mask) (#207564)
Problem: vector rotate and funnel shift fails to fold for vectors > 16
bytes on AVX-512. This is because of the `trunc` and `zext`
instructions.
Example:
```llvm
define dso_local <8 x i64> @baz(<8 x i64> %0, <8 x i64> %1) local_unnamed_addr {
Entry:
%2 = trunc <8 x i64> %1 to <8 x i6>
%3 = sub <8 x i6> zeroinitializer, %2
%4 = zext <8 x i6> %3 to <8 x i64>
%5 = shl <8 x i64> %0, %4
%6 = and <8 x i64> %1, splat (i64 63)
%7 = lshr <8 x i64> %0, %6
%8 = or <8 x i64> %5, %7
ret <8 x i64> %8
}
```
Solution; Canonicalize the transformation `zext(sub(0, trunc(X))) ->
and(sub(0, X), mask)` for scalars and vectors.
Closes #165306
Commit: 76f49f834e057c028a9f42fddca7e3f522e1dda1
https://github.com/llvm/llvm-project/commit/76f49f834e057c028a9f42fddca7e3f522e1dda1
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
A llvm/test/Transforms/DFAJumpThreading/br-debuglocs.ll
A llvm/test/Transforms/DFAJumpThreading/br-debuglocs2.ll
Log Message:
-----------
[DFAJumpThreading] Propagate DebugLocs to branches in select unfolding (#205851)
When DFAJumpThreading replaces a select with control flow, it generates
new blocks, new branches in those blocks, and potentially replaces the
branch in an existing block. Prior to this patch, none of these branches
were assigned debug locations; this patch replaces them as follows:
For the case where we generate two new blocks between the select block
and use block, and use a PHI of those blocks to replace the select, we
use the select's debug location for the branch instructions, since they
are doing the work of the select.
For the case where we generate one new block and replace the
unconditional branch from the select block with a conditional branch to
the new block and the use block, we treat the new branches as replacing
both the select and the original branch, so each branch takes the merged
location of the original select+br.
This patch also ensures that when we create a new path which would end
with a switch statement, such that the switch statement can be safely
replaced with an unconditional branch, we propagate the switch's debug
location to the replacing unconditional branch.
Commit: 5166fea278a64988e166ae6d669b955d07544f13
https://github.com/llvm/llvm-project/commit/5166fea278a64988e166ae6d669b955d07544f13
Author: David Green <david.green at arm.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/uaddo-8-16-bits.mir
Log Message:
-----------
[AArch64][GlobalISel] Use integer types in applySimplifyUADDO (#207962)
This avoids creating some scalar types in the IR, using integer types
for constants from a uaddo combine instead.
Commit: b4b9fbb56271236f6415403b562c46fcb64016d5
https://github.com/llvm/llvm-project/commit/b4b9fbb56271236f6415403b562c46fcb64016d5
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/sa_family_t.h
M libc/test/src/sys/socket/linux/CMakeLists.txt
M libc/test/src/sys/socket/linux/bind_test.cpp
M libc/test/src/sys/socket/linux/connect_accept_test.cpp
M libc/test/src/sys/socket/linux/sockaddr_storage_helper.cpp
M libc/test/src/sys/socket/linux/sockaddr_storage_test.cpp
M libc/test/src/sys/socket/linux/sockname_test.cpp
Log Message:
-----------
[libc] Add a proxy header for sa_family_t (#207736)
This patch adds `hdr/types/sa_family_t.h` and updates socket tests and
helpers to use it instead of directly including `<sys/socket.h>` or
`include/llvm-libc-types/sa_family_t.h`.
The patch also adds a couple of includes of `hdr/types/socklen_t.h` for
files that are using the type, but not including it directly.
Assisted by Gemini.
Commit: 2d829f66147850c1fa9cd49c207b40c69aff5f17
https://github.com/llvm/llvm-project/commit/2d829f66147850c1fa9cd49c207b40c69aff5f17
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/docs/HowToUpdateDebugInfo.rst
M llvm/include/llvm/Transforms/Utils/Debugify.h
M llvm/lib/Transforms/Utils/Debugify.cpp
M llvm/unittests/Transforms/Utils/DebugifyTest.cpp
Log Message:
-----------
[Debugify] Simplify debugify for locations (#207374)
This patch attempts to improve the performance of debugify for
locations, by relying on coverage tracking to replace most of the
functionality provided via the DILocations map, in exchange for losing
the ability to distinguish between "dropped" and "not-generated" bugs,
and requiring coverage tracking to determine when new bugs appear in a
pass instead of reporting the same bug repeatedly across passes.
This patch is not without cost; the justifications for using it are
that:
- Debugify locations is incredibly expensive; on a local build, without
using any coverage-tracking, this patch takes the build time for sqlite3
down from ~15 minutes to ~10 seconds.
- The difference between "dropped" and "not-generated" is a minor detail
of a bug - besides helping to determine the cause of the bug, which
origin-tracking can do with more accuracy, there's no fundamental
difference in the correctness of either. Furthermore, almost no
"dropped" bugs appear in the compiler anymore (since the debug location
coverage tracker bot has been online).
- Requiring coverage tracking to prevent repeated bugs is a loss, but
coverage tracking is not a very expensive feature to enable compared to
using debugify itself, and the only public automated tests that use
debugify already enable coverage tracking.
Commit: 95eef8c4b209036bc2fdce0891b43cb9170a46c5
https://github.com/llvm/llvm-project/commit/95eef8c4b209036bc2fdce0891b43cb9170a46c5
Author: Harrison Hao <57025411+harrisonGPU at users.noreply.github.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/IRBuilder.h
M llvm/include/llvm/IR/Instructions.h
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
Log Message:
-----------
[IR][NFC] Add LoadStoreProperties to copy load/store attrs (#206470)
Introduce a small `LoadStoreProperties` struct plus get/setAttributes on
`LoadInst` and `StoreInst` so volatile/align/ordering/syncscope can be
copied together instead of one field at a time. Switch the obvious load->load
and store->store clone sites over to it.
Commit: 179badc020b48f736341408fdb01537ada3eedfb
https://github.com/llvm/llvm-project/commit/179badc020b48f736341408fdb01537ada3eedfb
Author: Yusuke MINATO <minato.yusuke at fujitsu.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M flang/docs/FAQ.md
Log Message:
-----------
[flang][docs] Add a mention about -fsafe-trampoline to FAQ.md (#207656)
Co-authored-by: Tarun Prabhu <tarunprabhu at gmail.com>
Commit: 047011710642a63471fcdba64f009a0125f715bf
https://github.com/llvm/llvm-project/commit/047011710642a63471fcdba64f009a0125f715bf
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/test/CodeGen/AArch64/sve-calling-convention-byref.ll
A llvm/test/CodeGen/AArch64/sve-pred-ldst.ll
Log Message:
-----------
[LLVM][CodeGen][SVE] Make use of predicate load/store "mul vl" addressing mode. (#206997)
Commit: 2abc19543d802780eadd1450f0aa0c28fed080af
https://github.com/llvm/llvm-project/commit/2abc19543d802780eadd1450f0aa0c28fed080af
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M libc/fuzzing/arpa/inet/CMakeLists.txt
A libc/fuzzing/arpa/inet/inet_ntop_differential_fuzz.cpp
Log Message:
-----------
[libc] Add a differential fuzzer for inet_ntop (#207977)
The first byte of the input is used to select the address class and the
size of the output buffer. The rest is used as the input.
We compare the results and also check that our implementation does not
overflow the buffer.
Assisted by Gemini.
Commit: 6008f6735309d3efafa8680df04f486b0819d34d
https://github.com/llvm/llvm-project/commit/6008f6735309d3efafa8680df04f486b0819d34d
Author: David Green <david.green at arm.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-abds.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-abdu.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-abs.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-add.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-ashr.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-assertzext.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-buildvector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-concat.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-const.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-ctls.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-cttz.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-extract-vector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-fshl-fshr.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-rotl-rotr.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-sadde.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-saddo.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-sdiv.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-shl.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-shuffle.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-smulh.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-srem.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-stepvector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-sub.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-sve-splat.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-trunk.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-uadde.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-uaddo.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-udiv.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-umulh.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-unmerge.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-urem.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-vector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownbits-zext.mir
Log Message:
-----------
[AArch64][GlobalISel] Update scalar types in knownbits tests. NFC (#208199)
Commit: 7205d7c676c8f90a0cf89484c1a9687fa601b867
https://github.com/llvm/llvm-project/commit/7205d7c676c8f90a0cf89484c1a9687fa601b867
Author: Kristina Bessonova <ch.bessonova at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/ABIVersions.def
M clang/lib/AST/ItaniumMangle.cpp
M clang/test/CodeGenCXX/dtor-local-lambda-mangle.cpp
M clang/test/CodeGenCXX/mangle-lambdas-gh88906.cpp
A clang/test/CodeGenCXX/mangle-lambdas-in-dmi-local-class.cpp
Log Message:
-----------
[clang][ItaniumMangle] Fix mangling of lambdas in default member initializers of local classes (#206740)
Lambdas appearing in default member initializers of members of local
classes were previously mangled as if they belonged only to the class
scope, ignoring the enclosing function-local context.
This caused different (but same-named) local classes to produce
identical closure type mangling and corresponding RTTI/IR collisions.
Consider the following example:
```
void foo() {
{
struct T {
std::function<void()> a = [](){ std::cout << "a"; };
} t;
t.a();
}
{
struct T {
std::function<void()> a = [](){ std::cout << "b"; };
} t;
t.a();
}
}
```
The expected output is `ab` (and GCC-compiled code behaves accordingly),
while clang previously printed `bb` because the first `T::a` definition
is overridden by the second one due to the missing `<local-name>`
encoding and discriminator required to distinguish the two local `T`
definitions.
Commit: 852286d8169ce8522cccddaaf5356c62a1b7a8a2
https://github.com/llvm/llvm-project/commit/852286d8169ce8522cccddaaf5356c62a1b7a8a2
Author: Chirag Patel <chirag198838 at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
Log Message:
-----------
Fix unused variable build failure in Release build (#208195)
Fixes build failure introduced by commit [736771b]
(https://github.com/llvm/llvm-project/commit/736771b6a017b5a18c03819a3348ff793c473261)
into llvm:main
Ref : https://github.com/llvm/llvm-project/pull/207148
Failure : https://lab.llvm.org/buildbot/#/builders/228/builds/4056
Commit: ac1af12027ee0e2787400a896f67dc3f154b3d16
https://github.com/llvm/llvm-project/commit/ac1af12027ee0e2787400a896f67dc3f154b3d16
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/test/CodeGen/X86/apx/ccmp.ll
Log Message:
-----------
[X86][CCMP] Lower select(and/or(setcc,...), T, F) as a CCMP chain (#207929)
Fixes: #207886
Assisted-by: Claude Sonnet 4.6
Commit: adfb3be9d098e4c12895957f9ac3fc9d892b45a9
https://github.com/llvm/llvm-project/commit/adfb3be9d098e4c12895957f9ac3fc9d892b45a9
Author: Rito Takeuchi <licht-t at outlook.jp>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/mulhu-v4i64-umul-lohi-guard.ll
M llvm/test/CodeGen/X86/srem-vector-lkk.ll
M llvm/test/CodeGen/X86/urem-vector-lkk.ll
M llvm/test/CodeGen/X86/vector-idiv-sdiv-256.ll
M llvm/test/CodeGen/X86/vector-idiv-sdiv-512.ll
M llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll
M llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll
Log Message:
-----------
[X86] Add vXi64 MULHU/MULHS lowering, keeping full-width products scalar (#206983)
Based on the discussion in the PR #169819.
This lands the unsigned (`MULHU`) and signed (`MULHS`)
`vXi64` high-multiply lowering, plus a guard so full 128-bit products
stay scalar.
### What this does
1. **Lower `ISD::MULHU` for `v4i64`/`v8i64`** via `forceExpandMultiply`
(a `vpmuludq` schoolbook), as in #169819.
2. **Lower `ISD::MULHS` for `v4i64`/`v8i64`, gated on AVX512DQ.** The
signed low multiply is `vpmullq`, so `MULHS` is only marked `Custom`
when DQ (and VL for `v4i64`) is available.
3. **Guard the full-width-product case.** When the *low* half of the
product is also used (a `wyhash`-style `lo ^ hi`), vectorizing just the
high half is redundant with the low half's wide multiply. So, this guard
let a single scalar multiply per lane yield both halves, likewise the
unpatched target already did.
This is done by marking `UMUL_LOHI`/`SMUL_LOHI` `v4i64`/`v8i64` `Custom`
(unrolled), which lets the existing DAGCombiner check decline to narrow
`trunc(srl(mul(ext,ext)))` to `MULHU`/`MULHS` when the wide multiply's
low half is used.
### Performance
Same-IR A/B (identical IR, stock vs patched `llc`), EC2 metal,
per-target `-march`/`-mtune`, turbo off, one pinned core. ns/elem,
`stock → patched (ratio)`. Full matrix:
https://github.com/llvm/llvm-project/pull/206983#issuecomment-4871421534.
| kernel (AVX-512 256b) | Cascade | Ice Lake | SPR | Zen 4 |
|---|---|---|---|---|
| `udiv` (MULHU) | 1.71x | 1.71x | 1.78x | 1.88x |
| `div` (MULHS) | 1.18x | 1.25x | 1.31x | 2.04x |
| full-128 `lo ^ hi` (guarded) | 1.00x | 1.00x | 1.00x | 1.00x |
### Testing
- New `test/CodeGen/X86/mulhu-v4i64-umul-lohi-guard.ll`:
`umul_lohi_both_halves` (both halves used → scalarizes) and
`mulhu_high_only` (high only → vectorizes), on AVX2 and AVX-512.
- Existing `vector-idiv-{udiv,sdiv}-{256,512}.ll`, `urem-vector-lkk.ll`,
`srem-vector-lkk.ll` show the `MULHU`/`MULHS` vectorization (the signed
ones only on AVX512DQ RUN lines).
- No regressions across `test/CodeGen/X86`.
### AI Usage Disclosure
This PR was prepared with the assistance of Claude Code.
Fixes #37771
Commit: b5fa9eee6798b678fc7cb5f2b42a977932b708f9
https://github.com/llvm/llvm-project/commit/b5fa9eee6798b678fc7cb5f2b42a977932b708f9
Author: inquisitivecrystal <thoughtsoflifeandlight17 at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M libcxx/docs/Status/Cxx26Issues.csv
M libcxx/include/__memory/uninitialized_algorithms.h
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.move/uninitialized_move.pass.cpp
M libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.move/uninitialized_move_n.pass.cpp
Log Message:
-----------
[libc++] Implement LWG3918: copy elision in `std::uninitialized_move/_n` (#207692)
This implements [LWG3918](https://wg21.link/LWG3918), which guarantees
copy elision for rvalues in `std::uninitialized_move/_n`. It also
implements [LWG4452](https://wg21.link/LWG4452), a minor correction that
makes the helper added by LWG3918 constexpr.
This additionally fixes a bug in `std::uninitialized_move/_n` where they
could create and then access dangling references. The previous
implementation used the following lambda as an implementation detail:
```c++
[](auto&& __iter) -> decltype(auto) { return std::move(*__iter); }
```
When `__iter` is a prvalue, this creates a temporary object within the
lambda's body and `std::move` then returns a reference to that object.
The reference dangles as soon as control leaves the lambda. This
behavior was not permitted by the standard even before LWG3918.
The new implementation fixes the bug by using a helper,
`std::__deref_move(__iter)`, which returns `*__iter` directly when
`*__iter` is already an rvalue.
Resolves #118339.
Resolves #171416.
Commit: fd86339aa29c096855b9cfba4a44c539a013ba15
https://github.com/llvm/llvm-project/commit/fd86339aa29c096855b9cfba4a44c539a013ba15
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper.c
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
Log Message:
-----------
[LinkerWrapper] Fix AMDGPU Target-IDs linking in improper order (#207853)
Summary:
These target IDs are supposed to be ordered from most to least specific,
but we had no such ordering. The changes basically sort the input from
least to most specific using the target-id presence, then ensures that
their entries are listed first.
Fixes: https://github.com/llvm/llvm-project/issues/207835
Commit: 3ec5229fb7e0631119059fd1b50bef3c3d9bb24d
https://github.com/llvm/llvm-project/commit/3ec5229fb7e0631119059fd1b50bef3c3d9bb24d
Author: Mark Zhuang <mark.zhuang at spacemit.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M lld/test/ELF/compressed-debug-level.test
Log Message:
-----------
[lld][ELF][test] Accept zlib-ng compressed size (#206880)
zlib-ng 2.3.2 deflates slightly differently from zlib; the level-1
default is 0x20, just outside the LEVEL1 pattern. Widen it to accept
0x20.
Assisted-by: claude-opus
Commit: 646dcad77c7aec076dbc1c6d99d4b4fb1d63df3b
https://github.com/llvm/llvm-project/commit/646dcad77c7aec076dbc1c6d99d4b4fb1d63df3b
Author: Ivan R. Ivanov <iivanov at nvidia.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M offload/test/lit.cfg
Log Message:
-----------
[offload] Add cuda to the PATH for nvptx tests (#208101)
To execute the JIT tests, ptxas needs to be in PATH. This also makes
sure we use ptxas from the same cuda path that we use when compiling.
Commit: f6976c8e7be28eae61f4c636370caef124a65f57
https://github.com/llvm/llvm-project/commit/f6976c8e7be28eae61f4c636370caef124a65f57
Author: Jack Styles <jack.styles at arm.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M flang/include/flang/Lower/Support/ReductionProcessor.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertExprToHLFIR.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/DataSharingProcessor.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/Support/ReductionProcessor.cpp
A flang/test/Lower/OpenMP/reduction-array-element.f90
Log Message:
-----------
[Flang][OpenMP] Correct ArrayElements in Reduction Clause (#196094)
Currently, when an ArrayElement is used within a Reduction clause, it
will be lowered with the reduction referencing the box containing the
array, not just the element.
To address this, adjust Flang lowering to track expressions alongside
symbol to ensure that the Array Element context is not lost and
considered when lowering a reduction with Array Element. This ensures
that, when represented in HLFIR, it will be just the element's type,
rather than the full array.
Currently this excludes DO CONCURRENT as it excludes Array Elements, and
is limited to Array Elements but there are options to expand this into
Array Sections in the future.
Assisted-by: Codex
Commit: 961ab7a3696701f9cc0c82a4cde7fc9937141b01
https://github.com/llvm/llvm-project/commit/961ab7a3696701f9cc0c82a4cde7fc9937141b01
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrAVX10.td
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
M llvm/test/CodeGen/X86/fminimum-fmaximum.ll
M llvm/test/CodeGen/X86/vec-strict-cmp-128.ll
Log Message:
-----------
[SDAG][X86] Uplift pseudo fmin/fmax from X86 (#188489)
X86 has pseudo fmin/fmax operations that implement `x olt y ? x : y` and
`x ogt y ? x : y` respectively. There are other targets that also
support these operations, including wasm and s390x.
On wasm (where I've adopted the "pseudo" terminology from), we currently
create these ops, but incorrectly (wrt signed zero handling). On s390x
we don't, but should to avoid regressions from fixing incorrect
minnum/maxnum formation.
I figured it would make sense to uplift the existing support form X86,
so other targets can benefit from it by just marking the operations
legal.
Commit: 6a151b618696a484adb9c848debb9ccc742a0867
https://github.com/llvm/llvm-project/commit/6a151b618696a484adb9c848debb9ccc742a0867
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt-c/Compiler.h
Log Message:
-----------
[orc-rt] Add an ORC_RT_C_FORMAT_PRINTF macro for format-string checking (#208209)
Add a macro to annotate a function that takes a printf-style format
string, so that supporting compilers can check the format string against
the function's arguments at compile time.
This will be used by the upcoming logging API to type-check log format
strings, including at call sites that are compiled out.
Commit: 5fd64bb8f4878dcc002a5ba1bde3c23f0f2714ac
https://github.com/llvm/llvm-project/commit/5fd64bb8f4878dcc002a5ba1bde3c23f0f2714ac
Author: Vladimir Suvorov <svfly at yandex.ru>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.h
M mlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/verifier.mlir
Log Message:
-----------
[mlir][tosa] Fix regression in mlir StableHLO tests due to PR #203583 (#207995)
StableHLO tests have regression due to use of additional op parameter in
verifyBlockScaledTensorType
This adjusts https://github.com/llvm/llvm-project/pull/203583 and fixes
many of stablehlo/tests
Signed-off-by: Vladimir Suvorov <suvorovv at google.com>
Commit: 188702eeb742a66b8cf32722ca4d8a8d64e77f83
https://github.com/llvm/llvm-project/commit/188702eeb742a66b8cf32722ca4d8a8d64e77f83
Author: Aayush Shrivastava <iamaayushrivastava at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
A llvm/test/CodeGen/AArch64/smax-allones.ll
M llvm/test/CodeGen/RISCV/fpclamptosat.ll
M llvm/test/CodeGen/RISCV/rvv/fpclamptosat_vec.ll
M llvm/test/CodeGen/WebAssembly/fpclamptosat.ll
M llvm/test/CodeGen/X86/combine-smax.ll
M llvm/test/CodeGen/X86/combine-smin.ll
M llvm/test/CodeGen/X86/known-never-zero.ll
M llvm/test/CodeGen/X86/probe-stack-eflags.ll
Log Message:
-----------
[DAGCombiner] Fold smax(X, -1)/smin(X, 0) to bitwise shift forms (#206242)
Fixes #206153
`smax(X, -1) = or(X, ashr(X, BW-1))`
`smin(X, 0) = and(X, ashr(X, BW-1))`
`ashr(X, BW-1)` sign-extends the sign bit to all bits 0 for X≥0, -1 for
X<0. OR-ing with X yields X or -1 = smax(X,-1), AND-ing yields 0 or X =
smin(X,0). Both replace a `compare+cmov` with two cheap bitwise
instructions.
The fold is unconditional (not gated on code size), firing whenever the
target has no native `SMAX/SMIN` instruction for the type
(`isOperationExpand`), the type is legal (`isTypeLegal`), and the input
is not a min/max chain (preserving RISCV-P `sati` saturation patterns).
Commit: bb55d6c3c26640f2a0fdb33005e6221ddcdfd18c
https://github.com/llvm/llvm-project/commit/bb55d6c3c26640f2a0fdb33005e6221ddcdfd18c
Author: Jean-Didier PAILLEUX <jean-didier.pailleux at sipearl.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M flang/lib/Lower/MultiImageFortran.cpp
Log Message:
-----------
[flang][MIF] Fix ucobounds given in mif.alloc_coarray #207858 (#207935)
This PR provide a manior fix to issue #207858 when the `ucobound` array
is passed to mif.alloc_coarray. This array was built from the values in
`lcobound`.
Commit: f05387745e53a1fe298b4b45d66f40517ec7ace6
https://github.com/llvm/llvm-project/commit/f05387745e53a1fe298b4b45d66f40517ec7ace6
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M orc-rt/CMakeLists.txt
M orc-rt/include/CMakeLists.txt
A orc-rt/include/orc-rt-c/Logging.h
M orc-rt/include/orc-rt-c/config.h.in
M orc-rt/unittests/CMakeLists.txt
A orc-rt/unittests/LoggingTest.cpp
Log Message:
-----------
[orc-rt] Add a configurable logging API with a no-op backend (#208214)
Adds ORC_RT_LOG(Level, Category, Fmt, ...), a compile-time-configurable
logging facility for the ORC runtime, along with the default "none"
backend.
The backend is chosen at build time via the ORC_RT_LOG_BACKEND CMake
option (none, printf, os_log), and the lowest level to be compiled in
via ORC_RT_LOG_LEVEL.
The "none" backend implemented here compiles every log site out to
nothing (but still type-checks the format string and arguments in an
unevaluated context so disabled sites cannot bit-rot). Levels are Error,
Warning, Info, and Debug; categories are a typo-safe enum.
The printf and os_log backends are stubbed with #error and will follow.
Commit: 44858419d766322d9c51d85f4ac83501a5181597
https://github.com/llvm/llvm-project/commit/44858419d766322d9c51d85f4ac83501a5181597
Author: Jinsong Ji <jinsong.ji at intel.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M clang/include/clang/AST/StmtVisitor.h
M llvm/include/llvm/Support/Compiler.h
Log Message:
-----------
Revert "[clang][AST] Inline StmtVisitor fallback methods" for STMT macro in debug builds (#208106)
This partially reverts commit 8b50847a31f927d258cf22953035db206d42fc5d.
The LLVM_ATTRIBUTE_ALWAYS_INLINE on STMT macro fallback methods caused
stack overflow in debug builds when processing deeply nested
expressions.
The test many-logical-ops.c with 2000+ logical AND operators would crash
in SequenceChecker due to excessive stack consumption.
Introduce LLVM_ATTRIBUTE_ALWAYS_INLINE_UNLESS_DEBUG which expands to
LLVM_ATTRIBUTE_ALWAYS_INLINE in release builds (preserving the binary
size optimization) but to plain `inline` in debug builds (avoiding stack
overflow).
Apply this to the STMT macro while keeping LLVM_ATTRIBUTE_ALWAYS_INLINE
on BINOP_FALLBACK, CAO_FALLBACK, and UNARYOP_FALLBACK.
Fixes regressions in debug builds only:
Clang :: C/C99/n590.c
Clang :: Index/index-many-logical-ops.c
Clang :: Sema/deep_recursion.c
Clang :: Sema/many-logical-ops.c
Co-Authored-By: Claude Sonnet 4.5 <noreply at anthropic.com>
---------
Co-authored-by: Claude Sonnet 4.5 <noreply at anthropic.com>
Commit: 2681879121986aea419cc19421dc04f3f1bc3eb1
https://github.com/llvm/llvm-project/commit/2681879121986aea419cc19421dc04f3f1bc3eb1
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/lib/Driver/ToolChains/HIPAMD.h
M clang/test/Driver/hip-phases.hip
M clang/test/Driver/hip-toolchain-device-only.hip
Log Message:
-----------
[HIP] Use complete toolchain in --offload-device-only (#205243)
Summary:
Since https://github.com/llvm/llvm-project/pull/201457 these targets
defaulted to LTO. However, this caused the default for
`--offload-device-only` to now be LLVM-IR. This is a regression from
prior behavior, so we special case it out. Honestly this would probably
be correct if the behavior started like this, but we shouldn't break
existing code.
Commit: c4b3d1d51da2570de41fbfab9784ca31558641a8
https://github.com/llvm/llvm-project/commit/c4b3d1d51da2570de41fbfab9784ca31558641a8
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZHLASMAsmStreamer.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZHLASMAsmStreamer.h
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.h
M llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
M llvm/lib/Target/SystemZ/SystemZInstrInfo.h
M llvm/lib/Target/SystemZ/SystemZInstrInfo.td
M llvm/lib/Target/SystemZ/SystemZLongBranch.cpp
M llvm/test/CodeGen/SystemZ/call-zos-01.ll
M llvm/test/CodeGen/SystemZ/call-zos-vararg.ll
M llvm/test/CodeGen/SystemZ/mixed-ptr-sizes.ll
M llvm/test/CodeGen/SystemZ/zos-ada.ll
M llvm/test/CodeGen/SystemZ/zos-frameaddr.ll
M llvm/test/CodeGen/SystemZ/zos-ppa1.ll
M llvm/test/CodeGen/SystemZ/zos-prologue-epilog.ll
M llvm/test/CodeGen/SystemZ/zos-stack-protector.ll
Log Message:
-----------
[SystemZ][z/OS] Emit prolog length (#208069)
The PPA1 contains fields recording the length of the prolog and the
offset to the instruction updating the stack pointer register. The
implementation consists of the following parts:
- the end of the prolog is marked with a FENCE instruction which
prevents scheduling from moving instructions across the barrier.
- when emitting the PPA1, the FENCE instruction along with other stack
update instructions are used to calculate the length and the offset.
Co-authored-by: Tony Tao <tonytao at ca.ibm.com>
Commit: 4c6f664cc78a2c2ad2fd511a5adf9fc988f2d933
https://github.com/llvm/llvm-project/commit/4c6f664cc78a2c2ad2fd511a5adf9fc988f2d933
Author: Wooseok Lee <wolee at amd.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
M llvm/lib/Target/AMDGPU/AMDGPULowerKernelAttributes.cpp
M llvm/test/CodeGen/AMDGPU/implicit-arg-block-count.ll
Log Message:
-----------
[AMDGPU] Guard block-count upgrade against volatile/atomic grid-size … (#208068)
…loads
AMDGPULowerKernelAttributes upgrades the pre-COV5 pattern
udiv(grid_size_x, group_size_x)
to a direct load of hidden_block_count_x from the implicit args. The
m_Load() pattern matcher does not check whether the matched load is
volatile or atomic, so a volatile or atomic grid_size load would have
been silently deleted and replaced -- dropping its observable side
effects in violation of the LangRef.
Fix: after the pattern match succeeds, cast the matched value to
LoadInst and bail out if !isSimple() (i.e., volatile or atomic).
Add a test case num_blocks_x_volatile_grid_size in
implicit-arg-block-count.ll to verify the volatile load and udiv are
preserved unchanged.
Commit: 1f0dca704ab4b59de9377e21813c18f1bb5899d8
https://github.com/llvm/llvm-project/commit/1f0dca704ab4b59de9377e21813c18f1bb5899d8
Author: Wooseok Lee <wolee at amd.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-fast.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-powr-fast.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-powr.ll
Log Message:
-----------
[AMDGPU] Gate fold_pow(x, ±0.5)->sqrt/rsqrt on nsz+ninf fast-math flags (#205592)
AMDGPULibCalls::fold_pow rewrote pow(x, 0.5)->sqrt(x) and pow(x,
-0.5)->rsqrt(x) unconditionally, firing before the
isUnsafeFiniteOnlyMath guard. This is incorrect for two IEEE corner
cases:
pow(-Inf, 0.5) == +Inf but sqrt(-Inf) == NaN
pow(-0.0, 0.5) == +0.0 but sqrt(-0.0) == -0.0
Guard the fold on hasNoSignedZeros() && (IsPowr || hasNoInfs()), where
IsPowr is true for powr/powr_fast. The OpenCL spec requires x >= 0 for
powr, so -Inf is undefined behaviour and the ninf check can be skipped;
-0.0 is a valid input for powr since -0.0 >= 0 by IEEE comparison, so
nsz is still required for all variants. afn alone is not sufficient
since it only permits approximate results and says nothing about the
treatment of infinities or signed zeros.
Update the four autogenerated test files to reflect the new semantics:
- Add nsz (and ninf for pow) to existing afn-only ±0.5 call sites so
those tests continue to exercise the fold as intended. powr tests use
nsz only, documenting that ninf is not required.
- Add afn-only (no nsz/ninf) ±0.5 tests in pow-fast.ll and powr-fast.ll
to document that afn alone does not trigger the fold.
Commit: 56f655fafabc5ff98aee687c4e03f4c6b57c496e
https://github.com/llvm/llvm-project/commit/56f655fafabc5ff98aee687c4e03f4c6b57c496e
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
Log Message:
-----------
[NFC][SPIR-V] Dedupe getConstInt metadata helper into SPIRVUtils (#208194)
Commit: 8b4e74e02ededfdb64258a13f2d2a584b79eec2c
https://github.com/llvm/llvm-project/commit/8b4e74e02ededfdb64258a13f2d2a584b79eec2c
Author: Mark Zhuang <mark.zhuang at spacemit.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/test/MC/RISCV/corev/XCValu-invalid.s
M llvm/test/MC/RISCV/corev/XCVbitmanip-invalid.s
M llvm/test/MC/RISCV/corev/XCVmac-invalid.s
M llvm/test/MC/RISCV/corev/XCVmem-invalid.s
M llvm/test/MC/RISCV/corev/XCVsimd-invalid.s
M llvm/test/MC/RISCV/insn-invalid.s
M llvm/test/MC/RISCV/insn_c-invalid.s
M llvm/test/MC/RISCV/insn_xqci-invalid.s
M llvm/test/MC/RISCV/priv-invalid.s
M llvm/test/MC/RISCV/rv32c-invalid.s
M llvm/test/MC/RISCV/rv32i-invalid.s
M llvm/test/MC/RISCV/rv32zalrsc-invalid.s
M llvm/test/MC/RISCV/rv32zbb-invalid.s
M llvm/test/MC/RISCV/rv32zcmop-invalid.s
M llvm/test/MC/RISCV/rv64zalrsc-invalid.s
M llvm/test/MC/RISCV/rv64zbb-invalid.s
M llvm/test/MC/RISCV/rvc-hints-invalid.s
M llvm/test/MC/RISCV/rvv/zvvfmm-invalid.s
M llvm/test/MC/RISCV/rvv/zvvmm-invalid.s
M llvm/test/MC/RISCV/rvv/zvvmtls-invalid.s
M llvm/test/MC/RISCV/rvv/zvvmttls-invalid.s
M llvm/test/MC/RISCV/rvzicond-invalid.s
M llvm/test/MC/RISCV/rvzihintntl-invalid.s
M llvm/test/MC/RISCV/rvzihintntlc-invalid.s
M llvm/test/MC/RISCV/smrnmi-invalid.s
M llvm/test/MC/RISCV/tlsdesc.s
M llvm/test/MC/RISCV/xmips-invalid.s
M llvm/test/MC/RISCV/xqci-access-pseudos.s
M llvm/test/MC/RISCV/xqciint-invalid.s
M llvm/test/MC/RISCV/xqcisim-invalid.s
M llvm/test/MC/RISCV/xqcisync-invalid.s
M llvm/test/MC/RISCV/xtheadcmo-invalid.s
M llvm/test/MC/RISCV/xtheadcondmov-invalid.s
M llvm/test/MC/RISCV/xtheadsync-invalid.s
Log Message:
-----------
[RISCV] Report "unexpected extra operand" for surplus operands in AsmParser (#207142)
This improves upon the shared near-miss reporting infrastructure added
in #205721 by handling a case that was deferred during that PR's review.
Assisted-by: claude-opus
Commit: 29f8993fa216b7661795923e375f55ba5c814408
https://github.com/llvm/llvm-project/commit/29f8993fa216b7661795923e375f55ba5c814408
Author: Aditya Medhane <sherlockedaditya at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M flang-rt/lib/runtime/time-intrinsic.cpp
M flang-rt/unittests/Runtime/tools.h
Log Message:
-----------
[flang-rt] Fix -Wunused-template in time intrinsics and test helpers (NFC) (#207979)
`time-intrinsic.cpp` implements the timing intrinsics as SFINAE overload
sets (preferred/fallback per platform), so on any given platform some
overloads are intentionally never instantiated and trip
-Wunused-template. Mark all variants [[maybe_unused]].
`StoreElement` and `MakeArray` in `unittests/Runtime/tools.h` are static
function templates in a header, so any test TU that includes it without
using all of them trips the warning.
Part of #202945
Commit: b3e6e6dabdc02153552a64fc74ff5c7532447eed
https://github.com/llvm/llvm-project/commit/b3e6e6dabdc02153552a64fc74ff5c7532447eed
Author: Michael Jones <michaelrj at google.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M libcxx/include/__locale_dir/support/no_locale/characters.h
M libcxx/include/__locale_dir/support/no_locale/conversions.h
Log Message:
-----------
[libcxx][NFC] Move guards outside namespace (#208089)
Libc++ has a warning that triggers on empty namespaces. When
_LIBCPP_BUILDING_LIBRARY is not defined, the __locale namespace was
empty. This PR moves the #ifdef to surround the namespace and fix the
warning.
Commit: 51b007f070b2b0f46da1c4e968600fa90fd0ceee
https://github.com/llvm/llvm-project/commit/51b007f070b2b0f46da1c4e968600fa90fd0ceee
Author: David Zbarsky <dzbarsky at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M clang/lib/Serialization/ASTReader.cpp
Log Message:
-----------
[NFC][clang][Serialization] Outline LangOptions mismatch diagnostics (#202843)
Outline language-option mismatch diagnostic construction into two
`noinline` helpers. Generated comparisons remain direct and ordered as
before, so successful imports add no indirect calls and the serialized
format is unchanged.
Linked `clang` and `clangd` shrink by 35,264 and 29,216 bytes
respectively; `ASTReader.cpp.o` shrinks by 62,712 bytes with 1,347 fewer
relocations, while linked fixups are unchanged.
PCH, PCM, and BMI outputs and mismatch diagnostics are byte-identical,
focused module/PCH tests pass, and batched PCH and module imports show
no significant performance change.
Work towards #202616
AI tool disclosure: Co-authored with OpenAI Codex.
Commit: 059554a0130cc85a0b754b95f73b6ff1b207a4b0
https://github.com/llvm/llvm-project/commit/059554a0130cc85a0b754b95f73b6ff1b207a4b0
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[VPlan] Introduce VPlan-based requiresScalarEpilogue helper. (NFC) (#207784)
Add requiresScalarEpilogue(Plan, VF) that directly checks if a scalar
epilogue is required for a VPlan. In that case, the middle block (i.e.
first predecessor of the scalar ph) unconditionally branches to the
scalar preheader.
For now added to LoopVectorizationPlanner, so we can assert that the
result of the VPlan check matches the legacy result, to catch any
potential divergences.
The helper should be moved to VPlan directly and the assertion dropped
when no divergences have been found for a while, to make it independent
of the cost mode.
PR: https://github.com/llvm/llvm-project/pull/207784
Commit: 7b2e9db8e19e8b9ab1949fa476335c4c87075c58
https://github.com/llvm/llvm-project/commit/7b2e9db8e19e8b9ab1949fa476335c4c87075c58
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
Log Message:
-----------
AMDGPU: Remove unnecessary lookup of function from machineinstr (#208222)
The function is already a shadowed member of the class.
Commit: ae281befbf52aca9522c50f1ab3ddebdf0ac2cb9
https://github.com/llvm/llvm-project/commit/ae281befbf52aca9522c50f1ab3ddebdf0ac2cb9
Author: Sean Perry <perry at ca.ibm.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/include/llvm/Support/AutoConvert.h
M llvm/lib/Support/AutoConvert.cpp
M llvm/lib/Support/Unix/Path.inc
M llvm/lib/Support/raw_ostream.cpp
M llvm/unittests/Support/raw_ostream_test.cpp
Log Message:
-----------
Use existing encoding when writing to an existing file (#198873)
Clang lit test `Sema/warn-lifetime-safety-suggestions.cpp` is failing
because the encoding for the new contents of the source file don't match
the file tag on the file.
This change ensures the contents of a file are written in the same code
page as the existing file.
- The copyFileTagAttributes() function will change the auto conversion
to the code page of the file tag when writing a new version of a file.
- When writing to an existing file (eg. appending), use the file tag as
the code page for auto conversion. Don't assume 1047.
Commit: cd9eeb176ebd9322a02aab2357ee5e9b4840b2c7
https://github.com/llvm/llvm-project/commit/cd9eeb176ebd9322a02aab2357ee5e9b4840b2c7
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/runtimes/CMakeLists.txt
Log Message:
-----------
[libsycl] Add tool dependencies in runtimes mode (#205384)
The libsycl runtime depends on multiple clang tools.
We should ensure that these tools are built.
---------
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: 7a57458221c99e649ba002505b0b2e4d9c9b5912
https://github.com/llvm/llvm-project/commit/7a57458221c99e649ba002505b0b2e4d9c9b5912
Author: Luke Lau <luke at igalia.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M .github/workflows/test-suite.yml
M .github/workflows/test-suite/x86_64.cmake
Log Message:
-----------
[GitHub] Change /test-suite x86_64 configuration to test x86-64-v3 (#208228)
It would be good to see codegen changes for AVX.
Commit: 974fc1319640cce76523bcee48d003421ec7c163
https://github.com/llvm/llvm-project/commit/974fc1319640cce76523bcee48d003421ec7c163
Author: David Zbarsky <dzbarsky at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M clang/lib/Frontend/FrontendActions.cpp
M clang/test/Frontend/compiler-options-dump.cpp
Log Message:
-----------
[clang][Frontend] Table-drive compiler option dumping (#203161)
`Features.def` currently expands 228 feature formatting expressions and
49 extension formatting expressions in
`DumpCompilerOptionsAction::ExecuteAction`. This stores the names in
NUL-separated character blobs, evaluates the predicates into local
`bool` arrays, and formats both arrays with `writeCompilerOptionValues`.
In a Release arm64 build, standalone clang decreases by 49,256 bytes
unstripped and 49,520 bytes stripped, while the LLVM multicall binary
decreases by 49,264 bytes unstripped and 49,528 bytes stripped; linked
`__text` decreases by 52,696 bytes and linked fixups decrease by 7.
Work towards #202616
AI tool disclosure: Co-authored with OpenAI Codex.
Commit: b7091e67a1d027d8db62a2e84b070dd23f85bda4
https://github.com/llvm/llvm-project/commit/b7091e67a1d027d8db62a2e84b070dd23f85bda4
Author: Fateme Hosseini <Fhossein at qti.qualcomm.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonXQFloatGenerator.cpp
M llvm/test/CodeGen/Hexagon/autohvx/xqf-assertion1.ll
M llvm/test/CodeGen/Hexagon/autohvx/xqf-check-qf-instrs.ll
A llvm/test/CodeGen/Hexagon/autohvx/xqf-compliant-ieee-mul-qf16.ll
A llvm/test/CodeGen/Hexagon/autohvx/xqf-compliant-ieee-mul-qf32.ll
A llvm/test/CodeGen/Hexagon/autohvx/xqf-convert-elim.ll
A llvm/test/CodeGen/Hexagon/autohvx/xqf-lossy-mul-qf16.ll
A llvm/test/CodeGen/Hexagon/autohvx/xqf-lossy-mul-qf32.ll
A llvm/test/CodeGen/Hexagon/autohvx/xqf-v81/xqf-v81-compliant-ieee-mul-qf32.ll
A llvm/test/CodeGen/Hexagon/autohvx/xqf-v81/xqf-v81-lossy-mul-qf32.ll
A llvm/test/CodeGen/Hexagon/autohvx/xqf-v81/xqf-v81-vsub.ll
A llvm/test/CodeGen/Hexagon/autohvx/xqf-vsub.ll
Log Message:
-----------
[Hexagon] Add XQFloat extraneous conversion removal pass (#207236)
Introduce VectorConvertRemove to remove extraneous qf->sf/hf conversions
after XQFloat code generation. Off by default, enabled with
-enable-rem-conv.
Co-authored-by: Santanu Das <quic_santdas at qti.qualcomm.com>
Commit: 4f339eedfce6cc7bf8ea9f6737224629dd6e7d0b
https://github.com/llvm/llvm-project/commit/4f339eedfce6cc7bf8ea9f6737224629dd6e7d0b
Author: Qi Ye <qi.ye at intel.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_bfloat16_arithmetic/bfloat16-ocl-ext.ll
Log Message:
-----------
[SPIR-V] Add SPV_INTEL_bfloat16_arithmetic for Opencl.std instructions with bfloat16 type (#205128)
For `OpExtInst`, add check for bfloat16 type when it's an OpenCL.std
extended instruction, and add requirements for
SPV_INTEL_bfloat16_arithmetic if so.
Add such check and extension requirement since OpenCL.std extended
instruction set can operate on IEEE-754 FP types only, as per the
revision from [OpenCL.std
spec](https://registry.khronos.org/SPIR-V/specs/unified1/OpenCL.ExtendedInstructionSet.100.html#_changes_from_version_1_0_revision_8)
---------
Co-authored-by: Viktoria Maximova <viktoria.maksimova at intel.com>
Commit: 81b2e47b0d29526a7bb8a7674af61acff019a5a4
https://github.com/llvm/llvm-project/commit/81b2e47b0d29526a7bb8a7674af61acff019a5a4
Author: Pradeep Kumar <pradeepku at nvidia.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/test/CodeGen/NVPTX/tcgen05-ld.ll
M llvm/test/CodeGen/NVPTX/tcgen05-st.ll
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/test/Dialect/LLVMIR/nvvm_check_target_sm.mlir
M mlir/test/Target/LLVMIR/nvvm/tcgen05-ld.mlir
M mlir/test/Target/LLVMIR/nvvm/tcgen05-st.mlir
Log Message:
-----------
[SDAG][NVPTX] Enable custom legalization of v1 type for Intrinsic results and operands (#203237)
This commit enables custom legalization for v1 types for intrinsic results and operand by calling CustomLowerNode which gives the target a chance to custom handle the node before scalarizing
To demonstrate, I have used tcgen05.ld/st intrinsics which previously used a scalar i32 type while all wider variants used vector types
Assisted by: Claude Code
Commit: 3a85687f4bd34e10e43b65c6ce6b29b980705efc
https://github.com/llvm/llvm-project/commit/3a85687f4bd34e10e43b65c6ce6b29b980705efc
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/include/llvm/Support/thread.h
M llvm/lib/Support/Unix/Threading.inc
Log Message:
-----------
[Support] Teach llvm::thread about thread-id handling in LLVM-libc. (#207918)
This PR matches the libc++ update from
https://github.com/llvm/llvm-project/pull/198595 and applies similar
changes to `llvm::thread` class. Please see the discussion in that PR
(and linked references to other PRs) for more background / discussions.
`llvm::thread` has methods for extracting integer IDs from running
threads, and as such it needs to know what types are used to represent
those integer IDs - something that e.g. pthreads or C11 threads don't
specify. It assumes that `pthread_t` can be used both as a handle and as
a thread-id on most platforms, with the exception of zOS, where the
custom code is written. In LLVM-libc `pthread_t` is not an integral
type, but today it provides `pthread_id_np_t` type and
`pthread_getunique_np` / `pthread_getthreadid_np` methods as extensions
to extract the integer IDs. Use these methods when building against
LLVM-libc.
This is one of few remaining blockers for building LLVM+Clang on top of
LLVM-libc (https://github.com/llvm/llvm-project/issues/97191).
Commit: 00b2f81418233397e601afaeea6d62c47a6c368a
https://github.com/llvm/llvm-project/commit/00b2f81418233397e601afaeea6d62c47a6c368a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M clang/cmake/modules/ClangConfig.cmake.in
A cmake/Modules/GetTripleCMakeSystemName.cmake
A cmake/Modules/NormalizeTriple.cmake
M llvm/cmake/modules/LLVMConfig.cmake.in
M llvm/cmake/modules/LLVMExternalProjectUtils.cmake
M llvm/runtimes/CMakeLists.txt
M runtimes/CMakeLists.txt
Log Message:
-----------
Reapply "runtimes: Pass CMAKE_SYSTEM_NAME based on target triple" (#205133) (#205522)
This reverts commit 08c728e8528c9584bc1fe0f46bbdd657e368be91.
Reapply after runtimes build fixes on platforms without shared
libraries.
Commit: 8a94ef9467a4be014ab088c01fbe3a15e8a43823
https://github.com/llvm/llvm-project/commit/8a94ef9467a4be014ab088c01fbe3a15e8a43823
Author: Aleksandr Popov <42888396+aleks-tmb at users.noreply.github.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Transforms/LoopVectorize/early-exit-umin-trip-count.ll
M llvm/unittests/Analysis/ScalarEvolutionTest.cpp
Log Message:
-----------
[SCEV] Prove umin(Ops) u< RHS by checking individual operands (#207729)
Teach IsKnownPredicateViaMinOrMax to handle ICMP_ULT/UGT for
SCEVUMinExpr. Since umin(Ops) u<= each Op by definition, proving Op u<
RHS for any single operand is sufficient to establish umin(Ops) u< RHS
by transitivity.
This unblocks loop vectorization for early-exit loops whose trip count
is a umin of a buffer length and an iteration bound.
Fixes https://github.com/llvm/llvm-project/issues/196935
Alive2 proof: https://alive2.llvm.org/ce/z/9DjA2f
Commit: 006429da6ab9527e34c63df3f84517d385c30ef2
https://github.com/llvm/llvm-project/commit/006429da6ab9527e34c63df3f84517d385c30ef2
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonPatterns.td
A llvm/test/CodeGen/Hexagon/fshl-fshr-i32-mask.ll
M llvm/test/CodeGen/Hexagon/funnel-shift.ll
M llvm/test/CodeGen/Hexagon/rotate.ll
Log Message:
-----------
[Hexagon] Fix 32-bit funnel shift miscompilation with register shift amounts (#205489)
The register-variable 32-bit funnel shifts and the i32 rotates that
lower through them, realize the shift as a 64-bit asl/lsr of the {hi,lo}
combine and take one word of the result. That identity only holds for a
shift amount in [0, 31], and llvm.fshl/fshr define the amount to be
taken modulo 32. The register-form variable shift does not reduce the
amount modulo the operand width, it treats the low 7 bits as a signed
amount in [-64, 63]. So the raw, unreduced amount must be masked with
#31 before the 64-bit shift.
Without the mask, counts >= 32 or "negative" counts are miscompiled: a
count of 63 shifts left by 63, 64 becomes -64 and shifts the value out
entirely, and -1 becomes an arithmetic right shift by 1. In-range counts
0..31 come out correct, which is why a test that only sweeps 0..31 does
not catch it. This is exactly the i32.rotl/i32.rotr miscompile that
caused the WAMR Wasm spec-test suites (which invoke rotates with counts
of 32, 33, and -1) to be skipped on Hexagon.
Fix by masking the amount with (A2_andir $Ru, 31), mirroring the masking
the 64-bit patterns already use. This completes the 32-bit case left
unaddressed by 4fffee037520 ("[Hexagon] Fix 64-bit funnel shift
miscompilation with register shift amounts", #183669), which fixed only
the FShl64r/FShr64r width.
Commit: 38aa43fd96dc15092246a94c8a45c1c0a78217cc
https://github.com/llvm/llvm-project/commit/38aa43fd96dc15092246a94c8a45c1c0a78217cc
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M clang/lib/CodeGen/BackendUtil.cpp
Log Message:
-----------
[Clang] Disable verifier passes by default in NewPM CodeGen (#208178)
By default, we shouldn't add expensive verifier passes to the pipeline.
This causes a substantial perf regression compared to the legacy PM.
Commit: 1538aebce77546372d39ebe25bfe75cee6ed39f8
https://github.com/llvm/llvm-project/commit/1538aebce77546372d39ebe25bfe75cee6ed39f8
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSgToLaneDistribute.cpp
M mlir/test/Dialect/XeGPU/sg-to-lane-distribute-unit.mlir
Log Message:
-----------
[MLIR][XeGPU] Add non-splat constant distribution in SgToLane pass (#205575)
Commit: 7468b5634b038ba915fc326a8fb2f3fe6c3ed098
https://github.com/llvm/llvm-project/commit/7468b5634b038ba915fc326a8fb2f3fe6c3ed098
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsCG.h
M mlir/lib/Dialect/OpenACC/Transforms/ACCComputeLowering.cpp
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsCG.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsCGTest.cpp
Log Message:
-----------
[mlir][acc] Add utilities for working with acc par dims (#208120)
Add shared helpers for reading, setting, and manipulating parallel
dimensions on operations, covering both discardable and inherent
attributes.
Commit: 89c6fa58bbcca9f64a48104eb0e6bf3a616558e8
https://github.com/llvm/llvm-project/commit/89c6fa58bbcca9f64a48104eb0e6bf3a616558e8
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
A llvm/test/tools/llubi/inttoptr_ptrtoint_constantexpr.ll
M llvm/tools/llubi/lib/Context.cpp
Log Message:
-----------
[llubi] Add support for constant inttoptr/ptrtoint expressions (#207028)
This patch adds support for constant inttoptr/ptrtoint expressions to
unblock the running of csmith-generated programs.
The test doesn't cover all the behaviours, as they have been tested by
previous tests.
This patch treats constant inttoptr/ptrtoint expressions as if they are
executed just before the user. However, since ptrtoint exposes the
pointer provenance and inttoptr relies on the current set of exposed
provenances, it is incorrect. Imagine that we have an inttoptr in a gep
instruction and a ptrtoint in an add instruction. They can be freely
DCEd/reordered. In addition, the behaviour also depends on the
initialization order of globals. That is terrible. Nikita's proposal
also mentioned this issue but left it as an open question:
https://hackmd.io/@nikic/SJBt4mFCll#Constant-expressions
>From my perspective, constant expressions are allowed to execute at any
point in the program (before their users). Moving ptrtoint forward or
inttoptr backward will not make the program more undefined. So we can
evaluate all constant expressions before the program entry (i.e., all
globals involved with ptrtoint will be exposed at the start). The only
remaining concern is the use of `ConstantExpr::getAsInstruction`,
because it will convert CEs back into instruction sequences :(
Commit: 7e2e37536167a96e61f077d993ddc7106e372596
https://github.com/llvm/llvm-project/commit/7e2e37536167a96e61f077d993ddc7106e372596
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/test/CodeGen/SPIRV/instructions/atomic-ptr.ll
A llvm/test/CodeGen/SPIRV/transcoding/atomic-load-store-exchange-unsupported.ll
R llvm/test/CodeGen/SPIRV/transcoding/atomic-load-store-unsupported.ll
Log Message:
-----------
[SPIRV] Support atomic exchange of pointers (#207830)
Similar to what we do for atomic loads and stores, support pointers by
converting the exchange value to an equally-sized int, the pointer to a
pointer to that equally-sized int, and convert the result back to the
original pointer type.
This was found enabling support for SPIR-V in libc.
Co-Authored-By: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
Co-authored-by: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
Commit: d55faf25b49dcf487f5a56d73490743c87cece5a
https://github.com/llvm/llvm-project/commit/d55faf25b49dcf487f5a56d73490743c87cece5a
Author: Mikhail R. Gadelha <mikhail at igalia.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M libc/config/linux/riscv/entrypoints.txt
M libc/src/__support/File/linux/CMakeLists.txt
M libc/src/__support/File/linux/file.cpp
R libc/src/__support/OSUtil/fcntl.h
M libc/src/__support/OSUtil/linux/CMakeLists.txt
R libc/src/__support/OSUtil/linux/fcntl.cpp
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
M libc/src/__support/OSUtil/linux/syscall_wrappers/dup2.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/fcntl.h
M libc/src/fcntl/linux/CMakeLists.txt
M libc/src/fcntl/linux/fcntl.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc] Move fcntl implementation into the syscall_wrappers layer (#207878)
linux_syscalls::fcntl called SYS_fcntl unconditionally, breaking the
riscv32 full build where only SYS_fcntl64 exists. The syscall selection
and command translation already lived in internal::fcntl, so move that
implementation into syscall_wrappers/fcntl.h, delete the legacy
OSUtil/fcntl.h and OSUtil/linux/fcntl.cpp, and port the callers (fcntl
entrypoint, file.cpp, dup2.h) to linux_syscalls::fcntl.
Commit: ea6cf8c84aacc1d00b463f4558788ff3651fb57a
https://github.com/llvm/llvm-project/commit/ea6cf8c84aacc1d00b463f4558788ff3651fb57a
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/X86/bmi2.ll
Log Message:
-----------
[SelectionDAG][X86] Replace OriginalDemandedBits with DemandedBits in SimplifyDemandedBits ISD::PDEP handling. (#208104)
DemandedBits is set to all 1s if the node has multiple uses.
Fixes regression from #204144. The changed test case reverts back to the
output before that change.
Commit: a52eb9869ffbd765f006d36bea64fb44a6fedf76
https://github.com/llvm/llvm-project/commit/a52eb9869ffbd765f006d36bea64fb44a6fedf76
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Fix inconsistent braces in performReverseEVLCombine. NFC (#208097)
Commit: 78f5fd35e0010b2a70411a9ca4bcb140bccce146
https://github.com/llvm/llvm-project/commit/78f5fd35e0010b2a70411a9ca4bcb140bccce146
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSystemOperands.td
Log Message:
-----------
[RISCV] Avoid let statements in RISCVSystemOperands. NFC (#207890)
Add an optional RV32Only operand to SysReg.
Add AltSysRegName and DeprecatedSysRegName wrappers.
Commit: 3e7a2ec74cd8f8e0e32037d0192a1378789e9af7
https://github.com/llvm/llvm-project/commit/3e7a2ec74cd8f8e0e32037d0192a1378789e9af7
Author: Michael G. Kazakov <mike.kazakov at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M libcxx/include/__algorithm/pstl.h
M libcxx/include/__pstl/backend_fwd.h
M libcxx/include/__pstl/backends/default.h
M libcxx/test/libcxx/algorithms/pstl.iterator-requirements.verify.cpp
M libcxx/test/libcxx/algorithms/pstl.nodiscard.verify.cpp
M libcxx/test/libcxx/transitive_includes/cxx23.csv
M libcxx/test/libcxx/transitive_includes/cxx26.csv
M libcxx/test/std/algorithms/alg.nonmodifying/alg.find.first.of/find_first_of.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.find.first.of/find_first_of_pred.pass.cpp
A libcxx/test/std/algorithms/alg.nonmodifying/alg.find.first.of/pstl.find_first_of.pass.cpp
A libcxx/test/std/algorithms/alg.nonmodifying/alg.find.first.of/pstl.find_first_of_pred.pass.cpp
M libcxx/test/std/algorithms/pstl.exception_handling.pass.cpp
Log Message:
-----------
[libc++][pstl] Default implementation of parallel std::find_first_of (#206328)
This PR adds a default "one-liner" implementation of parallel
`std::find_first_of` expressed as a call to `__find_if`.
The implementation is based on find_if and any_of.
Part of #99938
Commit: 62cf5de4fee60958508cca4db5df7769e0a9e57f
https://github.com/llvm/llvm-project/commit/62cf5de4fee60958508cca4db5df7769e0a9e57f
Author: David Zbarsky <dzbarsky at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M clang/lib/Frontend/ASTConsumers.cpp
Log Message:
-----------
[clang] Use DynamicRecursiveASTVisitor for AST listing (#202661)
Replace `ASTDeclNodeLister`'s CRTP `RecursiveASTVisitor` with
`DynamicRecursiveASTVisitor` while keeping `ASTPrinter` and
`ASTDeclNodeLister` separate. Set `ShouldWalkTypesOfTypeLocs` to false
to
preserve the previous traversal.
In identical arm64 release builds, standalone clang shrinks by 251,840
bytes
(0.215%), stripped clang by 149,488 bytes, and `ASTConsumers.cpp.o` by
153,352
bytes; linked `__TEXT` falls by 147,456 bytes and linked fixups increase
by
1,040.
The `-ast-list` output is byte-identical on the existing clang-check
input and
`ASTConsumers.cpp` (150,918 lines); two reversed-order ten-run timing
passes
have overlapping wall-time distributions and a 0.4% combined mean user
CPU-time increase.
Work towards #202616
AI tool disclosure: Co-authored with OpenAI Codex.
Commit: e9548835fdd84200969b959472d55454d597dfd7
https://github.com/llvm/llvm-project/commit/e9548835fdd84200969b959472d55454d597dfd7
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M lldb/source/Commands/CommandObjectTarget.cpp
A lldb/test/API/functionalities/scripted_frame_provider/register_command_status/Makefile
A lldb/test/API/functionalities/scripted_frame_provider/register_command_status/TestFrameProviderRegisterCommandStatus.py
A lldb/test/API/functionalities/scripted_frame_provider/register_command_status/frame_provider.py
A lldb/test/API/functionalities/scripted_frame_provider/register_command_status/main.c
Log Message:
-----------
[lldb] Fix assert when `target frame-provider register` succeeds (#208232)
`CommandObjectTargetFrameProviderRegister::DoExecute` never called
`CommandReturnObject::SetStatus()` on its success path.
`CommandObject.cpp` has a `DoExecuteStatusCheck` RAII guard that resets
the result's status to `eReturnStatusInvalid` before `DoExecute` runs,
and asserts on exit that `DoExecute` changed it.
`AppendMessage()`/`AppendMessageWithFormatv()` don't touch status
(unlike AppendError()/SetError(), which call
`SetStatus(eReturnStatusFailed)`), so on the success path the status
stayed eReturnStatusInvalid, tripping the assert.
This went unnoticed because every existing `scripted_frame_provider`
test uses `SBTarget::RegisterScriptedFrameProvider` directly, bypassing
the `target frame-provider register` command entirely. Add a regression
test that exercises the command instead.
Assisted-by: Claude
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 7a4c856d55d7b0e7f546cf12fb9b065af46762e7
https://github.com/llvm/llvm-project/commit/7a4c856d55d7b0e7f546cf12fb9b065af46762e7
Author: Sampath Vutkoori <svutkoor at qti.qualcomm.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/cmake/modules/FindLibXml2.cmake
Log Message:
-----------
[cmake] FindLibXml2: fall back to xmlversion.h when pkg-config has no… (#207797)
… version
LLVM's cmake/modules/FindLibXml2.cmake uses PC_LIBXML_VERSION (from
pkg-config) as the VERSION_VAR in find_package_handle_standard_args.
When pkg-config has no libxml-2.0.pc file (e.g. when linking against a
static libxml2-pic.a that ships no .pc file), PC_LIBXML_VERSION is left
empty after pkg_check_modules fails and the >=2.8 version check reports
'Found unsuitable version ""', causing LLDB_ENABLE_LIBXML2 to be set to
FALSE.
Fix: before calling find_package_handle_standard_args, check whether
PC_LIBXML_VERSION is still empty and if so read LIBXML_DOTTED_VERSION
from the xmlversion.h header. This mirrors the version-detection logic
in the system CMake FindLibXml2 module and ensures LLDB is built with
libxml2 support on installations that use a static libxml2 without a .pc
file.
Commit: 466c1c2976f5206bb931617973ca030c51881b0a
https://github.com/llvm/llvm-project/commit/466c1c2976f5206bb931617973ca030c51881b0a
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/test/CodeGenCUDA/builtins-amdgcn.cu
M clang/test/CodeGenCUDA/builtins-spirv-amdgcn.cu
M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
Log Message:
-----------
[AMDGPU] Reimplement icmp and fcmp builtins using ballot (#208231)
Use `llvm.amdgcn.ballot` instead of the deprecated intrinsics
`llvm.amdgcn.icmp` and `llvm.amdgcn.fcmp`.
Commit: fb26065857a5a8877357ece1611f804ba7c114f4
https://github.com/llvm/llvm-project/commit/fb26065857a5a8877357ece1611f804ba7c114f4
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
Log Message:
-----------
[AggressiveInstCombine] Factor out the common part of tryToRecognizeTableBasedCttz and tryToRecognizeTableBasedLog2. NFC (#208123)
They both start with the same GEP+load matching.
Assisted-by: Claude
Commit: b49d10f67cd43f4a078bbcd3dc04259989a7924a
https://github.com/llvm/llvm-project/commit/b49d10f67cd43f4a078bbcd3dc04259989a7924a
Author: Vicky Nguyen <vicky.trucviennguyen at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M clang/test/CodeGen/AArch64/neon/subtraction.c
Log Message:
-----------
[CIR][test] Use global instcombine RUN line in AArch64 neon subtracti… (#207894)
Related to https://github.com/llvm/llvm-project/issues/185382
Follow-up to https://github.com/llvm/llvm-project/pull/207115
Include `instcombine` into the global LLVM RUN line and remove the
separate `LLVM-IC` prefix that only covered the narrowing-subtraction
tests in `clang/test/CodeGen/AArch64/neon/subtraction.c`.
Update LLVM CHECK to match the `instcombine` output: bitcast checks are
dropped, the inferred `nsw` flags are added on the widening subs, and
unused shuffle operands are canonicalized to `poison`.
Commit: c9e2c308faa924a043175e2afa1e2efcb8b59a8a
https://github.com/llvm/llvm-project/commit/c9e2c308faa924a043175e2afa1e2efcb8b59a8a
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/neon/fullfp16.c
M clang/test/CodeGen/AArch64/v8.2a-fp16-intrinsics.c
Log Message:
-----------
[CIR][AArc64] Add lowering for fp16 intrinsics (step + rounding) (#207511)
This PR adds lowering for the following intrinsic groups:
* https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#markdown-toc-reciprocal-step
It also adds FP16 tests for these intrinsics (implemented in #195021
without tests):
* https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#markdown-toc-rounding-1
It also moves the corresponding tests from:
* clang/test/CodeGen/AArch64/v8.2a-fp16-intrinsics.c
to:
* clang/test/CodeGen/AArch64/neon/fullfp16.c
The lowering follows the existing implementation in
CodeGen/TargetBuiltins/ARM.cpp.
Commit: b634fff1e30c0676f57b5b44a544d638561c9ad9
https://github.com/llvm/llvm-project/commit/b634fff1e30c0676f57b5b44a544d638561c9ad9
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCombine.td
M llvm/lib/Target/AMDGPU/AMDGPUCombinerHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCombinerHelper.h
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
Log Message:
-----------
[AMDGPU] SDAG and GISel support for folding fabs into fp_round source modifiers (#204861)
Commit: 9df4aed204020bc79be55afa7b177822759856fb
https://github.com/llvm/llvm-project/commit/9df4aed204020bc79be55afa7b177822759856fb
Author: jeanPerier <jperier at nvidia.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/StackArrays.cpp
M flang/test/Transforms/stack-arrays.fir
Log Message:
-----------
[flang] add some missing stackrestore with -fstack-arrays (#208161)
In the StackArray pass that moves array temporaries from the heap to the
stack under -fstack-arrays, when visiting FreeMemOp to insert
stackrestore, the code was not unwrapping converts as done in other
parts of the code leading to the allocation conversion and stacksave
insertion to happen without the emission of the stackrestore.
Reuse the same utility as in the rest of the pass to get consistent
behavior and fix the memory leak.
Commit: 33ef532c79b321cf22232ba0054b36d259c62079
https://github.com/llvm/llvm-project/commit/33ef532c79b321cf22232ba0054b36d259c62079
Author: pstarkcdpr <paul.stark at cdprojektred.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/test/Dialect/Linalg/vectorization/extract.mlir
Log Message:
-----------
[mlir][linalg] Fix mask rank for masked contiguous `tensor.extract` (#206207)
### Summary
Note: This fix was made mostly by Claude based on a failure case in
IREE. It addresses issue
https://github.com/llvm/llvm-project/issues/206209
When `vectorizeTensorExtract` lowers a `tensor.extract` recognized as a
*contiguous load*, it builds a `vector.transfer_read` whose permutation
map broadcasts the leading iteration dims and only reads the trailing
`min(dstRank, srcRank)` dims of the source. Until now this read was
returned unmasked and masked later by the generic path, which applies a
**full iteration-space identity mask**. When the source rank is smaller
than the loop nest, that mask is over-ranked relative to the
(rank-reduced) read — e.g. a `vector<1x4xi1>` mask on a read whose
inferred mask type is `vector<4xi1>` — and the op fails verification:
```
'vector.mask' op expects a 'vector<4xi1>' mask for the maskable operation
```
(or, after the masked read is rank-reduced by canonicalization in a full
pipeline, `'vector.transfer_read' op inferred mask type ... don't
match`).
### Root cause
The three `tensor.extract` lowering paths in `vectorizeTensorExtract`
handle masking inconsistently:
- **gather** masks itself — correct, its result is full-rank;
- **scalar broadcast** masks itself with a rank-1 mask, explicitly
noting that the generic identity-map masking "wouldn't be valid here";
- **contiguous load** does neither and relies on the generic path, which
masks over all loop dims. That is only correct when the read is
full-rank (`srcRank >= numLoops`); when `srcRank < numLoops` the read
broadcasts its leading dims and needs a rank-reduced mask.
Existing tests only covered the full-rank case (e.g. a
`tensor<80x16xf32>` source in a 2-D nest), so the rank-reducing case was
never exercised.
### Fix
Mask the contiguous read in place, mirroring the scalar-broadcast path,
using a masking map that projects the iteration space onto exactly the
trailing `min(dstRank, srcRank)` dims that are read:
```cpp
int64_t numReadDims = std::min(dstRank, srcRank);
auto maskingMap = AffineMap::getMinorIdentityMap(
linalgOp.getNumLoops(), numReadDims, rewriter.getContext());
Operation *maskedReadOp =
state.maskOperation(rewriter, transferReadOp, linalgOp, maskingMap);
```
This is **behavior-preserving for the existing full-rank case**: when
`min(dstRank, srcRank) == numLoops`, `getMinorIdentityMap` collapses to
the full identity map, producing the same mask (same `activeMaskCache`
key) and identical
IR. Only the previously-broken rank-reducing case changes.
### Testing
- New regression test `@masked_contiguous_extract_rank_reducing_mask` in
`mlir/test/Dialect/Linalg/vectorization/extract.mlir` (1-D source inside
a 2-D loop nest). It fails verification before this change and checks
the rank-reduced mask after it.
- `mlir/test/Dialect/Linalg` (164 tests) and `mlir/test/Dialect/Vector`
+ `mlir/test/Dialect/Linalg/vectorization` (113 tests) all pass.
### Notes for reviewers
- The change is localized to the contiguous-load branch of
`vectorizeTensorExtract`; the gather and scalar-broadcast branches are
untouched.
- No new mask is created in the full-rank case — the existing cached
iteration-space mask is reused, so there is no codegen/IR churn for
current callers.
---------
Signed-off-by: Paul Stark <paul.stark at cdprojektred.com>
Co-authored-by: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
Commit: 02a7cd5177af78e5c8342bec3f30125113071556
https://github.com/llvm/llvm-project/commit/02a7cd5177af78e5c8342bec3f30125113071556
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/BPF/BPFMIPeephole.cpp
Log Message:
-----------
BPF: Remove unnecessary isReg check on phi operand (#208243)
These must be a register. This pass has quite a lot of
defensive code against invalid MIR that should be deleted.
Commit: e2d6498e36235ecd9955d8d375a0c1a253c2e11a
https://github.com/llvm/llvm-project/commit/e2d6498e36235ecd9955d8d375a0c1a253c2e11a
Author: Zhen Wang <zhenw at nvidia.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Optimizer/Transforms/CUDA/CUFFunctionRewrite.cpp
M flang/test/Fir/CUDA/cuda-function-rewrite.mlir
Log Message:
-----------
[flang][cuda] Defer on_device() folding in host copies of OpenACC routines (#208125)
Add a `defer-acc-routines` option to `cuf-function-rewrite`. When set,
`on_device()` is not folded in the host copy of an OpenACC routine (has
`acc.routine_info`, not in a `gpu.module`), because that body is later
cloned into the device routine and would otherwise bake in the host
value (`.false.`). A later run folds each copy in its own context. Calls
already in a `gpu.module` are still folded.
Commit: 0a015cc516abb7f54bcdd94763f44219b6298bd9
https://github.com/llvm/llvm-project/commit/0a015cc516abb7f54bcdd94763f44219b6298bd9
Author: Guo Chen <guochen2 at amd.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-add.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-anyext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/orn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw_usub_sat.ll
M llvm/test/CodeGen/AMDGPU/atomics-system-scope.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/clamp-modifier.ll
M llvm/test/CodeGen/AMDGPU/ctls.ll
M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/fold-int-pow2-with-fmul-or-fdiv.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.and.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.or.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
M llvm/test/CodeGen/AMDGPU/mad.u16.ll
M llvm/test/CodeGen/AMDGPU/preserve-hi16.ll
M llvm/test/CodeGen/AMDGPU/reassoc-mul-add-1-to-mad.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/AMDGPU/srl-bitcast-bv.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-add.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umin.ll
Log Message:
-----------
[AMDGPU] Replace zext pattern from reg_sequence to cvt_u32_u16 (#208045)
Isel pattern putting imm inside reg_sequence create side effects when
register coalescer join these `copy` from imm
```
%1 = v_mov_b16_t16_e64 ...
%2.hi16 = copy %1
%2.lo16 = ....
...
%3.hi16 = copy %1
%3.lo16 = ....
....
%4.hi16 = copy %1
%4.lo16 = ....
```
to
```
%1 = v_mov_b16_t16_e64 ...
%2.hi16 = copy %1
%2.lo16 = ....
...
%2.lo16 = ... (reuse %2 and repeat)
....
```
When the number of copy increase this inserts a large number of WAR
hazzards on the reused virutal reg, and the machine scheduler bail out
getting higher reg pressure after sorting.
Beside this, replacing with cvt_u32_u16 provides better code quality
Commit: a47be1995a65a411527062e7ca7e92fff8d6ad1b
https://github.com/llvm/llvm-project/commit/a47be1995a65a411527062e7ca7e92fff8d6ad1b
Author: Luke Lau <luke at igalia.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
A llvm/test/Transforms/LoopVectorize/simplify-reverse-reverse.ll
Log Message:
-----------
[VPlan] Add more tests for reverse simplification. NFC (#208255)
Commit: bdaeb7c290c482111c12da01b86f920e5151286a
https://github.com/llvm/llvm-project/commit/bdaeb7c290c482111c12da01b86f920e5151286a
Author: Wael Yehia <wmyehia2001 at yahoo.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M clang/test/Sema/attr-target.c
Log Message:
-----------
[NFC] Add precommit test for PR 208059 (#208259)
Co-authored-by: Wael Yehia <wyehia at ca.ibm.com>
Commit: 1529d35adbd6f13aa234a5f4cfd9ac0e28bdd338
https://github.com/llvm/llvm-project/commit/1529d35adbd6f13aa234a5f4cfd9ac0e28bdd338
Author: Aditya Medhane <sherlockedaditya at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/test/Misc/warning-wall.c
M clang/test/SemaCXX/warn-func-not-needed.cpp
M clang/test/SemaCXX/warn-variable-not-needed.cpp
Log Message:
-----------
Reland "[Clang] Enable -Wunused-template under -Wall" (#208001)
Reland of #206123, which was reverted in #207848.
What has changed since:
- flang-rt occurrences are fixed in #207979
- openmp had one more occurrence which is fixed in #207983
- The remaining -Wunused-template hits anywhere in CI logs are the tsan
Go runtime warnings, which are warnings only (buildgo.sh does not use
-Werror on Linux)
Marked as draft until #207979 and #207983 land.
Closes #202945
Commit: 16b8129cd76a0954ac2ed1d0343f0fec40c2a691
https://github.com/llvm/llvm-project/commit/16b8129cd76a0954ac2ed1d0343f0fec40c2a691
Author: Giorgi Gvalia <49309634+gvalson at users.noreply.github.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/include/RecordReplay.h
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/plugins-nextgen/common/src/RecordReplay.cpp
A offload/test/tools/omp-kernel-replay/record-replay-ir-bitcode.cpp
M offload/tools/kernelreplay/llvm-omp-kernel-replay.cpp
Log Message:
-----------
[offload] Add the ability to record and replay IR bitcode modules (#207278)
This PR allows the user to use JIT with kernel record & replay by
expanding the latter to also work with IR bitcode images.
- Add a new field to `DeviceImageTy` for storing the IR image.
- Expand `RecordReplayTy::FileTy` to also include IR bitcode and
associate it with the file extension `.bc`
- Add the `--load-bitcode` command line option to
`llvm-omp-kernel-replay` tool.
---------
Co-authored-by: Giorgi Gvalia <gvalia1 at llnl.gov>
Commit: cf61b62424f6c2b679106b3687f08af5b18a99f7
https://github.com/llvm/llvm-project/commit/cf61b62424f6c2b679106b3687f08af5b18a99f7
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/include/llvm/Analysis/BranchProbabilityInfo.h
M llvm/include/llvm/Support/BranchProbability.h
M llvm/lib/Analysis/BranchProbabilityInfo.cpp
M llvm/lib/Support/BranchProbability.cpp
Log Message:
-----------
[BranchProbabilityInfo][NFC] Remove some global ctors (#208252)
Make BranchProbability constexpr and replace global std::map with
switches.
Commit: b7edea5afa0fef26054a491413a62eb3d35e7d2b
https://github.com/llvm/llvm-project/commit/b7edea5afa0fef26054a491413a62eb3d35e7d2b
Author: Carlos Seo <carlos.seo at linaro.org>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
A flang/test/Lower/OpenMP/declare-reduction-operator-host-assoc.f90
Log Message:
-----------
[flang][OpenMP] Fix host-associated user-defined operator reduction (#207413)
A DECLARE REDUCTION for a user-defined operator (e.g.
reduction(.myadd.:x)) was rejected with "Invalid reduction operator in
REDUCTION clause" when the operator was host-associated.
CheckReductionOperator looked up the mangled reduction name in the scope
that owns the operator symbol (the scope where the operator interface is
declared) instead of the scope where the reduction clause appears. The
user-defined reduction is stored in the latter (a child scope), so the
lookup in the operator's owning scope could not find it and the clause
was reported as invalid.
Look up the reduction in the scope of the clause via
context_.FindScope(source). FindUserReduction already searches enclosing
scopes, so this both finds a locally declared reduction and continues to
find one that is host- or use-associated. The lowering side already
resolves the reduction in the current scope, so no lowering change is
needed.
This is a follow-up of PR #202474.
Commit: 2130acba394cf872bf48fcd96e4a3337f4dc0fd0
https://github.com/llvm/llvm-project/commit/2130acba394cf872bf48fcd96e4a3337f4dc0fd0
Author: Luke Lau <luke at igalia.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M .github/workflows/test-suite.yml
Log Message:
-----------
[GitHub] Post ./utils/compare.py results in /test-suite (#208154)
llvm-test-suite comes with a ./utils/compare.py script which can compare
metrics across different builds. This PR adds support for displaying
these results in the GitHub comment as markdown table.
For now it just shows the difference in code size (the size..text
metric), but in future it can be extended to show the reuslts of any
arbitrary LLVM statistic.
It also posts the link to the result json files themselves in case the
user wants to do some more analysis locally.
Commit: 290f3bc2d12e5875a0be386fad8f6a5dfce9d6a3
https://github.com/llvm/llvm-project/commit/290f3bc2d12e5875a0be386fad8f6a5dfce9d6a3
Author: Caroline Newcombe <caroline.newcombe at hpe.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/openmp-utils.cpp
A flang/test/Lower/OpenMP/collapse-imperfect-nest.f90
A flang/test/Lower/OpenMP/collapse-loop-transform.f90
M flang/test/Semantics/OpenMP/do-collapse.f90
M flang/test/Semantics/OpenMP/do-concurrent-collapse-60.f90
M flang/test/Semantics/OpenMP/do-concurrent-collapse.f90
M flang/test/Semantics/OpenMP/do08.f90
M flang/test/Semantics/OpenMP/do10.f90
M flang/test/Semantics/OpenMP/do13.f90
M flang/test/Semantics/OpenMP/do15.f90
M flang/test/Semantics/OpenMP/do16.f90
M flang/test/Semantics/OpenMP/do22.f90
A flang/test/Semantics/OpenMP/doacross-nesting-omp60.f90
A flang/test/Semantics/OpenMP/ordered-nesting-omp50.f90
A flang/test/Semantics/OpenMP/ordered-nesting-omp51.f90
Log Message:
-----------
[flang][OpenMP] Implement collapse for imperfectly nested loops (#202435)
Fixes #199092
Flang previously rejected intervening code between associated loops in a
collapsed nest (e.g. `collapse(2)` with statements between the outer and
inner DO). This patch removes that restriction and implements correct
lowering.
**Semantics:** accept intervening code retroactively for all versions,
except when perfect nesting is still required
OpenMP 5.0 introduced support for collapsing imperfectly nested loops
for worksharing-loop, simd, taskloop, and distribute constructs. OpenMP
5.1 later formalized this under the Canonical Loop Nest (CLN)
definition. This support is applied retroactively for all OpenMP
versions, since the semantics are safe to implement regardless of
version and for compatibility with other compilers.
The only case where perfect nesting is still enforced is when ordered
semantics require it:
- Pre-5.2: any ordered clause with an argument requires perfect nesting.
- 5.2+: perfect nesting is required only when the loop body contains
ordered directives with doacross (or the legacy depend(sink/source))
clauses.
A `DoacrossFinder` visitor is added to detect doacross directives in the
loop body while correctly not descending into nested OpenMP block/loop
constructs (which have their own binding context).
**Lowering**
Intervening statements are guarded by induction variable comparisons
within the flat `omp.loop_nest` body: "before" code executes when inner
induction variables equal their lower bounds; "after" code executes when
inner induction variables equal their last iteration values (`lb + ((ub
- lb) / step) * step)` for non-unit steps).
**Testing**
- Lowering lit test added
- Semantics tests: updated to remove expected errors for now-accepted
code; new tests added for coverage.
- llvm-test-suite update: (will add once opened)
Assisted by: Copilot
Commit: 2e3dcf66357f59dfceca8a9cbb9c3af493a66ad6
https://github.com/llvm/llvm-project/commit/2e3dcf66357f59dfceca8a9cbb9c3af493a66ad6
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
A llvm/test/CodeGen/RISCV/rvp-zip.ll
Log Message:
-----------
[Clang][P-ext] Support packed zip/unzip intrinsics (#208245)
This patch implements packed zip/unzip intrinsics with general shuffles.
Commit: d9681a08a79dc6c57b542483e829dc13c38009cb
https://github.com/llvm/llvm-project/commit/d9681a08a79dc6c57b542483e829dc13c38009cb
Author: Justin Fargnoli <jfargnoli at nvidia.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
[LLVM][Maintainers] Volunteer for LoopUnroll (#207802)
I've been reviewing and contributing PRs to the unroller for the past
few months. Since I plan on keeping that up, I figured I'd formally
volunteer as a maintainer.
I'm certainly not an expert on every aspect of the unroller, so no
worries if we feel that we need someone more experienced to fill this
gap.
Commit: c12df55e9a5ee84178c5d30c753a4799b63fec80
https://github.com/llvm/llvm-project/commit/c12df55e9a5ee84178c5d30c753a4799b63fec80
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/PassManagerInternal.h
Log Message:
-----------
[IR][NFC] Drop vtable from PassConcept/PassModel (#208168)
The PassConcept/PassModel vtable has a size of 64 bytes (offset to top,
RTTI pointer, complete object destructor, deleting destructor, run,
printPipeline, name, isRequired), which add up to 53kiB (all
targets)/44 kiB (single-target). As more back-end passes get ported to
the new pass manager, this size will increase.
Remove the vtables by replacing the virtual dispatch with explicit
function pointers, initialized when adding the pass to the pass manager.
While this *very* slightly increases the cost of adding a pass, there's
also a very slight win from avoiding the vtable indirection when
running/destructing the pass.
Commit: af53003dfee4afe3f003996dc09f55d59d63003a
https://github.com/llvm/llvm-project/commit/af53003dfee4afe3f003996dc09f55d59d63003a
Author: Federico Bruzzone <federico.bruzzone.i at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M mlir/lib/Dialect/ArmSME/Transforms/VectorLegalization.cpp
M mlir/test/Dialect/ArmSME/vector-legalization.mlir
Log Message:
-----------
[mlir][ArmSME] fix f64 scalable matmul crashes in `VectorLegalizationPass` (#207947)
This PR simply fix what we identified in iree-org/iree#24689.
**Note**: the new test did not pass the checks prior to this PR 🫶
@banach-space @egebeysel @AGindinson
---------
Signed-off-by: Federico Bruzzone <federico.bruzzone.i at gmail.com>
Co-authored-by: Artem Gindinson <gindinson at roofline.ai>
Commit: eb37dfcad129d3e4e14daaa871a52428e424f11f
https://github.com/llvm/llvm-project/commit/eb37dfcad129d3e4e14daaa871a52428e424f11f
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M .github/workflows/commit-access-greeter.yml
Log Message:
-----------
workflows/commit-access-greeter: Use github-automation container (#206311)
Commit: 01846f68e5ae612fd348784265e14c0130cd79fd
https://github.com/llvm/llvm-project/commit/01846f68e5ae612fd348784265e14c0130cd79fd
Author: Jan Korous <jkorous at apple.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
A clang/include/clang/ScalableStaticAnalysis/SourceTransformation/YAMLSourceEditFormat.h
M clang/lib/ScalableStaticAnalysis/SourceTransformation/CMakeLists.txt
A clang/lib/ScalableStaticAnalysis/SourceTransformation/YAMLSourceEditFormat.cpp
M clang/unittests/ScalableStaticAnalysis/CMakeLists.txt
A clang/unittests/ScalableStaticAnalysis/SourceTransformation/YAMLFormatTest.cpp
Log Message:
-----------
[clang][ssaf] Add YAML source-edit format (#204491)
Adds the built-in `SourceEditFormat`, registered under the file
extension `yaml`. The writer drives `llvm::yaml::Output` against the
existing `clang::tooling::TranslationUnitReplacements` `MappingTraits`
from `clang/Tooling/ReplacementsYaml.h`, so the resulting document is
byte-for-byte consumable by `clang-apply-replacements`.
Anchored via `SSAFYAMLSourceEditFormatAnchorSource` so static builds
keep the registration.
Assisted-By: Claude Opus 4.7
Commit: da4bbda3dcefbaf88c2f336afd03c4a6ebb41a27
https://github.com/llvm/llvm-project/commit/da4bbda3dcefbaf88c2f336afd03c4a6ebb41a27
Author: Ivan Kosarev <ivan.kosarev at amd.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/test/MC/AMDGPU/gfx12_asm_vopc.s
A llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc-fake16.txt
R llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc.txt
Log Message:
-----------
[AMDGPU][NFC] Templatise and roundtrip gfx12_asm_vopc.s (#208265)
This is just an amended version of the corresponding gfx11 test.
Eliminates the current largest contributor into the undesired delta vs
the downstream True16 branch across MC tests.
Commit: d7a09fb4ac7a3f231f1e4be7c00ef8c47e12d76b
https://github.com/llvm/llvm-project/commit/d7a09fb4ac7a3f231f1e4be7c00ef8c47e12d76b
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/FunctionExtras.h
Log Message:
-----------
[ADT][NFC] Simplify llvm::unique_function (#208251)
Refactor the core of UniqueFunctionBase to move away from static
function pointer tables, which consume ~4kiB in .data.rel.ro. Instead,
store two function pointers on construction of the UniqueFunctionBase,
one for call and one that combines move and destruction. Retain the
memcpy path for trivial inline structs. (I haven't verified whether this
is actually beneficial.)
Also, greatly simplify the class and implement the callbacks using
lambdas.
Commit: bd57e09f6a6e3a8eb911e45816d7038f4ff8b017
https://github.com/llvm/llvm-project/commit/bd57e09f6a6e3a8eb911e45816d7038f4ff8b017
Author: Alex Langford <alangford at apple.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M lldb/include/lldb/Target/DynamicRegisterInfo.h
M lldb/include/lldb/lldb-forward.h
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.h
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
M lldb/source/Plugins/Process/gdb-remote/ThreadGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ThreadGDBRemote.h
M lldb/source/Plugins/Process/wasm/ProcessWasm.h
M lldb/source/Plugins/Process/wasm/RegisterContextWasm.cpp
M lldb/source/Plugins/Process/wasm/RegisterContextWasm.h
Log Message:
-----------
[lldb] Remove GDBRemoteDynamicRegisterInfo (#208067)
At this point, GDBRemoteDynamicRegisterInfo is an idempotent wrapper
around DynamicRegisterInfo. Its remaining methods are unimplemented as
of 3f5fd4b3c1d670649b59f3631287b6f54c6b85ee, so the only functional
difference is that it provides public copy and copy-assign constructors.
I propose that GDBRemoteDynamicRegisterInfo be removed in favor of
DynamicRegisterInfo.
Commit: 691bda58840dbeccc942cbdde7e01ab53740cd0f
https://github.com/llvm/llvm-project/commit/691bda58840dbeccc942cbdde7e01ab53740cd0f
Author: Alex Langford <alangford at apple.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M lldb/include/lldb/Target/Target.h
M lldb/source/API/SBBreakpointName.cpp
M lldb/source/API/SBTarget.cpp
M lldb/source/Breakpoint/BreakpointIDList.cpp
M lldb/source/Commands/CommandObjectBreakpoint.cpp
M lldb/source/Target/Target.cpp
Log Message:
-----------
[lldb] Remove ConstString from remaining BreakpointName functionality (#206856)
Commit: 777ec1fff4502f6913818de5970a1c060a966877
https://github.com/llvm/llvm-project/commit/777ec1fff4502f6913818de5970a1c060a966877
Author: Alex Langford <alangford at apple.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M lldb/include/lldb/DataFormatters/FormatManager.h
Log Message:
-----------
[lldb] Remove unused overload FormatManager::GetCategory(const char *, bool) (#208109)
Commit: 3424d452ae6e4ec00e6f2e4149f3031471960e47
https://github.com/llvm/llvm-project/commit/3424d452ae6e4ec00e6f2e4149f3031471960e47
Author: Anonmiraj <ezzibrahimx at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M clang/lib/AST/CXXInheritance.cpp
Log Message:
-----------
[clang][NFC] Compute current instantiation less frequently in `lookupInBases` (#208139)
While benchmarking I noticed that #118003 causes a small compile-time
regression. Right now, it computes `isCurrentInstantiation` for every
base during name lookup.
We can easily avoid this overhead by only computing it when a dependent
base could actually be skipped.
Commit: 6560fef7724bbd9baa57d3f09d077c4d2e69c868
https://github.com/llvm/llvm-project/commit/6560fef7724bbd9baa57d3f09d077c4d2e69c868
Author: Ziqing Luo <ziqing_luo at apple.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
A clang/include/clang/ScalableStaticAnalysis/Analyses/OperatorNewDelete/OperatorNewDeletePointers.h
M clang/include/clang/ScalableStaticAnalysis/BuiltinAnchorSources.def
M clang/lib/ScalableStaticAnalysis/Analyses/CMakeLists.txt
A clang/lib/ScalableStaticAnalysis/Analyses/OperatorNewDelete/OperatorNewDeletePointersExtractor.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/SSAFAnalysesCommon.h
A clang/unittests/ScalableStaticAnalysis/Analyses/OperatorNewDelete/OperatorNewDeletePointersExtractorTest.cpp
M clang/unittests/ScalableStaticAnalysis/CMakeLists.txt
Log Message:
-----------
[SSAF][Extractor] Extract operator new/delete overload entities that shall retain their types (#206600)
This commit creates an extractor for operator new/delete overloads.
Overloads of operator new shall retain their void* return type,
regardless of whether they are propagated by unsafe buffers. The same
applies to the parameters of operator delete overloads.
Therefore, clang-reforge eventually need this information.
rdar://179151541
---------
Co-authored-by: Balázs Benics <benicsbalazs at gmail.com>
Commit: cefd20c496edd4df4ccd1faf399ee0d971b60116
https://github.com/llvm/llvm-project/commit/cefd20c496edd4df4ccd1faf399ee0d971b60116
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Use DCI.CombineTo instead of DAG.ReplaceAllUsesWith in performReverseEVLCombine. (#208275)
This makes sure the replaced node is deleted without relying on it still
being in the worklist, schedules its users for revisiting, and prints
the debug message for the replacement.
Commit: fd796cffa1b38810fef4ce43c34a6fc72a621b1b
https://github.com/llvm/llvm-project/commit/fd796cffa1b38810fef4ce43c34a6fc72a621b1b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-reduce-add-mask.ll
M llvm/test/CodeGen/X86/vector-reduce-add-zext.ll
M llvm/test/CodeGen/X86/vector-reduce-ctpop.ll
Log Message:
-----------
[X86] combineArithReduction - truncate from v4iXX to v4i16 for PSADBW add reduction patterns (#208286)
Noticed while trying to make ISD::VECREDUCE_ADD legal - if we're using
PSADBW, we don't need to truncate down to v4i8 and then zero-padd the
lowest v8i8/64-bits, we can just use v4i16 and bitcast to v8i8 since we
know the upper 8-bits are zero.
Commit: 40455118dff8af2d662e50a2b6083c9c7174740d
https://github.com/llvm/llvm-project/commit/40455118dff8af2d662e50a2b6083c9c7174740d
Author: Fabrice de Gans <Steelskin at users.noreply.github.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/include/llvm/Plugins/PassPlugin.h
M llvm/utils/git/ids-check-helper.py
Log Message:
-----------
[ids-check] Add support for ignoring symbols (#208241)
`llvmGetPassPluginInfo()` is not exported from the LLVM dylib. It is
meant to be the entry point for a pass plugin in another dylib. As it
is, the ids-check workflow would automatically add the `LLVM_ABI`
annotation to it, which is incorrect.
This fixes the issue by explicitly marking the symbol as ignored.
The effort to build LLVM as a DLL is tracked in #109483.
Commit: abc27e39ab4d0d17820159329ee3faeaf31261ae
https://github.com/llvm/llvm-project/commit/abc27e39ab4d0d17820159329ee3faeaf31261ae
Author: Eli Friedman <efriedma at qti.qualcomm.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/MachineRegisterInfo.h
M llvm/lib/CodeGen/MachineRegisterInfo.cpp
A llvm/test/DebugInfo/AArch64/machine-cp-updates-dbg-reg-subreg.mir
Log Message:
-----------
[MachineCopyPropagation] Fix debug info referring to subregisters. (#207861)
When copy propagation removes a copy, it fixes debug info that refers to
the old register to instead refer to the new register. This logic didn't
really deal with subregisters; it took any DBG_VALUE that pointed to a
subregister of the old register, and replaced it with the full new
register.
This patch adds logic for subregisters: if a DBG_VALUE refers to a
subregister of the source register, find the corresponding subregister
of the destination register.
Fixes #207682
Commit: 6ed1ae68fa74c290c19ae8854469037ce105ae4a
https://github.com/llvm/llvm-project/commit/6ed1ae68fa74c290c19ae8854469037ce105ae4a
Author: Anatoly Trosinenko <atrosinenko at accesssoftek.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/ptrauth-isel.ll
M llvm/test/CodeGen/AArch64/ptrauth-isel.mir
Log Message:
-----------
[AArch64][PAC] Reset `killed` operand flag in custom inserter of PAC pseudo (#158699)
If custom inserter changes the `AddrDisc` operand of `AArch64::PAC`
pseudo instruction, conservatively reset its `killed` flag. Keeping this
flag without checking if it is still legal may result in code of the
form
%disc = MOVKXi %addr(tied-def 0), 1234, 48
%signed = PAC %ptr(tied-def 0), 2, 0, killed %disc
# %addr is used past this point and %disc is not
being turned into
%signed = PAC %ptr(tied-def 0), 2, 1234, killed %addr
# %addr is used past this point, but the operand of
# the above instruction has killed flag
Commit: c7c7cab93eb2e96d96820668c029f9e1b7e4a00b
https://github.com/llvm/llvm-project/commit/c7c7cab93eb2e96d96820668c029f9e1b7e4a00b
Author: Rafael Auler <rafaelauler at meta.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M bolt/lib/Core/DIEBuilder.cpp
M bolt/test/X86/dwarf5-locexpr-addrx.s
Log Message:
-----------
[BOLT] Fix DW_FORM_implicit_const values lost during DWARF5 rewriting (#192166)
Summary:
Fix two bugs in DIEBuilder that caused DW_FORM_implicit_const values to
be zeroed out when rewriting DWARF5 debug sections
(--update-debug-sections).
1. In constructDIEFast(), DWARFFormValue was constructed with just the
form code, leaving the value at 0. For DW_FORM_implicit_const,
extractValue() is a no-op since the value is expected to be pre-set.
Fix: use AttrSpec.getFormValue() which initializes the value from the
abbreviation table.
2. In assignAbbrev(), AddAttribute(Attr.getAttribute(), Attr.getForm())
used the two-argument overload which discards the implicit_const value.
Fix: use AddAttribute(Attr) to copy the full DIEAbbrevData.
Fixes https://github.com/llvm/llvm-project/issues/192084
Commit: 2c6a3d29636a54246738347f801c77cb15ac8241
https://github.com/llvm/llvm-project/commit/2c6a3d29636a54246738347f801c77cb15ac8241
Author: Drew Kersnar <dkersnar at nvidia.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/rangereduce.ll
Log Message:
-----------
[SimplifyCFG] Improve reduceSwitchRange to avoid unnecessary subtractions (#198374)
Dense switch cases can sometimes be achieved with only a shift, avoiding
a subtract. Change reduceSwitchRange to check for such cases before
falling back to using a subtract.
The changes to test9 demonstrates that for the purpose of lookup-table
lowering (triggered by the switch-to-lookup flag), the switch range
still ends up normalized to start at 0, the subtraction just happens
after the fshl.
test10 demonstrates where this change is useful, resulting in a dense
switch case with one less subtract.
test11 demonstrates cases where the subtract is still needed in order to
form a dense switch case.
Commit: bd9554f5da14d3a627fb8effc1769541ca05e4f9
https://github.com/llvm/llvm-project/commit/bd9554f5da14d3a627fb8effc1769541ca05e4f9
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/FunctionExtras.h
Log Message:
-----------
[ADT][NFC] UniqueFunction MSVC fix (#208293)
Fixup of #208251 for MSVC, which erroneously treats uses of non-static
constexpr variables as odr-use and requires them to be captured.
Commit: e07cdf3cf22db202d9a29b66a78f9e5f83f21660
https://github.com/llvm/llvm-project/commit/e07cdf3cf22db202d9a29b66a78f9e5f83f21660
Author: DylanFleming-arm <85629460+DylanFleming-arm at users.noreply.github.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
A libc/src/mathvec/aarch64/CMakeLists.txt
A libc/src/mathvec/aarch64/common.h
A libc/src/mathvec/aarch64/expf.cpp
Log Message:
-----------
[libc][mathvec][aarch64] Add AdvSIMD optimised expf (#206776)
This PR adds an AdvSIMD optimised version of the generic expf, using
intrinsics.
Commit: 031b773b01700acf82f5977a5aa6024621b8211c
https://github.com/llvm/llvm-project/commit/031b773b01700acf82f5977a5aa6024621b8211c
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M clang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.cpp
M clang-tools-extra/clangd/SemanticHighlighting.cpp
M clang-tools-extra/clangd/refactor/tweaks/DefineInline.cpp
M clang/docs/LibASTMatchersReference.html
M clang/docs/ReleaseNotes.md
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/DeclTemplate.h
M clang/include/clang/AST/JSONNodeDumper.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/include/clang/ASTMatchers/ASTMatchersInternal.h
M clang/include/clang/Basic/Specifiers.h
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTDumper.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/Comment.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclPrinter.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/JSONNodeDumper.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/ASTMatchers/Dynamic/Registry.cpp
M clang/lib/Analysis/ExprMutationAnalyzer.cpp
M clang/lib/CIR/CodeGen/CIRGenVTables.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/Index/IndexingContext.cpp
M clang/lib/InstallAPI/Visitor.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/StaticAnalyzer/Core/BugSuppression.cpp
M clang/lib/Tooling/Syntax/BuildTree.cpp
M clang/test/AST/ast-dump-templates-pattern.cpp
M clang/test/CXX/basic/basic.link/p11.cpp
M clang/test/CXX/drs/cwg18xx.cpp
M clang/test/CXX/drs/cwg7xx.cpp
M clang/test/CXX/temp/temp.arg/temp.arg.template/p3-2a.cpp
M clang/test/CXX/temp/temp.constr/temp.constr.decl/p4.cpp
M clang/test/CXX/temp/temp.decls/temp.spec.partial/temp.spec.partial.member/p2.cpp
M clang/test/CXX/temp/temp.spec/temp.expl.spec/p7.cpp
M clang/test/CodeGenCXX/default-arguments.cpp
M clang/test/CodeGenCXX/explicit-instantiation.cpp
A clang/test/Modules/GH208100.cpp
M clang/test/SemaCXX/GH195416.cpp
M clang/test/SemaCXX/constant-expression-cxx14.cpp
M clang/test/SemaCXX/deduced-return-type-cxx14.cpp
M clang/test/SemaCXX/member-class-11.cpp
A clang/test/SemaTemplate/GH202358.cpp
M clang/test/SemaTemplate/concepts-out-of-line-def.cpp
M clang/test/SemaTemplate/friend-template.cpp
M clang/test/SemaTemplate/instantiate-scope.cpp
M clang/test/Templight/templight-default-func-arg.cpp
M clang/test/Templight/templight-empty-entries-fix.cpp
M clang/tools/libclang/CIndex.cpp
M clang/unittests/AST/ASTImporterTest.cpp
M clang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
Log Message:
-----------
[clang] Reland: fix getTemplateInstantiationArgs (#208285)
Relands https://github.com/llvm/llvm-project/pull/199528
Previous: https://github.com/llvm/llvm-project/pull/207825
This implements a new strategy for collecting the template arguments, by
relying on the qualifiers and template parameter lists to navigate the
template
context of out-of-line definitions.
This greatly simplifies the signature of that function, by removing a
bunch
of workarounds, and simpliffying a couple that weren't removed yet.
Since this now relies on qualifiers and template parameter lists,
this patch expends most of its effort making sure these are placed,
transformed and propagated to template instantiations.
Also makes the explicit specialization AST nodes stop abusing the
template
parameter lists by storing it's own template parameter list, creating a
dedicated field for them, similar to partial specializations.
Fixes https://github.com/llvm/llvm-project/issues/202106
Fixes https://github.com/llvm/llvm-project/issues/202109
Fixes #208100
Fixes #202358
Changes since last landing:
* Instantiated method decls uses a separate path, also needs merging of
deduced return type.
* Handle failures instantiating redeclaration for default arguments
(fails in some error recovery scenarios).
Commit: 9fde8452156883976b6264afffa9f8f259e733ec
https://github.com/llvm/llvm-project/commit/9fde8452156883976b6264afffa9f8f259e733ec
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M .github/new-prs-labeler.yml
M llvm/docs/AddingConstrainedIntrinsics.rst
A llvm/docs/LangRef.md
R llvm/docs/LangRef.rst
Log Message:
-----------
[docs] Rename LangRef.{rst|md} (#201974)
Tracking issue: #201242
Migration guide docs: https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
RFC: https://discourse.llvm.org/t/rfc-make-myst-markdown-the-llvm-docs-format-rip-rest/90840
This commit does not use valid markdown, so the docs will not build, but
they will be fixed in an immediate follow-up commit that does the
migration.
Commit: 2cb32e4e72ce1e6094abc534510b405c1c84c5be
https://github.com/llvm/llvm-project/commit/2cb32e4e72ce1e6094abc534510b405c1c84c5be
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/docs/LangRef.md
Log Message:
-----------
[docs] Rewrite LangRef.md as Markdown (#201975)
Tracking issue: #201242
Migration guide docs:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
RFC:
https://discourse.llvm.org/t/rfc-make-myst-markdown-the-llvm-docs-format-rip-rest/90840
This change migrates LangRef by itself, since it is quite a large
document with many idiosyncracies.
LangRef makes extensive use of definition lists, which apparently
require enabling the deflist MyST extension in Sphinx conf.py. In part
because definition list boundaries are controlled by indentation,
several of them required manual fixups to get the nesting right. Some of
the issues were pre-existing broken indentation, but this should now be
much better.
I have a verification script that tracks all anchors and ensures that
all previous anchors are carried over to the new document, so no
mid-document links are broken.
Commit: b7cf10c60748049efede67b5e1bf8aed87daea70
https://github.com/llvm/llvm-project/commit/b7cf10c60748049efede67b5e1bf8aed87daea70
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M clang/docs/PointerAuthentication.rst
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/ptrauth.h
M clang/lib/Sema/SemaChecking.cpp
M clang/test/CodeGen/ptrauth-intrinsics.c
M clang/test/Sema/ptrauth-intrinsics-macro.c
M clang/test/Sema/ptrauth.c
M llvm/include/llvm/IR/Intrinsics.td
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
A llvm/test/CodeGen/AArch64/ptrauth-intrinsic-auth-with-pc-and-resign.ll
Log Message:
-----------
[arm64e] Add a builtin + intrinsic for arm64e PAuth_LR: __builtin_ptr_auth_auth_with_pc_and_resign (#202742)
The new builtin behaves like __builtin_ptrauth_auth_and_resign, but
incorporates the address of the signing instruction (i.e. the
`pacibsppc`/`paciasppc`) when performing the auth side, and subsequently
re-signs using a different scheme. Authenticating the re-signed value
will fail if and only if authenticating the original value with the
incorporated pc would have failed.
Commit: 23cead908f2d662e8f157b9a826fd489574b1f81
https://github.com/llvm/llvm-project/commit/23cead908f2d662e8f157b9a826fd489574b1f81
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC] Fix getInsertExtractIndex for ExtractElement and use unsigned indices
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/208317
Commit: 19c1b2c3f741b55a437e940417fab46b2bf5afda
https://github.com/llvm/llvm-project/commit/19c1b2c3f741b55a437e940417fab46b2bf5afda
Author: Alex Langford <alangford at apple.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M lldb/include/lldb/DataFormatters/DataVisualization.h
M lldb/include/lldb/DataFormatters/FormatManager.h
M lldb/include/lldb/DataFormatters/TypeCategoryMap.h
M lldb/source/DataFormatters/DataVisualization.cpp
M lldb/source/DataFormatters/TypeCategoryMap.cpp
Log Message:
-----------
[lldb] Remove unused AnyMatches functions from DataFormatters (#208288)
The only `AnyMatches` function actually used is in TypeCategoryImpl and
TieredFormatterContainer.
Commit: 41c4167cd066e8a9c3185917cafa9bef2cbfdb6d
https://github.com/llvm/llvm-project/commit/41c4167cd066e8a9c3185917cafa9bef2cbfdb6d
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/lib/Target/AMDGPU/AMDGPULowerIntrinsics.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.monitor.gfx1250.ll
R llvm/test/CodeGen/AMDGPU/memory-legalizer-single-wave-workgroup-memops.ll
Log Message:
-----------
Revert "[AMDGPU] Use wavefront scope for single-wave workgroup synchronization (#187673)" (#208280)
This reverts commit ebc56070eb8d25c8dc73a2e97caaeb4db0f7c9fa.
Revert justified by correctness issues around DMA operations as seen in
https://github.com/llvm/llvm-project/pull/207473 .
Commit: f550160b2d59a780ed86ae2a72cd2e3b8b3a70fa
https://github.com/llvm/llvm-project/commit/f550160b2d59a780ed86ae2a72cd2e3b8b3a70fa
Author: Moazin K. <mkhatti at nvidia.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M flang/lib/Lower/OpenACC.cpp
M flang/test/Lower/OpenACC/locations.f90
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
Log Message:
-----------
[flang][OpenACC] Attach `OpenACCLoopLocAttr` to `acc.loop` op (#208238)
Introduce an attribute `OpenACCLoopLocAttr` that can be attached to an
`acc.loop` operation to record loop locations and directive location
separately.
Attach it to `acc.loop` when building the op in flang.
Commit: a56885a9dcd578f9633132e9aa8420e0f7504569
https://github.com/llvm/llvm-project/commit/a56885a9dcd578f9633132e9aa8420e0f7504569
Author: Ikhlas Ajbar <iajbar at quicinc.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonRegisterInfo.td
A llvm/test/CodeGen/Hexagon/pr183850.ll
Log Message:
-----------
[Hexagon] Drop artificial VF sub-registers from W0-W15 (PR183850) (#208260)
Declaring VF0-VF15 as an artificial (vsub_fake) third sub-register of
W0-W15 caused MachineCopyPropagation to associate DBG_VALUEs of $wN with
unrelated $vM COPYs via reg-unit overlap, tripping the
hasDebugOperandForReg assertion in updateDbgUsersToReg.
Remove the fake sub-register from W0-W15. The reverse-alias WR0-WR15
keep vsub_fake intentionally.
Commit: e6b0517a80bc68784998c7f37740f8d2700b8249
https://github.com/llvm/llvm-project/commit/e6b0517a80bc68784998c7f37740f8d2700b8249
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
A llvm/test/Transforms/IndVarSimplify/eliminate-max-from-min-exit.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-deref-assumptions.ll
Log Message:
-----------
[LV,IndVars] Add tests for missed SCEV min/max reasoning (NFC) (#208314)
Add extra tests for missed SCEV min/max reasoning, including
https://github.com/llvm/llvm-project/pull/204083.
Commit: b8cc84591b6a9b314b1e486b0db643f9f399cf90
https://github.com/llvm/llvm-project/commit/b8cc84591b6a9b314b1e486b0db643f9f399cf90
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/config.bzl
Log Message:
-----------
[bazel] Correct config.h definitions for musl (#207295)
The Bazel overlay encodes several configure-time config.h results
manually. It currently treats all Linux platforms as having
execinfo.h/backtrace() and mallinfo(). That matches glibc, but is false
when the build is configured for musl libc.
The upstream .bazelrc provides --config=hermetic-toolchain. A musl build
can be selected by pairing that with the platform labels from the
external Bazel module named llvm, for example:
bazel build --config=hermetic-toolchain \
--platforms=@llvm//platforms:linux_x86_64_musl \
--extra_execution_platforms=@llvm//toolchain:linux_x86_64_platform \
@llvm-project//llvm:not
Only define HAVE_BACKTRACE/BACKTRACE_HEADER when not targeting musl, and
only define HAVE_MALLINFO for GNU libc. With the old definitions, this
fails in LLVM Support, e.g.:
Unix/Process.inc:95:19: error: variable has incomplete type 'struct
mallinfo'
Unix/Signals.inc:51:10: fatal error: 'execinfo.h' file not found
Drafted with LLM assistance.
Commit: 362cd64fab04219913d89a14fc54767376a9a737
https://github.com/llvm/llvm-project/commit/362cd64fab04219913d89a14fc54767376a9a737
Author: Adel Ejjeh <adel.ejjeh at amd.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
A llvm/test/Transforms/SimpleLoopUnswitch/trivial-unswitch-convergent.ll
Log Message:
-----------
[SimpleLoopUnswitch] Don't latch-redirect trivial unswitch across convergent ops (#207047)
The trivial-unswitch case added in #204934 can redirect a loop-invariant
branch's latch edge to the loop exit, turning it into an exit branch
that then gets hoisted to the preheader. That changes how many
iterations (and, on GPUs, which lanes) execute the loop body.
When the loop contains a convergent operation that runs each iteration,
hoisting the branch lets one (possibly non-uniform) path bypass the loop
entirely and skip the convergent op. Concretely, this miscompiles an
AMDGPU warp reduction (llvm.amdgcn.update.dpp): lanes drop out of the
cross-lane shuffle, so block reductions come back with partial results.
Guard the new latch-redirect transform with the same convergent /
cross-block-token check that isSafeForNonTrivialUnswitching already
applies (refactored into a shared loopContainsConvergentOrTokenOp
helper). Adds a target-independent lit test that fails before this
change and passes after.
Co-authored-by: Claude Opus
Commit: 790fbc8fe5bfe69ffee21431d4a5f9da18efeda0
https://github.com/llvm/llvm-project/commit/790fbc8fe5bfe69ffee21431d4a5f9da18efeda0
Author: Ivan R. Ivanov <iivanov at nvidia.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/test/Dialect/OpenACC/ops.mlir
Log Message:
-----------
[mlir][acc] Add acc.on_device op (#208096)
Add an operation to represent the runtime call to acc_on_device.
This runtime call is important to fold early in the compilation pipeline
and having an operation allows us to easily recognize it when emitted by
frontends.
Commit: 0bd936eee21f0272dbb604608afba33af19aedc0
https://github.com/llvm/llvm-project/commit/0bd936eee21f0272dbb604608afba33af19aedc0
Author: Fabian Parzefall <parzefall at meta.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/test/AArch64/computed-goto.s
M bolt/test/X86/indirect-goto.test
M bolt/test/indirect-goto-relocs.test
Log Message:
-----------
[BOLT] Register PIE indirect goto relocations (#206819)
PIE binaries use R_*_RELATIVE dynamic relocations for indirect goto jump
tables. BOLT creates entry points for their targets but does not mark
these addresses as targets from data relocations, so indirect jumps with
unknown control flow (which originates from indirect goto) have no CFG
successors and are interpreted as potential tail calls, while the jump
targets are incorrectly identified as additional entry points.
Add these offsets to the function's list of non-entry relocation
references instead of marking them as entry points. Extend relocation
rewriting to also check whether a block is externally referenced. This
mirrors behavior of data-to-code relocations in non-pie binaries.
Commit: 69e2ec6e7c0a9c58f5f99cf2a84895c511d7abf6
https://github.com/llvm/llvm-project/commit/69e2ec6e7c0a9c58f5f99cf2a84895c511d7abf6
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M utils/docs/llvm_sphinx/__init__.py
Log Message:
-----------
[docs] Enable colon_fence myst extension, fix admonitions (#208322)
The colon_fence myst extension enables triple-colon fences for
admonitions, as in:
:::{note}
**Regular** _markdown_ text, not code.
:::
Using triple colon fences for admonition blocks helps markdown editors
treat the body as markdown text, rather than fixed-width code with a
syntax highlight.
This change fixes a live doc bug in MyFirstTypoFix.md, which uses this
admonition style:
https://llvm.org/docs/MyFirstTypoFix.html
Currently ":::{note} The code changes presented" leaks through in the
HTML, and this one line change fixes it.
Commit: 470e52cf6d0c0548700eba9ec1517b24add367ad
https://github.com/llvm/llvm-project/commit/470e52cf6d0c0548700eba9ec1517b24add367ad
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
Log Message:
-----------
[PowerPC] Use INT64_MAX instead of LONG_MAX. (#208249)
The value of LONG_MAX is dependent on the host environment used to build
the compiler. For example, X86-64 Windows has a different value than
X86-64 Linux. Using LONG_MAX would give inconsistent results when cross
compiling.
Commit: 5c93fce720433b7302c4ac2e011ffb997c2fb977
https://github.com/llvm/llvm-project/commit/5c93fce720433b7302c4ac2e011ffb997c2fb977
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fold-tail-low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/predicated-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/widen-gep-all-indices-invariant.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-saddsatcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-counting-down.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/predicated-first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/VPlan/X86/vplan-vp-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/VPlan/buildvector-first-lane-only.ll
M llvm/test/Transforms/LoopVectorize/VPlan/conditional-scalar-assignment-vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/first-order-recurrence-sink-replicate-region.ll
M llvm/test/Transforms/LoopVectorize/VPlan/tail-folding.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-print-before-after-all.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-alias-mask.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-reductions-tail-folded.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-sink-scalars-and-merge.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/drop-inbounds-flags-for-reverse-vector-pointer.ll
M llvm/test/Transforms/LoopVectorize/X86/fold-tail-low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/pr81872.ll
M llvm/test/Transforms/LoopVectorize/X86/small-size.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorize-interleaved-accesses-gap.ll
M llvm/test/Transforms/LoopVectorize/alias-mask.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/optsize.ll
M llvm/test/Transforms/LoopVectorize/pr51614-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/reduction-order.ll
M llvm/test/Transforms/LoopVectorize/select-reduction.ll
M llvm/test/Transforms/LoopVectorize/store-reduction-results-in-tail-folded-loop.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-div.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-replicate-region.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-vectorization-factor-1.ll
M llvm/test/Transforms/LoopVectorize/use-scalar-epilogue-if-tp-fails.ll
M llvm/test/Transforms/PhaseOrdering/ARM/arm_add_q7.ll
Log Message:
-----------
[VPlan] Model initial header mask as region value. (#196199)
Introduce a new VPRegionValue for the header mask, managed by loop
regions similar to the canonical IV.
The main benefit is we do not need to materialize the mask early and it
is trivial to find (no more need for patterns hard-coded in findHeaderMask).
It is currently materialized before computing costs, as we compute costs
for part of it currently.
PR: https://github.com/llvm/llvm-project/pull/196199
Commit: 9f709fbfe8a300257ee844ff64dda8a027e4ea73
https://github.com/llvm/llvm-project/commit/9f709fbfe8a300257ee844ff64dda8a027e4ea73
Author: ES3Q <qq571253675 at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCSpecializeForHost.cpp
M mlir/test/Dialect/OpenACC/acc-specialize-for-host-fallback.mlir
Log Message:
-----------
[flang][OpenACC] Fix host fallback for acc.atomic.update (#207597)
The host fallback for `acc.atomic.update` only processed the first
operation in the region and used its result for the store, ignoring the
remaining operations and the `acc.yield` terminator. This generated
invalid IR when the region contained multiple operations.
1.Fix this by cloning all operations in the region and using the operand
of `acc.yield` as the final result to store.
2.Add tests for atomic read, write, update, and capture operations to
cover the host fallback path.
---------
Co-authored-by: ES3Q <ES3Q at QQ.COM>
Commit: c2f5040f47c8e7991b36cea3afc0b855956a5475
https://github.com/llvm/llvm-project/commit/c2f5040f47c8e7991b36cea3afc0b855956a5475
Author: Oleksandr Tarasiuk <oleksandr.tarasiuk at outlook.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M clang-tools-extra/clang-doc/Serialize.cpp
M clang/docs/ReleaseNotes.md
M clang/include/clang/AST/ASTStructuralEquivalence.h
M clang/include/clang/AST/DeclFriend.h
M clang/include/clang/AST/DeclTemplate.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/Basic/DeclNodes.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/Template.h
M clang/include/clang/Sema/TemplateDeduction.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ASTStructuralEquivalence.cpp
M clang/lib/AST/DeclFriend.cpp
M clang/lib/AST/DeclPrinter.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/ODRHash.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaAccess.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/test/CXX/class.access/class.friend/p3-cxx0x.cpp
M clang/test/CXX/drs/cwg18xx.cpp
M clang/test/CXX/drs/cwg19xx.cpp
M clang/test/CXX/drs/cwg28xx.cpp
M clang/test/CXX/drs/cwg6xx.cpp
M clang/test/CXX/temp/temp.decls/temp.friend/p5.cpp
R clang/test/CXX/temp/temp.decls/temp.friend/p6.cpp
M clang/test/Parser/cxx2c-variadic-friends.cpp
M clang/test/SemaCXX/many-template-parameter-lists.cpp
M clang/test/SemaTemplate/GH71595.cpp
M clang/test/SemaTemplate/concepts-friends.cpp
M clang/test/SemaTemplate/ctad.cpp
M clang/test/SemaTemplate/friend-template.cpp
Log Message:
-----------
Revert "[Clang] support friend declarations with a dependent nested-name-specifier" (#208302)
Reverts llvm/llvm-project#191268
---
Revert dependent friend support due to a crash in access checking
https://github.com/llvm/llvm-project/issues/208290
Commit: 1321b17540118f850320955e19eacd68bd1d7eef
https://github.com/llvm/llvm-project/commit/1321b17540118f850320955e19eacd68bd1d7eef
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/clang/unittests/BUILD.bazel
Log Message:
-----------
[bazel] Port 01846f68e5 (#208325)
Assisted-by: Gemini
Commit: bc97c56e6851858614876711e46f266dd1c1f58e
https://github.com/llvm/llvm-project/commit/bc97c56e6851858614876711e46f266dd1c1f58e
Author: Damyan Pepper <damyanp at microsoft.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
M llvm/lib/Target/DirectX/DXILOpBuilder.cpp
A llvm/test/CodeGen/DirectX/imul_umul.ll
A llvm/test/CodeGen/DirectX/overflow_intrinsics.ll
Log Message:
-----------
[DirectX] Expand {u,s}mul.with.overflow in DXILIntrinsicExpansion (#207297)
DXIL has no op for the llvm.{u,s}mul.with.overflow intrinsics. These can
be emulated by performing the full multiply using double-width values
and then checking the high-part of the result. However, this should be
avoided for 32-bit values since we don't want to make the shader start
using 64-bit values if it wasn't before. In this case we can use the
UMul and IMul DXIL operations that return the result as separate low &
high values.
Wider (64-bit) multiplies, which can't widen further, compute the high
half with same-width arithmetic instead.
Fixes #207090
---------
Co-authored-by: Copilot <223556219+Copilot at users.noreply.github.com>
Co-authored-by: Farzon Lotfi <farzonl at gmail.com>
Commit: 0842f3c80402c94e87f62be63c57a9229b3bace2
https://github.com/llvm/llvm-project/commit/0842f3c80402c94e87f62be63c57a9229b3bace2
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/test/Transforms/ConstraintElimination/constraint-overflow.ll
M llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit.ll
Log Message:
-----------
[ConstraintEli] Add more tests with latch guarded loops+overflows (NFC) (#208328)
Add additional tests with latch controlled loops and cases where we
currently bail out due to constraint-system overflows.
Commit: f8e18564dc4a40ed6f173f6c69449d0800070e9d
https://github.com/llvm/llvm-project/commit/f8e18564dc4a40ed6f173f6c69449d0800070e9d
Author: Zhen Wang <zhenw at nvidia.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/CUDA/CUFAllocDelay.cpp
M flang/test/Transforms/CUF/cuf-alloc-delay.fir
Log Message:
-----------
[flang][cuda] Switch CUFAllocDelay to operate on fir.declare (#208334)
CUFAllocDelay previously matched hlfir.declare, requiring it to run
before HLFIR-to-FIR lowering. Match fir.declare instead so the pass can
be scheduled with the other CUF preparation passes (which also operate
on fir.declare), before cuf.alloc is lowered. The delay logic is
unchanged.
Commit: b310b1ab76f24a0e7a88c8ded76f54b816e5d542
https://github.com/llvm/llvm-project/commit/b310b1ab76f24a0e7a88c8ded76f54b816e5d542
Author: Matsu <47756807+khaki3 at users.noreply.github.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
M flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
M flang/test/Fir/CUDA/cuda-constructor-2.f90
Log Message:
-----------
[flang][cuda] Register device/constant globals as device-resident under -gpu=mem:unified (#208336)
```fortran
module m
integer, device :: aaa; bind(c, name='aaa_from_c') :: aaa
integer, constant :: zzz; bind(c, name='zzz_from_c') :: zzz
end module
```
```c
extern int aaa_from_c;
#pragma acc declare create(aaa_from_c) // same for zzz_from_c
```
In this code, under `-gpu=mem:unified` a module-scope device/constant
global is registered only as a CUDA variable. Another translation unit
that declares the same symbol on the host can make it be treated as host
memory, so the device symbol is unresolved at run time.
Fix: emit `cuf.register_variable_static` for device/constant globals
under `mem:unified` so they are additionally registered as
device-resident.
Commit: b5c94cfb1c12edc85a65be6299b0b9800b623492
https://github.com/llvm/llvm-project/commit/b5c94cfb1c12edc85a65be6299b0b9800b623492
Author: Evgenii Kudriashov <evgenii.kudriashov at intel.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/ldexp-avx512.ll
Log Message:
-----------
[X86] Split FLDEXP when AVX512 is not available (#208292)
Mark the 512-bit types Custom only under useAVX512Regs(); otherwise
generic type legalization splits FLDEXP into the legal narrower halves
that LowerFLDEXP handles.
Add a LIT test for the v8f64 -> two 256-bit vscalefpd split.
Co-authored-by: Yanliang Mu <yanliang.mu at intel.com>
Commit: c5ff07e5006598e16b0982288277e36b60842cf9
https://github.com/llvm/llvm-project/commit/c5ff07e5006598e16b0982288277e36b60842cf9
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[bazel] Add missing deps from 1321b17 (#208338)
Commit: 349375a83b85c481c8126ac2f3081b51bf4725d2
https://github.com/llvm/llvm-project/commit/349375a83b85c481c8126ac2f3081b51bf4725d2
Author: Adrian Prantl <aprantl at apple.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M lldb/bindings/interface/SBValueDocstrings.i
M lldb/include/lldb/API/SBValue.h
M lldb/include/lldb/Expression/DWARFExpression.h
M lldb/include/lldb/Expression/DWARFExpressionList.h
M lldb/include/lldb/ValueObject/ValueObject.h
M lldb/include/lldb/ValueObject/ValueObjectVariable.h
M lldb/source/API/SBValue.cpp
M lldb/source/Expression/DWARFExpression.cpp
M lldb/source/Expression/DWARFExpressionList.cpp
M lldb/source/ValueObject/ValueObject.cpp
M lldb/source/ValueObject/ValueObjectVariable.cpp
M lldb/test/API/python_api/value/change_values/TestChangeValueAPI.py
M lldb/unittests/Expression/DWARFExpressionTest.cpp
Log Message:
-----------
[LLDB] Add an API to check whether a variable is writable (#208042)
IDEs may offer functionality to set a variable to a specific value.
There are many situations where this isn't actually possible, for
example, if the variable's value is a constant or the result of a
complex DWARF expression. Instead of offering to change a value only to
have it fail with an error, this API lets the IDE query whether setting
a value is generally feasible so it can hide the action where it isn't
applicable.
rdar://142358140
Assisted-by: claude
Commit: 5d800d3285c1dd8cd438346d5256c35528d744c4
https://github.com/llvm/llvm-project/commit/5d800d3285c1dd8cd438346d5256c35528d744c4
Author: Eli Friedman <efriedma at qti.qualcomm.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M clang/lib/Sema/SemaInit.cpp
A clang/test/AST/ast-dump-init.cpp
Log Message:
-----------
[clang] Fix type of the MaterializeTemporaryExpr with incomplete array type. (#187618)
This affects constructs like `int f(int (&&x)[]); int z = f({1});`.
A temporary logically can't have incomplete type: if we don't know the
type, we can't materialize it. Rearrange the casts to make more sense.
I'm not sure this has any practical effects at the moment due to the way
we use skipRValueSubobjectAdjustments; we usually end up ignoring the
type of the MaterializeTemporaryExpr.
Commit: 20a0cd83dcaade1912330a678063275ec3d47c2d
https://github.com/llvm/llvm-project/commit/20a0cd83dcaade1912330a678063275ec3d47c2d
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AArch64/fma-reduce-regression.ll
Log Message:
-----------
[SLP][NFC]Add a test with the regression in reduction, which should remain scalar FMAs
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/208349
Commit: 7a0aea35a25a4e21dca6c939456fedf8f6964319
https://github.com/llvm/llvm-project/commit/7a0aea35a25a4e21dca6c939456fedf8f6964319
Author: Ivan R. Ivanov <iivanov at nvidia.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/Builder/CUDAIntrinsicCall.h
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
A flang/include/flang/Optimizer/Builder/OpenACCIntrinsicCall.h
M flang/include/flang/Optimizer/Builder/PPCIntrinsicCall.h
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Optimizer/Builder/CMakeLists.txt
M flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
A flang/lib/Optimizer/Builder/OpenACCIntrinsicCall.cpp
M flang/lib/Optimizer/Builder/PPCIntrinsicCall.cpp
Log Message:
-----------
[flang][acc] Emit acc.on_device operation for acc_on_device call (#208098)
It is important we recognize acc_on_device calls as they need to be
folded during compilation. Emitting this operation helps with the
recognition of the runtime call in the optimizer.
Commit: a8264ae5b4bd5ed460699e582e1612a76ed0c595
https://github.com/llvm/llvm-project/commit/a8264ae5b4bd5ed460699e582e1612a76ed0c595
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M clang/test/SemaCXX/deduced-return-type-cxx14.cpp
Log Message:
-----------
[clang] add triple to `test/SemaCXX/deduced-return-type-cxx14.cpp` (#208340)
Fixes issue reported here:
https://github.com/llvm/llvm-project/pull/208285#issuecomment-4919717057
Since that test file now uses the `cdecl` attribute, which is not
supported in some targets, pin that test to x86_64 triple.
Commit: 0fbdfc85b3bca4edc949966324c8b9cb57693194
https://github.com/llvm/llvm-project/commit/0fbdfc85b3bca4edc949966324c8b9cb57693194
Author: Ivan R. Ivanov <iivanov at nvidia.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.h
M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
M mlir/lib/Dialect/OpenACC/Transforms/ACCSpecializeForDevice.cpp
M mlir/test/Dialect/OpenACC/acc-specialize-for-device.mlir
Log Message:
-----------
[mlir][acc] Specialize acc.on_device with constant arg for device (#208099) (#208351)
Fold known result acc.on_device to a constant in device-side code.
Re-submitted PR due to accidental stack PR merge
Commit: 82fc0835cfddbca9594bdc797fa4fbe3f86b90fa
https://github.com/llvm/llvm-project/commit/82fc0835cfddbca9594bdc797fa4fbe3f86b90fa
Author: Max Graey <maxgraey at gmail.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M mlir/lib/Transforms/Utils/CMakeLists.txt
Log Message:
-----------
[MLIR] Add missing MLIRPass dep when DMLIR_ENABLE_PDL_IN_PATTERNMATCH=OFF used (NFC) (#208289)
When PDL dialect is disabled during build stage
(`DMLIR_ENABLE_PDL_IN_PATTERNMATCH=OFF`) we got a compiler errors due to
some of pdl deps transitively includes `MLIRPass` but without PDL this
dep missing and lead to compile errors
Commit: 060f128beedd8a6fa0bbab137dae9c4c82200a23
https://github.com/llvm/llvm-project/commit/060f128beedd8a6fa0bbab137dae9c4c82200a23
Author: Mark Zhuang <mark.zhuang at spacemit.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/TargetParser/Host.cpp
Log Message:
-----------
[RISCV] Map spacemit uarch strings to CPU names in host detection (#207636)
-mcpu/-mtune=native first tries hwprobe;
when that yields no usable CPU model it falls back to the
cpuinfo uarch line. Add spacemit,x60/x100/a100 there.
Commit: 232f98e8a873c374a00d64f70cedff6c61ee87d8
https://github.com/llvm/llvm-project/commit/232f98e8a873c374a00d64f70cedff6c61ee87d8
Author: hulxv <hulxxv at gmail.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M libc/shared/builtins.h
A libc/shared/builtins/divsf3.h
M libc/src/__support/builtins/CMakeLists.txt
A libc/src/__support/builtins/divsf3.h
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_builtins_test.cpp
Log Message:
-----------
[libc] add shared divsf3 builtin (#205679)
Re-exposes LLVM-libc's `__divsf3` as `shared::divsf3` for reuse by
compiler-rt's builtins.
Stacked change - merge these first:
- #200094
- #205669
- #205670
- #205671
- #205672
- #205673
- #205674
- #205675
- #205676
- #205677
- #205678
Part of #197824
Commit: 533470ead993440e3cd79c48d77a21218e165ff2
https://github.com/llvm/llvm-project/commit/533470ead993440e3cd79c48d77a21218e165ff2
Author: AZero13 <gfunni234 at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Transforms/ObjCARC/ObjCARCOpts.cpp
M llvm/test/Transforms/ObjCARC/test_autorelease_pool.ll
Log Message:
-----------
[ObjCARC] Improve empty autorelease pool elimination in OptimizeAutoreleasePools (#200310)
Verify push/pop pairing before popping the stack, clear the pool stack
on mismatch, and erase the push before the pop for consistency.
Commit: 57e7ceed3398ed1ddf28afdf78ba81cc2638c665
https://github.com/llvm/llvm-project/commit/57e7ceed3398ed1ddf28afdf78ba81cc2638c665
Author: Kito Cheng <kito.cheng at sifive.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/IRBuilder.h
M llvm/lib/CodeGen/ReplaceWithVeclib.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/unittests/Analysis/ValueTrackingTest.cpp
M llvm/unittests/IR/IRBuilderTest.cpp
Log Message:
-----------
[IRBuilder] Add FMFSource overloads for CreateCall (#208171)
CreateCall had no way to set fast-math-flags at creation time, so
callers had to build the call and copy the flags in a second step:
CallInst *C = B.CreateCall(Fn, Args);
C->copyFastMathFlags(Src);
Add FMFSource overloads (mirroring CreateIntrinsic) so the flags can be
copied from a source instruction or FastMathFlags in one call:
CallInst *C = B.CreateCall(Fn, Args, /*FMFSource=*/Src);
The FMFSource parameter has no default, so existing CreateCall callers
are unaffected and overload resolution stays unambiguous.
Assisted-by: Opus 4.8
Commit: 76028e1199ad4d1a380c7cf367a072095f6dba01
https://github.com/llvm/llvm-project/commit/76028e1199ad4d1a380c7cf367a072095f6dba01
Author: Jim Lin <jim at andestech.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFoldMemOffset.cpp
Log Message:
-----------
[RISCV] Fix RISCVFoldMemOffset to report when it makes changes (#208149)
runOnMachineFunction initialized MadeChange to false and returned it,
but never set it to true even though the fold path rewrites memory
offsets, replaces registers, and erases the ADDI. As a result the pass
always reported that it made no changes, so the pass manager could keep
stale analyses valid after the function had actually been modified.
Set MadeChange to true after folding an ADDI.
Co-authored-by: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
Commit: 2df2a51c7593baa6286610ff45693b97dda9ea5c
https://github.com/llvm/llvm-project/commit/2df2a51c7593baa6286610ff45693b97dda9ea5c
Author: TelGome <93700071+TelGome at users.noreply.github.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsRISCV.td
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
Log Message:
-----------
[RISCV][P-ext] Support Packed Saturating Absolute Value. (#207978)
Commit: 2592df6cb04e72f548685a152cf93b46b30cee21
https://github.com/llvm/llvm-project/commit/2592df6cb04e72f548685a152cf93b46b30cee21
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
Log Message:
-----------
[NFCI][AMDGPU] Change foldOperand to return changed (#208352)
Commit: 697bd9704894691d6b0f40b3150d70047a6f181f
https://github.com/llvm/llvm-project/commit/697bd9704894691d6b0f40b3150d70047a6f181f
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M mlir/include/mlir/IR/Block.h
M mlir/include/mlir/IR/Region.h
M mlir/include/mlir/IR/RegionGraphTraits.h
M mlir/lib/IR/Region.cpp
Log Message:
-----------
Give each mlir::Block a stable ID within its parent region (#207617)
Assign each mlir::Block a stable ID within its parent region, mirroring
llvm::BasicBlock/llvm::Function (called ID, not number, since a block/op
number denotes position in MLIR): Block gains getBlockID() and reads -1u
while it has no parent region; Region gains nextBlockID with
getMaxBlockID() and getBlockIDEpoch(); the block ilist traits assign the
ID on add/transfer and invalidate it on removal; and
GraphTraits<mlir::Block*>/<mlir::Region*> expose
getNumber/getMaxNumber/getNumberEpoch. This makes
GraphHasNodeNumbers<mlir::Block*> true, moving MLIR's CFGLoopInfo and
dominator tree onto the number-indexed path. MLIR never renumbers
blocks,
so the epoch is a fixed 0.
Prerequisite for requiring GraphHasNodeNumbers in llvm::LoopInfoBase and
dropping its DenseMap fallback.
Aided by Claude Opus 4.8
Commit: 78b56d968c54ad6453a4324fe739cb5ec236e2d7
https://github.com/llvm/llvm-project/commit/78b56d968c54ad6453a4324fe739cb5ec236e2d7
Author: Kazu Hirata <kazu at google.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/include/llvm/ProfileData/SampleProf.h
M llvm/include/llvm/ProfileData/SampleProfReader.h
M llvm/include/llvm/ProfileData/SampleProfWriter.h
M llvm/lib/ProfileData/SampleProfReader.cpp
M llvm/lib/ProfileData/SampleProfWriter.cpp
M llvm/unittests/ProfileData/SampleProfTest.cpp
Log Message:
-----------
[ProfileData] Support format version 104 for extensible binary sample profiles (#206297)
This patch adds initial support for format version 104 in extensible
binary sample profiles to support the upcoming on-disk hash table.
This patch sets up the versioning scheme in the reader and writer as a
preparation step without actually introducing the on-disk hash table.
The reader is updated to support format version 104. The writer can
now write format version 104 profiles when requested via
-sample-profile-format-version, but continues to default to version
103 as version 104 is a work in progress. We plan to promote the
default version to 104 once the on-disk hash table support is fully
integrated in a subsequent patch.
RFC:
https://discourse.llvm.org/t/rfc-faster-sample-profile-loading/90957/4
Assisted-by: Antigravity
Commit: 720d986d66a0a437fd7f9b0d5dd0fa155dcb27f5
https://github.com/llvm/llvm-project/commit/720d986d66a0a437fd7f9b0d5dd0fa155dcb27f5
Author: Kazu Hirata <kazu at google.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/include/llvm/ProfileData/SampleProfReader.h
M llvm/lib/Transforms/IPO/SampleProfileMatcher.cpp
Log Message:
-----------
[SampleProfile] Introduce SampleProfileNameSet (NFC) (#208114)
This patch introduces a helper class SampleProfileNameSet to
encapsulate the construction of the name set and provide a contains
method.
I'm planning to speed up the membership queries into the name table.
With this patch, changes to the underlying data structure won't affect
use sites.
Assisted-by: Antigravity
Commit: 34b0a6e6d863a6f91698b435c72e69fcfebf13f2
https://github.com/llvm/llvm-project/commit/34b0a6e6d863a6f91698b435c72e69fcfebf13f2
Author: Yihan Wang <yronglin777 at gmail.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M clang/test/Interpreter/cxx20-modules.cppm
M clang/test/Interpreter/dynamic-library.cpp
M clang/test/Interpreter/lit.local.cfg
Log Message:
-----------
[clang-repl] Avoid use `$LD_LIBRARY_PATH` in lit tests (#208170)
Strengthen clang-repl lit tests by Avoid use `$LD_LIBRARY_PATH`. The
lit's internal shell does not expand shell variables such as
`$LD_LIBRARY_PATH`, so provide the current value as a lit substitution.
This PR can fix the following failures when user build llvm with
non-system C++ standard library.
```
# executed command: env 'LD_LIBRARY_PATH=<build dir>/tools/clang/test/Interpreter/Output/cxx20-modules.cppm.tmp:$LD_LIBRARY_PATH' <build dir>/bin/clang-repl -Xcc=-std=c++20 -Xcc=-fmodule-file=M=<build dir>/tools/clang/test/Interpreter/Output/cxx20-modules.cppm.tmp/mod.pcm -Xcc=--target=x86_64-linux-gnu
# .---command stderr------------
# | <build dir>/bin/clang-repl: /lib64/libstdc++.so.6: version `GLIBCXX_3.4.26' not found (required by <build dir>/bin/clang-repl)
# | <build dir>/bin/clang-repl: /lib64/libstdc++.so.6: version `GLIBCXX_3.4.29' not found (required by <build dir>/bin/clang-repl)
# | <build dir>/bin/clang-repl: /lib64/libstdc++.so.6: version `GLIBCXX_3.4.30' not found (required by <build dir>/bin/clang-repl)
# | <build dir>/bin/clang-repl: /lib64/libstdc++.so.6: version `CXXABI_1.3.13' not found (required by <build dir>/bin/clang-repl)
# `-----------------------------
```
Signed-off-by: yronglin <yronglin777 at gmail.com>
Commit: 7f3d91d14ae33a8206b536ac1ffe69565423ced3
https://github.com/llvm/llvm-project/commit/7f3d91d14ae33a8206b536ac1ffe69565423ced3
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/MCA/RISCVCustomBehaviour.cpp
M llvm/test/tools/llvm-mca/RISCV/SiFiveX280/needs-sew-but-only-lmul.s
Log Message:
-----------
[RISCV][MCA] Avoid deriving EMUL without SEW (#207986)
When only an LMUL instrument is active, SEW is unavailable. Avoid
deriving EMUL for vector memory instructions in that case and fall back
to the base scheduling class.
Closes #170118.
Commit: 1325d8591159527e99683aac8240b9134b5d1cfa
https://github.com/llvm/llvm-project/commit/1325d8591159527e99683aac8240b9134b5d1cfa
Author: vporpo <vasileios.porpodas at amd.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Scheduler.cpp
Log Message:
-----------
[SandboxVec][Scheduler][NFC] Cleanup: Use interval in loop and reset sched state (#205465)
Replace the for loop that iterates between TopI and LowestI with a range
loop over ResetIntvl and move the reset of the scheduling state to this
loop.
We iterate over the loop in the reverse order than before but the
functionality should not change.
Commit: 06488f6c8d8941cda4973df32d420c71877be3e6
https://github.com/llvm/llvm-project/commit/06488f6c8d8941cda4973df32d420c71877be3e6
Author: Nikhil Kalra <nikhil.kalra at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M mlir/include/mlir/Bindings/Python/IRCore.h
Log Message:
-----------
[mlir] Make the Python binding type casters well-formed under C++23 (#208093)
The nanobind type/attr/loc/value casters in IRCore.h return a by-value
PyType/PyAttribute/PyLocation/PyValue as their DerivedTy result.
Under pre-C++23 rules, this was a rvalue that would decay to a lvalue
when passed to the DerivedTy constructor.
Under C++23's P2266 (implicit move on return), that return operand is an
xvalue, which cannot bind the PyConcrete* constructors that take a
non-const lvalue reference.
This patch constructs the derived type explicitly (return
DerivedTy(arg);) using the lvalue constructor; this preserves the
pre-C++23 behavior on C++23 builds.
Commit: 4899b8d6f6b9d48349d89528ec6898704b289672
https://github.com/llvm/llvm-project/commit/4899b8d6f6b9d48349d89528ec6898704b289672
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/vp-combine-reverse-load.ll
Log Message:
-----------
[RISCV] Don't require splats to have a single use in performReverseEVLCombine. (#208326)
Test was written by Claude
Commit: 91746ca146d4047e9d0ec98fd7d4a3d91f88a759
https://github.com/llvm/llvm-project/commit/91746ca146d4047e9d0ec98fd7d4a3d91f88a759
Author: qyingwu <46992476+qyingwu at users.noreply.github.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M mlir/cmake/modules/CMakeLists.txt
M mlir/cmake/modules/MLIRConfig.cmake.in
Log Message:
-----------
[mlir][cmake] Export MLIR_LINK_MLIR_DYLIB in MLIRConfig.cmake (#207336)
Fixes #197175.
`MLIRConfig.cmake` did not propagate `MLIR_LINK_MLIR_DYLIB` to out-of-tree MLIR users. Standalone projects using `find_package(MLIR CONFIG)` and `include(AddMLIR)` therefore could not observe the value used by `mlir_target_link_libraries(...)` when MLIR was configured with `-DMLIR_LINK_MLIR_DYLIB=ON`.
Export `MLIR_LINK_MLIR_DYLIB` through `MLIRConfig.cmake`.
AI tool usage:
I used ChatGPT/Codex to help understand the issue, identify the analogous LLVM CMake pattern, and draft the PR description. I manually reviewed the final patch and verification.
Commit: 21be7ef4473615a774f7c26beeebba3161b72322
https://github.com/llvm/llvm-project/commit/21be7ef4473615a774f7c26beeebba3161b72322
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/CMakeLists.txt
A libc/include/err.yaml
M libc/src/CMakeLists.txt
A libc/src/err/CMakeLists.txt
A libc/src/err/err.cpp
A libc/src/err/err.h
A libc/src/err/errx.cpp
A libc/src/err/errx.h
A libc/src/err/report.cpp
A libc/src/err/report.h
A libc/src/err/verr.cpp
A libc/src/err/verr.h
A libc/src/err/verrx.cpp
A libc/src/err/verrx.h
A libc/src/err/vwarn.cpp
A libc/src/err/vwarn.h
A libc/src/err/vwarnx.cpp
A libc/src/err/vwarnx.h
A libc/src/err/warn.cpp
A libc/src/err/warn.h
A libc/src/err/warnx.cpp
A libc/src/err/warnx.h
M libc/test/src/CMakeLists.txt
A libc/test/src/err/CMakeLists.txt
A libc/test/src/err/err_test.cpp
A libc/test/src/err/errx_test.cpp
A libc/test/src/err/verr_test.cpp
A libc/test/src/err/verrx_test.cpp
A libc/test/src/err/vwarn_test.cpp
A libc/test/src/err/vwarnx_test.cpp
A libc/test/src/err/warn_test.cpp
A libc/test/src/err/warnx_test.cpp
Log Message:
-----------
[libc] Implement BSD extensions in <err.h> (#199055)
Implemented the BSD-extension functions defined in <err.h>:
- err, errx, verr, verrx
- warn, warnx, vwarn, vwarnx
Added an internal reporting helper in src/__support/Err. The err family
functions call internal::exit directly to satisfy [[noreturn]]
requirements. Enabled these entrypoints for aarch64, riscv, and x86_64.
Assisted-by: Automated tooling, human reviewed.
Commit: 9354d5ceac1ab8a9f6f5ca86e5400909acab4bf6
https://github.com/llvm/llvm-project/commit/9354d5ceac1ab8a9f6f5ca86e5400909acab4bf6
Author: Baranov Victor <bar.victor.2002 at gmail.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M clang-tools-extra/clang-tidy/cppcoreguidelines/RvalueReferenceParamNotMovedCheck.cpp
M clang-tools-extra/clang-tidy/cppcoreguidelines/RvalueReferenceParamNotMovedCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/rvalue-reference-param-not-moved.rst
A clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/rvalue-reference-param-not-moved-allow-implicit.cpp
Log Message:
-----------
[clang-tidy] Add AllowImplicitMove option to rvalue-reference-param-not-moved (#190541)
Fixes https://github.com/llvm/llvm-project/issues/132419.
Commit: 594655d1a76fea809fd11099da97a74360f56f59
https://github.com/llvm/llvm-project/commit/594655d1a76fea809fd11099da97a74360f56f59
Author: Jim Lin <jim at andestech.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVDeadRegisterDefinitions.cpp
Log Message:
-----------
[RISCV] Remove duplicate addRequired in RISCVDeadRegisterDefinitions (#208366)
getAnalysisUsage called AU.addRequired<LiveIntervalsWrapperPass>() twice.
Drop the redundant second call.
Co-authored-by: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
Commit: bea7080fe3ce45d397c2aefda3e27dff868f7746
https://github.com/llvm/llvm-project/commit/bea7080fe3ce45d397c2aefda3e27dff868f7746
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/ByteCode/Program.h
A clang/test/AST/ByteCode/module-dummy-redecl.cpp
Log Message:
-----------
[clang][bytecode] Use first decl in redeclaration chain to cache dummy pointers (#208377)
Commit: be40b8ec4edad70106c9a81de11f1cf24c8b80f9
https://github.com/llvm/llvm-project/commit/be40b8ec4edad70106c9a81de11f1cf24c8b80f9
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M bolt/include/bolt/Core/BinaryBasicBlock.h
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/lib/Core/BinaryFunction.cpp
Log Message:
-----------
[BOLT] Give BinaryBasicBlock a GraphTraits block number (#207899)
LoopInfoBase (and DominatorTreeBase) keep a DenseMap fallback for block
types whose GraphTraits lacks getNumber() (#103400); BOLT's
BinaryLoopInfo is one of the last two users.
BinaryBasicBlock already carries a dense [0, size) index (getIndex(),
assigned by updateBBIndices()). Expose it as the GraphTraits node
number, mirroring llvm::BasicBlock/Function.
This makes `GraphHasNodeNumbers<BinaryBasicBlock *>` true, moving BOLT's
LoopInfo and DominatorTree onto the number-indexed (SmallVector) path.
Prerequisite for requiring GraphHasNodeNumbers in LoopInfoBase.
Aided by Claude Opus 4.8
Commit: 5ccca5f215939645995035ecd5fe40759e2cc0a6
https://github.com/llvm/llvm-project/commit/5ccca5f215939645995035ecd5fe40759e2cc0a6
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Cleanup print functions of recipes (NFC) (#207434)
In particular, VPPhiAccessors should not query the derivative recipe's
operands, and query incoming values instead. The printPhiOperands
function would crash if used in more derivative recipes.
Commit: 9b4d930bc49953735bc34318edd701bb4d2492a8
https://github.com/llvm/llvm-project/commit/9b4d930bc49953735bc34318edd701bb4d2492a8
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
A llvm/test/CodeGen/WebAssembly/fast-isel-atomic-fold.ll
Log Message:
-----------
[FastISel][WebAssembly] Don't perform load folding for atomic load (#207728)
Don't try to fold an atomic load into other instructions. Atomic loads
may require different instructions / barriers / etc.
Wasm started using this functionality in
https://github.com/llvm/llvm-project/pull/182767. It's not really
specific to wasm, but the problem is masked on some other targets (e.g.
on X86 even a seq_cst atomic load can be lowered to a plain load).
Commit: c0ef9c53ecca5f033dc6a022da2a986f6925c70e
https://github.com/llvm/llvm-project/commit/c0ef9c53ecca5f033dc6a022da2a986f6925c70e
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
M llvm/lib/Target/WebAssembly/WebAssembly.td
M llvm/lib/Target/WebAssembly/WebAssemblySubtarget.cpp
M llvm/test/MC/WebAssembly/function-alias.ll
Log Message:
-----------
[WebAssembly] Use SubtargetFeature's Implies field (#206643)
This makes use of `SubtargetFeature`'s `Implies` field, which lets us
define feature dependencies:
https://github.com/llvm/llvm-project/blob/442c59c75ca384db53a6d6d81686b17ea4b397c3/llvm/include/llvm/Target/Target.td#L568-L571
and removes C++ code that specified feature dependencies.
These are the dependencies specified. EH dependencies are currently only
specified in clang options, and others are specified in
`WebAssemblySubtarget.cpp`.
- exception-handling implies multivalue and reference-types
- bulk-memory implifes bulk-memory-opt
- gc implies reference-types
- reference-types implies call-indirect-overlong
The features in `WebAssembly.td` were sorted in the alphabetical order,
but this changes it because implied features have to come before the
implying feature, e.g., multivalue and reference-types have to come
before exception-handling.
---
One semantic difference from the current code, is, when reference-types
implies call-indirect-overlong,
```console
llc -mattr=+reference-types,-call-indirect-overlong
```
this currently forces call-indirect-overlong to be true despite there is
`-call-indirect-overlong`, because
https://github.com/llvm/llvm-project/blob/442c59c75ca384db53a6d6d81686b17ea4b397c3/llvm/lib/Target/WebAssembly/WebAssemblySubtarget.cpp#L63-L67
But with the `Implies` field, disabling call-indirect-overlong disabled
both features, because TableGen thinks reference-types depends on
call-indirect-overlong, so without call-indirect-overlong,
reference-types can't be enabled. This is not exactly true with the
relationship of reference-types and call-indirect-overlong, but
generally makes sense for true dependencies, like exception-handling
implying (=depending on) multivalue and reference-types.
Also this wouldn't really affect the end users because these are `llc`
flags.
Commit: 6b7cd6499b1638ad4341148ab70f28cd5ac23e20
https://github.com/llvm/llvm-project/commit/6b7cd6499b1638ad4341148ab70f28cd5ac23e20
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M libc/test/UnitTest/BazelFilePath.cpp
Log Message:
-----------
[libc][bazel] Append '/' to TEST_UNDECLARED_OUTPUTS_DIR (#207710)
The environment variable does not end with a slash, so we need to add
one. Without this, the tests work, but don't achieve the intended effect
of writing to the undeclared outputs dir.
Commit: 832402097e77794095c3b59be9ea60bbaa4ce0f3
https://github.com/llvm/llvm-project/commit/832402097e77794095c3b59be9ea60bbaa4ce0f3
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M lldb/source/Symbol/Type.cpp
M lldb/test/API/python_api/type/TestTypeList.py
M lldb/test/API/python_api/type/main.cpp
Log Message:
-----------
[lldb] Make SBType::FindDirectNestedType work with dynamic types (#207743)
This makes it possible to find the nested type just by knowing the
dynamic type of the value. To get the previous behavior, get the type
from a static view of the value (SBValue::GetStaticValue).
Commit: d6c521c5642e66c02bb6776f811d93b7c320537d
https://github.com/llvm/llvm-project/commit/d6c521c5642e66c02bb6776f811d93b7c320537d
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
A utils/bazel/llvm-project-overlay/libc/test/src/arpa/inet/BUILD.bazel
Log Message:
-----------
[bazel][libc] Add htons function family and tests (#208201)
Add bazel build targets for the arpa/inet byte order functions (htonl,
htons, ntohl, ntohs) and their corresponding unittests.
Assisted by Gemini.
Commit: e795686d2eb7fbee7e594451b46687a3c8d1f575
https://github.com/llvm/llvm-project/commit/e795686d2eb7fbee7e594451b46687a3c8d1f575
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/FIRToMemRef.cpp
A flang/test/Transforms/FIRToMemRef/emboxed-slice-array-coor.mlir
A flang/test/Transforms/FIRToMemRef/emboxed-slice-non-unit-stride-non-unit-lb.mlir
A flang/test/Transforms/FIRToMemRef/emboxed-slice-rank-reduction-nonprefix.mlir
A flang/test/Transforms/FIRToMemRef/emboxed-slice-rank-reduction.mlir
A flang/test/Transforms/FIRToMemRef/emboxed-slice-stride.mlir
Log Message:
-----------
[FIRToMemRef] Fix wrong indexing for converted array_coor over sliced fir.embox (#207749)
FIRToMemRef::convertArrayCoorOp routes through getMemrefIndices, which
only folds the first `rank` triples of sliceInfo.sliceVec into the
memref indices (i.e. the array_coor's own slice); the embox's slice
triples -- which sit at [rank*3 .. 2*rank*3-1] when both are present --
were dropped. Three consequences, three fixes here:
1. Non-collapsed embox slice lbs contribute (lb - 1) per Fortran dim to
each memref index. Fold them in in memref order (reversed Fortran order)
so the reinterpret_cast view lands at the right column.
2. The shapeVec-else stride path used shapeVec[0..rank-1] to build the
outer strides. With both slices present, that's the box's (slice's)
extents. Use shapeVec[rank..2*rank-1] instead -- the parent's extents --
so the outer stride is the parent's leading dim rather than the slice's
own size.
3. Rank-reducing embox slices (undef ub/step triples) have no memref
index position for their (lb - 1) shift. Fold the collapsed dim's (lb -
1) * parent_stride into the reinterpret_cast's flat offset and override
the corresponding memref index entry to 0.
---------
Co-authored-by: Claude Opus 4.7 <noreply at anthropic.com>
Commit: 8fd8daebd18a4d4ccd74942b44f3322a3c52c001
https://github.com/llvm/llvm-project/commit/8fd8daebd18a4d4ccd74942b44f3322a3c52c001
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
M llvm/lib/Target/AArch64/AArch64PostCoalescerPass.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/SMEInstrFormats.td
A llvm/test/CodeGen/AArch64/expand-form-transposed-tuple.mir
A llvm/test/CodeGen/AArch64/misched-push-form-transposed-tuple-to-users.mir
M llvm/test/CodeGen/AArch64/sme2-multivec-regalloc.mir
Log Message:
-----------
[AArch64] Expand FORM_TRANSPOSED_REG_TUPLE to copies before regalloc (#207205)
Previously, we kept the FORM_TRANSPOSED_REG_TUPLE nodes around during
register allocation. The problem with this approach is that it does not
model the potential overlap in live ranges between the destination and
source operands.
As a result, the register allocator assumes it has complete freedom to
allocate registers to the operands. For example, there is nothing
stopping it from allocating:
```
{z0, z1, z2, z3} = FORM_TRANSPOSED_X4 z3, z2, z1, z0
```
However, such cases are hard to expand later, either requiring spills or
complex shuffles. The current expansions of FORM_TRANSPOSED_REG_TUPLE
miscompile in cases like this because, when naively expanded into copies
after register allocation, earlier copies can clobber values that are
still needed by later ones.
For the above case, the incorrect expansion would be:
```
z0 = COPY z3 // z0 clobbered
z1 = COPY z2 // z1 clobbered
z2 = COPY z1 // reads the wrong value of z1
z3 = COPY z0 // reads the wrong value of z0
```
This patch fixes the issue by expanding FORM_TRANSPOSED_REG_TUPLEs into
copy sequences immediately before register allocation (in
`aarch64-post-coalescer`).
For example:
```
%v4:zpr4mul4 = FORM_TRANSPOSED_X4 %v0:0, %v1:0, %v2:0, %v3:0
```
Expands to:
```
undef %v4.zsub0:zpr4mul4 = COPY_INTO_TRANSPOSED_TUPLE %v0:0
%v4.zsub1:zpr4mul4 = COPY_INTO_TRANSPOSED_TUPLE %v1:0
%v4.zsub2:zpr4mul4 = COPY_INTO_TRANSPOSED_TUPLE %v2:0
%v4.zsub3:zpr4mul4 = COPY_INTO_TRANSPOSED_TUPLE %v3:0
```
This is similar to how REG_SEQUENCE is expanded and allows the register
allocator to reason about how the copies may interfere with one another.
To ensure our register allocation hints still apply, we encourage the
scheduler to place FORM_TRANSPOSED_REG_TUPLE nodes immediately before
their users. This keeps the live ranges of the hint nodes
(COPY_INTO_TRANSPOSED_TUPLE) short while extending the live ranges of
their operands. As a result, the register allocator is more likely to
allocate registers to the copy sources first, which works best for our
allocation hints.
Commit: 7f31e0c7e67bd05918cb60af978edacb231d52fb
https://github.com/llvm/llvm-project/commit/7f31e0c7e67bd05918cb60af978edacb231d52fb
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M orc-rt/test/CMakeLists.txt
R orc-rt/test/init.test
R orc-rt/test/lit.cfg.py
R orc-rt/test/lit.site.cfg.py.in
A orc-rt/test/regression/init.test
A orc-rt/test/regression/lit.cfg.py
A orc-rt/test/regression/lit.site.cfg.py.in
Log Message:
-----------
[orc-rt] Move the regression tests into test/regression (#208391)
Move the regression lit config and the existing tests into
test/regression/, and point the check-orc-rt suite there.
This is a first step towards consolidating tests and test infrastructure
under orc-rt/test. Upcoming commits will add a test tools directory, and
move the existing unit tests (under orc-rt/unittests) into
orc-rt/test/unit.
Commit: a443951eb3717c27149ba491cc8ba632c1a2da5e
https://github.com/llvm/llvm-project/commit/a443951eb3717c27149ba491cc8ba632c1a2da5e
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/include/llvm/Support/GenericLoopInfo.h
M llvm/include/llvm/Support/GenericLoopInfoImpl.h
Log Message:
-----------
Require GraphHasNodeNumbers in llvm::LoopInfoBase; drop the DenseMap fallback (#207905)
LoopInfoBase kept a DenseMap fallback for block types whose GraphTraits
has no getNumber() (std::conditional_t on GraphHasNodeNumbers). With the
last such in-tree users now numbered (mlir::Block #207617 and BOLT's
BinaryBasicBlock #207899), require GraphHasNodeNumbers via static_assert
and make BBMap unconditionally a SmallVector indexed by block number,
dropping the DenseMap branch in
getLoopFor/changeLoopFor/removeBlock/analyze/verify.
Aided by Claude Opus 4.8
Commit: b94defea8ba4194a5ade1657c38c2b218981ab1e
https://github.com/llvm/llvm-project/commit/b94defea8ba4194a5ade1657c38c2b218981ab1e
Author: Ömer Sinan Ağacan <omeragacan at gmail.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/fast-isel-int-ext.ll
Log Message:
-----------
[AArch64][FastISel] Update arm64-fast-isel-int-ext.ll check lines (NFC) (#207996)
Similar to #207159 (merged as 15b3882), update the CHECK lines
automatically in prep for new tests and bug fixes.
Commit: 6ae5965f26e53d7338a779a73725a597a4d136e5
https://github.com/llvm/llvm-project/commit/6ae5965f26e53d7338a779a73725a597a4d136e5
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/PassManagerInternal.h
Log Message:
-----------
Revert "[IR][NFC] Drop vtable from PassConcept/PassModel" (#208389)
Breaks ASan builds due to new-delete mismatch.
Closes #208381.
Reverts llvm/llvm-project#208168
Commit: c378bc38dde2a30f04e0aac0d053cea620800a99
https://github.com/llvm/llvm-project/commit/c378bc38dde2a30f04e0aac0d053cea620800a99
Author: Haohai Wen <haohai.wen at intel.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/include/llvm/ObjectYAML/ContiguousBlobAccumulator.h
M llvm/lib/ObjectYAML/ContiguousBlobAccumulator.cpp
Log Message:
-----------
[ObjectYAML] Fix issues found in review of #207306 (#208160)
- checkLimit(): avoid uint64_t overflow.
- writeAsBinary(): check the limit against the bytes actually written.
- updateDataAt(): take const void *Data.
Commit: f22e7b5a6f9b2fcc968bda860253e3b4b363aada
https://github.com/llvm/llvm-project/commit/f22e7b5a6f9b2fcc968bda860253e3b4b363aada
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/include/llvm/DWARFLinker/Classic/DWARFLinkerCompileUnit.h
M llvm/lib/DWARFLinker/Classic/DWARFLinkerCompileUnit.cpp
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerCompileUnit.cpp
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerImpl.cpp
A llvm/test/tools/dsymutil/X86/dwarf6-language-name-odr.test
Log Message:
-----------
[dsymutil] Use DWARFDie::getLanguage instead of manually finding DW_AT_language (#208174)
With DWARFv6, CUs may not have a `DW_AT_language` (but a
`DW_AT_language_name` instead). In
https://github.com/llvm/llvm-project/pull/207151 we made
`DWARFDie::getLanguage` account for this possibility. However, dsymutil
explicitly tries to find `DW_AT_language` in several places.
This patch ensures we go through `DWARFDie::getLanguage` instead in most
of them.
The only way I found this to be testable/observable is by testing the
`isODRLanguage` code paths. Added a test that exercises this.
There is one remaining use of `DW_AT_language` in
`DependencyTracker.cpp`. But was going to address that in a separate
change.
AI usage:
- Test written with the help of Claude
Commit: 9c747b3ed9116841c48913eb06ccb5fad13ad1a7
https://github.com/llvm/llvm-project/commit/9c747b3ed9116841c48913eb06ccb5fad13ad1a7
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M clang/lib/Serialization/ASTReaderDecl.cpp
A clang/test/Modules/GH207581.cpp
Log Message:
-----------
[clang] [serialization] Step into UsingShadowDecl when find existing decl (#208393)
Close https://github.com/llvm/llvm-project/issues/207581
The root cause of the problem is that：enum constant decl, for which its
parent is not enum class, is special. They can be accessed directly
without access its parent. When modules join the game, it becomes more
complex. As for members in other entities like class, we can assume the
member is accessable if their parent are accesable. But it is a
different story for enums. See
https://github.com/llvm/llvm-project/issues/131058 for the whole story
of the backrgound.
Then we didn't write enum constant decl to the lookup table of its
parent of parent in the ASTWriter. So that if other consumer in Sema
wants to access them, they have to get it by entities like exported
using decls. However, the problem is, in ASTReader, when we merge decls,
we use noload_lookup to find existing decls. And the absense of unnamed
enum decl in the parent of its parent's lookup table makes the merge
fails. For enum constant decl in named enum, they will still have a name
lookup table. So we will merge them somehow. But for enum constants in
unnamed enum, they were removed from the only lookup table so the merge
fails. This is the whole story of the current issue.
To fix this, when we merge decls, we step into the UsingShadowDecl to
find the real decls. This is fine as we never merge decls with different
kinds. We can even call this a tiny optimization.
Commit: d7ccd02c9c78b6576ca2caa3f4d2435ebda50744
https://github.com/llvm/llvm-project/commit/d7ccd02c9c78b6576ca2caa3f4d2435ebda50744
Author: Osama Abdelkader <osama.abdelkader at gmail.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/DeclSpec.h
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Sema/DeclSpec.cpp
M clang/test/CXX/dcl.dcl/dcl.spec/dcl.stc/p2.cpp
M clang/test/CXX/dcl.dcl/dcl.spec/dcl.type/dcl.spec.auto/p3-1y.cpp
M clang/test/CXX/dcl.dcl/dcl.spec/dcl.type/dcl.spec.auto/p3-generic-lambda-1y.cpp
M clang/test/CXX/dcl.dcl/dcl.spec/dcl.type/dcl.spec.auto/p3.cpp
M clang/test/CXX/dcl/dcl.fct/p17.cpp
M clang/test/CXX/drs/cwg3xx.cpp
M clang/test/Parser/c2x-auto.c
M clang/test/SemaCXX/auto-cxx0x.cpp
M clang/test/SemaCXX/class.cpp
M clang/test/SemaCXX/static-data-member.cpp
Log Message:
-----------
[clang] Reject 'auto' storage class with type specifier in C++ (#166004)
Fixes #164273
---------
Signed-off-by: Osama Abdelkader <osama.abdelkader at gmail.com>
Commit: f6b50ceeca020729445239b5375343e909d3dc51
https://github.com/llvm/llvm-project/commit/f6b50ceeca020729445239b5375343e909d3dc51
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M libcxx/include/__vector/layout.h
M libcxx/include/__vector/vector.h
Log Message:
-----------
[libc++] Remove some unnecessary functions from __vector_layout (#207152)
This removes functions which produce identical IR after the first
InstCombine pass after inlining compared to their replacements.
Commit: e0dce75190a862b3bcfdcd165ea794fa77412b58
https://github.com/llvm/llvm-project/commit/e0dce75190a862b3bcfdcd165ea794fa77412b58
Author: Tomas Matheson <Tomas.Matheson at arm.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-load-lse2.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-load-lse2_lse128.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-load-rcpc3.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-load-rcpc_immo.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-load-lse2.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-load-lse2_lse128.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-load-rcpc3.ll
M llvm/test/CodeGen/AArch64/Atomics/generate-tests.py
M llvm/test/CodeGen/AArch64/GlobalISel/v8.4-atomic-128.ll
M llvm/test/CodeGen/AArch64/v8.4-atomic-128.ll
Log Message:
-----------
[AArch64] fix 128-bit Sequentially Consistent load (#206936)
Emit 128-bit SC loads the way that the AArch64 atomics ABI requires, by
introducing an LDAR before the LDP. See atomicsabi64.pdf at
https://github.com/ARM-software/abi-aa/releases.
Commit: d0487fec8ee5ca05645dfc69093b49959cf51dbc
https://github.com/llvm/llvm-project/commit/d0487fec8ee5ca05645dfc69093b49959cf51dbc
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/include/llvm/Debuginfod/BuildIDFetcher.h
M llvm/include/llvm/Object/BuildID.h
M llvm/lib/DebugInfo/Symbolize/Symbolize.cpp
M llvm/lib/Debuginfod/BuildIDFetcher.cpp
M llvm/lib/Object/BuildID.cpp
M llvm/lib/ProfileData/Coverage/CoverageMapping.cpp
M llvm/lib/ProfileData/InstrProfCorrelator.cpp
M llvm/tools/llvm-debuginfod-find/llvm-debuginfod-find.cpp
M llvm/tools/llvm-objdump/llvm-objdump.cpp
Log Message:
-----------
Reland [llvm] Errorize DebuginfodFetcher for inspection at call-sites (#194872)
Failure to fetch debuginfod is rarely an error, but there are case where
we want to distinguish error reasons down the line, for example in order
to test connection timeouts.
Commit: 3282c06fc30e742ae230fd5341d9c06103e671fd
https://github.com/llvm/llvm-project/commit/3282c06fc30e742ae230fd5341d9c06103e671fd
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/test/CodeGen/X86/udiv-const-optimization.ll
Log Message:
-----------
[X86] udiv-const-optimization.ll - regenerate test checks (#208403)
Remove noise from #207634
Commit: 12e54164e7a7cdd4596667ebe11f76dbdaccdb56
https://github.com/llvm/llvm-project/commit/12e54164e7a7cdd4596667ebe11f76dbdaccdb56
Author: Philipp Rados <philipp.rados at openchip.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.h
M llvm/test/CodeGen/RISCV/stack-offset-large.ll
Log Message:
-----------
[RISCV] Adjust max stack-threshold on 64bit systems (#208223)
Shouldn't emit [-Wframe-larger-than] warning on 64-bit systems, when
stack-size is greater than UINT32_MAX (the previous default). Update the
maximum stack-size-threshold on 64-bit systems to INT64_MAX.
NOTE: GCC has both rv32/rv64 thresholds set to the respective signed
maximum unlike LLVM.
Commit: 75c9ff22df22ed1cf98a1badde790a620998c11a
https://github.com/llvm/llvm-project/commit/75c9ff22df22ed1cf98a1badde790a620998c11a
Author: Mel Chen <mel.chen at sifive.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
A llvm/test/Transforms/LoopVectorize/versioning-dead-load.ll
Log Message:
-----------
[LV] Add test for interleave group with dead member under stride versioning. nfc (#208190)
Co-authored-by: Luke Lau <luke at igalia.com>
Commit: 6c2f267a209a0b4bd0447c589a855c9334fd598c
https://github.com/llvm/llvm-project/commit/6c2f267a209a0b4bd0447c589a855c9334fd598c
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64MacroFusion.cpp
M llvm/test/CodeGen/AArch64/misched-fusion-arith-cbz.ll
M llvm/test/CodeGen/AArch64/misched-fusion-arith-cbz.mir
Log Message:
-----------
[AArch64] Add missing TB(N)Z achors to arith+CBZ clustering (#207725)
This patch adds missing TBZ+TBNZ anchors for arith+CBZ clustering. They
have similar nature to CBZ as specific kinds of it, so this patch
classifies them under the same subtarget feature name compactly. This is
better for Apple CPU. They can be reasonably expected to behave
similarly on AArch64 targets.
Commit: 4452323fef2ef4735df6c0f2bdfed0a668df25f2
https://github.com/llvm/llvm-project/commit/4452323fef2ef4735df6c0f2bdfed0a668df25f2
Author: Michael Platings <michael.platings at arm.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Gate NVPTXCodeGen behind llvm_targets (#208041)
Fixes another case of issue #63135
Commit: 170a479b64ef5837c760b640d04a91ebc950d265
https://github.com/llvm/llvm-project/commit/170a479b64ef5837c760b640d04a91ebc950d265
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M clang/include/clang/Options/FlangOptions.td
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/include/flang/Frontend/CodeGenOptions.def
M flang/include/flang/Lower/LoweringOptions.def
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Lower/Bridge.cpp
M flang/test/Driver/driver-help.f90
A flang/test/Driver/real-sum-reassociation.f90
M flang/test/Lower/split-sum-expression-tree-lowering.f90
Log Message:
-----------
[flang][Driver] Add option for real sum reassociation (#207377)
Compiler driver option for #207371: -freal-sum-reassociation.
Disabled by default.
Assisted-by: Codex
Commit: d85e8e7b7744e587d46231f782d44ccfb30f3723
https://github.com/llvm/llvm-project/commit/d85e8e7b7744e587d46231f782d44ccfb30f3723
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/test/Transforms/LoopVectorize/VPlan/expand-scev.ll
M llvm/test/Transforms/LoopVectorize/vscale-cost.ll
Log Message:
-----------
[VPlan] Add VPInstruction::Intrinsic opcode, use for scalar intrinsics. (#207541)
This patch adds a new Intrinsic opcode to VPInstruction, initially used
for generating calls to scalar intrinsics. The intrinsic ID as integer
is the last operand (i.e. the called function). Alternatively we could
also create the needed intrinsic declarations and pass the function
directly, but that would add potentially unused declarations, if we
decide to not vectorize.
The first patch migrates just VScale, but there are other opcodes
matching directly to intrinsics, which will be replaced in follow ups.
It also gives more flexibility going forward, e.g. allows emitting
min/max intrinsics when expanding SCEV min/max expressions.
PR: https://github.com/llvm/llvm-project/pull/207541
Commit: 3fe9d5d6d3d1a9bcec7959aa0cac7a6fe6808744
https://github.com/llvm/llvm-project/commit/3fe9d5d6d3d1a9bcec7959aa0cac7a6fe6808744
Author: MITSUNARI Shigeo <herumi at nifty.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/AArch64/udiv-const-optimization.ll
M llvm/test/CodeGen/RISCV/udiv-const-optimization.ll
M llvm/test/CodeGen/X86/divide-by-constant.ll
M llvm/test/CodeGen/X86/udiv-const-optimization.ll
Log Message:
-----------
[SelectionDAG] Widen even 33-bit-magic udiv on free-zext targets (#207634)
On 64-bit targets, #181288 lowers a 32-bit unsigned division by a
constant with a 33-bit magic number (the `IsAdd` case) to a widened
64-bit high-multiply (`MULHU`/`UMUL_LOHI`), e.g. `x / 7` becomes a
single `mulq`/`umulh`/`mulhu`. That only reaches odd divisors. This
patch extends it to even divisors on targets where the `i32 -> i64`
zero-extension is free.
Commit: 38570cae05860a5addf29f236faa273b99baffe3
https://github.com/llvm/llvm-project/commit/38570cae05860a5addf29f236faa273b99baffe3
Author: Varad Rahul Kamthe <133588066+varadk27 at users.noreply.github.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXSubtarget.cpp
M llvm/test/CodeGen/NVPTX/tanhf.ll
Log Message:
-----------
[NVPTX] Add native `tanh.approx` support for f16/f16x2/bf16/bf16x2 (#203257)
Adds NVPTX backend support for the native PTX `tanh.approx` instructions on half-precision and bfloat types:
- `tanh.approx.f16` and `tanh.approx.f16x2` (PTX 7.0+, sm_75+)
- `tanh.approx.bf16` and `tanh.approx.bf16x2` (PTX 7.8+, sm_90+)
Adds a `FTANHInst` TableGen class with the new patterns in NVPTXInstrInfo.td and splits `ISD::FTANH` out of the unconditional `f16/bf16 -> f32` promotion loop in NVPTXISelLowering.cpp, marking it Legal when the target supports it (scalars promote, vectors expand on older targets). Also guards `tanh.approx.f32` behind sm_75 and adds the
missing `AddPromotedToType` for bf16.
PTX Spec Reference:
https://docs.nvidia.com/cuda/parallel-thread-execution/#half-precision-floating-point-instructions-tanh
Signed-off-by: Varad Rahul Kamthe <vkamthe at nvidia.com>
Commit: 1f55374f8d05bda4844a192848368a84e976a8ec
https://github.com/llvm/llvm-project/commit/1f55374f8d05bda4844a192848368a84e976a8ec
Author: Lucas Mellone <github.snugness349 at passinbox.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M libcxx/include/__ranges/lazy_split_view.h
A libcxx/test/libcxx/ranges/range.adaptors/range.lazy.split/nodiscard.verify.cpp
Log Message:
-----------
[libc++][ranges] Applied [[nodiscard]] to `lazy_split` (#208036)
[[nodiscard]] should be applied to functions where discarding the return
value is most likely a correctness issue.
- https://libcxx.llvm.org/CodingGuidelines.html
- https://wg21.link/range.lazy.split
Towards https://github.com/llvm/llvm-project/issues/172124
---------
Co-authored-by: Hristo Hristov <zingam at outlook.com>
Commit: 4500116810d69622da80469993ca4d1e2e9ae2c8
https://github.com/llvm/llvm-project/commit/4500116810d69622da80469993ca4d1e2e9ae2c8
Author: michaelselehov <michael.selehov at amd.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Object/OffloadBundle.cpp
M llvm/test/tools/llvm-objdump/Offloading/fatbin-coff-compress.test
Log Message:
-----------
[Offload] Make compressed offload bundle header little-endian (#206744)
The compressed offload bundle (CCOB) header integer fields (Version,
Method, FileSize, UncompressedFileSize, Hash) were serialized and read
in
host-native byte order. The on-disk format is little-endian, so on
big-endian hosts these fields were byte-swapped: writing produced a
malformed header, and reading misparsed the size, making
`llvm-objdump --offloading` crash/misbehave on s390x. This is also why
the
earlier bundle-size fix had to be reverted.
Make the header little-endian on every host:
- Read side: declare the `RawCompressedBundleHeader` fields as
`support::ulittle16_t` / `ulittle32_t` / `ulittle64_t`, so the bytes are
always interpreted as little-endian regardless of host.
- Write side: emit the header with
`support::endian::Writer(OS, endianness::little)` instead of host-native
`OS.write(&field, sizeof field)`.
Also revert the temporary big-endian test skip added in #205999
(host-byteorder-little-endian guard on fatbin-coff-compress.test): with
the
header now little-endian, the test runs correctly on big-endian hosts.
---------
Co-authored-by: Michael Selehov <michael.selehov at amd.com>
Co-authored-by: Nikita Popov <npopov at redhat.com> (LE approach)
Commit: 095e9a16eaf0982208006138a2f03ec0a540d73e
https://github.com/llvm/llvm-project/commit/095e9a16eaf0982208006138a2f03ec0a540d73e
Author: Avi Patel <aviipatel06 at gmail.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M libcxx/docs/Status/Cxx26Issues.csv
M libcxx/include/__atomic/atomic_ref.h
M libcxx/test/std/atomics/atomics.ref/ctor.pass.cpp
Log Message:
-----------
[libc++] Implement LWG4472: std::atomic_ref<const T> can be constructed from temporaries (#208131)
## Summary
- Implements LWG4472, i.e., adds a deleted `atomic_ref(T&&)` overload to
the primary template and three partial specializations of `atomic_ref`.
## Test
- Added `static_assert`s in `ctor.pass.cpp` asserting
`atomic_ref<T>`/`atomic_ref<const T>` reject construction from
`T&&`/`const T&&`.
Resolve #189840
Commit: 361720cfd50e9610dbceca75c31f28e20b45d7e1
https://github.com/llvm/llvm-project/commit/361720cfd50e9610dbceca75c31f28e20b45d7e1
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Eliminate some vec temps with ArrayRef (NFC) (#207432)
The enabling change is e56187575 ([ArrayRef] Make iterator_range
constructor const-agnostic, #205183).
Commit: 015162dacdd5f0752cea50fc400d454a15b6afbe
https://github.com/llvm/llvm-project/commit/015162dacdd5f0752cea50fc400d454a15b6afbe
Author: Sergio Afonso <safonsof at amd.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M flang/lib/Optimizer/OpenMP/HostOpFiltering.cpp
M flang/test/Transforms/OpenMP/function-filtering-host-ops.mlir
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
A mlir/test/Target/LLVMIR/omptarget-declare-target-all-device-types-device.mlir
M mlir/test/Target/LLVMIR/omptarget-declare-target-llvm-device.mlir
Log Message:
-----------
[Flang][MLIR][OpenMP] Fix declare_target globals visibility (#208188)
This patch introduces various changes to the handling of
`declare_target` global variables in Flang:
- Non-`declare_target` globals are unconditionally made "internal" when
compiling for an OpenMP offload target. This prevents potential symbol
redefinition issues related to globals that don't actually exist on the
device.
- Local SAVE variables handling for OpenMP offloading programs is fixed
to prevent their associated "internal" linkage from producing broken
device code for `declare_target enter(...)`.
- When globals are indirectly accessed from the target device (e.g.
`declare_target link(...)`), the associated and unused full-storage
global is marked with "internal" linkage to facilitate later removal.
- `declare_target device_type(host) enter(...)` variables are set to
external linkage when compiling for a target device, causing linker
errors if accessed. This mirrors Clang's behavior.
Fixes #195188, fixes #195468.
Assisted-by: Claude Opus 4.8.
Commit: 50d186480ee9b0fa3f2500c4b963a47ee78db902
https://github.com/llvm/llvm-project/commit/50d186480ee9b0fa3f2500c4b963a47ee78db902
Author: Scott Manley <rscottmanley at gmail.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCRecipeMaterialization.cpp
M mlir/test/Dialect/OpenACC/acc-recipe-materialization-reduction.mlir
Log Message:
-----------
[OpenACC] apply par dims to reductions in parallel regions (#208258)
For reductions that come from parallel constructs, explicitly set the
GPU parallel dimensions attribute to blockXDim on the acc.reduction_init
and acc.reduction_combine* ops since they will always be gang private
Commit: 5b9fa24dbd7b504b99143ebd2f5f12f8560c6331
https://github.com/llvm/llvm-project/commit/5b9fa24dbd7b504b99143ebd2f5f12f8560c6331
Author: Sergio Afonso <safonsof at amd.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/OpenMP/Passes.td
M flang/lib/Optimizer/OpenMP/CMakeLists.txt
M flang/lib/Optimizer/OpenMP/FunctionFiltering.cpp
R flang/lib/Optimizer/OpenMP/HostOpFiltering.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/test/Fir/basic-program.fir
A flang/test/Lower/OpenMP/function-filtering-4.f90
M flang/test/Lower/OpenMP/host-eval.f90
R flang/test/Transforms/OpenMP/function-filtering-host-ops.mlir
M mlir/include/mlir/Dialect/OpenMP/Transforms/Passes.td
M mlir/lib/Dialect/OpenMP/Transforms/CMakeLists.txt
A mlir/lib/Dialect/OpenMP/Transforms/HostOpFiltering.cpp
A mlir/test/Dialect/OpenMP/host-op-filtering.mlir
Log Message:
-----------
[Flang][MLIR][OpenMP] Move host op filtering to the omp dialect (#208189)
The MLIR pass that removes operations exclusively intended for the host
from OpenMP target offload modules is currently defined as part of
Flang. However, this is a feature that would benefit from being reusable
by other frontends, as removing such operations is a requirement for all
OpenMP target device modules prior to LLVM IR translation.
By moving the `omp-host-op-filtering` pass out of Flang, it had to be
updated to work on a lower-level LLVM dialect-based representation,
rather than FIR. This simplified some of the existing edge cases, such
as `fir.declare` ops and `fir.boxchar` type handling. In addition, new
function arguments are introduced as placeholders and return values from
host-only functions are removed, producing a cleaner result and
simplifying the pass as compared to previously.
As a result of a later execution of this pass, dynamic dispatch of host
functions via dispatch table using `fir.dispatch`, `fir.type_info` and
`fir.dt_entry` ops would break due to the removal of `fir.dt_entry`
operations pointing to deleted host functions, while `fir.dispatch` ops
pointing to the same functions would remain. The
`omp-function-filtering` pass is updated to prevent `fir.dt_entry` from
being deleted and let them point to an undefined symbol. This lets FIR
lowering to LLVM work well enough to get to the host op filtering stage,
where any resulting operations for this host dynamic dispatch are
cleaned up.
Commit: 841e01daa0126941cd3b1b322b3e3b5605fcd03c
https://github.com/llvm/llvm-project/commit/841e01daa0126941cd3b1b322b3e3b5605fcd03c
Author: Ammar Askar <aaskar at google.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86InstrCompiler.td
M llvm/test/CodeGen/X86/insert.ll
Log Message:
-----------
[ISEL] Fix x86-64 instruction selection bug leaking upper 32 bits (#205600)
The x86 backend had optimization patterns that matched:
`(or (and GR32:$dst, -256), (i32 (zextloadi8 addr:$src)))`
and lowered it to:
`(INSERT_SUBREG (i32 (COPY $dst)), (MOV8rm i8mem:$src), sub_8bit)`
INSERT_SUBREG for sub_8bit emits a movb instruction which preserves the
upper 56 bits. Now, if the GR32 dst came from a node that does not zero
the upper 32 bits (like IMPLICIT_DEF or EXTRACT_SUBREG), those upper 32
bits would be leaked into the resulting register without being zeroed.
This fixes it by ensuring the input operand satisfies def32 which
requires the upper 32 bits of the register to be set.
Commit: eceb9d55a2c526798480a1ceb8dfedb85b5b6c9b
https://github.com/llvm/llvm-project/commit/eceb9d55a2c526798480a1ceb8dfedb85b5b6c9b
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M orc-rt/test/CMakeLists.txt
M orc-rt/test/regression/lit.cfg.py
A orc-rt/test/regression/smoke-check.test
A orc-rt/test/tools/CMakeLists.txt
A orc-rt/test/tools/orc-rt-smoke-check.cpp
Log Message:
-----------
[orc-rt] Add regression test-tool infrastructure (#208398)
Set up the infrastructure for regression tests that build and run a
helper tool, in preparation for testing the logging backends.
- Add test/tools/ for test-support binaries, with a first tool,
orc-rt-smoke-check, wired into ORC_RT_TEST_DEPS and onto lit's PATH.
- Add test/regression/smoke-check.test, which runs the tool and matches
its output with FileCheck, exercising the tool-build and lit plumbing
end to end.
Commit: 724ad1150d5d38c96ac9d848ea21cad165415bd7
https://github.com/llvm/llvm-project/commit/724ad1150d5d38c96ac9d848ea21cad165415bd7
Author: Ilia Kuklin <ikuklin at accesssoftek.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/include/llvm/MC/MCDXContainerWriter.h
M llvm/lib/MC/MCDXContainerWriter.cpp
M llvm/lib/Target/DirectX/DXContainerGlobals.cpp
M llvm/lib/Target/DirectX/DXContainerPDB.cpp
M llvm/lib/Target/DirectX/DXILWriter/DXILWriterPass.cpp
A llvm/test/CodeGen/DirectX/ContainerData/ContainerFlags.ll
M llvm/test/CodeGen/DirectX/ContainerData/DebugName-default-output.test
M llvm/test/CodeGen/DirectX/ContainerData/DebugName-user-directory.test
A llvm/test/CodeGen/DirectX/ContainerData/DebugName-user-specified.test
A llvm/test/CodeGen/DirectX/ContainerData/DebugName.test
M llvm/test/CodeGen/DirectX/ContainerData/PDBParts.test
M llvm/test/CodeGen/DirectX/ContainerData/SourceInfo-Args.ll
M llvm/test/CodeGen/DirectX/ContainerData/SourceInfo-Compressed.ll
M llvm/test/CodeGen/DirectX/ContainerData/SourceInfo-Uncompressed.ll
M llvm/test/CodeGen/DirectX/embed-ildb.ll
Log Message:
-----------
[DirectX] Add `--dx-embed-debug` and `--dx-pdb-path` flags (#204166)
Add flags for DirectX in `llc`:
* `--dx-embed-debug` to embed debug info into ILDB part of DXContainer
* `--dx-pdb-path` to specify filename/path for PDB file output
This patch does not add flags for clang Driver, they will be implemented
later.
Commit: d855251d603623f790cf94079126ad8ab6684d9d
https://github.com/llvm/llvm-project/commit/d855251d603623f790cf94079126ad8ab6684d9d
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M orc-rt/CMakeLists.txt
M orc-rt/test/CMakeLists.txt
A orc-rt/test/unit/AllocActionTest.cpp
A orc-rt/test/unit/AllocActionTestUtils.h
A orc-rt/test/unit/BitmaskEnumTest.cpp
A orc-rt/test/unit/BootstrapInfoTest.cpp
A orc-rt/test/unit/CMakeLists.txt
A orc-rt/test/unit/CallSPSCITest.cpp
A orc-rt/test/unit/CallableTraitsHelperTest.cpp
A orc-rt/test/unit/CommonTestUtils.h
A orc-rt/test/unit/DirectCaller.h
A orc-rt/test/unit/EndianTest.cpp
A orc-rt/test/unit/ErrorCAPITest.cpp
A orc-rt/test/unit/ErrorExceptionInteropTest.cpp
A orc-rt/test/unit/ErrorTest.cpp
A orc-rt/test/unit/ExecutorAddressTest.cpp
A orc-rt/test/unit/ExecutorProcessInfoTest.cpp
A orc-rt/test/unit/InProcessControllerAccessTest.cpp
A orc-rt/test/unit/Inputs/NativeDylibManagerTestLib.cpp
A orc-rt/test/unit/IntervalMapTest.cpp
A orc-rt/test/unit/IntervalSetTest.cpp
A orc-rt/test/unit/LockedAccessTest.cpp
A orc-rt/test/unit/LoggingTest.cpp
A orc-rt/test/unit/MacroUtilsTest.cpp
A orc-rt/test/unit/MathTest.cpp
A orc-rt/test/unit/MemoryAccessSPSCITest.cpp
A orc-rt/test/unit/MemoryFlagsTest.cpp
A orc-rt/test/unit/NativeDylibManagerSPSCITest.cpp
A orc-rt/test/unit/NativeDylibManagerTest.cpp
A orc-rt/test/unit/QueueingRunnerTest.cpp
A orc-rt/test/unit/RTTITest.cpp
A orc-rt/test/unit/SPSAllocActionTest.cpp
A orc-rt/test/unit/SPSMemoryFlagsTest.cpp
A orc-rt/test/unit/SPSWrapperFunctionBufferTest.cpp
A orc-rt/test/unit/SPSWrapperFunctionTest.cpp
A orc-rt/test/unit/SessionTest.cpp
A orc-rt/test/unit/SimpleNativeMemoryMapSPSCITest.cpp
A orc-rt/test/unit/SimpleNativeMemoryMapTest.cpp
A orc-rt/test/unit/SimplePackedSerializationTest.cpp
A orc-rt/test/unit/SimplePackedSerializationTestUtils.h
A orc-rt/test/unit/SimpleSymbolTableTest.cpp
A orc-rt/test/unit/StandaloneMachOUnwindInfoRegistrarTest.cpp
A orc-rt/test/unit/TaskGroupTest.cpp
A orc-rt/test/unit/ThreadPoolRunnerTest.cpp
A orc-rt/test/unit/WrapperFunctionBufferTest.cpp
A orc-rt/test/unit/bind-test.cpp
A orc-rt/test/unit/bit-test.cpp
A orc-rt/test/unit/iterator_range-test.cpp
M orc-rt/test/unit/lit.cfg.py
A orc-rt/test/unit/move_only_function-test.cpp
A orc-rt/test/unit/scope_exit-test.cpp
A orc-rt/test/unit/span-test.cpp
R orc-rt/unittests/AllocActionTest.cpp
R orc-rt/unittests/AllocActionTestUtils.h
R orc-rt/unittests/BitmaskEnumTest.cpp
R orc-rt/unittests/BootstrapInfoTest.cpp
R orc-rt/unittests/CMakeLists.txt
R orc-rt/unittests/CallSPSCITest.cpp
R orc-rt/unittests/CallableTraitsHelperTest.cpp
R orc-rt/unittests/CommonTestUtils.h
R orc-rt/unittests/DirectCaller.h
R orc-rt/unittests/EndianTest.cpp
R orc-rt/unittests/ErrorCAPITest.cpp
R orc-rt/unittests/ErrorExceptionInteropTest.cpp
R orc-rt/unittests/ErrorTest.cpp
R orc-rt/unittests/ExecutorAddressTest.cpp
R orc-rt/unittests/ExecutorProcessInfoTest.cpp
R orc-rt/unittests/InProcessControllerAccessTest.cpp
R orc-rt/unittests/Inputs/NativeDylibManagerTestLib.cpp
R orc-rt/unittests/IntervalMapTest.cpp
R orc-rt/unittests/IntervalSetTest.cpp
R orc-rt/unittests/LockedAccessTest.cpp
R orc-rt/unittests/LoggingTest.cpp
R orc-rt/unittests/MacroUtilsTest.cpp
R orc-rt/unittests/MathTest.cpp
R orc-rt/unittests/MemoryAccessSPSCITest.cpp
R orc-rt/unittests/MemoryFlagsTest.cpp
R orc-rt/unittests/NativeDylibManagerSPSCITest.cpp
R orc-rt/unittests/NativeDylibManagerTest.cpp
R orc-rt/unittests/QueueingRunnerTest.cpp
R orc-rt/unittests/RTTITest.cpp
R orc-rt/unittests/SPSAllocActionTest.cpp
R orc-rt/unittests/SPSMemoryFlagsTest.cpp
R orc-rt/unittests/SPSWrapperFunctionBufferTest.cpp
R orc-rt/unittests/SPSWrapperFunctionTest.cpp
R orc-rt/unittests/SessionTest.cpp
R orc-rt/unittests/SimpleNativeMemoryMapSPSCITest.cpp
R orc-rt/unittests/SimpleNativeMemoryMapTest.cpp
R orc-rt/unittests/SimplePackedSerializationTest.cpp
R orc-rt/unittests/SimplePackedSerializationTestUtils.h
R orc-rt/unittests/SimpleSymbolTableTest.cpp
R orc-rt/unittests/StandaloneMachOUnwindInfoRegistrarTest.cpp
R orc-rt/unittests/TaskGroupTest.cpp
R orc-rt/unittests/ThreadPoolRunnerTest.cpp
R orc-rt/unittests/WrapperFunctionBufferTest.cpp
R orc-rt/unittests/bind-test.cpp
R orc-rt/unittests/bit-test.cpp
R orc-rt/unittests/iterator_range-test.cpp
R orc-rt/unittests/move_only_function-test.cpp
R orc-rt/unittests/scope_exit-test.cpp
R orc-rt/unittests/span-test.cpp
Log Message:
-----------
[orc-rt] Move the unit tests into test/unit (#208431)
Move unit tests from orc-rt/unittests into orc-rt/test/unit, completing
the consolidation of the runtime's tests under orc-rt/test (alongside
test/regression and test/tools).
Commit: 1008b485e4807476c831910cf404a0315f06c788
https://github.com/llvm/llvm-project/commit/1008b485e4807476c831910cf404a0315f06c788
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/cmake/modules/LLVMConfig.cmake.in
Log Message:
-----------
cmake: Remove cmake_crosscompiling check on LLVMSupport target export (#208420)
Revert exported target check added in
00b2f81418233397e601afaeea6d62c47a6c368a
to fix reported mingw cross compile regression. This is the quick fix
which restores the cmake warnings when building libc for amdgpu.
Commit: 05c0a297bcad51642f55e4ba25f408128e88982f
https://github.com/llvm/llvm-project/commit/05c0a297bcad51642f55e4ba25f408128e88982f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/test/CodeGen/X86/subvectorwise-store-of-vector-splat.ll
Log Message:
-----------
[X86] subvectorwise-store-of-vector-splat.ll - regenerate test checks to reduce diff in #189971 (#208419)
Add AVX1ORAVX2 check prefix to distinguish from AVX512 codegen
Commit: 7919d61966d84821d60edc8cf23ebdab8d3eb9d0
https://github.com/llvm/llvm-project/commit/7919d61966d84821d60edc8cf23ebdab8d3eb9d0
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/test/CodeGen/X86/sat-add.ll
Log Message:
-----------
[X86] sat-add.ll - regenerate test check to reduce diff in #189971 (#208418)
Commit: 24a5231188bf92e2ce9fe38e29e4cb75bab51414
https://github.com/llvm/llvm-project/commit/24a5231188bf92e2ce9fe38e29e4cb75bab51414
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M clang/include/clang/Basic/Attr.td
M clang/lib/Basic/OffloadArch.cpp
M clang/lib/Basic/Targets.cpp
M clang/lib/Basic/Targets/SPIR.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerModule.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Sema/SemaAMDGPU.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/test/Driver/amdgpu-toolchain.c
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M flang/include/flang/Tools/TargetSetup.h
M flang/lib/Optimizer/CodeGen/Target.cpp
M lld/ELF/InputFiles.cpp
M lldb/source/Utility/ArchSpec.cpp
M lldb/unittests/ObjectFile/ELF/TestObjectFileELF.cpp
M lldb/unittests/Utility/ArchSpecTest.cpp
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/Object/ELFObjectFile.h
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.def
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/Frontend/OpenMP/OMPContext.cpp
M llvm/lib/Object/RelocationResolver.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/MCA/AMDGPUCustomBehaviour.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/TargetInfo/AMDGPUTargetInfo.cpp
M llvm/lib/Target/AMDGPU/TargetInfo/AMDGPUTargetInfo.h
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/lib/TargetParser/TargetDataLayout.cpp
M llvm/lib/TargetParser/Triple.cpp
M llvm/lib/Transforms/IPO/ExpandVariadics.cpp
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
A llvm/test/CodeGen/AMDGPU/amdgpu-triple.ll
M llvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
M llvm/test/CodeGen/AMDGPU/loop-prefetch.ll
A llvm/test/CodeGen/AMDGPU/march-amdgcn-legacy-arch-name.ll
A llvm/test/CodeGen/AMDGPU/target-id-from-triple.ll
A llvm/test/CodeGen/AMDGPU/validate-subtarget-subarch-empty-module.ll
A llvm/test/CodeGen/AMDGPU/validate-subtarget-subarch.ll
M llvm/test/CodeGen/MIR/AMDGPU/init-whole.wave.ll
A llvm/test/Linker/Inputs/amdgpu-amdpal-no-subarch.ll
A llvm/test/Linker/Inputs/amdgpu-no-subarch.ll
A llvm/test/Linker/Inputs/amdgpu10-subarch.ll
A llvm/test/Linker/Inputs/amdgpu9.00-subarch.ll
A llvm/test/Linker/amdgpu-triple-os-mismatch.ll
A llvm/test/Linker/amdgpu-triple-subarch.ll
M llvm/test/MC/AMDGPU/amd-amdgpu-isa-malformed-target-id.s
A llvm/test/MC/AMDGPU/amdgcn-target-directive-subarch-cpu-field.s
M llvm/test/MC/AMDGPU/amdgcn-target-malformed-target-id.s
M llvm/test/MC/AMDGPU/amdgcn_target_directive_from_eflags.s
A llvm/test/MC/AMDGPU/arch-amdgcn-legacy-arch-name.s
M llvm/test/Object/AMDGPU/elf-header-flags-mach.yaml
M llvm/test/Object/AMDGPU/objdump.s
A llvm/test/tools/llvm-objdump/AMDGPU/arch-amdgcn-legacy-arch-name.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-zeroed-gfx10.s
A llvm/test/tools/llvm-objdump/ELF/AMDGPU/subarch-triple.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
M llvm/test/tools/llvm-readobj/ELF/AMDGPU/elf-headers.test
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/unittests/Object/ELFObjectFileTest.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
M llvm/unittests/TargetParser/TripleTest.cpp
M llvm/utils/UpdateTestChecks/asm.py
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
Log Message:
-----------
AMDGPU: Introduce amdgpu triple arch (#206480)
Move towards using the triple for representing incompatible
ISA changes. Use the subarch field to represent the various
incompatible cases. Previously we pretended a single triple arch
was universally compatible, and only distinguished by function
level subtargets. Move towards using distinct triples to enable
more sophisticated toolchain handling in the future, like proper
runtime library linking.
Introduce a new subarch per unique ISA, but also introduce
"major subarches" which are compatible by a set of covered
minor ISA versions. These map to the existing generic targets.
There are a few placeholder subarch entries, which currently
have missing backing generic arches for codegen.
This should be the preferred triple arch name going forward,
but is treated as an alias of amdgcn. This does not yet change
clang to emit the new triples.
Part of #154925
Commit: cfa5d6f59db9c891c1046edcbb8b5a273be0a59c
https://github.com/llvm/llvm-project/commit/cfa5d6f59db9c891c1046edcbb8b5a273be0a59c
Author: Narayan <nsreekumar6 at gmail.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/test/CodeGen/X86/avx512fp16-abi.c
M clang/test/CodeGen/X86/bfloat-half-abi.c
M clang/test/CodeGen/X86/fp128-abi.c
M llvm/include/llvm/ABI/TargetInfo.h
M llvm/include/llvm/ABI/Types.h
M llvm/lib/ABI/CMakeLists.txt
M llvm/lib/ABI/IRTypeMapper.cpp
M llvm/lib/ABI/TargetInfo.cpp
A llvm/lib/ABI/Targets/X86.cpp
M llvm/lib/ABI/Types.cpp
Log Message:
-----------
[LLVMABI] Implement the System V X86-64 ABI (#194718)
This PR implements the System V X86-64 ABI for the LLVM ABI Library
prototyped in https://github.com/llvm/llvm-project/pull/140112, and
wires it into clang's Codegen.
`X86_64TargetInfo` is a direct parallel to
`clang::CodeGen::X86_64ABIInfo`, but operates entirely on the
`llvm::abi` type system.
The AMD64 ABI classification spec, argument/return lowering , and the
supporting helpers are all reproduced against `llvm::abi::Type` and
FunctionInfo, keeping the ABI logic frontend-independent.
This, similar to the [BPF ABI implementaiton
](https://github.com/llvm/llvm-project/pull/194031/changes)is gated
under the `-fexperimental-abi-lowering` flag.
Commit: d2395c4eea4ac363786c7568eabe2a958c7b7c9c
https://github.com/llvm/llvm-project/commit/d2395c4eea4ac363786c7568eabe2a958c7b7c9c
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/DeclSpec.h
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Sema/DeclSpec.cpp
M clang/test/CXX/dcl.dcl/dcl.spec/dcl.stc/p2.cpp
M clang/test/CXX/dcl.dcl/dcl.spec/dcl.type/dcl.spec.auto/p3-1y.cpp
M clang/test/CXX/dcl.dcl/dcl.spec/dcl.type/dcl.spec.auto/p3-generic-lambda-1y.cpp
M clang/test/CXX/dcl.dcl/dcl.spec/dcl.type/dcl.spec.auto/p3.cpp
M clang/test/CXX/dcl/dcl.fct/p17.cpp
M clang/test/CXX/drs/cwg3xx.cpp
M clang/test/Parser/c2x-auto.c
M clang/test/SemaCXX/auto-cxx0x.cpp
M clang/test/SemaCXX/class.cpp
M clang/test/SemaCXX/static-data-member.cpp
Log Message:
-----------
Revert "[clang] Reject 'auto' storage class with type specifier in C++" (#208436)
Reverts llvm/llvm-project#166004.
Breaks stage 2 build, see comments on PR.
Commit: 099ffad0a794880b647bd82a28ca4f3f6627dcbd
https://github.com/llvm/llvm-project/commit/099ffad0a794880b647bd82a28ca4f3f6627dcbd
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
R llvm/test/CodeGen/X86/combine-pmadd.ll
A llvm/test/CodeGen/X86/combine-pmaddubsw.ll
A llvm/test/CodeGen/X86/combine-pmaddwd.ll
Log Message:
-----------
[X86] combine-pmadd.ll - split into combine-pmaddwd.ll and combine-pmaddubsw.ll (#208430)
Allows better SSE2 test coverage for PMADDWD combines
Commit: 092f4451cecaf52c14f1be6c8741882f0b3c9de6
https://github.com/llvm/llvm-project/commit/092f4451cecaf52c14f1be6c8741882f0b3c9de6
Author: Hans Wennborg <hans at hanshq.net>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M clang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.cpp
M clang-tools-extra/clangd/SemanticHighlighting.cpp
M clang-tools-extra/clangd/refactor/tweaks/DefineInline.cpp
M clang/docs/LibASTMatchersReference.html
M clang/docs/ReleaseNotes.md
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/DeclTemplate.h
M clang/include/clang/AST/JSONNodeDumper.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/include/clang/ASTMatchers/ASTMatchersInternal.h
M clang/include/clang/Basic/Specifiers.h
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTDumper.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/Comment.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclPrinter.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/JSONNodeDumper.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/ASTMatchers/Dynamic/Registry.cpp
M clang/lib/Analysis/ExprMutationAnalyzer.cpp
M clang/lib/CIR/CodeGen/CIRGenVTables.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/Index/IndexingContext.cpp
M clang/lib/InstallAPI/Visitor.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/StaticAnalyzer/Core/BugSuppression.cpp
M clang/lib/Tooling/Syntax/BuildTree.cpp
M clang/test/AST/ast-dump-templates-pattern.cpp
M clang/test/CXX/basic/basic.link/p11.cpp
M clang/test/CXX/drs/cwg18xx.cpp
M clang/test/CXX/drs/cwg7xx.cpp
M clang/test/CXX/temp/temp.arg/temp.arg.template/p3-2a.cpp
M clang/test/CXX/temp/temp.constr/temp.constr.decl/p4.cpp
M clang/test/CXX/temp/temp.decls/temp.spec.partial/temp.spec.partial.member/p2.cpp
M clang/test/CXX/temp/temp.spec/temp.expl.spec/p7.cpp
M clang/test/CodeGenCXX/default-arguments.cpp
M clang/test/CodeGenCXX/explicit-instantiation.cpp
R clang/test/Modules/GH208100.cpp
M clang/test/SemaCXX/GH195416.cpp
M clang/test/SemaCXX/constant-expression-cxx14.cpp
M clang/test/SemaCXX/deduced-return-type-cxx14.cpp
M clang/test/SemaCXX/member-class-11.cpp
R clang/test/SemaTemplate/GH202358.cpp
M clang/test/SemaTemplate/concepts-out-of-line-def.cpp
M clang/test/SemaTemplate/friend-template.cpp
M clang/test/SemaTemplate/instantiate-scope.cpp
M clang/test/Templight/templight-default-func-arg.cpp
M clang/test/Templight/templight-empty-entries-fix.cpp
M clang/tools/libclang/CIndex.cpp
M clang/unittests/AST/ASTImporterTest.cpp
M clang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
Log Message:
-----------
Revert "[clang] Reland: fix getTemplateInstantiationArgs (#208285)" (#208426)
It caused various breakages; see comments on the PR.
This reverts commit 031b773b01700acf82f5977a5aa6024621b8211c.
Commit: 274a34579ffd8bdbe57a58768ec199a6a23f0489
https://github.com/llvm/llvm-project/commit/274a34579ffd8bdbe57a58768ec199a6a23f0489
Author: michaelselehov <michael.selehov at amd.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M clang/lib/Driver/OffloadBundler.cpp
A clang/test/Driver/Inputs/clang-offload-bundler-magic-collision.co
A clang/test/Driver/Inputs/clang-offload-bundler-magic-collision.py
A clang/test/Driver/clang-offload-bundler-magic-collision.c
M llvm/lib/Object/OffloadBundle.cpp
A llvm/test/tools/llvm-objdump/Offloading/fatbin-magic-collision.test
Log Message:
-----------
[OffloadBundler] Bound compressed bundles by header size, not magic scan (#206745)
When multiple offload bundles are concatenated, the unbundler
(clang-offload-bundler) and llvm-objdump --offloading located the end of
a compressed bundle, and the start of the next one, by scanning for the
next "CCOB" magic string starting right after the current header.
A zstd/zlib-compressed payload can legally contain those four bytes, so
the scan could stop in the middle of the compressed data and truncate
the bundle, corrupting the embedded code object. In practice this
produced a "decomposition" failure for hipBLASLt bf16 GEMMs on gfx942.
Use the authoritative total-size field recorded in the compressed bundle
header (format V2/V3) to compute the exact bundle boundary, and only
scan for the next magic past that point. Legacy bundles without a
recorded size (V1) keep the previous magic-scan fallback.
A skippable-frame fixture that embeds "CCOB" inside the compressed
payload is added to exercise the boundary logic from both
clang-offload-bundler and llvm-objdump --offloading.
Commit: c138fc9acfdd34ad674c772dc2433402dc3823fe
https://github.com/llvm/llvm-project/commit/c138fc9acfdd34ad674c772dc2433402dc3823fe
Author: Kunal Pathak <kupathak at meta.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/br-cond-merging-loaded-operands.ll
M llvm/test/CodeGen/AArch64/ragreedy-csr.ll
Log Message:
-----------
[AArch64] Don't merge branch conditions that both compare memory loads (#206504)
`shouldKeepJumpConditionsTogether` decides whether to fold two integer
branch conditions into a CMP/CCMP chain by pricing the RHS
dependency-chain latency. That ignores register pressure: when both
conditions compare loaded values, merging pins all the loaded operands
live at once to feed the chain instead of consuming them at each split
compare-and-branch. On a load-store target that extends their live
ranges across the region the branch dominates.
Decline to merge when both sides are integer compares of loaded values,
mirroring the machine CCMP pass (which won't speculate loads).
Reference:
https://github.com/llvm/llvm-project/pull/201486#issuecomment-4812845942
Commit: 73077ed0279054407517083bfe580b7cb40e864d
https://github.com/llvm/llvm-project/commit/73077ed0279054407517083bfe580b7cb40e864d
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M lldb/test/API/commands/platform/connect/TestPlatformConnect.py
Log Message:
-----------
[lldb][Windows] mark TestPlatformProcessConnect as XFAIL (#208445)
https://github.com/llvm/llvm-project/pull/202688 incorrectly marked
`TestPlatformProcessConnect.py` as PASS on Windows with `lldb-server`.
They do not work and are failing just like with the in process plugin.
Re-mark both of them as XFAIL.
rdar://181797532
Commit: c0ddc3c5ce0eab49e1935a413570afd3bc4adfac
https://github.com/llvm/llvm-project/commit/c0ddc3c5ce0eab49e1935a413570afd3bc4adfac
Author: Fred Tingaud <95592999+frederic-tingaud-sonarsource at users.noreply.github.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/include/llvm/Demangle/Demangle.h
M llvm/include/llvm/Demangle/MicrosoftDemangleNodes.h
M llvm/lib/Demangle/MicrosoftDemangle.cpp
M llvm/lib/Demangle/MicrosoftDemangleNodes.cpp
M llvm/unittests/Demangle/CMakeLists.txt
A llvm/unittests/Demangle/MicrosoftDemangleTest.cpp
Log Message:
-----------
[MSVC][Demangling] Make Microsoft demangling more configurable
The goal for us is to be able to demangle Microsoft mangled function
names toward something that reads more like AST function names and
Itanium demangled names. All defaults remain the same and no existing
code or tool user should be impacted by the change.
* Make the OF_NoTagSpecifier flag accessible from `microsoftDemangle`
* Add a flag to skip the "void" keyword when there is no parameter
* Add a flag to skip the type descriptions
* Respect MSDF_NoCallingConvention with function pointers
* Add unit tests.
Assisted-by: Claude
--
CPP-7550
Commit: 061cd69c466ef49dfaafc81d79875cf2f7afa9fa
https://github.com/llvm/llvm-project/commit/061cd69c466ef49dfaafc81d79875cf2f7afa9fa
Author: Ricardo Jesus <rjj at nvidia.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
A clang/test/Driver/aarch64-nvidia-rigel.c
A clang/test/Driver/print-enabled-extensions/aarch64-rigel.c
M clang/test/Misc/target-invalid-cpu-note/aarch64.c
M llvm/lib/Target/AArch64/AArch64Processors.td
M llvm/lib/TargetParser/Host.cpp
M llvm/test/CodeGen/AArch64/cpus.ll
M llvm/unittests/TargetParser/Host.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[AArch64] Add initial support for -mcpu=rigel. (#208017)
This patch adds support for the NVIDIA Rigel core.
This does not add any special tuning decisions, and those may come
later.
Commit: 31ef7389463b1121ceecced9d8cf68e0b515bc41
https://github.com/llvm/llvm-project/commit/31ef7389463b1121ceecced9d8cf68e0b515bc41
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SMInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/test/MC/AMDGPU/gfx1250_asm_smem.s
M llvm/test/MC/AMDGPU/gfx1250_asm_smem_err.s
Log Message:
-----------
[AMDGPU][GFX1250] Add cpol support for some prefetch instructions (#208368)
Fixes ROCM-27516.
Commit: 700442d9e4312fad3e42860bb19692fff7c94cd6
https://github.com/llvm/llvm-project/commit/700442d9e4312fad3e42860bb19692fff7c94cd6
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/reordered-buildvector-scalars.ll
M llvm/test/Transforms/SLPVectorizer/X86/commutative-copyable-external-phi-use.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-operand-non-scheduled-parent-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/vect_copyable_in_binops.ll
Log Message:
-----------
[SLP]Add AShr as a main opcode for copyables
Added AShr opcode in analysis and minbitwidth analysis
Reviewers: RKSimon, hiraditya, bababuck
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/207841
Commit: 48aade5e5208414693b695b1dfdb6c95ae56ccf6
https://github.com/llvm/llvm-project/commit/48aade5e5208414693b695b1dfdb6c95ae56ccf6
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M libcxx/include/__vector/layout.h
Log Message:
-----------
[libc++][NFC] Fix comment about size-based vector (#208463)
The closing #endif comment was using _LIBCPP_ABI_SIZE_BASED_VECTOR,
which was the name of the macro in previous iterations of the size-based
vector patch. We ended up landing on _LIBCPP_ABI_VECTOR_LAYOUT_SIZE_BASED
instead.
Commit: c09d9a4d03a9211844e146b03ec41f957c74c4b7
https://github.com/llvm/llvm-project/commit/c09d9a4d03a9211844e146b03ec41f957c74c4b7
Author: John Brawn <john.brawn at arm.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/test/Transforms/LoopStrengthReduce/AArch64/vscale-fixups.ll
Log Message:
-----------
[LSR] VScale doesn't occupy a register if it's a legal offset (#206754)
When we have an AddRec where the step value is n*vscale this value
doesn't occupy a register if the target has an add instruction where
this value is a legal offset.
Commit: 883ef1ba1442618938961e8f8e3a6a74f3b7320a
https://github.com/llvm/llvm-project/commit/883ef1ba1442618938961e8f8e3a6a74f3b7320a
Author: eleviant <eleviant at accesssoftek.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Options/Options.td
A clang/test/CodeGen/null-checks.c
Log Message:
-----------
[clang] Don't omit null pointer checks with -fms-compatibility (#204658)
MSVC preserves null check after dereference, e.g
```
struct Obj { int value, extra; };
int null_check_is_kept(Obj* p) {
int v = p->value;
if (p == nullptr)
return -1;
return v + p->extra;
}
```
Also MSVC keeps standard library calls (e.g memcpy), where target is
null pointer.
Commit: 3c849236aef32acf5b974cf0f69005aad8b196c5
https://github.com/llvm/llvm-project/commit/3c849236aef32acf5b974cf0f69005aad8b196c5
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M lldb/include/lldb/Symbol/TypeList.h
M lldb/source/Symbol/TypeList.cpp
Log Message:
-----------
[NFC][lldb] Simplify Typelist::GetTypeAtIndex (#208411)
Access the index value at constant time and use for range for the
`ForEach` functions.
Commit: 178e9ce6ffe031466e0593aede0d5cdf8dd59ec5
https://github.com/llvm/llvm-project/commit/178e9ce6ffe031466e0593aede0d5cdf8dd59ec5
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/test/CodeGen/X86/combine-pmaddwd.ll
Log Message:
-----------
[X86] combine-pmaddwd.ll - add test showing poor codegen when trying to add together VPMADDWD pairs (#208457)
Shows current limitations of combineAddOfPMADDWD - only handles 128-bit
vectors, and the shuffle pattern it generates can be really poor on SSE
targets
Commit: f63a08bcbf763e3ca33afd3ad9850be9b0eca8d3
https://github.com/llvm/llvm-project/commit/f63a08bcbf763e3ca33afd3ad9850be9b0eca8d3
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-reduce-add-subvector.ll
M llvm/test/CodeGen/X86/vector-reduce-add.ll
Log Message:
-----------
[X86] SimplifyDemandedVectorEltsForTargetNode - add general X86ISD::PSADBW handling (#208309)
Extend the existing SimplifyMultipleUseDemandedVectorElts handling to
generic element folding as well.
lowerShuffleAsZeroOrAnyExtend requires an equivalent VZEXT_MOVL fold to
#207031 to stop us prematurely lowering to ZERO_EXTEND_VECTOR_INREG if
we only need the lowest element from a SCALAR_TO_VECTOR/LOAD
Commit: 06c0d1b70402c1c55cdb1975b2a43148dd4fe646
https://github.com/llvm/llvm-project/commit/06c0d1b70402c1c55cdb1975b2a43148dd4fe646
Author: Susan Tan (ス-ザン タン) <zujunt at nvidia.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsTiling.cpp
M mlir/test/Dialect/OpenACC/acc-loop-tiling.mlir
Log Message:
-----------
[flang][acc] Remove dangling operands in OpenACCUtilsTiling (#208261)
When TILE has more dimensions than the loop's collapse count,
uncollapseLoops() synthesizes an inner loop via `createInnerLoop()`,
which
strips gang attributes from it but forgot to clear the gang operand
values. This left the loop with a non-empty gang operand list but no
device-type attribute, causing LoopOp::getGangValue() to dereference a
null attribute and crash with an assertion failure when the loop also
had
`GANG(STATIC:N) (or NUM/DIM)`.
Fix: also clear the gang operands when stripping gang attributes, so the
loop ends up fully gang-free.
Commit: 8a8178e2b89fb649c6f1a11ed0d827f3b5ddfc25
https://github.com/llvm/llvm-project/commit/8a8178e2b89fb649c6f1a11ed0d827f3b5ddfc25
Author: disservin <disservin.social at gmail.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M clang/lib/Parse/ParseStmt.cpp
Log Message:
-----------
[clang][NFC] Fix enum/non-enum conditional warning in ParseStmt Followup (#207503)
Missed two other cases, so a follow up to
https://github.com/llvm/llvm-project/pull/207085
Commit: d68ad9ab736ec65a8addc67655a6b290a7f98307
https://github.com/llvm/llvm-project/commit/d68ad9ab736ec65a8addc67655a6b290a7f98307
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/PointerIntPair.h
M llvm/include/llvm/Analysis/DOTGraphTraitsPass.h
M llvm/include/llvm/CGData/CodeGenData.h
M llvm/include/llvm/CodeGen/LiveInterval.h
M llvm/include/llvm/CodeGen/MachineBasicBlock.h
M llvm/include/llvm/DebugInfo/CodeView/ContinuationRecordBuilder.h
M llvm/include/llvm/DebugInfo/CodeView/TypeHashing.h
M llvm/include/llvm/IR/ModuleSummaryIndex.h
M llvm/include/llvm/IR/ProfileSummary.h
M llvm/include/llvm/Passes/OptimizationLevel.h
M llvm/include/llvm/Support/Alignment.h
M llvm/lib/CGData/CodeGenData.cpp
M llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
M llvm/lib/CodeGen/InterferenceCache.cpp
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.h
M llvm/lib/CodeGen/LiveIntervalCalc.cpp
M llvm/lib/CodeGen/LiveRangeCalc.cpp
M llvm/lib/CodeGen/MachineBasicBlock.cpp
M llvm/lib/DebugInfo/CodeView/ContinuationRecordBuilder.cpp
M llvm/lib/DebugInfo/CodeView/TypeHashing.cpp
M llvm/lib/DebugInfo/CodeView/TypeStreamMerger.cpp
M llvm/lib/IR/ModuleSummaryIndex.cpp
M llvm/lib/Object/MachOUniversalWriter.cpp
M llvm/lib/Passes/OptimizationLevel.cpp
M llvm/lib/ProfileData/ProfileSummaryBuilder.cpp
M llvm/lib/Target/AArch64/AArch64StackTagging.cpp
M llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
M llvm/lib/Target/X86/X86LoadValueInjectionLoadHardening.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/unittests/CodeGen/InstrRefLDVTest.cpp
Log Message:
-----------
[LLVM][NFC] Remove some global constructors (#208407)
Largely by converting relevant functions or variables to constexpr,
changing the type, converting to static locals, or by outright removal.
PunnedPointer assignment can never be constexpr, because std::memcpy is
not constexpr and type punning is not permitted in a constant-evaluated
context.
Commit: 5f896d9aefff377596bea73fd46aa435860c4ff8
https://github.com/llvm/llvm-project/commit/5f896d9aefff377596bea73fd46aa435860c4ff8
Author: Caroline Newcombe <caroline.newcombe at hpe.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/openmp-utils.cpp
R flang/test/Lower/OpenMP/collapse-imperfect-nest.f90
R flang/test/Lower/OpenMP/collapse-loop-transform.f90
M flang/test/Semantics/OpenMP/do-collapse.f90
M flang/test/Semantics/OpenMP/do-concurrent-collapse-60.f90
M flang/test/Semantics/OpenMP/do-concurrent-collapse.f90
M flang/test/Semantics/OpenMP/do08.f90
M flang/test/Semantics/OpenMP/do10.f90
M flang/test/Semantics/OpenMP/do13.f90
M flang/test/Semantics/OpenMP/do15.f90
M flang/test/Semantics/OpenMP/do16.f90
M flang/test/Semantics/OpenMP/do22.f90
R flang/test/Semantics/OpenMP/doacross-nesting-omp60.f90
R flang/test/Semantics/OpenMP/ordered-nesting-omp50.f90
R flang/test/Semantics/OpenMP/ordered-nesting-omp51.f90
Log Message:
-----------
Revert "[flang][OpenMP] Implement collapse for imperfectly nested loops" (#208456)
Reverts llvm/llvm-project#202435
Commit: 365790a7985e9566927c74ca580b7bddb852182a
https://github.com/llvm/llvm-project/commit/365790a7985e9566927c74ca580b7bddb852182a
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
A llvm/test/CodeGen/SPIRV/linkage/link-attribute-numeric-name.ll
A llvm/test/CodeGen/SPIRV/linkage/nameless-kernel-error.ll
Log Message:
-----------
[SPIR-V] Fix truncated LinkageAttributes OpDecorate for numeric-named functions (#207332)
LLVM IR allows functions with numeric names (e.g. `@0`). There function
return empty strings on `getName()`, so emitting a `LinkageAttributes`
decoration for it is meaningless.
Fix: skip emitting the `LinkageAttributes` decoration for non-entry
functions with an empty name. Also add a `report_fatal_error` for the
case where an entry point function has no name, since that is invalid
input.
Commit: 2f79efa26e25e31f99baf4c860d8d58e833cb161
https://github.com/llvm/llvm-project/commit/2f79efa26e25e31f99baf4c860d8d58e833cb161
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
A llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_shader_image_int64/image_int64.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_bindless_images/bindless_images_generic.ll
Log Message:
-----------
[SPIR-V] Tie Int64ImageEXT to R64i/R64ui image format, not sampled type (#203005)
The capability is required by the R64i/R64ui Image Format per
SPV_EXT_shader_image_int64 spec, not by a 64-bit integer sampled type
Related SPIRV-LLVM-Translator PR that fixes this issue there:
https://github.com/KhronosGroup/SPIRV-LLVM-Translator/pull/3773
Commit: f98afd6d04d7091673b745e1c4b47643812075be
https://github.com/llvm/llvm-project/commit/f98afd6d04d7091673b745e1c4b47643812075be
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
A clang/docs/HIPSupport.md
R clang/docs/HIPSupport.rst
A clang/docs/HLSL/HLSLDocs.md
R clang/docs/HLSL/HLSLDocs.rst
M clang/docs/InternalsManual.rst
A clang/docs/LTOVisibility.md
R clang/docs/LTOVisibility.rst
A clang/docs/MSVCCompatibility.md
R clang/docs/MSVCCompatibility.rst
A clang/docs/MisExpect.md
R clang/docs/MisExpect.rst
A clang/docs/Modules.md
R clang/docs/Modules.rst
A clang/docs/OpenCLSupport.md
R clang/docs/OpenCLSupport.rst
A clang/docs/OpenMPSupport.md
R clang/docs/OpenMPSupport.rst
A clang/docs/OverflowBehaviorTypes.md
R clang/docs/OverflowBehaviorTypes.rst
A clang/docs/PointerAuthentication.md
R clang/docs/PointerAuthentication.rst
A clang/docs/SYCLSupport.md
R clang/docs/SYCLSupport.rst
A clang/docs/SafeStack.md
R clang/docs/SafeStack.rst
A clang/docs/SanitizerSpecialCaseList.md
R clang/docs/SanitizerSpecialCaseList.rst
A clang/docs/SanitizerStats.md
R clang/docs/SanitizerStats.rst
A clang/docs/ShadowCallStack.md
R clang/docs/ShadowCallStack.rst
A clang/docs/SourceBasedCodeCoverage.md
R clang/docs/SourceBasedCodeCoverage.rst
A clang/docs/StandardCPlusPlusModules.md
R clang/docs/StandardCPlusPlusModules.rst
A clang/docs/StructureProtection.md
R clang/docs/StructureProtection.rst
A clang/docs/ThinLTO.md
R clang/docs/ThinLTO.rst
A clang/docs/UsersManual.md
R clang/docs/UsersManual.rst
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/Driver/ToolChains/MSVC.cpp
M clang/test/CodeGen/ubsan-type-ignorelist-category.test
Log Message:
-----------
[clang][docs] Rename selected Clang docs {.rst,.md} (#208307)
Tracking issue: https://github.com/llvm/llvm-project/issues/201242
Migration guide docs:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
RFC:
https://discourse.llvm.org/t/rfc-make-myst-markdown-the-llvm-docs-format-rip-rest/90840
This is a rename-only commit that will temporarily break the docs build,
but it will fix after the follow-up PR lands.
Commit: 2e81babdf17d29d2b7e833137f92a598f76a8cbb
https://github.com/llvm/llvm-project/commit/2e81babdf17d29d2b7e833137f92a598f76a8cbb
Author: Stefan Mada <smada at nvidia.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
Log Message:
-----------
[NVVM][MLIR] Fixed valgrind leak in MMAOp (#208063)
MmaOp::getIntrinsicID triggers an uninitialized-read warning under
Valgrind. `intOverflowBehavior` is optional; in the generated selector
its `has_value()` guarded access can be speculatively loaded before the
guard, reading the empty std::optional's uninitialized payload.
The read is benign: the payload is correctly stack-allocated but
uninitialized while empty, and the loaded value is discarded by the
guard, so this is not incorrect / undefined behavior.
This MR keeps the attribute as optional, but the lowering now resolves
it to a concrete value (wrapped when omitted) before calling
getIntrinsicID, so the selector always reads an initialized value.
`wrapped` matches the PTX spec and the existing lowering, where an
omitted attribute already selected the non-satfinite intrinsic;
intrinsic selection and printed IR are unchanged. Documentation updated
to correct the stale default.
Commit: aaad8b002c0ba5f13d5930eae45cbaa1a00e946c
https://github.com/llvm/llvm-project/commit/aaad8b002c0ba5f13d5930eae45cbaa1a00e946c
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M clang/docs/HIPSupport.md
M clang/docs/HLSL/HLSLDocs.md
M clang/docs/LTOVisibility.md
M clang/docs/MSVCCompatibility.md
M clang/docs/MisExpect.md
M clang/docs/Modules.md
M clang/docs/OpenCLSupport.md
M clang/docs/OpenMPSupport.md
M clang/docs/OverflowBehaviorTypes.md
M clang/docs/PointerAuthentication.md
M clang/docs/SYCLSupport.md
M clang/docs/SafeStack.md
M clang/docs/SanitizerSpecialCaseList.md
M clang/docs/SanitizerStats.md
M clang/docs/ShadowCallStack.md
M clang/docs/SourceBasedCodeCoverage.md
M clang/docs/StandardCPlusPlusModules.md
M clang/docs/StructureProtection.md
M clang/docs/ThinLTO.md
M clang/docs/UsersManual.md
Log Message:
-----------
[clang][docs] Rewrite 20 selected Clang docs from reST to Markdown (#208310)
Tracking issue: https://github.com/llvm/llvm-project/issues/201242
Migration guide docs:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
RFC:
https://discourse.llvm.org/t/rfc-make-myst-markdown-the-llvm-docs-format-rip-rest/90840
This change was produced with rst2myst plus LLM cleanups.
I manually paged through all of the linked HTML documents looking for
visual artifacts, and I fixed everything I found.
To reviewers: Please spot check the generated HTML below, and spot check
the diff to look for artifacts. This change is too large to review
everything line-by-line, but if you check 10 pages of documentation, and
only find one migration bug, I hope you think that this is good enough
to land. We have existing reST bugs that this fixes (mostly italic
blocks that should be code font spans).
-----
Links to the updated HTML for validation:
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---------
Co-authored-by: Chris B <chris.bieneman at me.com>
Commit: 5ffb1046335f4c1ecc9f688f1337b31c260f37c8
https://github.com/llvm/llvm-project/commit/5ffb1046335f4c1ecc9f688f1337b31c260f37c8
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/lib/Headers/stdint.h
M clang/test/Preprocessor/init-aarch64.c
M clang/test/Preprocessor/init-riscv.c
M clang/test/Preprocessor/init.c
M clang/test/Preprocessor/stdint.c
Log Message:
-----------
[Clang] Define `__WCHAR_MIN__` and related macros (#208135)
Define `__WCHAR_MIN__`, `__WINT_MIN__`, and `__SIG_ATOMIC_MIN__` for
compatibility with GCC.
This also fixes targets such as `riscv*-netbsd` that define `WCHAR_MIN`
from `__WCHAR_MIN__`.
Reference:
https://gcc.gnu.org/onlinedocs/gcc-16.1.0/cpp/Common-Predefined-Macros.html
Closes #199678
Commit: 9722a2ceddb6e4fc098f89c9c55c5ad7afd1a64c
https://github.com/llvm/llvm-project/commit/9722a2ceddb6e4fc098f89c9c55c5ad7afd1a64c
Author: Kazu Hirata <kazu at google.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M mlir/include/mlir/IR/StorageUniquerSupport.h
Log Message:
-----------
[mlir][IR] Avoid Clang 21 crash during SFINAE overload resolution (#208359)
Clang 21.1.8 segfaults during SFINAE overload resolution for
T::getChecked
when matching non-pointer arguments against an unconstrained
MLIRContext*
parameter.
This patch avoids the crash by adding an explicit SFINAE constraint to
the second overload of StorageUserBase::getChecked, ensuring that it is
only considered when the second argument is convertible to MLIRContext*.
Assisted-by: Antigravity
Commit: d12356dbdcb217b93de0df61a3f76888d7c37420
https://github.com/llvm/llvm-project/commit/d12356dbdcb217b93de0df61a3f76888d7c37420
Author: Yonah Goldberg <ygoldberg at nvidia.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/docs/LangRef.md
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/test/Assembler/atomic.ll
M llvm/test/Assembler/invalid-atomicrmw-add-must-be-integer-type.ll
M llvm/test/Assembler/invalid-atomicrmw-elementwise.ll
M llvm/test/Assembler/invalid-atomicrmw-fadd-must-be-fp-type.ll
M llvm/test/Assembler/invalid-atomicrmw-fsub-must-be-fp-type.ll
M llvm/test/Bitcode/compatibility.ll
M llvm/test/Transforms/AtomicExpand/Mips/atomicrmw-fp.ll
A llvm/test/Transforms/AtomicExpand/Mips/atomicrmw-vector.ll
M llvm/unittests/IR/VerifierTest.cpp
Log Message:
-----------
[IR] Allow integer vector atomicrmw (#190716)
Previously, we allowed floating-point vector atomicrmw, but not
integer-vector atomicrmw. Relax this restriction. By default, integer
vector atomicrmw will cmpxchg expand.
Assisted by AI
Commit: ee5f1f82a8ddb1a30719880f79d5d37a10a163c6
https://github.com/llvm/llvm-project/commit/ee5f1f82a8ddb1a30719880f79d5d37a10a163c6
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV][P-ext] Rewrite intrinsic widening code to be more agnostic to number of operands. NFC (#208335)
Copy the operands to a vector and use a loop to widen them.
Commit: d776ee4d4caedbcc1a02a2a002566f896278b0c2
https://github.com/llvm/llvm-project/commit/d776ee4d4caedbcc1a02a2a002566f896278b0c2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M offload/plugins-nextgen/amdgpu/CMakeLists.txt
Log Message:
-----------
offload: Use amdgpu triple name in plugin build (#208455)
The PGO tests expect the produced filename to match the triple.
The tool pulls the triple name from the binary's triple name, and the
RUN lines expect it to match the triple the build was configured with.
Commit: 7a48c2cb8e505c53e50a74642b0b129303163c6f
https://github.com/llvm/llvm-project/commit/7a48c2cb8e505c53e50a74642b0b129303163c6f
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp
M clang/test/CIR/CodeGen/cross-reference-globals.c
M clang/test/CIR/CodeGen/paren-list-agg-init.cpp
A clang/test/CIR/CodeGen/pointer-to-empty-data-member.cpp
Log Message:
-----------
[CIR] Represent 'empty' fields in structs/unions (#207033)
Since we do field based GEPs, it isn't really possible to do a
get-address-of a field without representing all the fields in a CIR
struct. This patch makes sure we do that, so we can do the proper GEPs.
This patch also as a drive-by fixes the case where we were searching for
the 'path' inside of an empty base, which we don't represent (and
probably should not need to?).
This patch ALSO adds some NYI diagnostics for cases where we try to get
the address of a `no-unique-address` field, which we are not currently
representing. In the future, we are going to have to start representing
no-unique-address fields inside of a struct as well (plus figure out how
to lower it properly in a way that gets the offsets right), but it isn't
clear this is immediately necessary (as you'd have to take an address of
one to notice?).
Commit: a6982e5fc9c92bda7bc80a4aaed8cb9cc2789e20
https://github.com/llvm/llvm-project/commit/a6982e5fc9c92bda7bc80a4aaed8cb9cc2789e20
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll
Log Message:
-----------
[X86] Add v16i16 shuffle tests for "shift + blend" pack patterns (#208481)
Shuffles that could be expanded by shifting one input and blending with
the second inplace input
Commit: 3b2fe66a4eb5fc569cc9a9822440ebe3a1a36f34
https://github.com/llvm/llvm-project/commit/3b2fe66a4eb5fc569cc9a9822440ebe3a1a36f34
Author: Ferran Toda <ferran.todacasaban at bsc.es>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M clang/test/OpenMP/unimplemented_clause_messages.cpp
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Semantics/openmp-modifiers.h
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/check-omp-variant.cpp
M flang/lib/Semantics/openmp-modifiers.cpp
A flang/test/Parser/OpenMP/apply01.f90
A flang/test/Parser/OpenMP/apply02.f90
A flang/test/Semantics/OpenMP/apply01.f90
A flang/test/Semantics/OpenMP/apply02.f90
M llvm/include/llvm/Frontend/Directive/DirectiveBase.td
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/include/llvm/TableGen/DirectiveEmitter.h
M llvm/test/TableGen/directive1.td
M llvm/test/TableGen/directive2.td
M llvm/utils/TableGen/Basic/DirectiveEmitter.cpp
Log Message:
-----------
[Flang][OpenMP] add Apply clause for OpenMP Flang (#204225)
This patch adds a parser and basic checks for the Apply clause from
OpenMP 6.0 in Flang.
It is missing semantic checks for nesting loop transformations that are
being worked on.
Commit: 34bb48e9875a03e418941c17e281076b70b60836
https://github.com/llvm/llvm-project/commit/34bb48e9875a03e418941c17e281076b70b60836
Author: Yuxuan Chen <ych at meta.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M clang/include/clang/Basic/AttrDocs.td
Log Message:
-----------
[clang][docs] Fix coro_await_elidable bullet list rendering (NFC) (#208333)
Add the blank line required before the reStructuredText bullet list and
indent the continuation line for the second item. Without this, the
generated AttributeReference page does not render the
coro_await_elidable safe-elide-context bullets correctly.
Commit: d82a0d29e1bb85304e54767763ef5c036cd5bc5b
https://github.com/llvm/llvm-project/commit/d82a0d29e1bb85304e54767763ef5c036cd5bc5b
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M libcxx/test/std/localization/locale.categories/category.numeric/locale.num.get/facet.num.get.members/get_long.pass.cpp
Log Message:
-----------
[libc++] Add missing <string> include (#208281)
Fixes #182390
Commit: 1df703a6f4cd535e5af49ad15afcc043c68b81ca
https://github.com/llvm/llvm-project/commit/1df703a6f4cd535e5af49ad15afcc043c68b81ca
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Target/BPF/BPFMIPeephole.cpp
Log Message:
-----------
BPF: Remove unnecessary isReg check for copy source (#208486)
Commit: b45d68108a585507789aa26b9e2808d68386dfca
https://github.com/llvm/llvm-project/commit/b45d68108a585507789aa26b9e2808d68386dfca
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M libcxx/utils/ci/buildkite-pipeline.yml
Log Message:
-----------
[libc++] Update the label for FreeBSD in CI to version 15.1 (#205417)
The FreeBSD libc++ CI has been bumped to the new FreeBSD release. The
remaining task to do is to bump the description in CI yaml file.
Commit: 361a3e692d8c52665e9ab54fae70935d2d1cc458
https://github.com/llvm/llvm-project/commit/361a3e692d8c52665e9ab54fae70935d2d1cc458
Author: Kacper Doga <kacper.doga at intel.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/VectorCombine/load-insert-store.ll
Log Message:
-----------
[VectorCombine] Fix bailing out of the foldSingleElementStore with a freeze-pending index (#207702)
`foldSingleElementStore` calls `canScalarizeAccess` to decide whether a
single-element store can be scalarized. When the insert index is not a
constant, is provably in-bounds and may be poison, `canScalarizeAccess`
returns `SafeWithFreeze` and stashes a `ToFreeze` value that must later
be consumed by `freeze()` or cleared by `discard()`.
The bail-out for memory being modified between the load and store was
folded into same condition as the scalarizability check:
```cpp
auto ScalarizableIdx = canScalarizeAccess(...);
if (ScalarizableIdx.isUnsafe() || isMemModifiedBetween(...))
return false;
```
When the index took the `SafeWithFreeze` path and memory was modified
between the load and the store, `isMemModifiedBetween` returns true and
hit `return false` while ScalarizableIdx still holds a live `ToFreeze`.
Its destructor then raises:
> Assertion !ToFreeze && "freeze() not called with ToFreeze being set"
### Fix
Move the `isMemModifiedBetween` bail-out above the `canScalarizeAccess`
call so the freeze-pending result is never constructed on the path where
we give up.
Commit: dd824164c8e7c86cebfea1cf1bf2d92acfd4a9d9
https://github.com/llvm/llvm-project/commit/dd824164c8e7c86cebfea1cf1bf2d92acfd4a9d9
Author: Łukasz Plewa <lukasz.plewa at intel.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M offload/liboffload/API/Memory.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/plugins-nextgen/cuda/dynamic_cuda/cuda.cpp
M offload/plugins-nextgen/cuda/dynamic_cuda/cuda.h
M offload/plugins-nextgen/cuda/src/rtl.cpp
M offload/plugins-nextgen/level_zero/include/L0CmdListManager.h
M offload/plugins-nextgen/level_zero/include/L0Device.h
M offload/plugins-nextgen/level_zero/include/L0Queue.h
M offload/plugins-nextgen/level_zero/src/L0Device.cpp
M offload/unittests/OffloadAPI/CMakeLists.txt
A offload/unittests/OffloadAPI/memory/olMemPrefetch.cpp
Log Message:
-----------
[offload] Add olMemPrefetch to liboffload (#206752)
Adds olMemPrefetch and the OL_MEM_MIGRATION_FLAG_* enum, wired through a
new dataPrefetchImpl on the plugin interface with Level Zero and CUDA
implementations. Backends without prefetch support inherit the default
no-op.
Prefetch is a hint that migrates a USM allocation between the host and a
device so subsequent accesses on the target side are faster.
Assisted-by: Claude
Commit: d4dd90ae4d7a6b559ebc2ef5b75d2eacafadb48f
https://github.com/llvm/llvm-project/commit/d4dd90ae4d7a6b559ebc2ef5b75d2eacafadb48f
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.h
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
Log Message:
-----------
[mlir][tosa] Add constant block scaled support (#205506)
This commit adds support for block scaled tensors.
In particular, the block scaled type has been extended with the
`DenseElementTypeInterface` to allow block scaled data values to be
specified in dense element attributes.
The block scaled type has also been extended to allow optional scale
values to be specified by the type. For now, scale values are not
expected to be propagated beyond their use in the attribute input of a
constant operation. In the future, we may want to propagate these values
to allow certain optimizations.
The `tosa.const` operation has also been updated in the validation pass.
Commit: 494697f79f5f7f6b40b78c8f49a98588ee87f1bd
https://github.com/llvm/llvm-project/commit/494697f79f5f7f6b40b78c8f49a98588ee87f1bd
Author: Akira Hatanaka <ahatanak at gmail.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Basic/CodeGenOptions.h
M clang/include/clang/Basic/TargetInfo.h
M clang/include/clang/Options/Options.td
M clang/lib/Basic/TargetInfo.cpp
M clang/lib/Basic/Targets/OSTargets.h
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/test/CodeGenCXX/dynamic-cast-exact-disabled.cpp
M clang/test/CodeGenCXX/dynamic-cast-exact.cpp
M clang/test/CodeGenCXX/ptrauth-dynamic-cast-exact.cpp
Log Message:
-----------
[CodeGen] Disable exact dynamic_cast for duplicable vtables (#205929)
Add `TargetInfo::getVTableUniqueness()`, which returns a
`VTableUniquenessKind` that describes whether a target's ABI guarantees
a class's vtable has a single address program-wide. Apple Mach-O targets
return `UniqueIfStrongLinkage`, since a vague-linkage (weak) vtable may
be autohidden and duplicated per image, while a vtable with strong
linkage (e.g., a class with a key function) still has a unique address.
Every other target keeps the default, `AlwaysUnique`.
Rename the `CodeGenOpts` flag backing `-f[no-]assume-unique-vtables`
from `AssumeUniqueVTables` to `DisableExactDynamicCast`, defaulting to
false so the optimization stays on unless `-fno-assume-unique-vtables`
is given. Use it together with `getVTableUniqueness()` in
`ItaniumCXXABI::hasUniqueVTablePointer()` so a weak vtable on a target
that may duplicate vtables no longer qualifies for the exact
`dynamic_cast` optimization; a vtable with a key function, or any vtable
on a target with `AlwaysUnique` semantics, is unaffected.
Fixes https://github.com/llvm/llvm-project/issues/120129
rdar://129380573
Commit: ef84e19e3fd3f13ffbc87544054e6605226dfc79
https://github.com/llvm/llvm-project/commit/ef84e19e3fd3f13ffbc87544054e6605226dfc79
Author: David CARLIER <devnexen at gmail.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M compiler-rt/lib/memprof/memprof_allocator.cpp
M compiler-rt/lib/memprof/memprof_mapping.h
M compiler-rt/lib/memprof/tests/CMakeLists.txt
A compiler-rt/lib/memprof/tests/shadow.cpp
Log Message:
-----------
[compiler-rt][memprof] fix off-by-one in shadow access-count accumula… (#208376)
…tion.
GetShadowCount and GetShadowCountHistogram used an inclusive loop up to
MEM_TO_SHADOW(p + size), summing an extra adjacent cell when p + size is
granule-aligned. Use p + size - 1 to stay within the allocation.
Commit: adcd0b736e3b949c71b67c658f4c22242a4f21d1
https://github.com/llvm/llvm-project/commit/adcd0b736e3b949c71b67c658f4c22242a4f21d1
Author: Yair Ben Avraham <yairba at protonmail.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M clang/test/CodeGen/AArch64/neon-2velem.c
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon-scalar-x-indexed-elem.c
M clang/test/CodeGen/AArch64/neon/fused-multiply.c
Log Message:
-----------
[CIR][AArch64] Lower NEON vfms builtins (#207022)
Lower additional AArch64 NEON fused multiply-subtract builtins in CIR.
This covers the ACLE wrappers from section 2.1.1.2.5:
- vfms_f32, vfms_f64, vfmsq_f32, vfmsq_f64
- vfms_lane_f32, vfms_lane_f64, vfmsq_lane_f32, vfmsq_lane_f64
- vfms_laneq_f32, vfms_laneq_f64, vfmsq_laneq_f32, vfmsq_laneq_f64
- vfmss_lane_f32, vfmss_laneq_f32
- vfmsd_lane_f64, vfmsd_laneq_f64
The lowering reuses the existing FMA paths by negating the multiply
operand before emitting llvm.fma. Vector lane forms splat the selected
lane, while scalar lane/laneq forms extract the selected element before
the FMA.
Move the existing ACLE coverage into
clang/test/CodeGen/AArch64/neon/fused-multiply.c and add direct LLVM,
CIR-to-LLVM, and CIR checks. The replaced old-style checks are removed
from the legacy test files.
Part of #185382
Commit: 07d5e0d550985db270e65131add93f8c5fda54dd
https://github.com/llvm/llvm-project/commit/07d5e0d550985db270e65131add93f8c5fda54dd
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M .ci/green-dragon/lldb-windows.groovy
Log Message:
-----------
[lldb][Windows][CI] split steps (#206946)
Split the lldb green-dragon lldb testing steps into 2:
1. Build and run the tests without `lldb-server.exe`
2. Run the tests with `lldb-server.exe`
This gives better separation in the UI and if the first step fails, the
second step will still attempt to run.
Commit: 2ff8ed77e69c82ab7883369c1477bd3157c1d13c
https://github.com/llvm/llvm-project/commit/2ff8ed77e69c82ab7883369c1477bd3157c1d13c
Author: AbdallahRashed <63146988+AbdallahRashed at users.noreply.github.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/PhaseOrdering/X86/pr67803.ll
M llvm/test/Transforms/VectorCombine/AArch64/combine-shuffle-ext.ll
M llvm/test/Transforms/VectorCombine/AArch64/shuffletoidentity.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle-inseltpoison.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle.ll
A llvm/test/Transforms/VectorCombine/X86/shuffletoidentity-bitcast.ll
Log Message:
-----------
[VectorCombine] Handle widening/narrowing bitcasts in foldShuffleToIdentity (#187870)
Track lane indices through vector bitcasts that change element count in
foldShuffleToIdentity. Widening bitcasts (e.g. <2 x i32> -> <4 x i16>)
compress R consecutive destination lanes into one source lane, while
narrowing bitcasts (e.g. <4 x i16> -> <2 x i32>) expand each destination
lane into R source lanes.
Also fix identity check, splat mask, and destination type construction
to use Item.size() instead of Ty->getNumElements(), since the Item
vector changes size when passing through element-count-changing
bitcasts.
Fixes #96884
Commit: 88d548a2b9f53a16e14ad02825df033561b4dde4
https://github.com/llvm/llvm-project/commit/88d548a2b9f53a16e14ad02825df033561b4dde4
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
Log Message:
-----------
[RISCV][P-ext][NFC] Add tests for packed reverse intrinsics (#208484)
Commit: e2a8a741f75304951ea27adeb1da3db8272998fe
https://github.com/llvm/llvm-project/commit/e2a8a741f75304951ea27adeb1da3db8272998fe
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
A libcxx/test/std/containers/sequences/forwardlist/forwardlist.cons/assign_iter_iter.pass.cpp
R libcxx/test/std/containers/sequences/forwardlist/forwardlist.cons/assign_range.pass.cpp
A libcxx/test/std/containers/sequences/forwardlist/forwardlist.cons/ctor_iter_iter.pass.cpp
A libcxx/test/std/containers/sequences/forwardlist/forwardlist.cons/ctor_iter_iter_alloc.pass.cpp
R libcxx/test/std/containers/sequences/forwardlist/forwardlist.cons/range.pass.cpp
R libcxx/test/std/containers/sequences/forwardlist/forwardlist.cons/range_alloc.pass.cpp
A libcxx/test/std/containers/sequences/forwardlist/forwardlist.modifiers/insert_after_iter_iter.pass.cpp
R libcxx/test/std/containers/sequences/forwardlist/forwardlist.modifiers/insert_after_range.pass.cpp
Log Message:
-----------
[libc++][NFC] Rename forward_list constructor tests (#208301)
The forward_list tests historically used "range" to mean an iterator
pair, but we use `iter_iter` pretty consistently elsewhere in the test
suite. Using `range` also makes it confusing with the actual tests for
`_range` operations, like `append_range` or `assign_range`.
Commit: c7cecd8351ca1d50fca0f8526c7701e8de3fe23a
https://github.com/llvm/llvm-project/commit/c7cecd8351ca1d50fca0f8526c7701e8de3fe23a
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M libcxx/test/std/containers/sequences/forwardlist/forwardlist.modifiers/assign_range.pass.cpp
Log Message:
-----------
[libc++] Fix assign_range test for forward_list (#208283)
That test was checking prepend_range instead of assign_range due to a
copy-paste error.
Fixes #74536
Commit: 3a8d8ac23213aa702f0fd08f9ec60e4d068b58e3
https://github.com/llvm/llvm-project/commit/3a8d8ac23213aa702f0fd08f9ec60e4d068b58e3
Author: Alex Crichton <alex at alexcrichton.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M lld/test/wasm/cooperative-threading.s
M lld/wasm/Writer.cpp
Log Message:
-----------
[WebAssembly] Don't use passive segments for bss in coop threads (#208284)
This commit is an update to `wasm-ld`'s behavior with bss data segments
with `--cooperative-threading`. Previously bss segments were forced to
become passive data segments meaning that a `start` function was emitted
with a `memory.fill` that set the required region of memory to 0. This
isn't required for coop threads though because the module is only
instantiated once and the default pattern for memory is 0, so only
special treatment of TLS segments are required.
Commit: 5a2064d4e363533957c953e4e60470811842ffd8
https://github.com/llvm/llvm-project/commit/5a2064d4e363533957c953e4e60470811842ffd8
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/PointerIntPair.h
M llvm/include/llvm/Analysis/DOTGraphTraitsPass.h
M llvm/include/llvm/CGData/CodeGenData.h
M llvm/include/llvm/CodeGen/LiveInterval.h
M llvm/include/llvm/CodeGen/MachineBasicBlock.h
M llvm/include/llvm/DebugInfo/CodeView/ContinuationRecordBuilder.h
M llvm/include/llvm/DebugInfo/CodeView/TypeHashing.h
M llvm/include/llvm/IR/ModuleSummaryIndex.h
M llvm/include/llvm/IR/ProfileSummary.h
M llvm/include/llvm/Passes/OptimizationLevel.h
M llvm/include/llvm/Support/Alignment.h
M llvm/lib/CGData/CodeGenData.cpp
M llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
M llvm/lib/CodeGen/InterferenceCache.cpp
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.h
M llvm/lib/CodeGen/LiveIntervalCalc.cpp
M llvm/lib/CodeGen/LiveRangeCalc.cpp
M llvm/lib/CodeGen/MachineBasicBlock.cpp
M llvm/lib/DebugInfo/CodeView/ContinuationRecordBuilder.cpp
M llvm/lib/DebugInfo/CodeView/TypeHashing.cpp
M llvm/lib/DebugInfo/CodeView/TypeStreamMerger.cpp
M llvm/lib/IR/ModuleSummaryIndex.cpp
M llvm/lib/Object/MachOUniversalWriter.cpp
M llvm/lib/Passes/OptimizationLevel.cpp
M llvm/lib/ProfileData/ProfileSummaryBuilder.cpp
M llvm/lib/Target/AArch64/AArch64StackTagging.cpp
M llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
M llvm/lib/Target/X86/X86LoadValueInjectionLoadHardening.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/unittests/CodeGen/InstrRefLDVTest.cpp
Log Message:
-----------
Revert "[LLVM][NFC] Remove some global constructors" (#208494)
Breaks some buildbots with gcc. Looks like constexpr member definitions
need an extern for old gcc otherwise they get local linkage...
Reverts llvm/llvm-project#208407
Commit: 2a9f19fb5240aa85c4225a5b5737c0eafe94b7ca
https://github.com/llvm/llvm-project/commit/2a9f19fb5240aa85c4225a5b5737c0eafe94b7ca
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M libcxx/docs/Status/Cxx26Issues.csv
M libcxx/test/std/atomics/atomics.types.generic/standard_layout.compile.pass.cpp
M libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/dtor.pass.cpp
Log Message:
-----------
[libc++] Add tests for LWG3949 and mark it as done (#208272)
Closes #105301
Commit: 4e3a68f7b8e4bdc1f16dcf3d322dc4f6750510db
https://github.com/llvm/llvm-project/commit/4e3a68f7b8e4bdc1f16dcf3d322dc4f6750510db
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M libcxx/docs/Status/Cxx26Issues.csv
Log Message:
-----------
[libc++] Mark LWG4276 as complete (#208273)
We already harden std::array<T, 0>::front() and back(), and we have
tests for it.
Closes #171330
Commit: 09197218036b30cd36a490191e84f0aabd523a8d
https://github.com/llvm/llvm-project/commit/09197218036b30cd36a490191e84f0aabd523a8d
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Transforms/MIFOpConversion.cpp
M flang/test/Fir/MIF/coshape.mlir
M flang/test/Fir/MIF/this_image.mlir
M flang/test/Lower/MIF/coshape.f90
M flang/test/Lower/MIF/this_image.f90
Log Message:
-----------
[flang][MIF] Fix COSHAPE and THIS_IMAGE(coarray) type mismatch for non-i64 kinds (#208429)
Both COSHAPE and THIS_IMAGE(coarray [,team]) return integer arrays whose
element type is determined by the Fortran KIND argument (default: i32).
The lowering code was ignoring resultType in both cases and hardcoding
i64, which caused downstream type mismatches:
- COSHAPE: SimplifyHLFIRIntrinsics assertion in PRODUCT(COSHAPE(y)) when
the product input type (i64) did not match the declared result type
(i32).
- THIS_IMAGE(coarray): MLIR verifier error on arith.cmpi with mismatched
operand types (i64 vs i32) in comparisons like THIS_IMAGE(a) /=
[5,0,-7].
Fix: derive eleTy from resultType in both genCoshape and genThisImage
and propagate it into the mif.* op's result type. In MIFOpConversion,
extract a shared convertI64SeqToEleTy helper that post-converts the i64
scratch buffer written by the PRIF runtime into the
declared-element-type buffer when the two types differ. Both
MIFCoshapeOpConversion and MIFThisImageOpConversion call this helper.
Co-authored-by: Claude Opus 4.7 <noreply at anthropic.com>
Commit: 06499c927e5012166f4553c58f8af593521ea14d
https://github.com/llvm/llvm-project/commit/06499c927e5012166f4553c58f8af593521ea14d
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/reduction-root-multiuse-same-opcode.ll
Log Message:
-----------
[SLP][NFC] Add regressed vectorization of reduced values, NFC
Reported in https://github.com/llvm/llvm-project/pull/185320#issuecomment-4925949343
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/208504
Commit: c526d452fc27463ef4b856ba73b529bd47fffa50
https://github.com/llvm/llvm-project/commit/c526d452fc27463ef4b856ba73b529bd47fffa50
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M libcxx/test/benchmarks/algorithms/modifying/remove.bench.cpp
M libcxx/test/benchmarks/algorithms/modifying/replace.bench.cpp
M libcxx/test/benchmarks/algorithms/modifying/transform.binary.bench.cpp
M libcxx/test/benchmarks/algorithms/modifying/transform.unary.bench.cpp
M libcxx/test/benchmarks/algorithms/modifying/unique.bench.cpp
M libcxx/test/benchmarks/algorithms/modifying/unique_copy.bench.cpp
M libcxx/test/benchmarks/algorithms/nonmodifying/adjacent_find.bench.cpp
M libcxx/test/benchmarks/algorithms/nonmodifying/any_all_none_of.bench.cpp
M libcxx/test/benchmarks/algorithms/nonmodifying/count.bench.cpp
M libcxx/test/benchmarks/algorithms/nonmodifying/ends_with.bench.cpp
M libcxx/test/benchmarks/algorithms/nonmodifying/equal.bench.cpp
M libcxx/test/benchmarks/algorithms/nonmodifying/find_end.bench.cpp
M libcxx/test/benchmarks/algorithms/nonmodifying/find_first_of.bench.cpp
M libcxx/test/benchmarks/algorithms/nonmodifying/find_last.bench.cpp
M libcxx/test/benchmarks/algorithms/nonmodifying/fold.bench.cpp
M libcxx/test/benchmarks/algorithms/nonmodifying/is_permutation.bench.cpp
M libcxx/test/benchmarks/algorithms/nonmodifying/mismatch.bench.cpp
M libcxx/test/benchmarks/algorithms/nonmodifying/search.bench.cpp
M libcxx/test/benchmarks/algorithms/nonmodifying/search_n.bench.cpp
M libcxx/test/benchmarks/algorithms/nonmodifying/starts_with.bench.cpp
M libcxx/test/benchmarks/algorithms/sorting/is_sorted.bench.cpp
M libcxx/test/benchmarks/algorithms/sorting/is_sorted_until.bench.cpp
Log Message:
-----------
[libc++] Remove benchmark::DoNotOptimize from custom predicates in benchmarks (#208412)
The point of the custom predicates is to defeat any detection of special
predicates within the library. There isn't much point in adding
`benchmark::DoNotOptimize` on top of that. It can actually hurt, since
it may hide performance changes due to how much/which information we
provide to the compiler.
Commit: 8cc0cd82e1c6c0e6a44cedea74ee623abfd960a3
https://github.com/llvm/llvm-project/commit/8cc0cd82e1c6c0e6a44cedea74ee623abfd960a3
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-reorder-reshuffle.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/unordered-loads-operands.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-shuffle-with-root.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_clear_undefs.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-loads-non-full-reg.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-vf-to-resize.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder_with_external_users.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec3-reorder-reshuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/vect_copyable_in_binops.ll
M llvm/test/Transforms/SLPVectorizer/X86/vectorize-widest-phis.ll
M llvm/test/Transforms/SLPVectorizer/jumbled_store_crash.ll
M llvm/test/Transforms/SLPVectorizer/semanticly-same.ll
Log Message:
-----------
[SLP] Support FAdd/FSub as interchangeable instructions
fadd(x, c) and fsub(x, c) are interchangeable via fadd(x, -c), so treat
them like the existing Add/Sub/Mul/Shl/AShr/And/Or/Xor interchange in
BinOpSameOpcodeHelper. This lets a mixed fadd/fsub bundle vectorize as
a single op instead of needing an alt-shuffle/split node.
Restrict the interchange to a constant RHS. A constant LHS (e.g.
"0.0 - x") cannot be moved to the other opcode without also swapping
the variable operand, which would misalign it against lanes that keep
their native opcode and produce a node too expensive to vectorize.
Reviewers: hiraditya, bababuck, RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/208002
Commit: 5e58aac18704e2c99ec978ebbf2c28ff784ab207
https://github.com/llvm/llvm-project/commit/5e58aac18704e2c99ec978ebbf2c28ff784ab207
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M libc/cmake/modules/prepare_libc_gpu_build.cmake
Log Message:
-----------
[libc] Remove CUDA Toolkit dependency for NVPTX build (#208497)
This was problematic because these CMake headers were never intended to
be used from a GPU target. We had to hack around this to suppress
threads, but all this is used for is getting the default CUDA path, so
just do this directly.
Commit: 8a5e2c2d05cb73696ec3a943eafab00812eaa84c
https://github.com/llvm/llvm-project/commit/8a5e2c2d05cb73696ec3a943eafab00812eaa84c
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
Log Message:
-----------
[VPlan] Fold Plan variable in single user in verifyLastActivLane (NFC) (#208505)
In release builds, the variable is now unused. Sink and inline into
single user to silence warning.
Commit: 00cd65638a7cf6538c50ee7d58b58411942e2e11
https://github.com/llvm/llvm-project/commit/00cd65638a7cf6538c50ee7d58b58411942e2e11
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-doc/support/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysis/Analyses/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysis/SourceTransformation/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/ScalableStaticAnalysis/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/X86/MCTargetDesc/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
Log Message:
-----------
[gn build] Port commits (#208516)
01846f68e5ae
39dcb0ff91b3
5275ff2efaa9
6560fef7724b
cc048e80b670
eba2fde4d540
Commit: cfd73adfe43a6a65fef085859e2632714139e869
https://github.com/llvm/llvm-project/commit/cfd73adfe43a6a65fef085859e2632714139e869
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll
Log Message:
-----------
[X86] lowerShuffleAsDecomposedShuffleMerge - prefer BLEND(X,SHUFFLE(Y)) over UNPCKL(SHUFFLE(X), SHUFFLE(Y)) (#208503)
If blends are cheap and at least one input is a noop - perform a
permute+blend
Commit: 615644763ffcfc939bda59e9f3e71d6e7d9fd264
https://github.com/llvm/llvm-project/commit/615644763ffcfc939bda59e9f3e71d6e7d9fd264
Author: Andrew Haberlandt <ahaberlandt at apple.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/utils/lit/lit/util.py
Log Message:
-----------
lit: Handle permission errors in runCommandCached (#208508)
The downstream swift CI is getting PermissionError instead of
FileNotFoundError for a [couple of
tests](https://ci.swift.org/job/pr-apple-llvm-project-llvm-linux/1819/consoleFull#-556494529d6fdb6cb-f376-4f2e-8bce-d31c7304698b).
I have no idea what is wrong with our CI, but we should be handling
those errors the same way anyway.
Also fix documentation typo.
Commit: a627e7e9c3cc9adab27b1e6ebfd70f40dccacf5c
https://github.com/llvm/llvm-project/commit/a627e7e9c3cc9adab27b1e6ebfd70f40dccacf5c
Author: NeKon69 <nobodqwe at gmail.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/test/Sema/LifetimeSafety/capture-by.cpp
M clang/test/Sema/LifetimeSafety/safety.cpp
M clang/test/SemaCXX/attr-lifetime-capture-by.cpp
Log Message:
-----------
[clang][Sema] Deprecate `global`/`unknown` in `lifetime_capture_by` (#196635)
Earlier, special `lifetime_capture_by` spellings `global` and `unknown`
could conflict with actual parameter names, causing [some
code](https://godbolt.org/z/YWhW1dnoe) to fail to compile.
Because of that, we deprecate those parameters (they can probably be
removed in the near future)
#192102
Assisted-by: GPT-5.4 for cleanup
Commit: 0e8ac33c259a24ff456b8a592f140a350a8363d0
https://github.com/llvm/llvm-project/commit/0e8ac33c259a24ff456b8a592f140a350a8363d0
Author: Folkert de Vries <folkert at folkertdev.nl>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/ldexp-arm64ec.ll
M llvm/test/CodeGen/AArch64/ldexp.ll
M llvm/test/CodeGen/AArch64/llvm.frexp.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/frexp.ll
M llvm/test/CodeGen/X86/ldexp.ll
M llvm/test/CodeGen/X86/llvm.frexp.ll
Log Message:
-----------
[X86][AArch64][SPIRV] add more tests for `ldexp`/`frexp` (#208462)
In preparation of moving the implementation from `LegalizeDAG` into
`ExpandIRInsts`.
Commit: a646503972d92ac73586bb0ecfd44cb045196f30
https://github.com/llvm/llvm-project/commit/a646503972d92ac73586bb0ecfd44cb045196f30
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Analysis/ConstraintSystem.cpp
M llvm/test/Transforms/ConstraintElimination/constraint-overflow.ll
Log Message:
-----------
[ConstraintElim] Skip overflowing row combinations in FM elimination. (#208404)
The constraint system uses 64-bit coefficients and previously aborted
the entire elimination as soon as a single row combination overflowed.
This is unnecessary pessimistic and can lead to lost optimizations if
the system contains constraints with large coefficients which do not
contribute to a particular solution (e.g. signed wrap checks).
Instead, skip only the overflowing row combination and continue.
Compile-time impact is in the noise:
https://llvm-compile-time-tracker.com/compare.php?from=4f41b6be1a89796d6ce89188a4fd4e0cde9d06b7&to=1dedecc1cefea9c94631cdb272717d898ac6696b&stat=instructions:u
PR: https://github.com/llvm/llvm-project/pull/208404
Commit: 44cb124f6052b789832a742f39478d88dc94662a
https://github.com/llvm/llvm-project/commit/44cb124f6052b789832a742f39478d88dc94662a
Author: Akira Hatanaka <ahatanak at gmail.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/CodeGen/ItaniumCXXABI.cpp
A clang/test/CodeGenCXX/construction-vtable-unnamed-addr.cpp
M clang/test/CodeGenCXX/key-function-vtable.cpp
M clang/test/CodeGenCXX/mangle-subst-std.cpp
M clang/test/CodeGenCXX/ptrauth-explicit-vtable-pointer-control.cpp
M clang/test/CodeGenCXX/ptrauth-vtable-virtual-inheritance-thunk.cpp
M clang/test/CodeGenCXX/template-instantiation.cpp
M clang/test/CodeGenCXX/type_visibility.cpp
M clang/test/CodeGenCXX/virt-template-vtable.cpp
M clang/test/CodeGenCXX/visibility.cpp
M clang/test/CodeGenCXX/vtable-assume-load.cpp
M clang/test/CodeGenCXX/vtable-available-externally.cpp
M clang/test/CodeGenCXX/vtable-key-function-ios.cpp
M clang/test/CodeGenCXX/vtable-key-function.cpp
M clang/test/CodeGenCXX/vtt-layout.cpp
Log Message:
-----------
[CodeGen] Mark weak vtables unnamed_addr on duplicable-vtable targets (#205930)
When a target's `getVTableUniqueness()` is `UniqueIfStrongLinkage`, as
on Apple Mach-O, the platform may emit a class's weak vtable as a
separate copy in more than one linkage unit. A symbol that can
legitimately exist at several addresses has no meaningful address, so
such a vtable can be marked `unnamed_addr`.
On Mach-O, a weak vtable that is `unnamed_addr` lowers to a
`.weak_def_can_be_hidden` definition, which the static linker coalesces
and then drops from the dynamic export trie. Keeping these vtables out
of the exported symbol set cuts the work dyld has to do at load time.
#200108 dropped `unnamed_addr` from vtables because the exact
`dynamic_cast` optimization compares an object's vtable pointer against
a known vtable address and depends on that address being unique. Adding
`unnamed_addr` is safe here because that optimization is never performed
for these weak vtables, so nothing relies on them having a unique
address.
rdar://179929460
Commit: 8c009c1e231a7dd1e9866458ef22be67a1f9332d
https://github.com/llvm/llvm-project/commit/8c009c1e231a7dd1e9866458ef22be67a1f9332d
Author: Sean Perry <perry at ca.ibm.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/DeclID.h
M clang/include/clang/AST/Expr.h
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/TargetInfo.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/Basic/TargetInfo.cpp
M clang/lib/Basic/Targets/SystemZ.h
M clang/lib/CodeGen/ABIInfo.cpp
M clang/lib/CodeGen/ABIInfo.h
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/Targets/SystemZ.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/test/CodeGen/SystemZ/zos-abi.c
Log Message:
-----------
[SystemZ][Clang] Add support for the z/OS va_list type (#202397)
On z/OS, the user has a choice between two different va_list formats.
1. (default) uses the __builtin_zos_va_list typedef for va_list, being
added in this change
2. (-D_VARARG_EXT_) uses __builtin_va_list typedef for va_list.
The __builtin_zos_va_list type is `char * [2]`.
This PR adds this type along with the __builtin_zos_va_start(),
__builtin_zos_va_end() & __builtin_zos_va_copy() functions to go with
it.
Commit: e64ddf51e9d5a6b589f59adee05a1f9f4cc95ee1
https://github.com/llvm/llvm-project/commit/e64ddf51e9d5a6b589f59adee05a1f9f4cc95ee1
Author: Philipp Rados <philipp.rados at openchip.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/test/CodeGen/RISCV/stack-offset-large.ll
Log Message:
-----------
[RISCV] Follow-up fix for UB in #208223 (#208507)
Fix the detected UB in the `stack_larger_than_signed_64bit_warning`
test-case. Now just checks that the warning is correctly not emitted.
Commit: f49e384ec7f06d7ee77685a8a5504c86f56f43fd
https://github.com/llvm/llvm-project/commit/f49e384ec7f06d7ee77685a8a5504c86f56f43fd
Author: Artem Kroviakov <71938912+akroviakov at users.noreply.github.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm.mlir
Log Message:
-----------
[MLIR][XeGPU] Disable test execution, allow compilation (#208482)
Commit: cc5f79b3e15268e6c560840bd15c4bfdaa70642d
https://github.com/llvm/llvm-project/commit/cc5f79b3e15268e6c560840bd15c4bfdaa70642d
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/test/Transforms/LoopVectorize/early_exit_with_outer_loop.ll
Log Message:
-----------
Reapply "[VPlan] Refine hasEarlyExit check." (#207838) (#208518)
This reverts commit b69ec1023d6604106cb64f9a6a6b04e9c3e5d533.
Recommit with small fix for potential nullptr dereference.
Original message:
Currently hasEarlyExit misses cases where we have things like dead exit
blocks or simplified the middle block.
Update to check by counting the predecessors.
This fixes a case where we missed properly updating LoopInfo due to
incorrect results.
Fixes https://github.com/llvm/llvm-project/issues/206007.
Commit: 1bd63928e4fcf575d93aaef220c19ca41965e015
https://github.com/llvm/llvm-project/commit/1bd63928e4fcf575d93aaef220c19ca41965e015
Author: Susan Tan (ス-ザン タン) <zujunt at nvidia.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.h
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.cpp
M flang/lib/Optimizer/OpenACC/Support/RegisterOpenACCExtensions.cpp
M flang/test/Fir/OpenACC/offload-livein-value-canonicalization.fir
M mlir/include/mlir/Dialect/OpenACC/OpenACCOpsInterfaces.td
M mlir/lib/Dialect/OpenACC/Transforms/OffloadLiveInValueCanonicalization.cpp
Log Message:
-----------
[flang][acc] Add `OutlineIdentityOperandOpInterface` to hlfir/fir declare (#208091)
Inlining can leave a `fir.declare`'s dummy_scope operand (`!fir.dscope`)
defined outside an OpenACC compute region while the declare itself gets
rematerialized inside, since `fir.dummy_scope` wasn't registered as an
OutlineRematerializationOpInterface candidate.
This dangling, unmappable live-in is illegal for parallelization.
Fix: Added `OutlineIdentityOperandOpInterface`, implemented by
`fir.declare/hlfir.declare`, so `OffloadLiveInValueCanonicalization`
drops their dummy_scope operand (an identity token that must never be
duplicated) instead of cloning it when sinking/rematerializing them into
offload regions.
Commit: 8e0712496c891b8532157156ecacce3e5af89e26
https://github.com/llvm/llvm-project/commit/8e0712496c891b8532157156ecacce3e5af89e26
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
Log Message:
-----------
[InstCombine] Use constant 64-bit indices for CreateExtractElement (NFC) (#208306)
The canonical form preferred by instCombine is to use 64-bit values for
the index when it is a constant for ExtractElement.
Commit: 4aba9d237a1ad07751fff354a56f4f2cf9dfecfe
https://github.com/llvm/llvm-project/commit/4aba9d237a1ad07751fff354a56f4f2cf9dfecfe
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/test/Dialect/Tosa/canonicalize.mlir
Log Message:
-----------
[mlir][tosa] Fold tiled input into binary elementwise operations (#203941)
Canonicalizes explicit broadcasting into implicit broadcasting by
folding the tile input into the binary element-wise operation.
Commit: 5114f5e4269bd7b189b1500889cd88d0d1eff033
https://github.com/llvm/llvm-project/commit/5114f5e4269bd7b189b1500889cd88d0d1eff033
Author: Kyungtak Woo <kevinwkt at google.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M clang/include/clang/AST/Decl.h
M clang/include/clang/Basic/LangOptions.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
A clang/test/CodeGenCXX/defaulted-function-fp-features.cpp
Log Message:
-----------
[Clang][Sema] Ensure explicitly defaulted functions respect FP pragmas from their declaration site (#207429)
Currently, when an explicitly defaulted function is synthesized (e.g.,
at its first use), it erroneously adopts the floating-point (FP) pragma
state of the synthesis site rather than its declaration site. This leads
to mismatched or incorrect FP features being applied to the generated
body, completely ignoring `#pragma STDC FENV_ACCESS` pragmas that were
active when the function was explicitly defaulted.
This change should fix this issue by capturing and restoring the FP
features at the appropriate times.
Fixes #207266
I also added the following fixes to support the above:
- AST Importer Fix: Updated ASTImporter::VisitFunctionDecl to correctly
import FPFeatures and Lookups for defaulted/deleted functions, whereas
before it was silently dropping them.
- AST Version Bump: Bumped VERSION_MAJOR to 39 in ASTBitCodes.h to
reflect the new FunctionDecl binary layout changes in the AST
serialization.
Commit: 64a9e0c2a5301797ca4cc89b9a332f01e34404fe
https://github.com/llvm/llvm-project/commit/64a9e0c2a5301797ca4cc89b9a332f01e34404fe
Author: David Green <david.green at arm.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/GlobalISel/select-arith-extended-reg.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-atomic-load-store.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-atomicrmw.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-bit.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-bitcast-bigendian.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-bitcast.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-br.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-brcond-of-binop.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-bswap.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-build-vector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-cbz.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-cmpxchg.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-concat-vectors.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-const-pool.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-const-vector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-constant.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-ext.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-extload.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-extract-vector-elt-with-extend.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-extract-vector-elt.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-extract.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-fp-index-load.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-frint-nofp16.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-gv-cmodel-large.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-gv-cmodel-tiny.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-hint.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-imm.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-insert-extract.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-insert-vector-elt.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-int-ptr-casts.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-intrinsic-aarch64-hint.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-intrinsic-crypto-aesmc.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-jump-table-brjt-constrain.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-ld2.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-ld4.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-ldaxr-intrin.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-ldxr-intrin.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-load-store-vector-of-ptr.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-load.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-modf.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-neon-vcvtfxu2fp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-ptr-add.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-reduce-add.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-redundant-zext-of-load.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-redundant-zext.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-rev.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-sadde.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-saddo.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-sbfx.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-scalar-merge.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-sextload.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-shuffle-vector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-shufflevec-undef-mask-elt.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-ssube.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-ssubo.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-st2.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-static.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-stlxr-intrin.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-store-truncating-float.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-store.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-stx.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-tbnz-from-cmp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-trn.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-trunc.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-truncstore-atomic.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-uadde.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-uaddo.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-ubfx.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-unmerge.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-usube.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-usubo.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-uzp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-vector-icmp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-vector-shift.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-with-no-legality-check.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-zext-as-copy.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-zextload.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-zip.mir
Log Message:
-----------
[AArch64][GlobalISel] Update scalar types in selection tests. NFC (#208534)
Commit: 16038020c99a9d7058c665ff867b8930dfd5a38e
https://github.com/llvm/llvm-project/commit/16038020c99a9d7058c665ff867b8930dfd5a38e
Author: Ziqing Luo <ziqing_luo at apple.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M clang/lib/ScalableStaticAnalysis/Analyses/SSAFAnalysesCommon.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/SSAFAnalysesCommon.h
Log Message:
-----------
[SSAF] Replace std::set with SetVector for deterministic order of contributor Decls (#208346)
The container `std::set<const NamedDecl *>` created a non-deterministic
traversal order for a contributor's `Decls`, making the resulting
representative `Decls[0]` non-deterministic as well.
Also fix typos in assertion messages.
Follow-up to #204482.
Commit: 72cb2762b2144eec53bfb4a0e7755d5b94ba6841
https://github.com/llvm/llvm-project/commit/72cb2762b2144eec53bfb4a0e7755d5b94ba6841
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Silence warning for unused variable, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/208536
Commit: bba373c7a20c280673035a7ae3c01937ca49ee3b
https://github.com/llvm/llvm-project/commit/bba373c7a20c280673035a7ae3c01937ca49ee3b
Author: Ivan R. Ivanov <iivanov at nvidia.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIRAttr.td
M flang/lib/Lower/CallInterface.cpp
M flang/test/Lower/CUDA/cuda-device-proc.cuf
M flang/test/Lower/CUDA/cuda-libdevice.cuf
M flang/test/Lower/OpenMP/threadprivate-default-clause.f90
Log Message:
-----------
[flang][Lower] Track whether a call to a function is to an intrinsic (#208000)
Add an attribute which indicates that a call is to an intrinsic
function. Intrinsic here means that the function declaration was found
in a module found in the intrinsic path.
This allows us to, when optimizing, make sure that we correctly identify
calls to intrinsic functions whose behaviours we know, and not
user-defined functions whose names happen to match.
Commit: 6b7b8d38d47f091d953080a354692cf4f70bfd17
https://github.com/llvm/llvm-project/commit/6b7b8d38d47f091d953080a354692cf4f70bfd17
Author: Kazu Hirata <kazu at google.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/include/llvm/ProfileData/SampleProf.h
Log Message:
-----------
[SampleProfile] Replace std::set with SmallVector in SortedCallTargetSet (NFC) (#208509)
This patch replaces std::set with SmallVector and llvm::sort in
SortedCallTargetSet and sortCallTargets.
Since the keys in CallTargetMap are already guaranteed to be unique,
using std::set for sorting allocates unnecessary tree nodes on the
heap.
This patch also removes unnecessary const from return-by-value types
to enable move semantics.
Assisted-by: Antigravity
Commit: 5815dfe402a8a6b1e39edb8524fbe4d0eb885feb
https://github.com/llvm/llvm-project/commit/5815dfe402a8a6b1e39edb8524fbe4d0eb885feb
Author: Folkert de Vries <folkert at folkertdev.nl>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/float-to-arbitrary-fp.ll
M llvm/test/CodeGen/X86/llvm.frexp.ll
Log Message:
-----------
[X86] promote f16 `frexp` (#208530)
follow-up to https://github.com/llvm/llvm-project/pull/208462
Using the libcall reduces code size, gives identical output for the full
f16 range, and is apparently quite a bit faster
```
direct f16: 2.067486000 s for 1000 full-range iterations
via f32: 0.714443000 s for 1000 full-range iterations
```
Commit: ed6097402fcfdbd3965471de70304de90f72cea9
https://github.com/llvm/llvm-project/commit/ed6097402fcfdbd3965471de70304de90f72cea9
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
A llvm/test/Analysis/ScalarEvolution/minmax-decomposition-guards.ll
A llvm/test/Transforms/LoopVectorize/early-exit-minmax-trip-count.ll
R llvm/test/Transforms/LoopVectorize/early-exit-umin-trip-count.ll
Log Message:
-----------
[SCEV] Add more tests for reasoning about min/max expressions (NFC) (#208535)
Commit: 3e4f56bdecac68443e37df22965ce47d6b0bd113
https://github.com/llvm/llvm-project/commit/3e4f56bdecac68443e37df22965ce47d6b0bd113
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
Log Message:
-----------
[VPlan] Introduce VPlan-based hasTailFolded helper. (NFC) (#208329)
After having dedicated support for modeling the header mask of a region
created for tail-folding, add a new helper to query if a plan has it's
tail folded, i.e. it has a header mask (materialized or not).
Similarly to https://github.com/llvm/llvm-project/pull/207784, it also
adds a wrapper to LoopVectorizationPlanner that asserts that cost model
and VPlan decision agree. The wrapper should be removed after no
divergence are found.
PR: https://github.com/llvm/llvm-project/pull/208329
Commit: 5a1b669c0ec2d7dd81751932469ac442e3dfc8d5
https://github.com/llvm/llvm-project/commit/5a1b669c0ec2d7dd81751932469ac442e3dfc8d5
Author: Krisitan Erik Olsen <kristian.erik at outlook.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Parse/ParseDecl.cpp
A clang/test/Parser/cxx-missing-semi-crash.cpp
Log Message:
-----------
[clang] Fix crash in DiagnoseMissingSemiAfterTagDefinition for annot_template_id (#208119)
DiagnoseMissingSemiAfterTagDefinition checks whether the token after a
tag definition could be a scope specifier before calling
TryAnnotateCXXScopeToken. It accepted annot_template_id unconditionally,
but TryAnnotateCXXScopeToken asserts that MightBeCXXScopeToken() holds,
which only accepts annot_template_id when followed by ::.
When the token is annot_template_id not followed by :: (e.g. union { }
::foo<int>; where ::foo<int> is annotated as a template-id after a
missing semicolon), the check passes but MightBeCXXScopeToken() returns
false, firing the assertion.
This patch adds the same NextToken().is(tok::coloncolon) guard that
MightBeCXXScopeToken uses for annot_template_id.
Fixes #207992
---------
Co-authored-by: Corentin Jabot <corentinjabot at gmail.com>
Commit: fedcedef0665f3be419baa7c198123fd65b72538
https://github.com/llvm/llvm-project/commit/fedcedef0665f3be419baa7c198123fd65b72538
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll
Log Message:
-----------
[RISCV] Fix incorrect fixed vector lowering for VECTOR_DEINTERLEAVE (#207254)
Partially address #207136
Previously this part of the logic simply converts each operand into
scalable vector and pass on. This will run into problem when the
scalable vector container is larger than the actual fixed vector.
This patch fixes this issue by storing individual fixed vector operands
directly onto the stack, before loading them back with segmented load
just like its scalable vector counterpart
Commit: 1b5d76004bbdcadd3371fea901f36427d3f5303a
https://github.com/llvm/llvm-project/commit/1b5d76004bbdcadd3371fea901f36427d3f5303a
Author: Sirraide <aeternalmail at gmail.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaDeclAttr.cpp
A clang/test/CodeGen/attr-cleanup-duplicate.c
A clang/test/Sema/attr-cleanup-duplicate.c
Log Message:
-----------
[Clang] Fix crash involving `__attribute__((cleanup))` attributes and improve handling of multiple `cleanup` attributes (#207785)
Clang would previously crash on this code:
```c
#define C(x) __attribute__((cleanup(x)))
void foo(double *x) {}
void bar() { C(foo) C(foo) baz8; }
```
Here, we were trying to query properties of `VD->getType()`, which would
crash because type of the variable declaration is null here (because the
user didn’t write a type); avoid this by bailing out early if the
declaration is invalid.
Additionally, this patch fixes a GCC compatibility issue: in code such
as
```c
#define C(x) __attribute__((cleanup(x)))
void f1(double *x);
void f2(double *x);
void bar() { C(f1) C(f2) double x; }
```
Clang would only use the first cleanup attribute, whereas GCC only uses
the last one; I’ve changed our behaviour to match GCC’s and added a
diagnostic that informs the user that only the last cleanup attribute is
actually used.
Fixes #191829.
Commit: 766161cd2fbe851bf1a67abe469269057aa854de
https://github.com/llvm/llvm-project/commit/766161cd2fbe851bf1a67abe469269057aa854de
Author: Christopher Ferris <cferris1000 at users.noreply.github.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M compiler-rt/lib/scudo/standalone/tsd_shared.h
Log Message:
-----------
[scudo] Small refactor of getTSDXXX functions. (#208127)
Small modification in getTSDAndLock() to have a single shared TSD avoid
the tryLock call. Also, remove some unnecessary comments.
Add a DCHECK in getTSDSlow and only check for == 1 since a 0 number of
shared TSDs is not supported.
Commit: 720066abc2ee68efff28cc35c7e6ae40d3a9833f
https://github.com/llvm/llvm-project/commit/720066abc2ee68efff28cc35c7e6ae40d3a9833f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Target/BPF/BPFMIPeephole.cpp
A llvm/test/CodeGen/BPF/mov32-64-subreg-source.mir
Log Message:
-----------
BPF: Fix misfolding subregisters (#208244)
This would end up introducing a copy between registers
with mismatched sizes previously. Defends against verifier
failures in a future change.
The actual transform here should be deleted. Optimizations should
not be trying to introduce SUBREG_TO_REG.
Commit: 8bbb5a875cbc0a5bf6c43b60a7de680ea20715da
https://github.com/llvm/llvm-project/commit/8bbb5a875cbc0a5bf6c43b60a7de680ea20715da
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M .github/workflows/release-llvm-testing-tools.yml
Log Message:
-----------
[Github][TestingTools] Build on multiple platforms
Given we are shipping binaries, the produced packages are arch-specific
so we need to build/cross-compile on all the architectures that we care
about. Start by getting things working on latest MacOS and Windows.
Reviewers: Michael137, ldionne
Pull Request: https://github.com/llvm/llvm-project/pull/190884
Commit: c050a2c677879ab2b53dba4424a1ec814e89314a
https://github.com/llvm/llvm-project/commit/c050a2c677879ab2b53dba4424a1ec814e89314a
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M .ci/green-dragon/lldb-windows.groovy
Log Message:
-----------
Revert "[lldb][Windows][CI] split steps (#206946)" (#208519)
This reverts commit 07d5e0d550985db270e65131add93f8c5fda54dd.
Commit: a1609094a014e13db33796a45e46c96e94561e78
https://github.com/llvm/llvm-project/commit/a1609094a014e13db33796a45e46c96e94561e78
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/include/llvm/MC/MCGOFFAttributes.h
M llvm/include/llvm/MC/MCSectionGOFF.h
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/MC/GOFFObjectWriter.cpp
M llvm/lib/MC/MCAsmInfoGOFF.cpp
M llvm/lib/MC/MCObjectFileInfo.cpp
A llvm/test/CodeGen/SystemZ/zos-align.ll
M llvm/test/CodeGen/SystemZ/zos-section-1.ll
Log Message:
-----------
[SystemZ][z/OS] Honor alignment of global data (#208095)
The alignment of sections is set after the section are created. Thus,
the ED structure set at object construction time is updated with the
current section alignment. This only applies to ED type section. As
result, the alignment of global data is correctly set.
Assisted by: IBM Bob
Commit: 0f9f5a2aba97070971f2d58f2e307f621edf9ada
https://github.com/llvm/llvm-project/commit/0f9f5a2aba97070971f2d58f2e307f621edf9ada
Author: Maryam Moghadas <maryammo at ca.ibm.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M clang/docs/LanguageExtensions.md
A clang/include/clang/Basic/BuiltinsZOS.td
M clang/include/clang/Basic/CMakeLists.txt
M clang/include/clang/Basic/TargetBuiltins.h
M clang/lib/Basic/Targets/SystemZ.cpp
M clang/lib/CodeGen/TargetBuiltins/SystemZ.cpp
M clang/lib/Headers/CMakeLists.txt
A clang/lib/Headers/zos_wrappers/stdlib.h
A clang/test/CodeGen/SystemZ/builtins-zos-cs.c
A clang/test/Headers/Inputs/zos/usr/include/stdlib.h
A clang/test/Headers/zos-cs-wrapper.c
Log Message:
-----------
[z/OS][Clang] Add compare and swap builtin functions (#202362)
Implements the following compare and swap builtins:
```
int __cs(unsigned int *, unsigned int *, unsigned int), 4 byte compare & swap
int __cs1(void* OP1, void* OP2, void* OP3), 4 byte compare & swap
int __csg(void* OP1, void* OP2, void* OP3), 8 byte compare & swap
int __cds1(void* OP1, void* OP2, void* OP3), 8 byte compare & swap
int __cdsg(void* OP1, void* OP2, void* OP3), 16 byte compare & swap
```
The implementation utilizes the llvm cmpxchg intrinsic to generate the
CS instructions, then it generates a store instruction to store OP2 into
OP1, and finally invert the success flag of cmpxchg by an XOR
instruction with 1 and return the flag.
Commit: 509a0b82038d04656eb4c0f172bb8199352b90e9
https://github.com/llvm/llvm-project/commit/509a0b82038d04656eb4c0f172bb8199352b90e9
Author: Lucas Chollet <lucas.chollet at free.fr>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/PrologEpilogInserter.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/test/CodeGen/RISCV/zero-call-used-regs.ll
Log Message:
-----------
[RISCV] Support Zdinx registers in -fzero-call-used-regs (#206323)
First, this patch makes the backend consider GPRF16 and GPRF32 registers
as GPR. These registers are aliases of normal GPR but for use with the
Zdinx extension (floating points instructions on GPR).
Second, it teaches the general -fzero-call-used-regs logic to handle
used registers that span over multiple physical registers. One example
of this is `GPRPair` in the RISC-V backend.
Commit: 68c0f578f9a2118cb6069c10cc96649d5e27e9b6
https://github.com/llvm/llvm-project/commit/68c0f578f9a2118cb6069c10cc96649d5e27e9b6
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 0f9f5a2 (#208562)
This fixes 0f9f5a2aba97070971f2d58f2e307f621edf9ada.
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=0f9f5a2aba97070971f2d58f2e307f621edf9ada
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 351b9682b43376a9beb149e45807366029ced1b1
https://github.com/llvm/llvm-project/commit/351b9682b43376a9beb149e45807366029ced1b1
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
A llvm/test/CodeGen/AMDGPU/strict_fptrunc_bf16.ll
Log Message:
-----------
[AMDGPU] Fix crash on strict fptrunc to bf16 (#208037)
Commit: 5363d61acd674b85b22668a7b5545ff638af7ef3
https://github.com/llvm/llvm-project/commit/5363d61acd674b85b22668a7b5545ff638af7ef3
Author: Kazu Hirata <kazu at google.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/include/llvm/ProfileData/SampleProfWriter.h
M llvm/lib/ProfileData/SampleProfWriter.cpp
Log Message:
-----------
[SampleProfile] Introduce stabilizeTable (NFC) (#208501)
This patch adds stabilizeTable to replace duplicate code involving
O(N) heap allocations and hash lookups. The new helper function
returns pointers to key-value pairs sorted by key.
Since the keys in MapVector are already guaranteed to be unique,
using std::set for sorting allocates unnecessary tree nodes on the
heap.
Assisted-by: Antigravity
Commit: 45f9445107e6acabc93fc47d4222ecfcdb50620d
https://github.com/llvm/llvm-project/commit/45f9445107e6acabc93fc47d4222ecfcdb50620d
Author: Adrian Prantl <aprantl at apple.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M lldb/bindings/interface/SBValueDocstrings.i
Log Message:
-----------
Fix typo (#208560)
Commit: 4ccb701ff80976cd59cfe55198df533f9913f66a
https://github.com/llvm/llvm-project/commit/4ccb701ff80976cd59cfe55198df533f9913f66a
Author: Victor Perez <victor.pc.upm at gmail.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M mlir/lib/Transforms/RemoveDeadValues.cpp
Log Message:
-----------
[mlir][RemoveDeadValues] Use `SymbolUserMap` to avoid quadratic symbol lookups (#205448)
`processFuncOp` previously called `funcOp.getSymbolUses(module)` for
every function, which walks the entire module to find that function's
callers. Since `processFuncOp` runs once per function, the pass was
effectively *O(numFunctions * numOperations)*.
Build a `SymbolUserMap` once up front in `runOnOperation()` and look up
each function's callers in *O(1)*, making the collection phase linear in
the size of the module.
This is behavior-preserving: the map is read only during the
mutation-free collection walk, and all IR erasure happens afterwards in
`cleanUpDeadVals`, so the map cannot become stale while it is in use.
---
**Note:** AI used to generate part of the code in this PR.
Signed-off-by: Victor Perez Carrasco <victor.pc.upm at gmail.com>
Co-authored-by: Víctor Pérez Carrasco <victorperez at fb.com>
Co-authored-by: mlevesquedion <mlevesquedion at meta.com>
Commit: ed907dee954660295f0b7de0587cfbedc708aa7e
https://github.com/llvm/llvm-project/commit/ed907dee954660295f0b7de0587cfbedc708aa7e
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M clang/docs/analyzer/checkers.rst
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLambdaCapturesChecker.cpp
M clang/test/Analysis/Checkers/WebKit/call-args-wtf-containers.cpp
M clang/test/Analysis/Checkers/WebKit/mock-types.h
A clang/test/Analysis/Checkers/WebKit/unchecked-lambda-captures.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures-decl-protects-this-crash.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures.cpp
M clang/test/Analysis/Checkers/WebKit/unretained-lambda-captures-arc.mm
M clang/test/Analysis/Checkers/WebKit/unretained-lambda-captures.mm
Log Message:
-----------
[alpha.webkit.UncheckedLambdaCapturesChecker] Split unchecked lambda capture checker (#201044)
Split alpha.webkit.UncheckedLambdaCapturesChecker off of
UncountedLambdaCapturesChecker, which currently checks for the use of
ref counted objects as well as CheckedPtr capable types unlike all other
WebKit checkers, which only check for one type of smart pointers.
Also improve the wording of the warning text so that it can be easily
extended to support checking for the lambda capturing of raw pointers
and references to CheckedPtr/CheckedRef.
Commit: fdde3c06cf0b62b3c9f553b4234c5ce0eed86451
https://github.com/llvm/llvm-project/commit/fdde3c06cf0b62b3c9f553b4234c5ce0eed86451
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M clang/test/SemaTemplate/concepts-out-of-line-def.cpp
Log Message:
-----------
[Sema] Properly space namespace comments (#208561)
// namespace instead of //namespace.
This is consistent with the LLVM coding standards. We took focus on this
specific case as it was tripping up some of our internal tooling.
Commit: 5b21ec3b69504f2fa3fcd2c91edf1df57130876c
https://github.com/llvm/llvm-project/commit/5b21ec3b69504f2fa3fcd2c91edf1df57130876c
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/benchmarks/CMakeLists.txt
A llvm/benchmarks/writeToOutputInParallel.cpp
M llvm/lib/Support/Unix/Signals.inc
Log Message:
-----------
[Support] Optimize signal handling file removal code (#173586)
clangd/clangd#1787 describes how LLVM's code for removing partially
written files when taking a fatal signal is slower than it should be.
This code was substantially rewritten by JF Bastien in
aa1333a91f8d8a060bcf5 to make it (more) signal-safe.
As written in 2018, the logic always allocates a new node for every file
we attempt to protect, and those nodes are added to a global singly
linked list and never removed. If you open a lot of output files,
suddenly output file opening becomes O(n^2), which is what happened
during clangd indexing.
Removing files on signals in a multi-threaded environment is really
complicated! We can use locks to synchronize between threads that are
writing to the list, but we cannot use locks to synchronize against
re-entrant signals, and we don't have any great tools for masking or
delaying things like SIGTERM. This makes it difficult to assert that we
have the one and only reference to a node, even after removing it from
the linked structure, so we can safely deallocate it.
This implementation sidesteps that problem by reusing nodes on the list
with a null Filename pointer. The Filename is null if the file no longer
needs to be removed. We replace the filename with a different sentinel
while removing files using a CAS operation to simulate a lock acquisition.
* Case 1: This is the normal case, works as intended, the list should
grow in length to the number of concurrently open files that must be
removed on exit, which should be O(# threads)
* Case 2: In this case, the signal handler will leak the filename string
without a GC root for it, which is fine, since we're exiting.
I added a benchmark, and this
change makes it 16x faster, and the profile shows that the time is no
longer mostly spent in this signal handling code.
---------
Co-authored-by: JF Bastien <github at jfbastien.com>
Commit: aa6db49c751b53c27529d1e2830ef06f8d48329e
https://github.com/llvm/llvm-project/commit/aa6db49c751b53c27529d1e2830ef06f8d48329e
Author: Alex Langford <alangford at apple.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M lldb/include/lldb/DataFormatters/TypeCategory.h
M lldb/source/Commands/CommandObjectType.cpp
M lldb/source/DataFormatters/TypeCategory.cpp
Log Message:
-----------
[lldb] Tighten interface for TypeCategoryImpl::AnyMatches (#208321)
The last 2 parameters are never actually used by any caller so they can
be removed. `only_enabled` defaults to `true` but all callers explicitly
set this to false. I removed that and rewrote the body to assume it will
always be false.
Commit: 7ef81943c901b4963f163efe571d7bfa7ced43ff
https://github.com/llvm/llvm-project/commit/7ef81943c901b4963f163efe571d7bfa7ced43ff
Author: Hao Ren <haor at nvidia.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/Reassociate.cpp
Log Message:
-----------
[Reassociate] Compute value ranks iteratively (NFC) (#204952)
ReassociatePass::getRank recursively walks operand def-use chains before
memoizing ranks. For a very deep acyclic chain whose tail feeds a
reassociable operation, this can recurse once per chain element and
overflow the native stack.
Compute ranks with an explicit post-order worklist instead. The worklist
preserves the existing rank calculation and memoization behavior while
bounding native stack use.
Co-authored-by: Justin Fargnoli <jfargnoli at nvidia.com>
Commit: a1fcdd1a7a6943fca3d109a31d4d47d2cbd14e75
https://github.com/llvm/llvm-project/commit/a1fcdd1a7a6943fca3d109a31d4d47d2cbd14e75
Author: Jan Korous <jkorous at apple.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
A clang/include/clang/ScalableStaticAnalysis/SourceTransformation/SARIFTransformationReportFormat.h
M clang/lib/ScalableStaticAnalysis/SourceTransformation/CMakeLists.txt
A clang/lib/ScalableStaticAnalysis/SourceTransformation/SARIFTransformationReportFormat.cpp
M clang/unittests/ScalableStaticAnalysis/CMakeLists.txt
A clang/unittests/ScalableStaticAnalysis/SourceTransformation/SARIFFormatTest.cpp
Log Message:
-----------
[clang][ssaf] Add SARIF transformation-report format (#208327)
Adds the built-in `TransformationReportFormat`, registered under the
file extension `sarif`. The writer drives clang's existing
`SarifDocumentWriter` (`clang/Basic/Sarif.h`) to produce a SARIF 2.1.0
JSON document. The tool driver name is `clang-ssaf`; the long `fullName`
carries the transformation's name.
Token-range `CharSourceRange`s are canonicalized to char ranges via
`clang::Lexer::getAsCharRange` before being attached to results; invalid
ranges (including default-constructed ones) are treated as "no location"
— the writer omits the result's `locations` key rather than fabricating
one. Source edits are not embedded in the report; the writer never emits
a `fix` or `fixes` key.
Anchored via `SSAFSARIFTransformationReportFormatAnchorSource` so static
builds keep the registration.
Assisted-By: Claude Opus 4.7
Commit: 3bdf536992084d0a30efc65f8198549b3a824c56
https://github.com/llvm/llvm-project/commit/3bdf536992084d0a30efc65f8198549b3a824c56
Author: Walnut <ant_b356 at me.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/unittests/SymbolFile/DWARF/CMakeLists.txt
M lldb/unittests/SymbolFile/DWARF/DWARFASTParserClangTests.cpp
A lldb/unittests/SymbolFile/DWARF/Inputs/DW_TAG_variant_rust-test.yaml
Log Message:
-----------
[lldb] Use `llvm::APInt` for `VariantMember` Discriminants (#188487)
resolves #177812
It currently uses a `uint32_t` even though Rust can output 64- and
128-bit discriminants. This became a more obvious issue when Rust
started niche-optimizing based on the capacity of strings (which are
`NoHighBit` values, guaranteed to be less than `u64::MAX / 2`), rather
than the `NonNull` heap pointer. With this optimization, the `None`
variant of strings is 9223372036854775808, which LLDB truncates to 0.
This means whenever the capacity is 0 (e.g. `Some(String::new())`, LLDB
will mistakenly read it as the `None` variant. Additionally, when trying
to determine the `None` variant, lldb will read the discr from memory
correctly (9223372036854775808), and the visualizer scripts will compare
that to the value in the variant name (`$variant$0`), see that it
doesn't match, and incorrectly decides that it must not be the `None`
variant.
This patch simply swaps the `uint32_t` with an `llvm::APInt`.
Sample program:
```rust
#[repr(u128)]
enum BigDiscr {
Value(u64),
None = 0x16151413121110090807060504030201,
}
fn main() {
let big_discr_none = BigDiscr::None;
let big_disr_some = BigDiscr::Value(31);
let some_string = Some(String::from("asdf"));
let some_empty_string = Some(String::new());
let none_string: Option<String> = Option::None;
println!("Hello world!"); // break
}
```
New output without visualizers:
```txt
(sample::BigDiscr) big_discr_none = {
$variants$ = {
$variant$0 = {
$discr$ = 29352461300415899028694309177919734273
value = (__0 = 0)
}
$variant$29352461300415899028694309177919734273 = ($discr$ = 29352461300415899028694309177919734273, value = sample::BigDiscr::None:128 @ 0x000000710a7ff7d0)
}
}
(sample::BigDiscr) big_disr_some = {
$variants$ = {
$variant$0 = {
$discr$ = 0
value = (__0 = 31)
}
$variant$29352461300415899028694309177919734273 = ($discr$ = 0, value = sample::BigDiscr::None:128 @ 0x000000710a7ff7f0)
}
}
(core::option::Option<alloc::string::String>) some_string = {
$variants$ = {
$variant$9223372036854775808 = ($discr$ = 4, value = core::option::Option<alloc::string::String>::None<alloc::string::String>:64 @ 0x000000710a7ff750)
$variant$ = {
value = {
__0 = {
vec = {...}
}
}
}
}
}
(core::option::Option<alloc::string::String>) some_empty_string = {
$variants$ = {
$variant$9223372036854775808 = ($discr$ = 0, value = core::option::Option<alloc::string::String>::None<alloc::string::String>:64 @ 0x000000710a7ff780)
$variant$ = {
value = {
__0 = {
vec = {...}
}
}
}
}
}
(core::option::Option<alloc::string::String>) none_string = {
$variants$ = {
$variant$9223372036854775808 = ($discr$ = 9223372036854775808, value = core::option::Option<alloc::string::String>::None<alloc::string::String>:64 @ 0x000000710a7ff7b8)
$variant$ = {
value = {
__0 = {
vec = {...}
}
}
}
}
}
```
New output with Rust's current visualizers:
```txt
# this one is incorrect because the visualizer scripts are wrong, not because of LLDB.
# the scripts use `GetValue()`, which returns a 64 bit number. They can be modified
# on Rust's end to use `GetData()` instead. The rest work as expected
(sample::BigDiscr) big_discr_none = Value(0) {
0 = 0
}
(sample::BigDiscr) big_disr_some = Value(31) {
0 = 31
}
(core::option::Option<alloc::string::String>) some_string = Some("asdf") {
0 = "asdf" {
[0] = 'a'
[1] = 's'
[2] = 'd'
[3] = 'f'
}
}
(core::option::Option<alloc::string::String>) some_empty_string = Some("") {
0 = ""
}
```
Commit: 0538275eca10798aa0d0dd6261f11fbc7cc9e99e
https://github.com/llvm/llvm-project/commit/0538275eca10798aa0d0dd6261f11fbc7cc9e99e
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M lldb/source/Target/Target.cpp
Log Message:
-----------
[lldb] Don't add the same module to a target twice (#208472)
`Target::GetOrCreateModule` uses `Append`, so a module already in the
target could be added again. Then `RemoveModule` dropped only one,
keeping the module (and its memory-mapped file) alive.
On Windows that mapped file can't be deleted, causing
`TestReplaceDLL.py` to fail with `LLDB_USE_LLDB_SERVER=1`.
This patch uses `AppendIfNeeded` instead.
rdar://181797592
Commit: b0627c0c94bd93b6e9e6dcedb2e7bfa69e6f4052
https://github.com/llvm/llvm-project/commit/b0627c0c94bd93b6e9e6dcedb2e7bfa69e6f4052
Author: Kaitlin Peng <kaitlinpeng at microsoft.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaDecl.cpp
A clang/test/SemaHLSL/Resources/resource_params_noinline.hlsl
M clang/test/SemaHLSL/Resources/unbounded_resource_arrays.hlsl
Log Message:
-----------
[HLSL] Reject unbounded resource array and noinline function resource parameters (#208111)
Fixes #180808.
This issue involved two bugs:
- `noinline` functions accepted resource parameters in the frontend,
which crashed the backend since valid DXIL cannot be generated for
resources passed across a function call. This change adds a new check in
`SemaDecl.cpp` that rejects resource parameters on `noinline` functions,
as well as a new `resource_params_noinline.hlsl` test.
- The check for incomplete resource array parameters queried the array's
element type to decide if it was a resource. When the parameter was the
first use of the resource type, the element was still incomplete and
wouldn't register as a resource, so the check would be skipped and the
compiler would later crash. This change fixes the check to now force
element completion with `isCompleteType` before querying the type, and
updates `unbounded_resource_arrays.hlsl` to test this.
This change also fixes the `unbounded_resource_arrays.hlsl` test in
general; the `not` in the RUN command was inverting the result and
hiding an actual failure (one of the expected error messages was
misspelled).
Assisted by: Github Copilot
Commit: 9dabe383fd71aadb5588d1d5bb2eafe7b6fdf4f2
https://github.com/llvm/llvm-project/commit/9dabe383fd71aadb5588d1d5bb2eafe7b6fdf4f2
Author: Chennes <xuchen359 at gmail.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
M mlir/test/Conversion/VectorToXeGPU/transfer-read-to-xegpu.mlir
M mlir/test/Conversion/VectorToXeGPU/transfer-write-to-xegpu.mlir
Log Message:
-----------
[mlir][xegpu] Fix crash on 0D vector in vector-to-xegpu transfer lowering (#205812)
`transferPreconditions` accepted rank-0 vectors, which then reached
`computeOffsets` and indexed an empty `SmallVector` (`broadcasted[0]`),
asserting `idx < size()` and crashing. For example:
```mlir
vector.transfer_write %arg0, %arg1[%1] : vector<f32>, memref<3xf32>
```
This is valid IR (the verifier accepts it; 0D vector transfers are part
of the vector dialect spec), so the conversion pass should not crash on
it.
Bail out via `notifyMatchFailure` for 0D vectors in the shared
`transferPreconditions`, so both `transfer_read` and `transfer_write`
are left unconverted instead of crashing. This matches how the core
vector lowering already treats 0D transfers as an unsupported corner
case (see `mlir/lib/Dialect/Vector/Transforms/LowerVectorTransfer.cpp`).
Regression tests are added for 0D `transfer_read` and `transfer_write`.
Fixes #205281
Commit: 9cfa768e63f81d91de4c6ceb1a3e101399e2dd99
https://github.com/llvm/llvm-project/commit/9cfa768e63f81d91de4c6ceb1a3e101399e2dd99
Author: Kewen Meng <Kewen.Meng at amd.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M offload/ci/openmp-offload-amdgpu-clang-flang.py
M offload/ci/openmp-offload-amdgpu-libc-runtime.py
M offload/ci/openmp-offload-amdgpu-runtime.py
M offload/cmake/caches/AMDGPUBot.cmake
M offload/cmake/caches/AMDGPULibcBot.cmake
M offload/cmake/caches/FlangOffload.cmake
M offload/cmake/caches/Offload.cmake
Log Message:
-----------
[Offload][CI][AMDGPU] Update build scripts for updated triple (#208568)
As new triple is introduced
https://github.com/llvm/llvm-project/pull/206480, updated the build
scripts accordingly.
Commit: 80d57d10969b7d1cbf20a28470c200d875b89e55
https://github.com/llvm/llvm-project/commit/80d57d10969b7d1cbf20a28470c200d875b89e55
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/Transforms/IPO/Attributor.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/test/Transforms/Attributor/undefined_behavior.ll
Log Message:
-----------
[Attributor] Add remarks when UB is optimized to unreachable (#207864)
These often bite LTO users in surprising and hard-to-debug ways. Adding
remarks to give at least a small bread-crumb as to 'why' we're
optimizing out chunks of code.
Commit: 314576176481027a0cb40790c43b851886ab3c55
https://github.com/llvm/llvm-project/commit/314576176481027a0cb40790c43b851886ab3c55
Author: Zhen Wang <zhenw at nvidia.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
M flang/test/Lower/CUDA/cuda-device-proc.cuf
Log Message:
-----------
[flang][cuda] Fix atomicCAS to return the old value (#208558)
atomicCAS returned cmpxchg's success flag instead of the old value,
breaking spinlock idioms. Extract element 0 (bitcast back for floats).
Commit: 3a3d2cbc194b09e1a8bbbe1d3abb09c268cb3236
https://github.com/llvm/llvm-project/commit/3a3d2cbc194b09e1a8bbbe1d3abb09c268cb3236
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/test/Dialect/XeGPU/propagate-layout-inst-data.mlir
M mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
M mlir/test/Dialect/XeGPU/propagate-layout.mlir
Log Message:
-----------
[mlir][xegpu] Fix expandDim distribution for shape_cast layout inference (#205987)
The expanded dims of a shape_cast collapse are row-major (innermost is
fastest-varying), so sg_layout/lane_layout must be distributed
inner-to-outer rather than outer-to-inner, and jointly with the data
component: distribute sg_data/lane_data first, then stride
sg_layout/lane_layout over the per-dim leftover.
Example — shape_cast [8,32,32] -> [256,32] (consumer lane_layout=[8,4],
lane_data=[2,1], order=[0,1]),
inferred source layout:
before: inst_data=[8,2,4], lane_layout=[8,1,4], lane_data=[1,2,1],
order=[1,0,2] # lanes on slow dim
after: inst_data=[1,16,4], lane_layout=[1,8,4], lane_data=[1,2,1],
order=[1,0,2] # lanes wrap to fast dim
This also fixes wrap-around, e.g. [2,16]->[32] with sg_layout=[4],
sg_data=[4] → sg_layout=[1,4], sg_data=[1,4].
assisted-by-claude
Co-authored-by: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
Commit: e2bd9ce693120b716c7e29e01be78ae7860e6616
https://github.com/llvm/llvm-project/commit/e2bd9ce693120b716c7e29e01be78ae7860e6616
Author: Kewen Meng <Kewen.Meng at amd.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M offload/ci/openmp-offload-amdgpu-clang-flang.py
M offload/ci/openmp-offload-amdgpu-libc-runtime.py
M offload/ci/openmp-offload-amdgpu-runtime.py
M offload/cmake/caches/AMDGPUBot.cmake
M offload/cmake/caches/AMDGPULibcBot.cmake
M offload/cmake/caches/FlangOffload.cmake
M offload/cmake/caches/Offload.cmake
Log Message:
-----------
Revert "[Offload][CI][AMDGPU] Update build scripts for updated triple" (#208583)
Reverts llvm/llvm-project#208568
It breaks bots.
Commit: 2c04b3317301e09403b05ac88c5d69d4bc7fe80f
https://github.com/llvm/llvm-project/commit/2c04b3317301e09403b05ac88c5d69d4bc7fe80f
Author: Anshul Nigham <nigham at google.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/docs/AArch64SME.rst
M llvm/docs/AMDGPU/AMDGPUAsmGFX10.rst
M llvm/docs/AMDGPU/AMDGPUAsmGFX1011.rst
M llvm/docs/AMDGPU/AMDGPUAsmGFX1013.rst
M llvm/docs/AMDGPU/AMDGPUAsmGFX1030.rst
M llvm/docs/AMDGPU/AMDGPUAsmGFX11.rst
M llvm/docs/AMDGPU/AMDGPUAsmGFX12.rst
M llvm/docs/AMDGPU/AMDGPUAsmGFX7.rst
M llvm/docs/AMDGPU/AMDGPUAsmGFX8.rst
M llvm/docs/AMDGPU/AMDGPUAsmGFX9.rst
M llvm/docs/AMDGPU/AMDGPUAsmGFX900.rst
M llvm/docs/AMDGPU/AMDGPUAsmGFX904.rst
M llvm/docs/AMDGPU/AMDGPUAsmGFX906.rst
M llvm/docs/AMDGPU/AMDGPUAsmGFX908.rst
M llvm/docs/AMDGPU/AMDGPUAsmGFX90a.rst
M llvm/docs/AMDGPU/AMDGPUAsmGFX940.rst
M llvm/docs/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack.md
M llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst
M llvm/docs/AMDGPUInstructionNotation.rst
M llvm/docs/AMDGPUInstructionSyntax.rst
M llvm/docs/AMDGPUModifierSyntax.rst
M llvm/docs/AMDGPUOperandSyntax.rst
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/AddingConstrainedIntrinsics.rst
M llvm/docs/AdvancedBuilds.md
M llvm/docs/AliasAnalysis.md
M llvm/docs/Atomics.md
M llvm/docs/BigEndianNEON.rst
M llvm/docs/BitCodeFormat.md
M llvm/docs/BlockFrequencyTerminology.rst
M llvm/docs/BranchWeightMetadata.rst
M llvm/docs/BugLifeCycle.rst
M llvm/docs/BuildingADistribution.md
M llvm/docs/CFIVerify.md
M llvm/docs/CMakePrimer.rst
M llvm/docs/CodeGenerator.md
M llvm/docs/CodingStandards.md
M llvm/docs/CommandGuide/llvm-debuginfo-analyzer.rst
M llvm/docs/CommandGuide/llvm-pdbutil.rst
M llvm/docs/CommandLine.md
M llvm/docs/CompileCudaWithLLVM.rst
M llvm/docs/CompilerWriterInfo.md
M llvm/docs/ConvergenceAndUniformity.rst
M llvm/docs/ConvergentOperations.rst
M llvm/docs/Coroutines.md
M llvm/docs/CoverageMappingFormat.md
M llvm/docs/CycleTerminology.md
M llvm/docs/DTLTO.md
M llvm/docs/DependenceGraphs/index.rst
M llvm/docs/DeveloperPolicy.md
M llvm/docs/DirectX/DXContainer.rst
M llvm/docs/DirectX/DXILArchitecture.rst
M llvm/docs/DirectX/DXILOpTableGenDesign.rst
M llvm/docs/DirectX/DXILResources.rst
M llvm/docs/DirectX/RootSignatures.rst
M llvm/docs/DirectXUsage.rst
M llvm/docs/ExceptionHandling.md
M llvm/docs/Extensions.md
M llvm/docs/FAQ.md
M llvm/docs/FatLTO.rst
M llvm/docs/FaultMaps.rst
M llvm/docs/FuzzingLLVM.rst
M llvm/docs/GarbageCollection.md
M llvm/docs/GetElementPtr.rst
M llvm/docs/GettingStarted.md
M llvm/docs/GettingStartedVS.md
M llvm/docs/GitHub.md
M llvm/docs/GlobalISel/GMIR.rst
M llvm/docs/GlobalISel/GenericOpcode.rst
M llvm/docs/GlobalISel/IRTranslator.rst
M llvm/docs/GlobalISel/MIRPatterns.rst
M llvm/docs/GlobalISel/index.rst
M llvm/docs/GwpAsan.rst
M llvm/docs/HowToReleaseLLVM.rst
M llvm/docs/HowToSetUpLLVMStyleRTTI.rst
M llvm/docs/HowToUpdateDebugInfo.rst
M llvm/docs/HowToUseAttributes.rst
M llvm/docs/HowToUseInstrMappings.rst
M llvm/docs/InstCombineContributorGuide.md
M llvm/docs/InstrProfileFormat.md
M llvm/docs/JITLink.rst
M llvm/docs/KernelInfo.rst
M llvm/docs/LFI.rst
M llvm/docs/LangRef.md
M llvm/docs/LibFuzzer.md
M llvm/docs/LoopTerminology.md
M llvm/docs/MIRLangRef.md
M llvm/docs/MLGO.rst
M llvm/docs/MarkedUpDisassembly.rst
M llvm/docs/MemTagSanitizer.rst
M llvm/docs/MemoryModelRelaxationAnnotations.rst
M llvm/docs/MemorySSA.md
M llvm/docs/MergeFunctions.md
M llvm/docs/MisExpect.rst
M llvm/docs/MyFirstTypoFix.md
M llvm/docs/NVPTXUsage.rst
M llvm/docs/NewPassManager.md
M llvm/docs/ORCv2.rst
M llvm/docs/OptBisect.rst
M llvm/docs/PCSectionsMetadata.rst
M llvm/docs/PDB/CodeViewSymbols.rst
M llvm/docs/PDB/CodeViewTypes.rst
M llvm/docs/PDB/DbiStream.rst
M llvm/docs/PDB/HashTable.rst
M llvm/docs/PDB/ModiStream.rst
M llvm/docs/PDB/MsfFile.rst
M llvm/docs/PDB/PdbStream.rst
M llvm/docs/PDB/TpiStream.rst
M llvm/docs/PDB/index.rst
M llvm/docs/Passes.md
M llvm/docs/Projects.rst
M llvm/docs/Proposals/GitHubMove.rst
M llvm/docs/Proposals/TestSuite.rst
M llvm/docs/Proposals/VariableNames.rst
M llvm/docs/Proposals/VectorPredication.rst
M llvm/docs/RFCProcess.md
M llvm/docs/RISCV/RISCVVectorExtension.rst
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/docs/ReleaseProcess.rst
M llvm/docs/Remarks.rst
M llvm/docs/SPIRVUsage.rst
M llvm/docs/SandboxVectorizer.md
M llvm/docs/ScudoHardenedAllocator.rst
M llvm/docs/SegmentedStacks.rst
M llvm/docs/SphinxQuickstartTemplate.md
M llvm/docs/StackMaps.rst
M llvm/docs/Statepoints.rst
M llvm/docs/SymbolizerMarkupFormat.rst
M llvm/docs/TableGen/BackEnds.rst
M llvm/docs/TableGen/BackGuide.rst
M llvm/docs/TableGen/ProgRef.rst
M llvm/docs/Telemetry.rst
M llvm/docs/TransformMetadata.rst
M llvm/docs/UndefinedBehavior.rst
M llvm/docs/VectorizationPlan.rst
M llvm/docs/Vectorizers.md
M llvm/docs/XRay.rst
M llvm/docs/XRayExample.rst
M llvm/docs/XRayFDRFormat.rst
M llvm/docs/YamlIO.rst
A llvm/docs/_static/LLVMWyvernSmall.png
A llvm/docs/_static/copybutton.css
A llvm/docs/_static/copybutton.js
A llvm/docs/_static/custom.css
M llvm/docs/conf.py
M llvm/docs/tutorial/BuildingAJIT1.rst
M llvm/docs/tutorial/BuildingAJIT2.rst
M llvm/docs/tutorial/BuildingAJIT3.rst
M llvm/docs/tutorial/BuildingAJIT4.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl01.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl02.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl03.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl04.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl05.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl06.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl07.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl08.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl09.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl10.rst
Log Message:
-----------
[Docs] Migrate LLVM docs to furo (#184440)
Implements the proposal at
https://discourse.llvm.org/t/rfc-update-llvm-docs-to-furo-theme/90053
Furo output at https://nigham.github.io/llvm_docs_furo/LangRef.html
- Switched theme to Furo
- Removed `:content` directives from RSTs, since Furo always has a TOC
on the side.
Credits for various pieces of feedback and improvements: @Pierre-vh
@aengelke @slinder1 @jhuber6 @fmayer @llvm/infrastructure-area-team
@petrhosek @rnk @boomanaiden154 (see discussions in the RFC)
Commit: 1eb67aa8bfe49e8f5e926054af899bb56ad4d8f3
https://github.com/llvm/llvm-project/commit/1eb67aa8bfe49e8f5e926054af899bb56ad4d8f3
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M libc/config/baremetal/config.json
Log Message:
-----------
[libc] Disable baremetal modular printf (#208576)
This reverts commit a14d084bbb1a7261d8a71c56120159abb6af330b.
Though the modular printf works as intented, we noticed a few challenges
using this feature. Without diagnostic help it is difficult to
understand which "modules" got linked in and why. Disabling this to be
the default setting until this is sorted.
Commit: 09ad7f10b0e154118e1f356f189e06ebd5bab4e2
https://github.com/llvm/llvm-project/commit/09ad7f10b0e154118e1f356f189e06ebd5bab4e2
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/include/clang/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysis/SourceTransformation/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/ScalableStaticAnalysis/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/ABI/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Demangle/BUILD.gn
Log Message:
-----------
[gn build] Port commits (#208584)
0f9f5a2aba97
a1fcdd1a7a69
c0ddc3c5ce0e
cfa5d6f59db9
Commit: f40ad8fcf0b4914409ce46ef7b5287b8eb4de609
https://github.com/llvm/llvm-project/commit/f40ad8fcf0b4914409ce46ef7b5287b8eb4de609
Author: macurtis-amd <macurtis at amd.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M clang/docs/AMDGPUSupport.rst
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/BuiltinsAMDGPUDocs.td
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
A clang/test/CodeGenOpenCL/builtins-amdgcn-s-buffer-load.cl
A clang/test/SemaOpenCL/builtins-amdgcn-s-buffer-load-error.cl
Log Message:
-----------
[Clang][AMDGPU] Add __builtin_amdgcn_s_buffer_load_<T> (#203352)
Expose `llvm.amdgcn.s.buffer.load` intrinsic overloads for OpenCL via
`__builtin_amdgcn_s_buffer_load_*` builtins.
Function prototypes:
```
<return-type>
__builtin_amdgcn_s_buffer_load_<suffix>(
v4i32 rsrc, // 4-dword buffer resource in SGPRs
int offset, // byte offset from the base of the buffer
int aux); // cache-policy, control flags. Must be compile-time const.
```
Where:
```
return-type suffix
---------------- ------
char i8
unsigned char u8
short i16
unsigned short u16
int i32
half f16
float f32
v2i8 v2i8
v3i8 v3i8
v4i8 v4i8
v2i32 v2i32
v3i32 v3i32
v4i32 v4i32
v8i32 v8i32
v16i32 v16i32
v2f16 v2f16
v3f16 v3f16
v4f16 v4f16
v2f32 v2f32
v3f32 v3f32
v4f32 v4f32
v8f32 v8f32
v16f32 v16f32
```
Commit: 27d83e2795e7ae9f98f695fe5113493a83f46b28
https://github.com/llvm/llvm-project/commit/27d83e2795e7ae9f98f695fe5113493a83f46b28
Author: Wael Yehia <wmyehia2001 at yahoo.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M clang/lib/Basic/Targets/PPC.cpp
M clang/lib/Basic/Targets/PPC.h
M clang/test/Sema/attr-target.c
M llvm/include/llvm/TargetParser/PPCTargetParser.h
M llvm/include/llvm/TargetParser/TargetParser.h
M llvm/lib/TargetParser/PPCTargetParser.cpp
Log Message:
-----------
[AIX] diagnose invalid feature strings on the target attribute (#208059)
Currently, Sema calls `getTargetInfo().isValidFeatureName(S)` to
validate string inputs on the `target` attribute. `PPCTargetInfo`
doesn't override the function and the base class implementation returns
true unconditionally. This results in the FE accepting invalid feature
strings on `target` attribute, and generates invalid target-feature
values in the IR.
Co-authored-by: Wael Yehia <wyehia at ca.ibm.com>
Commit: 880f3d0fbe323abfe225193254244c8163d40712
https://github.com/llvm/llvm-project/commit/880f3d0fbe323abfe225193254244c8163d40712
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/Transforms/XeGPULayoutImpl.h
M mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
M mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
Log Message:
-----------
[mlir][xegpu] Support subgroup layout assignment for scatter stores (#205955)
Add getStoreSubgroupLayouts() to derive the subgroup (sg_layout/sg_data)
anchor layout for store_scatter and store_matrix. It factorizes numSg
into the most balanced sg_layout that divides the workgroup tile with
sg_data a multiple of inst_data (lane_layout * lane_data).
Co-authored-by: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
Commit: b2b67ba3b96d33b5ab71c1ad7f1e529b61f41883
https://github.com/llvm/llvm-project/commit/b2b67ba3b96d33b5ab71c1ad7f1e529b61f41883
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane16.swap.ll
Log Message:
-----------
[GISel] Don't return false when an intrinsic is not supported (#208567)
This will abort immediately by default, which is not ideal.
Commit: f5169f2a5c53ef64c751ccbafa1799f9915b2814
https://github.com/llvm/llvm-project/commit/f5169f2a5c53ef64c751ccbafa1799f9915b2814
Author: halbi2 <hehiralbi at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M libcxx/include/__vector/vector.h
M libcxx/include/__vector/vector_bool.h
M libcxx/include/deque
M libcxx/include/forward_list
M libcxx/include/list
M libcxx/include/map
M libcxx/include/set
M libcxx/include/unordered_map
M libcxx/include/unordered_set
M libcxx/include/vector
M libcxx/test/std/containers/associative/map/map.cons/iter_iter_comp_alloc.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/iter_iter_comp_alloc.pass.cpp
M libcxx/test/std/containers/associative/multiset/multiset.cons/iter_iter_alloc.pass.cpp
M libcxx/test/std/containers/associative/set/set.cons/iter_iter_alloc.pass.cpp
M libcxx/test/std/containers/sequences/deque/deque.cons/size.pass.cpp
M libcxx/test/std/containers/sequences/forwardlist/forwardlist.cons/size.pass.cpp
M libcxx/test/std/containers/sequences/list/list.cons/size_type.pass.cpp
M libcxx/test/std/containers/sequences/vector.bool/construct_size.pass.cpp
M libcxx/test/std/containers/sequences/vector/vector.cons/construct_size.pass.cpp
M libcxx/test/std/containers/unord/unord.map/unord.map.cnstr/init_size_allocator.pass.cpp
M libcxx/test/std/containers/unord/unord.map/unord.map.cnstr/init_size_hash_allocator.pass.cpp
M libcxx/test/std/containers/unord/unord.map/unord.map.cnstr/iter_iter_size_allocator.pass.cpp
M libcxx/test/std/containers/unord/unord.map/unord.map.cnstr/iter_iter_size_hash_allocator.pass.cpp
M libcxx/test/std/containers/unord/unord.map/unord.map.cnstr/size_allocator.pass.cpp
M libcxx/test/std/containers/unord/unord.map/unord.map.cnstr/size_hash_allocator.pass.cpp
M libcxx/test/std/containers/unord/unord.multimap/unord.multimap.cnstr/init_size_allocator.pass.cpp
M libcxx/test/std/containers/unord/unord.multimap/unord.multimap.cnstr/init_size_hash_allocator.pass.cpp
M libcxx/test/std/containers/unord/unord.multimap/unord.multimap.cnstr/iter_iter_size_allocator.pass.cpp
M libcxx/test/std/containers/unord/unord.multimap/unord.multimap.cnstr/iter_iter_size_hash_allocator.pass.cpp
M libcxx/test/std/containers/unord/unord.multimap/unord.multimap.cnstr/size_allocator.pass.cpp
M libcxx/test/std/containers/unord/unord.multimap/unord.multimap.cnstr/size_hash_allocator.pass.cpp
M libcxx/test/std/containers/unord/unord.multiset/unord.multiset.cnstr/init_size_allocator.pass.cpp
M libcxx/test/std/containers/unord/unord.multiset/unord.multiset.cnstr/init_size_hash_allocator.pass.cpp
M libcxx/test/std/containers/unord/unord.multiset/unord.multiset.cnstr/iter_iter_size_allocator.pass.cpp
M libcxx/test/std/containers/unord/unord.multiset/unord.multiset.cnstr/iter_iter_size_hash_allocator.pass.cpp
M libcxx/test/std/containers/unord/unord.multiset/unord.multiset.cnstr/size_allocator.pass.cpp
M libcxx/test/std/containers/unord/unord.multiset/unord.multiset.cnstr/size_hash_allocator.pass.cpp
M libcxx/test/std/containers/unord/unord.set/unord.set.cnstr/init_size_allocator.pass.cpp
M libcxx/test/std/containers/unord/unord.set/unord.set.cnstr/init_size_hash_allocator.pass.cpp
M libcxx/test/std/containers/unord/unord.set/unord.set.cnstr/iter_iter_size_allocator.pass.cpp
M libcxx/test/std/containers/unord/unord.set/unord.set.cnstr/iter_iter_size_hash_allocator.pass.cpp
M libcxx/test/std/containers/unord/unord.set/unord.set.cnstr/size_allocator.pass.cpp
M libcxx/test/std/containers/unord/unord.set/unord.set.cnstr/size_hash_allocator.pass.cpp
Log Message:
-----------
[libc++] Enable missing allocator constructors in C++11 (#204845)
LWG2210 was a patch to N2554 (C++11) which added missing
allocator-extended constructors to various containers. When LWG2210 was
implemented, the constructors were gated with C++14. However, we
normally apply LWG issue resolutions as DRs.
This patch enables these constructors in C++11 mode too.
Fixes #204843
---------
Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>
Co-authored-by: A. Jiang <de34 at live.cn>
Commit: 76066e5867611b7ed87e4f8eb8f18dc6ec479855
https://github.com/llvm/llvm-project/commit/76066e5867611b7ed87e4f8eb8f18dc6ec479855
Author: Jared Wyles <jared.wyles at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
A orc-rt/include/orc-rt-utils/CommandLine.h
M orc-rt/test/unit/CMakeLists.txt
A orc-rt/test/unit/CommandLineTest.cpp
Log Message:
-----------
[orc_rt] adding a very simple CLI flags parser in (#172987)
Adds orc_rt::CommandLineParser, a small header-only option parser in
orc-rt-utils for use by orc-rt tools that need argument handling.
Features:
- Long (--name, --name=value) and short (-n, -nvalue) options.
- Short-flag clustering (e.g. -vp9999) and "--" to terminate option
parsing, with remaining tokens collected as positionals.
- Typed values, with parse failures returning an orc_rt::Error.
- printHelp() with aligned, optionally short-name-aware output.
Values are bound to caller-owned storage supplied at registration time and
reset to their defaults on each parse().
Also adds CommandLineTest.cpp to the CoreTests unittest and fixes the
indentation of the docs subdirectory guard in orc-rt/CMakeLists.txt.
Commit: 15f7d143d6d61a6d3358144af611a1210eca2357
https://github.com/llvm/llvm-project/commit/15f7d143d6d61a6d3358144af611a1210eca2357
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M lldb/include/lldb/Host/JSONTransport.h
A lldb/include/lldb/Protocol/MCP/Client.h
M lldb/source/Protocol/MCP/CMakeLists.txt
A lldb/source/Protocol/MCP/Client.cpp
M lldb/source/Protocol/MCP/Protocol.cpp
M lldb/unittests/Host/JSONTransportTest.cpp
M lldb/unittests/Protocol/CMakeLists.txt
A lldb/unittests/Protocol/MCPClientTest.cpp
M lldb/unittests/Protocol/ProtocolMCPTest.cpp
M lldb/unittests/TestingSupport/Host/JSONTransportTestUtilities.h
Log Message:
-----------
[lldb] Add an MCP client and asynchronous request binding (#208371)
This PR contains the groundwork to convert lldb-mcp from a naive
forwarder into a multiplexer. This requires acting both an MCP server
and MCP client.
This PR adds a new MCP Client abstraction, a thin wrapper over
MCPTransport and MCPBinder exposing the protocol's requests as typed
asynchronous calls. BindAsync hands an incoming-request handler a Reply
it may invoke later.
This PR also makes fromJSON symmetric with toJSON for
ServerCapabilities. The former only restored supportsToolsList and
silently dropped the resources, completions and logging capabilities, so
a client parsing an initialize result never saw them.
Assisted-by: Claude
Commit: 964cd4d79b6396250ec6c1bd1a6a60ae18e2b392
https://github.com/llvm/llvm-project/commit/964cd4d79b6396250ec6c1bd1a6a60ae18e2b392
Author: Younes Yazami <younes.elidrissiyazami at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerVGPREncoding.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
Log Message:
-----------
[AMDGPU] [NFC] Init pointers, widen mask complements (#208469)
- Initialize local pointers before use, silencing uninitialized local
pointer warnings.
- Compute mask complements at 64 bits to avoid zero-extending the result
from a type to a type of greater size and dropping high bits.
Commit: 2370ce38cbe05ccc922a7bee980bba34bb084331
https://github.com/llvm/llvm-project/commit/2370ce38cbe05ccc922a7bee980bba34bb084331
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt-c/Logging.h
Log Message:
-----------
[orc-rt] Expand 'extern "C"' guard coverage in Logging.h. NFC. (#208596)
We'll be adding more APIs here soon -- the 'extern "C"' guards should
cover the whole header.
Commit: 9141f715500fecff8e3209b8f8da93715fecb5ca
https://github.com/llvm/llvm-project/commit/9141f715500fecff8e3209b8f8da93715fecb5ca
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaTemplate.cpp
M clang/test/CXX/drs/cwg5xx.cpp
M clang/test/SemaCXX/typo-correction.cpp
Log Message:
-----------
[clang] fix typo-correction for template name lookup (#208586)
Only consider candidates which are templates.
Disable spell checking for a DR test in order to not introduce noise, as
spell checking is never helpful in those.
Fixes #207498
Commit: 8b38729f1a655bdb2595c1e9c157b9a0312486c8
https://github.com/llvm/llvm-project/commit/8b38729f1a655bdb2595c1e9c157b9a0312486c8
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefMemberChecker.cpp
M clang/test/Analysis/Checkers/WebKit/unchecked-members-objc.mm
M clang/test/Analysis/Checkers/WebKit/unchecked-members.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-members-objc.mm
M clang/test/Analysis/Checkers/WebKit/uncounted-members-ref-deref-on-diff-classes.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-members.cpp
M clang/test/Analysis/Checkers/WebKit/unretained-members-arc.mm
M clang/test/Analysis/Checkers/WebKit/unretained-members.mm
Log Message:
-----------
[webkit.NoUncountedMemberChecker] Improve the warning text (#204557)
This PR aligns NoUncountedMemberChecker and its variant's warning
message with the new warning format in
https://github.com/llvm/llvm-project/pull/202724.
Commit: e898ca97c55f31428719a51179c4e5e2ff89e9e8
https://github.com/llvm/llvm-project/commit/e898ca97c55f31428719a51179c4e5e2ff89e9e8
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt-c/Logging.h
Log Message:
-----------
[orc-rt] Apply orc_rt_log_* naming convention to Logging.h. NFC. (#208599)
orc_rt_ is the top-level C namespace and orc_rt_log_ a nested namespace
for logging. Following the C API convention, types, values, and
variables are PascalCase and functions are camelCase (as in LLVM).
Commit: ac78ce369272ea46ceb8b00f762c496ecd40cb19
https://github.com/llvm/llvm-project/commit/ac78ce369272ea46ceb8b00f762c496ecd40cb19
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/Analysis/AliasAnalysis.h
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/lib/Optimizer/Transforms/LoopInvariantCodeMotion.cpp
A flang/unittests/Optimizer/AliasAnalysisCacheTest.cpp
M flang/unittests/Optimizer/CMakeLists.txt
Log Message:
-----------
[flang][AliasAnalysis] Add opt-in getSource memoization cache (#208319)
Add an opt-in cache to fir::AliasAnalysis that memoizes getSource()
results keyed on (value, flags). Caching is off by default and turned on
via enableSourceCache(); getSource() becomes a thin wrapper over the
uncached getSourceImpl(). The cache is a frozen snapshot with no
automatic invalidation and lives no longer than the AliasAnalysis
instance, so a client enables it only for a region in which it does not
mutate IR in a way that would change a source.
Flang's LICM enables the cache on its fir::AliasAnalysis before adding
it to the mlir::AliasAnalysis aggregate: LICM only moves operations, so
getSource()'s inputs are unchanged across the hoists, and the pass
manager drops the analysis (and its cache) after the pass.
Add a unit test covering the default-off behavior, cache fill/hit, and
that disableSourceCache() clears and bypasses the cache.
Assisted-by: Cursor
Commit: f348b0d2e72777f0f3de9180fa7ca80f39e62ef1
https://github.com/llvm/llvm-project/commit/f348b0d2e72777f0f3de9180fa7ca80f39e62ef1
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/flang/unittests/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes ac78ce3 (#208600)
This fixes ac78ce369272ea46ceb8b00f762c496ecd40cb19.
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=ac78ce369272ea46ceb8b00f762c496ecd40cb19
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 21edbeac33964ec9e38209b40abfb40cbde95075
https://github.com/llvm/llvm-project/commit/21edbeac33964ec9e38209b40abfb40cbde95075
Author: vporpo <vasileios.porpodas at amd.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Legality.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/LegalityTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SchedulerTest.cpp
Log Message:
-----------
[SandboxVec][Scheduler][NFC] Add direction arg to Scheduler constructor (#208602)
With this patch we require the user to set the scheduling direction
during construction. The direction used to default to BottomUp which
would cause crashes if the user had forgotten to set the direction and
attempt to scheduler top-down.
Also drop Scheduler::setDirection() as there is no longer a need for it.
Commit: f1daa4cd537799edcd2984b09ab59e0f9e00e2bf
https://github.com/llvm/llvm-project/commit/f1daa4cd537799edcd2984b09ab59e0f9e00e2bf
Author: Hongjune Kim <hongjune.kim at intel.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/Passes.h
M llvm/lib/CodeGen/BranchFolding.cpp
M llvm/lib/CodeGen/BranchFolding.h
A llvm/test/CodeGen/AArch64/branch-folder-hoist-disable.mir
A llvm/test/CodeGen/AArch64/branch-folder-reorder-disable.mir
Log Message:
-----------
[CodeGen][BranchFolding] Add options to control common hoisting and block reordering (#205704)
The BranchFolder pass performs several independent optimizations: tail
merging, common-code hoisting, and branch optimization (which includes
basic-block reordering). Currently only tail merging is individually
controllable -- it is disabled for targets that require a structured
CFG,
because tail merging can make the CFG irreducible. Common-code hoisting
and
basic-block reordering always run whenever the pass executes.
Those two sub-phases do not change CFG edges (so they cannot affect
reducibility); they only change block layout. A target whose register
allocation is sensitive to the final block layout may need the rest of
branch folding while suppressing reordering and/or hoisting. This is a
layout / register-allocation concern, distinct from the structured-CFG
(reducibility) concern that gates tail merging.
This change makes common-code hoisting and basic-block reordering
individually controllable:
- BranchFolder gains an EnableBasicBlockReordering flag (with a
setBasicBlockReordering() setter) that gates the two block-reordering
transforms in OptimizeBlock.
- BranchFolderLegacy gains constructor parameters for both sub-phases,
and a
createBranchFolder(EnableCommonHoist, EnableBasicBlockReordering)
factory
is exposed so a target can request a safe subset from its pass pipeline.
- Two hidden command-line flags, -branch-folder-hoist-common-code and
-branch-folder-reorder-blocks, override the configured values at the
start
of OptimizeFunction (mirroring -enable-tail-merge).
Defaults enable both sub-phases, so existing behavior is unchanged for
all
in-tree targets.
New MIR tests exercise each flag via -run-pass=branch-folder.
Co-Authored-By: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
Commit: 10b965f0788ac4cf9a2c9ebd6c65d433aad19729
https://github.com/llvm/llvm-project/commit/10b965f0788ac4cf9a2c9ebd6c65d433aad19729
Author: Sirraide <aeternalmail at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/lib/Frontend/ASTUnit.cpp
M clang/unittests/Frontend/ASTUnitTest.cpp
Log Message:
-----------
[Clang] ASTUnit should use the CompilerInstance's CodeGenOptions (#195338)
Currently, `ASTUnit::LoadFromCompilerInvocation()` just calls the
constructor of `ASTUnit`, which default-constructs a `CodeGenOptions`
instance. The options from the `CompilerInstance` are never actually
saved in the `ASTUnit`. As a result, serialising the `ASTUnit` ends up
serialising the default-constructed `CodeGenOptions` rather than the
_actual_ `CodeGenOptions`.
This is problematic if you attempt to do the following:
1. Call e.g. `buildASTFromCodeWithArgs()` to build an `ASTUnit`
2. Serialise that `ASTUnit`.
3. Call e.g. `buildASTFromCodeWithArgs()` again with the exact same
arguments and add use the first `ASTUnit` as a PCH using `-include-pch`.
This causes Clang to error because the `CodeGenOptions` we deserialised
for the first `ASTUnit` (the default-constructed ones) are incompatible
with the `CodeGenOptions` implicitly created for the second TU (which
were created by the `CompilerInstance` and potentially modified due to
command-line argument parsing)... despite the fact that we basically
just attempted to build two TUs with the same arguments.
To fix this, copy the `CodeGenOptions` from the `CompilerInstance` into
the `ASTUnit`.
Commit: 089c9c1c3ede224bdc79510d09e779922d46388c
https://github.com/llvm/llvm-project/commit/089c9c1c3ede224bdc79510d09e779922d46388c
Author: disservin <disservin.social at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M clang/test/CodeGen/builtin-cpu-supports-all.c
M clang/test/CodeGen/target-builtin-noerror.c
M clang/test/Driver/x86-target-features.c
M clang/test/Preprocessor/x86_target_features.c
Log Message:
-----------
[clang] Add -mavx512bmm flag (#208520)
https://github.com/llvm/llvm-project/pull/182556 missed the addition of
the -mavx512bmm flag
Commit: 43e98b2e08ec8d012e4aa442392c1d204650d471
https://github.com/llvm/llvm-project/commit/43e98b2e08ec8d012e4aa442392c1d204650d471
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-07-09 (Thu, 09 Jul 2026)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Driver/bbc-implicit-use-module.f90
M flang/tools/bbc/bbc.cpp
Log Message:
-----------
[flang] Do not implicitly use module when processing the module (#208582)
https://github.com/llvm/llvm-project/pull/207824 Added ability to use
implicitly a module. The use should not happen while processing the
module used implicitly.
Commit: 54627d80f511def8b7a9baf55a784a22e101a1af
https://github.com/llvm/llvm-project/commit/54627d80f511def8b7a9baf55a784a22e101a1af
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rvp-zip.ll
Log Message:
-----------
[RISCV][P-ext] Improve the codegen for pzip (#208479)
This patch recognizes interleaved shuffle (as packed zip intrinsics use)
and selects the corresponding instructions.
Commit: d3cfebb31979bfaa22da2c5bdc5ccd95678b380d
https://github.com/llvm/llvm-project/commit/d3cfebb31979bfaa22da2c5bdc5ccd95678b380d
Author: usamoi <usamoi at outlook.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86.td
M llvm/test/Transforms/Inline/X86/inline-target-cpu-i686.ll
M llvm/test/Transforms/Inline/X86/inline-target-cpu-x86_64.ll
Log Message:
-----------
[X86][Inline] Don't inline callee with cx16 if caller is without cx16 (#187505)
closes https://github.com/llvm/llvm-project/issues/187503
Commit: d0339aef5f4648106de6ad34932adfb011204772
https://github.com/llvm/llvm-project/commit/d0339aef5f4648106de6ad34932adfb011204772
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/lib/AST/ByteCode/Program.cpp
Log Message:
-----------
[clang][bytecode][NFC] Simplify redecl loop (#208477)
Avoid the `Redecl == VD` iteration.
Commit: bdc65804e46da97dbf3d45f2283bff7e49b8caf1
https://github.com/llvm/llvm-project/commit/bdc65804e46da97dbf3d45f2283bff7e49b8caf1
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/docs/AArch64SME.rst
M llvm/docs/AMDGPU/AMDGPUAsmGFX10.rst
M llvm/docs/AMDGPU/AMDGPUAsmGFX1011.rst
M llvm/docs/AMDGPU/AMDGPUAsmGFX1013.rst
M llvm/docs/AMDGPU/AMDGPUAsmGFX1030.rst
M llvm/docs/AMDGPU/AMDGPUAsmGFX11.rst
M llvm/docs/AMDGPU/AMDGPUAsmGFX12.rst
M llvm/docs/AMDGPU/AMDGPUAsmGFX7.rst
M llvm/docs/AMDGPU/AMDGPUAsmGFX8.rst
M llvm/docs/AMDGPU/AMDGPUAsmGFX9.rst
M llvm/docs/AMDGPU/AMDGPUAsmGFX900.rst
M llvm/docs/AMDGPU/AMDGPUAsmGFX904.rst
M llvm/docs/AMDGPU/AMDGPUAsmGFX906.rst
M llvm/docs/AMDGPU/AMDGPUAsmGFX908.rst
M llvm/docs/AMDGPU/AMDGPUAsmGFX90a.rst
M llvm/docs/AMDGPU/AMDGPUAsmGFX940.rst
M llvm/docs/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack.md
M llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst
M llvm/docs/AMDGPUInstructionNotation.rst
M llvm/docs/AMDGPUInstructionSyntax.rst
M llvm/docs/AMDGPUModifierSyntax.rst
M llvm/docs/AMDGPUOperandSyntax.rst
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/AddingConstrainedIntrinsics.rst
M llvm/docs/AdvancedBuilds.md
M llvm/docs/AliasAnalysis.md
M llvm/docs/Atomics.md
M llvm/docs/BigEndianNEON.rst
M llvm/docs/BitCodeFormat.md
M llvm/docs/BlockFrequencyTerminology.rst
M llvm/docs/BranchWeightMetadata.rst
M llvm/docs/BugLifeCycle.rst
M llvm/docs/BuildingADistribution.md
M llvm/docs/CFIVerify.md
M llvm/docs/CMakePrimer.rst
M llvm/docs/CodeGenerator.md
M llvm/docs/CodingStandards.md
M llvm/docs/CommandGuide/llvm-debuginfo-analyzer.rst
M llvm/docs/CommandGuide/llvm-pdbutil.rst
M llvm/docs/CommandLine.md
M llvm/docs/CompileCudaWithLLVM.rst
M llvm/docs/CompilerWriterInfo.md
M llvm/docs/ConvergenceAndUniformity.rst
M llvm/docs/ConvergentOperations.rst
M llvm/docs/Coroutines.md
M llvm/docs/CoverageMappingFormat.md
M llvm/docs/CycleTerminology.md
M llvm/docs/DTLTO.md
M llvm/docs/DependenceGraphs/index.rst
M llvm/docs/DeveloperPolicy.md
M llvm/docs/DirectX/DXContainer.rst
M llvm/docs/DirectX/DXILArchitecture.rst
M llvm/docs/DirectX/DXILOpTableGenDesign.rst
M llvm/docs/DirectX/DXILResources.rst
M llvm/docs/DirectX/RootSignatures.rst
M llvm/docs/DirectXUsage.rst
M llvm/docs/ExceptionHandling.md
M llvm/docs/Extensions.md
M llvm/docs/FAQ.md
M llvm/docs/FatLTO.rst
M llvm/docs/FaultMaps.rst
M llvm/docs/FuzzingLLVM.rst
M llvm/docs/GarbageCollection.md
M llvm/docs/GetElementPtr.rst
M llvm/docs/GettingStarted.md
M llvm/docs/GettingStartedVS.md
M llvm/docs/GitHub.md
M llvm/docs/GlobalISel/GMIR.rst
M llvm/docs/GlobalISel/GenericOpcode.rst
M llvm/docs/GlobalISel/IRTranslator.rst
M llvm/docs/GlobalISel/MIRPatterns.rst
M llvm/docs/GlobalISel/index.rst
M llvm/docs/GwpAsan.rst
M llvm/docs/HowToReleaseLLVM.rst
M llvm/docs/HowToSetUpLLVMStyleRTTI.rst
M llvm/docs/HowToUpdateDebugInfo.rst
M llvm/docs/HowToUseAttributes.rst
M llvm/docs/HowToUseInstrMappings.rst
M llvm/docs/InstCombineContributorGuide.md
M llvm/docs/InstrProfileFormat.md
M llvm/docs/JITLink.rst
M llvm/docs/KernelInfo.rst
M llvm/docs/LFI.rst
M llvm/docs/LangRef.md
M llvm/docs/LibFuzzer.md
M llvm/docs/LoopTerminology.md
M llvm/docs/MIRLangRef.md
M llvm/docs/MLGO.rst
M llvm/docs/MarkedUpDisassembly.rst
M llvm/docs/MemTagSanitizer.rst
M llvm/docs/MemoryModelRelaxationAnnotations.rst
M llvm/docs/MemorySSA.md
M llvm/docs/MergeFunctions.md
M llvm/docs/MisExpect.rst
M llvm/docs/MyFirstTypoFix.md
M llvm/docs/NVPTXUsage.rst
M llvm/docs/NewPassManager.md
M llvm/docs/ORCv2.rst
M llvm/docs/OptBisect.rst
M llvm/docs/PCSectionsMetadata.rst
M llvm/docs/PDB/CodeViewSymbols.rst
M llvm/docs/PDB/CodeViewTypes.rst
M llvm/docs/PDB/DbiStream.rst
M llvm/docs/PDB/HashTable.rst
M llvm/docs/PDB/ModiStream.rst
M llvm/docs/PDB/MsfFile.rst
M llvm/docs/PDB/PdbStream.rst
M llvm/docs/PDB/TpiStream.rst
M llvm/docs/PDB/index.rst
M llvm/docs/Passes.md
M llvm/docs/Projects.rst
M llvm/docs/Proposals/GitHubMove.rst
M llvm/docs/Proposals/TestSuite.rst
M llvm/docs/Proposals/VariableNames.rst
M llvm/docs/Proposals/VectorPredication.rst
M llvm/docs/RFCProcess.md
M llvm/docs/RISCV/RISCVVectorExtension.rst
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/docs/ReleaseProcess.rst
M llvm/docs/Remarks.rst
M llvm/docs/SPIRVUsage.rst
M llvm/docs/SandboxVectorizer.md
M llvm/docs/ScudoHardenedAllocator.rst
M llvm/docs/SegmentedStacks.rst
M llvm/docs/SphinxQuickstartTemplate.md
M llvm/docs/StackMaps.rst
M llvm/docs/Statepoints.rst
M llvm/docs/SymbolizerMarkupFormat.rst
M llvm/docs/TableGen/BackEnds.rst
M llvm/docs/TableGen/BackGuide.rst
M llvm/docs/TableGen/ProgRef.rst
M llvm/docs/Telemetry.rst
M llvm/docs/TransformMetadata.rst
M llvm/docs/UndefinedBehavior.rst
M llvm/docs/VectorizationPlan.rst
M llvm/docs/Vectorizers.md
M llvm/docs/XRay.rst
M llvm/docs/XRayExample.rst
M llvm/docs/XRayFDRFormat.rst
M llvm/docs/YamlIO.rst
R llvm/docs/_static/LLVMWyvernSmall.png
R llvm/docs/_static/copybutton.css
R llvm/docs/_static/copybutton.js
R llvm/docs/_static/custom.css
M llvm/docs/conf.py
M llvm/docs/tutorial/BuildingAJIT1.rst
M llvm/docs/tutorial/BuildingAJIT2.rst
M llvm/docs/tutorial/BuildingAJIT3.rst
M llvm/docs/tutorial/BuildingAJIT4.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl01.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl02.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl03.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl04.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl05.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl06.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl07.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl08.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl09.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl10.rst
Log Message:
-----------
Revert "[Docs] Migrate LLVM docs to furo" (#208619)
Reverts llvm/llvm-project#184440
Furo seems to parse the entire navtree HTML blob for every page, and the
navtree is large, so now doc building takes > 25min. I wasn't able to
fix forward, so let's roll back for now.
Agent analysis here:
https://gist.github.com/rnk/5e26e09fbf1f51a501e6ab4139d048ad
Commit: 1d73e32bf36b98cce9dda0d5fba482aa81a88d1d
https://github.com/llvm/llvm-project/commit/1d73e32bf36b98cce9dda0d5fba482aa81a88d1d
Author: David Green <david.green at arm.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combine-ptr-add-chain.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combiner-and-trivial-mask.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combiner-anyext-to-zext.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combiner-constant-fold.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combiner-copy-prop.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combiner-identity.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combiner-merge.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combiner-redundant-sextinreg.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combiner-sameopcode-hands-crash.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combiner-split-zero-stores.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combiner-undef.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combiner-unmergedup.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-adjust-icmp-imm.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-ext.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-rev.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-sextinreg.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-shuf-to-ins.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-shuffle-duplane.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-shuffle-splat.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-trn.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-truncstore.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-unmerge-ext.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-uzp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-vashr-vlshr.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-zip.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizercombiner-extending-loads.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizercombiner-extractvec-faddp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizercombiner-hoist-same-hands.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizercombiner-mulpow2.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizercombiner-rotate.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizercombiner-select.mir
Log Message:
-----------
[AArch64][GlobalISel] Update scalar types in postlegalizer tests. NFC (#208620)
Commit: 3c138b5c5958dce2daefa923a1cae612e47a4273
https://github.com/llvm/llvm-project/commit/3c138b5c5958dce2daefa923a1cae612e47a4273
Author: Emery Conrad <conrade.ctc at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/lib/Interpreter/IncrementalExecutor.cpp
A clang/test/Interpreter/emulated-tls.cpp
M llvm/lib/ExecutionEngine/Orc/Layer.cpp
Log Message:
-----------
Reland "[ORC] Track __emutls_t definitions in IRMaterializationUnit" (#207161) (#208413)
Relands #207161, which was reverted in #207775 after the new
`clang/test/Interpreter/emulated-tls.cpp` failed on Darwin with `Symbols
not found: [ ___emutls_get_address ]`.
The `IRMaterializationUnit` fix and the test are unchanged from #207161.
What the failure exposed is that thread_locals never worked in
clang-repl on Darwin: `__emutls_get_address` is implemented in the
compiler-rt builtins static archive, and nothing links it into the
process, so process-symbol lookup cannot resolve it (on Linux it
resolves from `libgcc_s.so`).
New in this reland, per @lhames's suggestion (option 2) on the original
PR:
- `clang/lib/Interpreter/IncrementalExecutor.cpp`: on `__APPLE__`,
reference `__emutls_get_address` (forcing the builtins archive member to
be linked in) and define it as an absolute symbol in the process-symbols
JITDylib, following the precedent of the MinGW `__main` workaround in
`lli.cpp`. Scoped to the default in-process JITBuilder path only — the
host address would be meaningless for an out-of-process executor, and
custom-builder clients do their own setup.
Verified on an aarch64-darwin machine: the previously failing test now
passes, along with the rest of `clang/test/Interpreter`.
@vgvassilev @lhames — could you take a look?
🤖 Done with the help of [Claude Code](https://claude.com/claude-code)
(Claude Opus 4.8, human in the loop)
Co-authored-by: Emery Conrad <emery.conrad at chicagotrading.com>
Commit: 3ce1af9f73de5577ed611d93440a751e68d467cb
https://github.com/llvm/llvm-project/commit/3ce1af9f73de5577ed611d93440a751e68d467cb
Author: David Green <david.green at arm.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/bf16-v4-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
Log Message:
-----------
[AArch64][GlobalISel] Add bf16 vecreduce test coverage. NFC (#208628)
Commit: 9bfd0ff9143d96c249e55180b0bfe0e39516cc81
https://github.com/llvm/llvm-project/commit/9bfd0ff9143d96c249e55180b0bfe0e39516cc81
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
M mlir/test/Target/Cpp/expressions.mlir
Log Message:
-----------
[mlir][emitc] Fix hasSideEffects of emitc.cast (#208607)
When `pure` attribute is set, the cast op is side-effect-free, so we
should return false in `hasSideEffects` method.
Commit: 5246dffd0e54a500db30249fe2e76343b7e9d187
https://github.com/llvm/llvm-project/commit/5246dffd0e54a500db30249fe2e76343b7e9d187
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
A orc-rt/docs/CodingConventions.md
M orc-rt/docs/index.md
Log Message:
-----------
[orc-rt] Add a coding conventions doc (#208623)
Add docs/CodingConventions.md, recording that ORC-RT follows the LLVM
Coding Standards and describing the C API naming conventions.
Commit: 94b8fb92f78cbef24ff357d37db18b13d47749ad
https://github.com/llvm/llvm-project/commit/94b8fb92f78cbef24ff357d37db18b13d47749ad
Author: Urvi Rav <94829943+ravurvi20 at users.noreply.github.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/test/Semantics/OpenMP/ordered02.f90
Log Message:
-----------
[Flang][OpenMP] Added diagnostic for ORDERED THREADS SIMD inside plain SIMD region (#205723)
Fixes [#205516 ](https://github.com/llvm/llvm-project/issues/205516)
#### Problem
Per OpenMP 4.5 Sec 2.13.8 Restrictions:
> An ordered region arising from an ordered construct with both the simd
and
> threads clauses must be closely nested inside a loop SIMD region.
Flang was missing this check. `!$OMP ORDERED THREADS SIMD` inside a
standalone `!$OMP SIMD` region was accepted without diagnostic.
#### Fix
`check-omp-structure.cpp`: Added a new check in
`ChecksOnOrderedAsBlock()`. If an ORDERED directive has both SIMD and
THREADS clauses and is nested inside a standalone SIMD region (but not a
DO SIMD region), emit the following error:
`An ORDERED directive with SIMD and THREADS clauses must be closely
nested in a worksharing-loop SIMD region.`
`ordered02.f90`: Added two test cases:
Negative test: ORDERED THREADS SIMD inside !$OMP SIMD → expected error.
Positive test: ORDERED THREADS SIMD inside !$OMP DO SIMD ordered → no
error, as allowed by OpenMP 2.13.8.
Commit: b6a66701fae185048c88a04a4584b4f2de01b73a
https://github.com/llvm/llvm-project/commit/b6a66701fae185048c88a04a4584b4f2de01b73a
Author: Akshat Dalal <adalal at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/ImplicitNullChecks.cpp
A llvm/test/CodeGen/X86/implicit-null-check-debugloc.ll
Log Message:
-----------
[ImplicitNullChecks] Preserve debug location on FAULTING_OP (#205560)
insertFaultingInstr() built the FAULTING_OP with an empty DebugLoc,
dropping the folded memory op's source location. As a result, the
faulting load is mislabeled in the line table, giving wrong source
attribution for the very instruction that traps on a null deref. Fix by
using MI->getDebugLoc().
The original report also flagged dropped MIFlags and def renamable/
sub-register/early-clobber bits, but those are not observable:
Unpredictable is never set on loads, the register bits are never read
(FAULTING_OP is opaque until AsmPrinter), and the sub-register write is
already modeled correctly. Only the debug location is fixed here.
Commit: dac462d85cbc94ca5f5d9a78fc2cd01b8abaec92
https://github.com/llvm/llvm-project/commit/dac462d85cbc94ca5f5d9a78fc2cd01b8abaec92
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M bolt/test/AArch64/use-old-text-zero-padding.c
Log Message:
-----------
[BOLT] Fix use-old-text-zero-padding on FreeBSD (#206581)
BSD od supports only decimal value to -N parameter. To fix the test
failure, we use decimal value instead of hex value in this test case.
Commit: eac699dd6068134486f2d3ca9ad72f7b0d2db384
https://github.com/llvm/llvm-project/commit/eac699dd6068134486f2d3ca9ad72f7b0d2db384
Author: David Green <david.green at arm.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
Log Message:
-----------
[BOLT] Fix use-old-text-zero-padding on FreeBSD (#206581) (#208634)
BSD od supports only decimal value to -N parameter. To fix the test
failure, we use decimal value instead of hex value in this test case.
Co-authored-by: aokblast <aokblast at FreeBSD.org>
Commit: 8d590969badd9f3fed18a99fffbd9afdf3a975c6
https://github.com/llvm/llvm-project/commit/8d590969badd9f3fed18a99fffbd9afdf3a975c6
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M bolt/test/AArch64/got-load-symbolization.s
M bolt/test/AArch64/lite-mode.s
M lld/ELF/Arch/AArch64.cpp
M lld/test/ELF/aarch64-adrp-ldr-got.s
Log Message:
-----------
[LLD][AArch64] Make adrp+ldr relaxation per-symbol all-or-nothing (#208396)
We can't relax only some adrp+ldr pairs for a symbol, because there may
be a branch target between the adrp and ldr of this form:
adrp x1, :got:sym
.Lfoo:
ldr x1, [x1, :got_lo12:sym]
# ...
adrp x1, :got:sym
ldr x2, [x1, :got_lo12:sym]
b .Lfoo
Relaxing the first adrp+ldr here would be invalid. This was clarified in
the ARM ABI in:
https://github.com/ARM-software/abi-aa/commit/11fb4ef42898060189d6a34ee96966e696ecbd20.
The implementation already performed a pre-scan to check that the
relevant relocations occur in pairs. Change this scan to a) check all
the preconditions for the relaxation and b) make the decision per
symbol.
Fixes https://github.com/llvm/llvm-project/issues/138254.
Commit: 9c4e4b1f8781808d07f86aa4fb726dbb9a477bad
https://github.com/llvm/llvm-project/commit/9c4e4b1f8781808d07f86aa4fb726dbb9a477bad
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/unittests/CodeGen/AMDGPUMetadataTest.cpp
M llvm/unittests/CodeGen/GlobalISel/GISelMITest.cpp
M llvm/unittests/CodeGen/RematerializerTest.cpp
M llvm/unittests/MC/AMDGPU/Disassembler.cpp
M llvm/unittests/MC/AMDGPU/DwarfRegMappings.cpp
M llvm/unittests/MI/LiveIntervalTest.cpp
M llvm/unittests/MIR/MachineMetadata.cpp
M llvm/unittests/Target/AMDGPU/AMDGPUMCExprTest.cpp
M llvm/unittests/Target/AMDGPU/AMDGPUUnitTests.cpp
M llvm/unittests/Target/AMDGPU/CSETest.cpp
M llvm/unittests/Target/AMDGPU/DwarfRegMappings.cpp
M llvm/unittests/Target/AMDGPU/ExecMayBeModifiedBeforeAnyUse.cpp
M llvm/unittests/Target/AMDGPU/GCNRegPressureTest.cpp
M llvm/unittests/Target/AMDGPU/LiveRegUnits.cpp
M llvm/unittests/Target/AMDGPU/PALMetadata.cpp
M llvm/unittests/Target/AMDGPU/UniformityAnalysisTest.cpp
Log Message:
-----------
AMDGPU: Migrate unittests to subarch triples (#206486)
Replace specifying a processor name with the triple
subarch.
The register-limit helpers in AMDGPUUnitTests.cpp that enumerate every
valid CPU via fillValidArchListAMDGCN still pass the CPU explicitly, as
does the MC Disassembler smoke test (its C disassembler API derives the
subtarget from the CPU, not the triple subarch).
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: b5a27b48e5d7dba706911047fa1c5692be44d10e
https://github.com/llvm/llvm-project/commit/b5a27b48e5d7dba706911047fa1c5692be44d10e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/target-cpu.ll
Log Message:
-----------
AMDGPU: Rewrite target-cpu test for new subarches (#206485)
The function subtargets should now be a valid subtarget for
the top-level subarch.
Commit: 1cc5d2cf0faba66b30d9a68735006ed3e9742fc7
https://github.com/llvm/llvm-project/commit/1cc5d2cf0faba66b30d9a68735006ed3e9742fc7
Author: firmiana402 <firmiana402 at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp
M lldb/unittests/Expression/DWARFExpressionTest.cpp
Log Message:
-----------
[lldb] Fix DW_OP_convert type handling (#208435)
This PR fixes #208197
A nonzero DW_OP_convert operand must reference a DW_TAG_base_type DIE.
LLDB previously accepted any DIE that happened to carry base-type-like
size and encoding attributes. This patch rejects non-base-type DIEs
before using them as DW_OP_convert target types.
## Tests
Extended DWARFExpression.DW_OP_convert coverage to verify:
- non-DW_TAG_base_type DIEs are rejected as DW_OP_convert target types;
Commit: 3595454d79c9bc4253f70961e32516e23805b982
https://github.com/llvm/llvm-project/commit/3595454d79c9bc4253f70961e32516e23805b982
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/MC/MachObjectWriter.cpp
A llvm/test/MC/ELF/size-expression-must-be-absolute.s
M llvm/test/MC/X86/check-end-of-data-region.s
Log Message:
-----------
MC: Start some error messages with a lowercase (#208570)
Also add a missing test for one of them.
Commit: 5b27878e5c6b9055436b917868266b7fd05414bb
https://github.com/llvm/llvm-project/commit/5b27878e5c6b9055436b917868266b7fd05414bb
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/Object/COFFObjectFile.cpp
M llvm/test/Object/coff-invalid.test
Log Message:
-----------
COFF: Start error message with lowercase letter (#208636)
Follow style guideline for error messages.
Commit: 2d5aa733913c0691e8c8f2b9a43dc4cb82279f8d
https://github.com/llvm/llvm-project/commit/2d5aa733913c0691e8c8f2b9a43dc4cb82279f8d
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang-tools-extra/clang-tidy/readability/TrivialSwitchCheck.cpp
M clang-tools-extra/clang-tidy/readability/TrivialSwitchCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/trivial-switch.rst
M clang-tools-extra/test/clang-tidy/checkers/readability/trivial-switch.cpp
Log Message:
-----------
[clang-tidy] Add IgnoreMacros option to readability-trivial-switch (#208622)
AI Usage: Assisted by Codex 5.6
Closes https://github.com/llvm/llvm-project/issues/208474
Commit: 03aca1aebe3dff60130f0383ec842ddd3f756405
https://github.com/llvm/llvm-project/commit/03aca1aebe3dff60130f0383ec842ddd3f756405
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
A llvm/test/CodeGen/AMDGPU/rewrite-out-arguments-2.ll
Log Message:
-----------
[AMDGPU] Introduce tests for PR207922 (NFC) (#208640)
Commit: 977f4d603ae13c751357352f1256e389a4725e9f
https://github.com/llvm/llvm-project/commit/977f4d603ae13c751357352f1256e389a4725e9f
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURewriteOutArguments.cpp
Log Message:
-----------
[AMDGPU] Employ MemorySSA when rewriting out arguments (NFCI) (#207922)
While transitioning away from MemoryDependenceAnalysis, replace MDA
`getPointerDependencyFrom` query with a reverse traversal of the memory
accesses of the return basic block (MemoryDefs and MemoryUses), looking
for the must-aliasing store to the out argument. The existing behaviour
is meant to be preserved.
Commit: 4516eb3a1fbdf2897db5cbe677de7458e06a1776
https://github.com/llvm/llvm-project/commit/4516eb3a1fbdf2897db5cbe677de7458e06a1776
Author: Tim Corringham <timothy.corringham at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/lib/Sema/HLSLExternalSemaSource.cpp
A clang/test/AST/HLSL/Texture2D-AST.hlsl
M clang/test/CodeGenHLSL/resources/Texture2D-GetDimensions.hlsl
M clang/test/CodeGenHLSL/resources/Texture2D-Load.hlsl
R clang/test/CodeGenHLSL/resources/Texture2DArray-GetDimensions.hlsl
A clang/test/SemaHLSL/Resources/RWTexture2D-mips-errors.hlsl
A clang/test/SemaHLSL/Resources/RWTexture2D-unsupported-methods-errors.hlsl
M clang/test/SemaHLSL/Resources/Texture2D-GetDimensions.hlsl
A clang/test/SemaHLSL/Resources/Texture2D-Load-errors.hlsl
R clang/test/SemaHLSL/Texture2D-Load-errors.hlsl
R clang/test/SemaHLSL/Texture2DArray-Load-errors.hlsl
Log Message:
-----------
[HLSL] Implement RWTexture2D (#208267)
Add HLSL front-end support for RWTexture2D and related test cases.
Where appropriate test cases have been parameterized across the
Texture2D types (and redundant Texture2DArray tests removed).
Assisted by Cursor
Fixes: #194742
---------
Co-authored-by: Tim Corringham <tcorring at amd.com>
Commit: 09fbfb5d3e965010ed87b84f7d7e88f9024b9ccc
https://github.com/llvm/llvm-project/commit/09fbfb5d3e965010ed87b84f7d7e88f9024b9ccc
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
Log Message:
-----------
[VPlan] Remove FoldTail argument for createConsecutiveVecPtr (NFC). (#208550)
The argument is no longer needed now that we can look up the information
directly from VPlan.
Commit: 380c581b724d0777ee73dce8fb09858d015439e1
https://github.com/llvm/llvm-project/commit/380c581b724d0777ee73dce8fb09858d015439e1
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/include/OffloadError.h
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/host/src/rtl.cpp
Log Message:
-----------
[Offload] Fix warn-unused function (#208642)
Unblock the `-Werror` build in pre-merge by adding a few
[[maybe_unused]] here and there.
Commit: 445d6c31c829fd01adf837ea50f19dbe4f7bd9ed
https://github.com/llvm/llvm-project/commit/445d6c31c829fd01adf837ea50f19dbe4f7bd9ed
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/neon/fullfp16.c
M clang/test/CodeGen/AArch64/v8.2a-fp16-intrinsics.c
Log Message:
-----------
[CIR][AArc64] Add lowering for fp16 intrinsics (sqrt + max + min) (#207786)
This PR adds lowering for the following intrinsic groups:
* https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#markdown-toc-square-root-1
* https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#maximum-1O
* https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#markdown-toc-minimum-1
It also moves the corresponding tests from:
* clang/test/CodeGen/AArch64/v8.2a-fp16-intrinsics.c
to:
* clang/test/CodeGen/AArch64/neon/fullfp16.c
The lowering follows the existing implementation in
CodeGen/TargetBuiltins/ARM.cpp.
Commit: 6ec6a777acdadbb8ba184e6c33016ae156c1f819
https://github.com/llvm/llvm-project/commit/6ec6a777acdadbb8ba184e6c33016ae156c1f819
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
Log Message:
-----------
[NFC][SPIR-V] Remove unused GR parameter from vector elt legalizers (#208495)
Commit: 3c59a212da58808263457c98a1df0dfd77bbb773
https://github.com/llvm/llvm-project/commit/3c59a212da58808263457c98a1df0dfd77bbb773
Author: Raphael Isemann <rise at apple.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
A lldb/test/API/lang/cpp/builtin_types/int/Makefile
A lldb/test/API/lang/cpp/builtin_types/int/TestIntTypes.py
A lldb/test/API/lang/cpp/builtin_types/int/main.cpp
Log Message:
-----------
[lldb][test] Add a new test for integer types (#208441)
This is a new modern test for integer types that replaces the test logic
from `API/types` test that is about to be deleted.
See also #208402
assisted-by: claude
Commit: c93aefbd97d8a8fb76e6351d214724a57294c999
https://github.com/llvm/llvm-project/commit/c93aefbd97d8a8fb76e6351d214724a57294c999
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M libcxx/include/__configuration/abi.h
Log Message:
-----------
[libc++] Remove diagnostic about _LIBCPP_ABI_NO_ITERATOR_BASES (#208460)
This was slated for removal in LLVM 22 but we hadn't removed it yet.
Commit: 0faf45cd652e488de348ff237f0666ca0751de61
https://github.com/llvm/llvm-project/commit/0faf45cd652e488de348ff237f0666ca0751de61
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M libcxx/include/__configuration/abi.h
M libcxx/include/__cxx03/__configuration/abi.h
M libcxx/include/__ranges/chunk_by_view.h
M libcxx/include/__ranges/drop_while_view.h
M libcxx/include/__ranges/filter_view.h
M libcxx/include/__ranges/repeat_view.h
M libcxx/include/__ranges/single_view.h
M libcxx/include/__ranges/take_while_view.h
M libcxx/include/__ranges/transform_view.h
Log Message:
-----------
[libc++] Rename the macro for the LLVM 18 ABI tag used in ranges (#208464)
We typically use macros like _LIBCPP_ABI_XYZ for ABI settings that can
be configured by the user. Since _LIBCPP_ABI_LLVM18_NO_UNIQUE_ADDRESS is
not one of those, rename it to make it clearer it's an ABI tag
attribute.
As a drive-by remove the definition in the frozen C++03 config header
since it should never be needed (Ranges are not provided in C++03).
Commit: c1d66b53568cac5262798ce730c2d94ca2f5bc7b
https://github.com/llvm/llvm-project/commit/c1d66b53568cac5262798ce730c2d94ca2f5bc7b
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/www/cxx_dr_status.html
Log Message:
-----------
[clang] Update C++ DR status page (#208641)
Commit: 24ce77ea005c1ef49d3552cbba74033d2662a0ad
https://github.com/llvm/llvm-project/commit/24ce77ea005c1ef49d3552cbba74033d2662a0ad
Author: Jan André Reuter <jan at zyten.de>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CGStmtOpenMP.cpp
A clang/test/OpenMP/target_teams_distribute_parallel_for_simd_if_openmp52_codegen.cpp
A clang/test/OpenMP/teams_distribute_parallel_for_simd_if_openmp52_codegen.cpp
Log Message:
-----------
[Clang][OpenMP] Fix `if` clause not affecting `teams` construct on host (#207444)
In #205345, it was discovered that the `if` clause for the `teams`
construct
does not actually create a serial league when the code is built with
Clang.
Looking at the emitted IR, no call to `__kmpc_push_num_teams` was added
for an `if` clause. Hence, `__kmpc_fork_teams` always created the number
of
teams specified via the `num_teams` clause, or the _nteams-var_ ICV.
During `emitCommonOMPTeamsDirective`, only the `num_teams` and
`thread_limit`
clauses were checked, whereas the `if` clause was missing.
To fix the missing code, check for an `if` clause mapped to `teams` or
`unknown`. If the clause is present, and false, emit
`__kmpc_push_num_teams`
with the number of teams set to 1. The `thread_limit` clause is
unaffected.
Otherwise, stick to the existing implementation and only call
`__kmpc_push_num_teams` if `num_teams` or `thread_limit` are set.
This only applies for OpenMP v5.2 and newer. Earlier OpenMP versions did
not
support the `if` clause for the `teams` construct, hence should continue
to emit a number of teams based on attached `num_teams` and
`thread_limit`
clauses, or the _nteams-var_ ICV.
This fix also only affects host-side execution, as
`__kmpc_push_num_teams` is a
no-op for offloaded code. For offloaded code, the number of leagues is
set during
the call to `__tgt_target_kernel`, whose passed arguments are unchanged.
Closes #205345
---------
Signed-off-by: Jan André Reuter <j.reuter at fz-juelich.de>
Signed-off-by: Jan André Reuter <jan at zyten.de>
Commit: 9a4ad0acce7abf452746a5eab7c85730031152a3
https://github.com/llvm/llvm-project/commit/9a4ad0acce7abf452746a5eab7c85730031152a3
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M libc/hdr/CMakeLists.txt
A libc/hdr/sys_time_macros.h
M libc/include/llvm-libc-macros/linux/sys-time-macros.h
M libc/include/sys/time.yaml
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/alarm.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/getitimer.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/setitimer.h
M libc/src/sys/time/linux/CMakeLists.txt
M libc/src/sys/time/linux/getitimer.cpp
M libc/src/sys/time/linux/setitimer.cpp
M libc/src/unistd/linux/CMakeLists.txt
M libc/src/unistd/linux/alarm.cpp
M libc/test/src/sys/time/CMakeLists.txt
M libc/test/src/sys/time/getitimer_test.cpp
M libc/test/src/sys/time/setitimer_test.cpp
Log Message:
-----------
[libc] Assorted improvements to [gs]etitimer (#206974)
This started out as a patch adding a syscall wrapper for the two
functions. It still does that, but along the way I (or rather AI)
discovered an edge case in the truncation of microsecond values, where
we could turn bogus values into seemingly valid ones by throwing away
the high-order bits.
Additionally, when writing a test case, I noticed that the (64-bit)
kernel returns EINVAL for these out-or-range values. Our check returns
EOVERFLOW in this case, so I also change our error code in order to
provide an uniform behavior for the test case.
Neither of these (the check and the EINVAL error code) are present in
glibc (which lets truncated usec values through and returns EOVERFLOW on
second truncation), but I think it's better to be consistent with the
64-bit behavior. The EOVERFLOW error also has no foundation in POSIX
whereas EINVAL is mentioned as an error for invalid microseconds.
While in there, I also define ITIMER_REAL, ITIMER_VIRTUAL, and
ITIMER_PROF in linux/sys-time-macros.h and update code to use them
instead of raw numbers.
Assisted by Gemini.
Commit: 83950f4c84d0b59d539f5819d67167d896eaa6a5
https://github.com/llvm/llvm-project/commit/83950f4c84d0b59d539f5819d67167d896eaa6a5
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/lldb_dap_testcase.py
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/utils.py
Log Message:
-----------
[lldb-dap] Log the adapter's stdio during cleanup (#208432)
The adapter may crash for any reason especially if it is built with
sanitizers. Log the adapter's stdout and stderr.
Commit: 06e7dfcb3e64b2a4f13affeea5098860bedbd5bb
https://github.com/llvm/llvm-project/commit/06e7dfcb3e64b2a4f13affeea5098860bedbd5bb
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M lldb/test/API/tools/lldb-dap/module-event/TestDAP_module_event.py
M lldb/test/API/tools/lldb-dap/module/TestDAP_module.py
M lldb/test/API/tools/lldb-dap/moduleSymbols/TestDAP_moduleSymbols.py
Log Message:
-----------
[lldb-dap] Migrate all DAP module tests. (#207869)
migrate tests module, moduleEvents and moduleSymbols
Commit: 5eb8007046bc3e7f7ca7befc4cd097bb66525044
https://github.com/llvm/llvm-project/commit/5eb8007046bc3e7f7ca7befc4cd097bb66525044
Author: Hans Wennborg <hans at hanshq.net>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/cmake/modules/ClangConfig.cmake.in
R cmake/Modules/GetTripleCMakeSystemName.cmake
R cmake/Modules/NormalizeTriple.cmake
M llvm/cmake/modules/LLVMConfig.cmake.in
M llvm/cmake/modules/LLVMExternalProjectUtils.cmake
M llvm/runtimes/CMakeLists.txt
M runtimes/CMakeLists.txt
Log Message:
-----------
Revert "Reapply "runtimes: Pass CMAKE_SYSTEM_NAME based on target triple" (#205133) (#205522)" (#208644)
The change broke the runtimes build for Android; see discussion on the
PR. There are fixes in progress, but let's revert to unbreak the tree
until all those are ready to land.
This reverts commit 00b2f81418233397e601afaeea6d62c47a6c368a and the
follow-up commit 1008b485e4807476c831910cf404a0315f06c788.
Commit: 810a463e9d0c011c738f544be3507cda9f85f8ad
https://github.com/llvm/llvm-project/commit/810a463e9d0c011c738f544be3507cda9f85f8ad
Author: jeanPerier <jperier at nvidia.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCTypeInterfaces.cpp
M flang/test/Lower/OpenACC/acc-reduction-maxmin.f90
M flang/test/Lower/OpenACC/acc-reduction.f90
Log Message:
-----------
[flang][openacc] make openacc-use-reduction-combine cl switch default (#208473)
Turn the switch on now that is has been tested.
Will remove the switch in a later patch.
Commit: ef1b46f29293db7b16dee598fb1e8f2a62555c33
https://github.com/llvm/llvm-project/commit/ef1b46f29293db7b16dee598fb1e8f2a62555c33
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/lib/Sema/SemaTemplate.cpp
M clang/test/CXX/drs/cwg25xx.cpp
M clang/test/SemaTemplate/concepts.cpp
Log Message:
-----------
[Clang] Fix a crash when checking the constraints of a self-referential concept (#208465)
Mark self-referencial concepts as invalid to prevent them from being
evaluated (which would crash).
Fixes #206336
Commit: 642b85388cca2114e467c58c02fe79b32f7b221f
https://github.com/llvm/llvm-project/commit/642b85388cca2114e467c58c02fe79b32f7b221f
Author: Shatyuka <shatyuka at qq.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerTypeUnit.cpp
M llvm/test/tools/dsymutil/X86/DWARFLinkerParallel/odr-uniquing.cpp
Log Message:
-----------
[DWARFLinkerParallel] Add missing version string in producer (#158195)
Add missing LLVM version string to `DW_AT_producer` in
`__artificial_type_unit`.
---------
Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>
Commit: 83c5973a0a9e849efdec168a1b712f355e59ff4c
https://github.com/llvm/llvm-project/commit/83c5973a0a9e849efdec168a1b712f355e59ff4c
Author: Balázs Kéri <balazs.keri at ericsson.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
M clang/test/Analysis/malloc-failure.c
M clang/test/Analysis/malloc.c
Log Message:
-----------
[clang][analyzer] Fixed 'if_nameindex' in MallocChecker (#207726)
The function `if_nameindex` has 0 arguments but `MallocChecker` expected
it to have 1 argument and was not recognized by the checker correctly.
Commit: 9a92a2be8d4938f08ba8c98c222764a8fd14746d
https://github.com/llvm/llvm-project/commit/9a92a2be8d4938f08ba8c98c222764a8fd14746d
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M lldb/source/Plugins/ABI/AArch64/ABIAArch64.cpp
M lldb/unittests/ABI/AArch64/ABIAArch64Test.cpp
Log Message:
-----------
[lldb] Implement LLDB_REGNUM_GENERIC_TP conversion for Aarch64 (#208643)
LLDB currently fails to find TLS variables on Linux, and this is part of
the problem.
Commit: 9b9b19364dfb5ba2984a0970928b7ad95569e88a
https://github.com/llvm/llvm-project/commit/9b9b19364dfb5ba2984a0970928b7ad95569e88a
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
A llvm/test/MC/Disassembler/X86/x86-64-instruction-length.txt
Log Message:
-----------
[X86][Disassembler] Reject instructions longer than 15 bytes (#208277)
An x86 instruction can be at most 15 bytes. The decoder already checks
for overruns but only emits an `LLVM_DEBUG` message and still returns
`Success`. This patch returns `Fail` instead, so `getInstruction()`
never reports a size
that isn't a valid instruction length.
Commit: e2e81d96daa327f1ab7e28ef7a8cf929382cc1d2
https://github.com/llvm/llvm-project/commit/e2e81d96daa327f1ab7e28ef7a8cf929382cc1d2
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/test/CodeGen/X86/combine-pmaddwd.ll
Log Message:
-----------
[X86] combine-pmaddwd.ll - test with x86-64 levels not raw SSE levels (#208666)
Add missing AVX512 coverage
Commit: 4f3000e8d6d07a1fa9d3cdfde34a270bd0a2decf
https://github.com/llvm/llvm-project/commit/4f3000e8d6d07a1fa9d3cdfde34a270bd0a2decf
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
M mlir/test/Conversion/SPIRVToLLVM/gl-ops-to-llvm.mlir
Log Message:
-----------
[mlir][SPIR-V] Add spirv.GL.NMax/NMin to SPIRVtoLLVM conversion (#205976)
Commit: 587db92f50dfafea5d580d7b53111b5ac5f61e81
https://github.com/llvm/llvm-project/commit/587db92f50dfafea5d580d7b53111b5ac5f61e81
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/test/Analysis/CostModel/X86/intrinsic-cost-kinds.ll
Log Message:
-----------
[CostModel][X86] intrinsic-cost-kinds.ll - add pdep/pext test coverage (#208668)
Ensure x86 has pdep/pext cost coverage for #207657
NOTE: This is mainly a crash/sanity testfile, they aren't necessarily
accurate
Commit: 50143b877dffdb9016e50fb541806eb59c261b10
https://github.com/llvm/llvm-project/commit/50143b877dffdb9016e50fb541806eb59c261b10
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
M mlir/test/Conversion/SPIRVToLLVM/cl-ops-to-llvm.mlir
Log Message:
-----------
[mlir][SPIR-V] Add SPIRVToLLVM conversions for CL copysign and fmod ops (#205993)
Commit: 99fb741b6e0da866bf3c6000531104bff347d787
https://github.com/llvm/llvm-project/commit/99fb741b6e0da866bf3c6000531104bff347d787
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M libc/test/src/sys/socket/linux/CMakeLists.txt
M libc/test/src/sys/socket/linux/socketopt_test.cpp
Log Message:
-----------
[libc] Use internal::clock_gettime in socketopt_test (#208667)
The external entry point is not available in overlay mode, causing this
test to not run there. Other tests also use the internal function.
Commit: 931a00eca6db8eb5de674f27e1a7d2bde2d045d1
https://github.com/llvm/llvm-project/commit/931a00eca6db8eb5de674f27e1a7d2bde2d045d1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M offload/test/lit.cfg
Log Message:
-----------
offload: Match amdgpu triple name in lit config (#208551)
The configured offload system target is now amdgpu-amd-amdhsa since
d776ee4d4cae.
Commit: dfdc1c34ec8ffbabf066e94e7b9fa5ced847c1b0
https://github.com/llvm/llvm-project/commit/dfdc1c34ec8ffbabf066e94e7b9fa5ced847c1b0
Author: Jacob Crawley <jacob.crawley at arm.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-with-predicate.ll
Log Message:
-----------
[LV] Handle swapped blend inputs in predicated partial reductions (#208013)
Addressing case missed by #194859.
Detect the reduction update by checking both incoming values to
determine which is the single use incoming blend value, rather than the
previous approach which always assumed this would be incoming value 0.
Commit: 95cfe69f75b2080a528e582f269859ac10daade1
https://github.com/llvm/llvm-project/commit/95cfe69f75b2080a528e582f269859ac10daade1
Author: Iliyan Georgiev <Iliyan.Georgiev at arm.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaReduceTransposes.cpp
M mlir/test/Dialect/Tosa/tosa-reduce-transposes.mlir
Log Message:
-----------
[mlir][tosa] Fix reduce-transpose sub-byte handling (#208446)
- Fix element size calculation when processing sub-byte types
- Add tests for i1 and i4
Signed-off-by: Iliyan Georgiev <Iliyan.Georgiev at arm.com>
Commit: cd662a7c4fb03a88d0e429a7fc8d8b470a812e2b
https://github.com/llvm/llvm-project/commit/cd662a7c4fb03a88d0e429a7fc8d8b470a812e2b
Author: Michiel Derhaeg <michiel at derhaeg.be>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/tools/scan-build-py/lib/libscanbuild/__init__.py
Log Message:
-----------
[clang][scan-build-py] Fix configure scripts when using Python 3.14 (#206792)
Python 3.14 (PEP 765) warns about return statements inside finally
blocks. This warning breaks intercept-build and friends for configure
scripts.
The bare except already catches everything, so falling through to the
return is equivalent and silences the SyntaxWarning.
Commit: 4a5bdadabdfba0f38188adc1e68210d3375b7f95
https://github.com/llvm/llvm-project/commit/4a5bdadabdfba0f38188adc1e68210d3375b7f95
Author: lianjinfeng2003 <101249452+mygitljf at users.noreply.github.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M mlir/lib/Transforms/RemoveDeadValues.cpp
M mlir/test/Transforms/remove-dead-values.mlir
Log Message:
-----------
[mlir] Fix RDV poison cleanup (#206270)
I moved the poison replacement step before cleanup paths that can drop
uses and leave queued operands temporarily null. This keeps region
branch operands valid while the later cleanup removes dead arguments and
results.
Fixes #206094
Commit: ec3bda3b5ec56268c17ded81eb5307278da16b60
https://github.com/llvm/llvm-project/commit/ec3bda3b5ec56268c17ded81eb5307278da16b60
Author: Matthew Devereau <matthew.devereau at arm.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-opts-cmpne.ll
Log Message:
-----------
[AArch64][InstCombine] Fold zext of all-active SVE cmpne-zero (#207720)
Fold zext(cmpne(ptrue, x, 0)) to umin(ptrue, x, 1).
Do not fold non-ptrue predicates, since cmpne zeros inactive lanes and
umin merges inactive lanes
Commit: 9dad160b3b26e8ba2698f0ab695630444b2760fb
https://github.com/llvm/llvm-project/commit/9dad160b3b26e8ba2698f0ab695630444b2760fb
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
M llvm/unittests/Transforms/Vectorize/VPlanVerifierTest.cpp
Log Message:
-----------
[VPlan] Relax type of DerivedIV start value (NFC) (#206464)
Change it from VPIRValue -> VPValue, as several usecases require it,
while adding a check in the verifier.
Commit: e4798e75ccbc6f09e5b588713e82edc224f4b22a
https://github.com/llvm/llvm-project/commit/e4798e75ccbc6f09e5b588713e82edc224f4b22a
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/invalid.cpp
Log Message:
-----------
[clang][bytecode] Don't diagnose definition without body (#208679)
Let the declared_at note point to the declaration in that case.
Commit: 15df0ca2f9c8854dc0985f557b00a38b2d0af137
https://github.com/llvm/llvm-project/commit/15df0ca2f9c8854dc0985f557b00a38b2d0af137
Author: L-roro <115032777+L-roro at users.noreply.github.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
A llvm/test/CodeGen/Hexagon/autohvx/isel-build-vector-splat-word.ll
Log Message:
-----------
[Hexagon] Use word splats for repeated HVX build-vector words (#204808)
buildHvxVectorReg packs small element vectors into i32 words before
using the most frequent word to initialize the HVX vector. For i8/i16
result vectors, the old lowering created SPLAT_VECTOR with the final
vector type, which selected a byte or halfword splat and broadcast only
the low part of the packed word.
The idea is to build the splat as a vector of i32 words first, then
bitcast back to the final vector type. This preserves the full packed
word while keeping normal byte and halfword scalar splat lowering
unchanged.
The test covers packed-word i8 and i16 cases, and also checks that true
i8/i16 scalar splats still lower to byte/halfword splats.
After testing with the SDK simulator, it looks to me like a larger
16-byte repeated-pattern case is still miscompiled after this change. It
appears to be a broader issue in this build-vector construction path, so
maybe this should be addressed in a different way that could fix all
cases and not only these specific ones. Please let me know what you
think.
I have used AI for this proposal. The bug was originally found after
running llvm-reduce on a large ll that had a completely unrelated bug.
Co-authored-by: L-roro <rodriguez at roofline.ai>
Commit: 41a35a7d99604174c442c975ef1472498a47e643
https://github.com/llvm/llvm-project/commit/41a35a7d99604174c442c975ef1472498a47e643
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/lib/AST/ByteCode/MemberPointer.cpp
M clang/test/Modules/templates.mm
Log Message:
-----------
[clang][bytecode] Fix comparing member pointers for redeclared `FieldDecl`s (#208660)
Use the first decl to compare.
Commit: 7fcfcf1c5db1d46b6cc85b80be3a24ee887773f9
https://github.com/llvm/llvm-project/commit/7fcfcf1c5db1d46b6cc85b80be3a24ee887773f9
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M openmp/runtime/src/ompt-general.cpp
Log Message:
-----------
[OpenMP] Use secure_getenv when read OMPT library path (#208652)
An internal review flagged the use of `getenv` when reading the OMPT
tool library path from the environment and passing it to the loader as a
potential vuln.
This patch replaces the use of getenv in question with the use of
secure_getenv on glibc platforms.
On non glibc platforms, no change is implemented.
Commit: 68e1d0c97d92eb89821d71490bb8d299e9202f03
https://github.com/llvm/llvm-project/commit/68e1d0c97d92eb89821d71490bb8d299e9202f03
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt-c/Logging.h
M orc-rt/include/orc-rt-c/config.h.in
M orc-rt/lib/executor/CMakeLists.txt
A orc-rt/lib/executor/Logging.cpp
M orc-rt/test/unit/LoggingTest.cpp
Log Message:
-----------
[orc-rt] Add backend-independent category and level APIs to Logging.h (#208696)
Add orc_rt_log_Category_getName, orc_rt_log_Level_getName, and
orc_rt_log_Level_parse. These are independent of the logging backend and
will be used by the printf backend and by upcoming test tools.
Commit: 0ea6d9d0d6fa07da8122514125c09c92d4f66650
https://github.com/llvm/llvm-project/commit/0ea6d9d0d6fa07da8122514125c09c92d4f66650
Author: Aaditya <115080342+easyonaadit at users.noreply.github.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.and.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.max.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.or.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
Log Message:
-----------
[AMDGPU] Extend wave reduction intrinsics to Pre-gfx8 (#208071)
Add support for gfx6/7 families.
These subtargets don't support 64-bit Scalar Compares
or S_MUL_HI_U32. Added workarounds for these where
they come up in the code path.
Commit: fcf7f6e97ab3d3e3c400b81df5fdf31c6adc294e
https://github.com/llvm/llvm-project/commit/fcf7f6e97ab3d3e3c400b81df5fdf31c6adc294e
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt-c/Logging.h
M orc-rt/include/orc-rt-c/config.h.in
M orc-rt/lib/executor/Logging.cpp
M orc-rt/test/unit/LoggingTest.cpp
Log Message:
-----------
[orc-rt] Rename the "disable logging" level from "none" to "off" (#208697)
Rename ORC_RT_LOG_LEVEL_NONE to ORC_RT_LOG_LEVEL_OFF. The old name
collided with the "none" backend (a different mechanism) and could be
misread as "no filtering" rather than "no output"; "off" avoids both
issues.
Commit: c3cb6961edea526dcac75618f611f78618e33b5b
https://github.com/llvm/llvm-project/commit/c3cb6961edea526dcac75618f611f78618e33b5b
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M lldb/source/Breakpoint/BreakpointResolverFileLine.cpp
Log Message:
-----------
[lldb] Fix data race when setting a breakpoint in mulitple debuggers. (#208485)
When you have two SBDebugger with a target for the same `a.out` and you
try to add a breakpoint at the same location.
The data race happens in `CompileUnit::GetSupportFiles()` one debugger
sees the there is no support files. it sets the parsed flag and parses
the support file. The other debugger sees the parsed flag is set and
will not set the breakpoint since the support file is still parsing and
and will assume the symbol file does not have support files.
Commit: f114842d9eab1e53bf25d6e7af7c34001b3b22a4
https://github.com/llvm/llvm-project/commit/f114842d9eab1e53bf25d6e7af7c34001b3b22a4
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/SemaTemplate/concepts-no-early-substitution.cpp
Log Message:
-----------
[Clang] Fix a bug in parameter mapping substitution (#208663)
When building parameter mapping, both substitution and
CheckTemplateArguments were marked as ParameterMappingSubstitution,
while CheckTemplateArguments could also substitute into default
arguments eagerly such that some type constraints were transformed too
early.
It turned out that we don't have to enforce that rebuild in
SubstTypeConstraint, so this reverts that behavior.
Fixes https://github.com/llvm/llvm-project/issues/197597
Commit: cfb25203c25f1c7e36dab1cfbb36e95157135282
https://github.com/llvm/llvm-project/commit/cfb25203c25f1c7e36dab1cfbb36e95157135282
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Parse/ParseDecl.cpp
M clang/test/SemaTemplate/concepts-lambda.cpp
Log Message:
-----------
[Clang] Ensure correct template parameter depth for abbreviated templates (#208699)
Fixes https://github.com/llvm/llvm-project/issues/200682
Commit: 235056b9efea87a1a7fa0d36f94e56a44dbd920b
https://github.com/llvm/llvm-project/commit/235056b9efea87a1a7fa0d36f94e56a44dbd920b
Author: Macro Terra <13541229370 at qq.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/unittests/Tooling/Syntax/TokensTest.cpp
Log Message:
-----------
[clang][Preprocessor] Fix expansion locations for feature-like builtin macros (#207130)
Fixes #196067.
This patch fixes the expansion locations of synthesized tokens produced
by
feature-like builtin macros such as `__has_builtin(...)`.
Feature-like builtin macros lex past the macro name while evaluating
their
arguments. `ExpandBuiltinMacro()` used the final `Tok` location as both
the
expansion start and end when creating the synthesized result token, so
`__has_builtin(...)` results were anchored at the closing paren rather
than the
builtin macro invocation.
Fix by saving the macro-name location before argument parsing and using
it as
the expansion start. The expansion end remains the final `Tok` location.
Add a `syntax::TokenCollector` regression test for a valid
`__has_builtin(...)`
expansion and the `__is_identifier;` recovery path.
Tested:
`ninja -C /home/ubuntu2404/build-196067-assert check-clang`
Total Discovered Tests: 52396
Skipped: 6
Unsupported: 5782
Passed: 46582
Expectedly Failed: 26
Assisted-by: OpenAI Codex
Commit: 640079288c5ea829f481b4904217a386b5c38959
https://github.com/llvm/llvm-project/commit/640079288c5ea829f481b4904217a386b5c38959
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/lib/Driver/CMakeLists.txt
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/AMDGPU.h
R clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp
R clang/lib/Driver/ToolChains/AMDGPUOpenMP.h
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/lib/Driver/ToolChains/HIPAMD.h
M clang/test/Driver/hip-device-libs-llvm-env.hip
M clang/test/Driver/hip-toolchain-no-rdc.hip
Log Message:
-----------
clang/AMDGPU: Merge toolchain subclasses (#204863)
Simplify the toolchain implementations by collapsing
them into one. Previously we had a confusing split. The
AMDGPUToolChain base class implemented much of the base
support. It was subclassed by ROCMToolChain, which would
have been more accurately described as the offloading subclass.
That was further subclassed into HIP and OpenMP specific subclasses.
Deleting those two is the important part of this change. There was
code duplication, and features arbitrarily handled in one but not
the other. The offload kind is passed in almost everywhere if you
really need to know the original language. However, I consider
this an antifeature, and it is really poor QoI to have the HIP
and OpenMP toolchains behave differently in any way. The platform
should be consistent and the driver behaviors should not depend
on the language.
There is additional mess in the handling of spirv, which this
only partially addresses. There are two different spirv toolchain
paths, which for some reason is keyed off of the amdhsa OS, which
is not the property that should change this. I think it will
ultimately be simplier to just merge all spirv handling into HIPSPV.
The copy-paste machine did most of the work here, and I manually
applied some logical fixups that became apparent after the merge.
Co-Authored-By: Claude <noreply at anthropic.com>
Commit: 375cc88b510150db5524055f9866bcc9b4feb277
https://github.com/llvm/llvm-project/commit/375cc88b510150db5524055f9866bcc9b4feb277
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/CMakeLists.txt
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.vni16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/amdgpu-irtranslator.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/and.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_flat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_global.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_local_2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw-fmin-fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.v2f16-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.v2f16-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-load-store-pointers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bug-legalization-artifact-combiner-dead-def.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-binop-s64-with-s32-mask.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-fma-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-rsq.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-short-clamp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dereferenceable-declaration.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dropped_debug_info_assert.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dummy-target.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fabs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fceil.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ffloor.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.v2f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/floor.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fma.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmad.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmamix-constant-bus-violation.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmamix-constant-bus-violation.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3-min-max-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.v2f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fneg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp-int-conversions.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpext.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fsub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.v2i65.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-no-rtn.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.format.f32.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.f16.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.i8.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.cmpswap.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f32.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.cmpswap.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.v2i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/no-ctlz-from-umul-to-lshr-in-postlegalizer.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/orn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizer-combiner-zextload-from-and.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/promote-dependency-on-invariant-result.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbanklegalize-amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.load.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.sample.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.wqm.vote.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-copy.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-icmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-implicit-def.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-insert-vector-elt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mad_64_32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-salu-float.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-phi-s1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-phi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-pseudo-scalar-transcendental.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-waterfall-agpr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-whole-wave-functions.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sbfx.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/select-to-fmin-fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sext_inreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-weird-size.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/true16-merge-values-s16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/trunc-brc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ubfx.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/umed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/unsupported-load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/unsupported-ptr-add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/vni8-across-blocks.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/xnor.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/xor.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/zextload.ll
M llvm/test/CodeGen/AMDGPU/abi-attribute-hints-undefined-behavior.ll
M llvm/test/CodeGen/AMDGPU/add-max.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-gas.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-known-non-null.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-load-offset-from-reg.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw_usub_sat.ll
M llvm/test/CodeGen/AMDGPU/bfi_int.ll
M llvm/test/CodeGen/AMDGPU/bitop3.ll
M llvm/test/CodeGen/AMDGPU/bitreverse.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll
M llvm/test/CodeGen/AMDGPU/buffer-rsrc-ptr-ops.ll
M llvm/test/CodeGen/AMDGPU/build-vector-packed-partial-undef.ll
M llvm/test/CodeGen/AMDGPU/call-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/call-constant.ll
M llvm/test/CodeGen/AMDGPU/call-constexpr.ll
M llvm/test/CodeGen/AMDGPU/call-encoding.ll
M llvm/test/CodeGen/AMDGPU/call-preserved-registers.ll
M llvm/test/CodeGen/AMDGPU/call-reqd-group-size.ll
M llvm/test/CodeGen/AMDGPU/call-return-types.ll
M llvm/test/CodeGen/AMDGPU/call-skip.ll
M llvm/test/CodeGen/AMDGPU/codegen-prepare-addrspacecast-non-null.ll
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_poison.ll
M llvm/test/CodeGen/AMDGPU/ctpop16.ll
M llvm/test/CodeGen/AMDGPU/ctpop64.ll
M llvm/test/CodeGen/AMDGPU/cttz.ll
M llvm/test/CodeGen/AMDGPU/cttz_zero_poison.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/diverge-interp-mov-lower.ll
M llvm/test/CodeGen/AMDGPU/ds-alignment.ll
M llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
M llvm/test/CodeGen/AMDGPU/fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
M llvm/test/CodeGen/AMDGPU/fdiv_flags.f32.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-store.ll
M llvm/test/CodeGen/AMDGPU/fma.f16.ll
M llvm/test/CodeGen/AMDGPU/fmaximum.ll
M llvm/test/CodeGen/AMDGPU/fmaxnum.ll
M llvm/test/CodeGen/AMDGPU/fmed3-cast-combine.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fminimum.ll
M llvm/test/CodeGen/AMDGPU/fminnum.ll
M llvm/test/CodeGen/AMDGPU/fmul-to-ldexp.ll
M llvm/test/CodeGen/AMDGPU/fold-gep-offset.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx950.ll
M llvm/test/CodeGen/AMDGPU/fp_to_sint.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
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M llvm/test/CodeGen/AMDGPU/fptrunc.v2f16.no.fast.math.ll
M llvm/test/CodeGen/AMDGPU/freeze.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f32.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/indirect-call.ll
M llvm/test/CodeGen/AMDGPU/indirect-reg-read-imm-idx.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
M llvm/test/CodeGen/AMDGPU/irtranslator-whole-wave-functions.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w32.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w64.ll
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M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-intrinsic-dyn-vgpr-w32.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-preserve-cc.ll
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M llvm/test/CodeGen/AMDGPU/itofp.i128.ll
M llvm/test/CodeGen/AMDGPU/lds-barrier-memoperand.ll
M llvm/test/CodeGen/AMDGPU/literal64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.av.load.b128.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitop3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bvh8_intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.f16.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.f32.fp8.err.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fixup.f16.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.read.tr.gfx950.ll
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M llvm/test/CodeGen/AMDGPU/llvm.exp2.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.ll
M llvm/test/CodeGen/AMDGPU/llvm.frexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.get.rounding.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.ldexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/llvm.modf.ll
M llvm/test/CodeGen/AMDGPU/llvm.set.rounding.ll
M llvm/test/CodeGen/AMDGPU/llvm.sponentry.ll
M llvm/test/CodeGen/AMDGPU/llvm.sqrt.f16.ll
M llvm/test/CodeGen/AMDGPU/load-atomic-flat.ll
M llvm/test/CodeGen/AMDGPU/load-atomic-global.ll
M llvm/test/CodeGen/AMDGPU/load-atomic-local.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-hsa.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-opt.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/lrint.ll
M llvm/test/CodeGen/AMDGPU/lround.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
M llvm/test/CodeGen/AMDGPU/mad-mix.ll
M llvm/test/CodeGen/AMDGPU/med3-knownbits.ll
M llvm/test/CodeGen/AMDGPU/memset-param-combinations.ll
M llvm/test/CodeGen/AMDGPU/memset-pattern.ll
M llvm/test/CodeGen/AMDGPU/minimummaximum.ll
M llvm/test/CodeGen/AMDGPU/minmax.ll
M llvm/test/CodeGen/AMDGPU/module-lds-false-sharing.ll
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
M llvm/test/CodeGen/AMDGPU/roundeven.ll
M llvm/test/CodeGen/AMDGPU/rsq.f64.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sop1.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-flat.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-global.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-smem.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/AMDGPU/strict_fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_ldexp.f16.ll
M llvm/test/CodeGen/AMDGPU/target-mem-intrinsic-metadata.ll
M llvm/test/CodeGen/AMDGPU/unsupported-image-a16.ll
M llvm/test/CodeGen/AMDGPU/unsupported-image-g16.ll
M llvm/test/CodeGen/AMDGPU/v_pack.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-add.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-and.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fadd.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fminimum.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmul.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-or.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-xor.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
M llvm/test/CodeGen/AMDGPU/workgroup-id-in-arch-sgprs.ll
M llvm/test/CodeGen/Generic/GlobalISel/irtranslator-byte-type.ll
Log Message:
-----------
AMDGPU/GlobalISel: Switch to extended LLTs (#207419)
IRtranslator now translates bfloat. Switch tablegen to use extendedLLTs.
Around 300 regression tests fail to inst-select because GIM_SwitchType
does not accept LLT::scalar. Around 100 mir inst select tests had input
updated to i32/f32 and select successfully. Then there are 24 various
crashes, mostly combiner or machine-verifier, those tests are disabled.
Most problems come from mixing s32 with i32/f32 and the way operator==
works with extendedLLTs compared to GIM_SwitchType.
In general, for inst-select fixes, I think it would be best to avoid
explicit use of LLT::scalar in lowering to avoid mixing it with
LLT::integer/LLT::float See inst-select-extendedLLTs.mir and
inst-select-extendedLLTs-err.mir.
Commit: 9fbbe3e5b4d0bf7ca97621f006a87235dbd4ac77
https://github.com/llvm/llvm-project/commit/9fbbe3e5b4d0bf7ca97621f006a87235dbd4ac77
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
Log Message:
-----------
[GlobalISel] Simplify computeNumSignBits fallback to KnownBits. NFC. (#208675)
Commit: 90f9ee6eed13ac5da7b95c9750d3eb4abc2e9e7a
https://github.com/llvm/llvm-project/commit/90f9ee6eed13ac5da7b95c9750d3eb4abc2e9e7a
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
A llvm/test/CodeGen/AMDGPU/packed_shl64_combine.ll
Log Message:
-----------
[AMDGPU] Make `(v2i32 (trunc v2i64:$a))` legal (#207761)
`performShlCombine` introduced a `v2i32 truncate x:v2i64`. This
pattern is not legal, and is normally expanded by the legalizer.
However, since the combine is done after legalization the illegal
pattern remains.
This happens on `gfx1251` since it has legal `shl v2i64` instructions
(due to `PackedU64Ops`).
This patch introduces a legal pattern for `v2i32 truncate x:v2i64`.
Commit: b3da6d2e8dcc2a4eea1ae75167c6b889aa6b50d3
https://github.com/llvm/llvm-project/commit/b3da6d2e8dcc2a4eea1ae75167c6b889aa6b50d3
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
M llvm/test/CodeGen/AArch64/redundant-orrwrs-from-zero-extend.mir
Log Message:
-----------
AArch64: Fix mishandling subregister in orr peephole (#208015)
Avoids verifier failure regressions in a future change.
Commit: f77162dd86a4abb102e6f9c717ab4e64497ef948
https://github.com/llvm/llvm-project/commit/f77162dd86a4abb102e6f9c717ab4e64497ef948
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/include/clang/Driver/CommonArgs.h
M clang/include/clang/Driver/Job.h
M clang/lib/Driver/Compilation.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
A clang/test/Driver/offload-parallel-device-cc1.cu
Log Message:
-----------
[Clang][Driver] Parallelize device cc1 jobs for offload arches
[Clang][Driver] Parallelize device cc1 jobs for offload arches
Large offload builds can target many device architectures. A common
ROCm build can target around ten `--offload-arch=` values. For a large
single translation unit, the offload device cc1 work before
clang-linker-wrapper can become a build-time bottleneck. Those
per-architecture jobs are independent, but the driver ran them serially,
so `--offload-jobs=` only helped the later wrapper work.
Borrow the parallel job mechanism used by clang-linker-wrapper for the
pre-wrapper device cc1 jobs. Device job construction marks eligible
compile and backend jobs with an offload parallel group. The generic
executor only consumes that opt-in metadata for adjacent device jobs
with distinct bound architectures.
The parallel path is disabled for driver-side output modes and callbacks
so existing serial output handling is preserved. This is NFC for
non-offload compilation.
Commit: 20429870a5ba92762fe0135a207670a1d1d052e2
https://github.com/llvm/llvm-project/commit/20429870a5ba92762fe0135a207670a1d1d052e2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/lib/Driver/Driver.cpp
Log Message:
-----------
clang: Remove extra space and braces in flang check (#208714)
Commit: 9a1fe8e03c0499990b820d0151eabe60da864c9a
https://github.com/llvm/llvm-project/commit/9a1fe8e03c0499990b820d0151eabe60da864c9a
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.vni16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_flat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_global.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_local_2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/clamp-fmed3-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/clamp-minmax-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-fma.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-fma-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-neg-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-neg-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dropped_debug_info_assert.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dummy-target.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fabs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fcmp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/floor.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3-min-max-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmin3-fmax3-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.v2f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fneg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_ps.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-assert-align.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-abi-attribute-hints.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-implicit-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-non-fixed.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-sret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sibling-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-tail-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.atomic.dim.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.sample.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.sample.g16.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.sample.g16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.store.2d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.abs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fract.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.cd.g16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.g16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.store.2d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.interp.inreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.demote.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memset.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.v2i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/select-to-fmin-fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/umed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
M llvm/test/CodeGen/AMDGPU/abi-attribute-hints-undefined-behavior.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-known-non-null.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-sin-cos-f16-f32.ll
M llvm/test/CodeGen/AMDGPU/bitop3.ll
M llvm/test/CodeGen/AMDGPU/bitreverse.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll
M llvm/test/CodeGen/AMDGPU/build-vector-packed-partial-undef.ll
M llvm/test/CodeGen/AMDGPU/call-c-function.ll
M llvm/test/CodeGen/AMDGPU/call-constant.ll
M llvm/test/CodeGen/AMDGPU/call-constexpr.ll
M llvm/test/CodeGen/AMDGPU/call-encoding.ll
M llvm/test/CodeGen/AMDGPU/call-preserved-registers.ll
M llvm/test/CodeGen/AMDGPU/call-reqd-group-size.ll
M llvm/test/CodeGen/AMDGPU/call-skip.ll
M llvm/test/CodeGen/AMDGPU/commute-compares-scalar-float.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
M llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
M llvm/test/CodeGen/AMDGPU/float-sopc-vopc.ll
M llvm/test/CodeGen/AMDGPU/fma.f16.ll
M llvm/test/CodeGen/AMDGPU/fmed3-cast-combine.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fmul-to-ldexp.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fsub-as-fneg-src-modifier.ll
M llvm/test/CodeGen/AMDGPU/indirect-call.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dead.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.frexp.exp.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.noret.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.inreg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.memrealtime.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sqrt.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/llvm.frexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.ldexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.sponentry.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-hsa.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll
M llvm/test/CodeGen/AMDGPU/mad-mix.ll
M llvm/test/CodeGen/AMDGPU/minimummaximum.ll
M llvm/test/CodeGen/AMDGPU/minmax.ll
M llvm/test/CodeGen/AMDGPU/module-lds-false-sharing.ll
M llvm/test/CodeGen/AMDGPU/roundeven.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sop2.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/AMDGPU/strict_ldexp.f16.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-add.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fminimum.ll
M llvm/test/CodeGen/AMDGPU/workgroup-id-in-arch-sgprs.ll
Log Message:
-----------
AMDGPU/GlobalISel: Switch CallLowering to extended LLTs (#208268)
Stop using LLT::scalar for argument lowering in AMDGPUCallLowering.
Mostly straightforward, worth noting that some places now require
a bitcast between integer and float.
Commit: 62bf9d924cb7b5b59bbacf42dfb80c6671671e86
https://github.com/llvm/llvm-project/commit/62bf9d924cb7b5b59bbacf42dfb80c6671671e86
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M libcxx/include/__memory/shared_ptr.h
M libcxx/test/support/min_allocator.h
Log Message:
-----------
[libc++] Fix shared_ptr not accepting allocators with explicit conversions (#208439)
Allocators are only required to be explicitly convertible between
different types. `shared_ptr` currently requires implicit conversions,
however.
This is a regression introduced by #200401.
Commit: 016605d7eceb269a38a0cd3da8bf9cdd39e04f48
https://github.com/llvm/llvm-project/commit/016605d7eceb269a38a0cd3da8bf9cdd39e04f48
Author: Kerry McLaughlin <kerry.mclaughlin at arm.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/dag-combine-concat-vectors.ll
A llvm/test/CodeGen/AArch64/get-active-lane-mask-extract-nosve.ll
M llvm/test/CodeGen/AArch64/get-active-lane-mask-extract.ll
M llvm/test/CodeGen/AArch64/sve-load-store-legalisation.ll
Log Message:
-----------
[AArch64][CodeGen] Split wide active lane mask into smaller masks if preferred (#202909)
Extends the AArch64 specific DAG combine for get_active_lane_mask to split
up a single wide active lane mask used by a series of subvector extracts
into several smaller get_active_lane_mask nodes if preferred.
This PR is part of a series of changes leading to the use of wide active
lane masks as the canonical form in LoopVectorize when choosing to
interleave and tail-fold loops. #193757 is the original PR where this was
discussed.
The motivation for this PR is to leave the decision on which form of the IR
to use up to the target. This will remove the need for more complex decisions
and transformations during vectorisation to query whether it's best to create
a single mask + extracts or multiple smaller masks.
Commit: 68ee7f096e21837f3d025e5e4ac6bb761588a409
https://github.com/llvm/llvm-project/commit/68ee7f096e21837f3d025e5e4ac6bb761588a409
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
A libcxx/test/benchmarks/algorithms/sorting/is_heap.bench.cpp
Log Message:
-----------
[libc++] Add benchmarks for std::is_heap and std::is_heap_until (#207045)
This continues expanding our set of benchmarks.
Assisted by Claude
Commit: d600c925f4df79a008ddbb6c1862e1d8b0ee0686
https://github.com/llvm/llvm-project/commit/d600c925f4df79a008ddbb6c1862e1d8b0ee0686
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Lex/Lexer.cpp
M clang/lib/Lex/TokenConcatenation.cpp
A clang/test/Lexer/dollar-idents.cpp
Log Message:
-----------
[Clang] Supports dollars in UDLs and pp-numbers (#208490)
When dollars are supported in identifiers, we should be consistent.
Fixes #173985
Fixes #171190
Commit: d6ef81ce4e18563c49116fc82502e4ef237a201d
https://github.com/llvm/llvm-project/commit/d6ef81ce4e18563c49116fc82502e4ef237a201d
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M libcxxabi/include/cxxabi.h
M libcxxabi/src/abort_message.h
M libcxxabi/src/cxa_aux_runtime.cpp
M libcxxabi/src/cxa_default_handlers.cpp
M libcxxabi/src/cxa_exception.cpp
M libcxxabi/src/cxa_handlers.cpp
M libcxxabi/src/cxa_handlers.h
M libcxxabi/src/cxa_personality.cpp
M libcxxabi/src/cxa_vector.cpp
M libcxxabi/src/cxa_virtual.cpp
Log Message:
-----------
[libc++abi][NFC] Use C++11 spelling of [[noreturn]] (#207344)
We already use the C++11 spelling for libc++, and there isn't much of a
reason not to use it. Except for the changes in `cxxabi.h` this is even
fully standard code.
Commit: f66516456d3cf4cff2c1ab6d83afac6e2f9e4c26
https://github.com/llvm/llvm-project/commit/f66516456d3cf4cff2c1ab6d83afac6e2f9e4c26
Author: Yihan Wang <yronglin777 at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Lex/PPDirectives.cpp
A clang/test/Lexer/invalid-directive.cpp
Log Message:
-----------
[clang] Don't crash in invalid #module directive (#208695)
The following preprocessing directive is not a C++ module directive,
don't handle it in C++ module subroutine.
```cpp
#module
```
Fixes https://github.com/llvm/llvm-project/issues/179220.
Signed-off-by: yronglin <yronglin777 at gmail.com>
Commit: f2dfbf06f7db1a3cace4beb9f65d5a7f6a8b6235
https://github.com/llvm/llvm-project/commit/f2dfbf06f7db1a3cace4beb9f65d5a7f6a8b6235
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AArch64/icmp.ll
M llvm/test/CodeGen/ARM/fp16-promote.ll
M llvm/test/CodeGen/Mips/cconv/vector.ll
M llvm/test/CodeGen/Mips/cmov.ll
M llvm/test/CodeGen/NVPTX/i1-select.ll
M llvm/test/CodeGen/X86/fp-strict-scalar-cmp-fp16.ll
M llvm/test/CodeGen/X86/fp-strict-scalar-cmp.ll
M llvm/test/CodeGen/X86/fp128-libcalls-strict.ll
M llvm/test/CodeGen/X86/fp80-strict-scalar-cmp.ll
M llvm/test/CodeGen/X86/isel-select-cmov.ll
M llvm/test/CodeGen/X86/select-constant-xor.ll
M llvm/test/CodeGen/X86/select-mmx.ll
A llvm/test/CodeGen/X86/select-of-load-poison.ll
Log Message:
-----------
[SDAG] Freeze condition in select of load fold (#208683)
When converting `select cond, (load p1), (load p2)` to `load (select
cond, p1, p2)`, if `cond` is poison, originally this would result in a
`poison` result, while after the transform it would result in a load of
poison, which is immediate UB. Fix this by freezing the condition.
Fixes https://github.com/llvm/llvm-project/issues/208611.
Commit: 87901900fc10f1a3cdf04b20fef371562bf31d34
https://github.com/llvm/llvm-project/commit/87901900fc10f1a3cdf04b20fef371562bf31d34
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/test/CodeGen/SPIRV/global-var-intrinsic.ll
A llvm/test/CodeGen/SPIRV/pointers/fun-ptr-as-data-load-store.ll
M llvm/test/CodeGen/SPIRV/transcoding/block_w_struct_return.ll
M llvm/test/CodeGen/SPIRV/transcoding/enqueue_kernel.ll
M llvm/test/CodeGen/SPIRV/transcoding/global_block.ll
Log Message:
-----------
[SPIR-V] Diagnose function used as data pointer without SPV_INTEL_function_pointers (#207347)
Commit: 53130f3398014dd78ff1ce3d6b028f8cadade3ca
https://github.com/llvm/llvm-project/commit/53130f3398014dd78ff1ce3d6b028f8cadade3ca
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-extract.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-sext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-unmerge-values.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-zext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_flat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_global.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-load-store-pointers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-rsq.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dummy-target.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/floor.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-value.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-abi-attribute-hints.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-implicit-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-sret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-abs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-addrspacecast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-amdgcn.workitem.id.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-and.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bitcast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bitreverse.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bswap.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-build-vector-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-build-vector.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctls.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz-zero-poison.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctpop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-cttz-zero-poison.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-cttz.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-divrem.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fabs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcanonicalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fceil.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcopysign.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcos.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fdiv.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fexp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fexp2.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ffloor.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-flog.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-flog10.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-flog2.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fma.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmad.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmaxnum.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fminnum.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fneg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpow.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpowi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptosi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptoui.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-freeze.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fshl.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsqrt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-implicit-def.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-intrinsic-amdgcn-fdiv-fast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-intrinsic-round.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-intrinsic-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.atomic.dim.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.dim.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2darraymsaa.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.3d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.sample.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.sample.d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.sample.g16.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.sample.g16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.store.2d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.s.buffer.load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant-32bit.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-mul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-phi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-rotl-rotr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sdiv.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext-inreg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-constant-32bit.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sitofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smulh.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smulo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-srem.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sshlsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssubo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssubsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-udiv.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uitofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umulh.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umulo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-urem.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ushlsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-vector-args-gfx8-plus.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-xor.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-constant-32bit.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.o.dim.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.swap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.powi.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-constant32bit.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mad.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul-known-bits.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul-known-bits.i64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-gas.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll
M llvm/test/CodeGen/AMDGPU/build-vector-packed-partial-undef.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_poison.ll
M llvm/test/CodeGen/AMDGPU/fdiv_flags.f32.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp_to_sint.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f32.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w32.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w64.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-intrinsic-dyn-vgpr-w32.ll
M llvm/test/CodeGen/AMDGPU/isel-whole-wave-functions.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bvh8_intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dual_intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.atomic.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.and.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.or.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.atomic.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.frexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-opt.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/lrint.ll
M llvm/test/CodeGen/AMDGPU/med3-knownbits.ll
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
M llvm/test/CodeGen/AMDGPU/rsq.f64.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-or.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-xor.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
M llvm/test/CodeGen/AMDGPU/workgroup-id-in-arch-sgprs.ll
Log Message:
-----------
AMDGPU/GlobalISel: Switch legalizer custom lowering to extended LLTs (#208269)
Stop using LLT::scalar in custom lowering in AMDGPULegalizerInfo.
The exception is S1 since it seems to work fine.
Does not change legalizer actions. In general this is intended as a
mechanical step in amdgpu's switch to extended LLTs, just try to
avoid LLT::scalar in instructions generated after IRtranslator,
since it seems like a step in the right direction. Some tests remove
-global-isel-abort=2 since GIM_SwitchType no longer fails on
LLT::scalar. Exposes a couple of new failures with 16bit bitcast.
Commit: 8544134f118dcbd1543e29c1ae6b5ac019d4a138
https://github.com/llvm/llvm-project/commit/8544134f118dcbd1543e29c1ae6b5ac019d4a138
Author: Zain <beingzainsv at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M compiler-rt/lib/builtins/hexagon/dffma.S
A compiler-rt/test/builtins/Unit/hexagon_fmadf5_test.c
Log Message:
-----------
[compiler-rt][hexagon] Fix `__hexagon_fmadf5` overflow under directed rounding (#207373)
The overflow path in `__hexagon_fmadf5` computed the round-mode
predicate (inf vs. largest-finite) into p0, but then overwrote p0 with
`dfcmp.eq(ATMP,ATMP)` before consuming it. Since ATMP is +inf,
`dfcmp.eq(ATMP,ATMP)` is always true, so CTMP was unconditionally set to
infinity and the rounding-mode decision was discarded.
As a result, a finite-magnitude overflow returned +/-inf in every
rounding mode.
Fix: Fuse the selection into a single packet so the round-mode predicate
selects inf-vs-DBL_MAX, and recompute p0 = dfcmp.eq afterwards only to
raise the exception flags which matching the correct sequence already
used
by dfdiv.S.
Also, I've added a regression test (`hexagon_fmadf5_test.c`) covering
FMA special
cases: NaN propagation, invalid operations (0*inf, inf+(-inf)), infinity
propagation, exact results, signed-zero of exact sums, the single-
rounding property, overflow under all rounding modes, and subnormal
results.
Please let me know if this test for the builtin is in the right place,
or if it should be in some place else.
Assisted by: GPT 5.5
Signed-off-by: Zain Siddavatam <zsiddava at qti.qualcomm.com>
Commit: 26d1c4f05ad9b715336a1cdc8be9257f6e30038d
https://github.com/llvm/llvm-project/commit/26d1c4f05ad9b715336a1cdc8be9257f6e30038d
Author: Yitzhak Mandelbaum <ymand at users.noreply.github.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/lib/Analysis/FlowSensitive/Transfer.cpp
M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
Log Message:
-----------
[clang][dataflow] Fix bug in transfer function of CK_BaseToDerived (#208726)
Bug fix. In the transfer function (one of the cast cases), the loop
adding synthetic fields to the derived record storage location was incorrectly
nested inside the loop that iterates over modeled fields (`getModeledFields`).
If the derived class has 0 modeled fields, `getModeledFields(Derived)`
is empty. Consequently, synthetic fields were never added to the storage
location, causing an assertion failure in `StorageLocation::getSyntheticField`
when initializing field values.
This patch moves the synthetic fields loop outside of the modeled fields loop
and adds a regression unit test in `TransferTest.cpp`.
Commit: 3018fd74d14d9b9c25f7931e6ef51ee5f203a66b
https://github.com/llvm/llvm-project/commit/3018fd74d14d9b9c25f7931e6ef51ee5f203a66b
Author: Jerry Dang <kuroyukiasuna at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/test/CodeGen/AArch64/framelayout-fpr128-csr.ll
M llvm/test/CodeGen/AArch64/framelayout-fpr128-spill.mir
Log Message:
-----------
[AArch64] Stop determineCalleeSaves double counting registers with saved supers (#208521)
`determineCalleeSaves()` in `AArch64FrameLowering` double counts the
D8-D15/Q8-Q1 overlap - fixed by skipping sub-registers whose super is
saved.
Fixes #204564
Commit: 73976bc0e88a6fb5e8213726074f2b0474899499
https://github.com/llvm/llvm-project/commit/73976bc0e88a6fb5e8213726074f2b0474899499
Author: Raphael Isemann <rise at apple.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
A lldb/test/API/commands/command/script/import/import-error/Makefile
A lldb/test/API/commands/command/script/import/import-error/TestImportError.py
A lldb/test/API/commands/command/script/import/import-error/fail_importerror.py
A lldb/test/API/commands/command/script/import/import-error/fail_valueerror.py
R lldb/test/API/commands/command/script/import/rdar-12586188/Makefile
R lldb/test/API/commands/command/script/import/rdar-12586188/TestRdar12586188.py
R lldb/test/API/commands/command/script/import/rdar-12586188/fail12586188.py
R lldb/test/API/commands/command/script/import/rdar-12586188/fail212586188.py
A lldb/test/API/commands/expression/int128/Test128BitsInteger.py
A lldb/test/API/commands/expression/int128/main.c
R lldb/test/API/commands/expression/rdar42038760/TestScalarURem.py
R lldb/test/API/commands/expression/rdar42038760/main.c
R lldb/test/API/commands/expression/rdar44436068/Test128BitsInteger.py
R lldb/test/API/commands/expression/rdar44436068/main.c
A lldb/test/API/commands/expression/urem-sign/TestScalarURem.py
A lldb/test/API/commands/expression/urem-sign/main.c
R lldb/test/API/functionalities/data-formatter/summary-string-onfail/Test-rdar-9974002.py
A lldb/test/API/functionalities/data-formatter/summary-string-onfail/TestSummaryStringOnFail.py
A lldb/test/API/lang/objc/coalesced-cf-types/Makefile
A lldb/test/API/lang/objc/coalesced-cf-types/TestCoalescedCFTypes.py
A lldb/test/API/lang/objc/coalesced-cf-types/main.m
A lldb/test/API/lang/objc/dynamic-type-children/Makefile
A lldb/test/API/lang/objc/dynamic-type-children/TestDynamicTypeChildren.py
A lldb/test/API/lang/objc/dynamic-type-children/main.m
R lldb/test/API/lang/objc/rdar-10967107/Makefile
R lldb/test/API/lang/objc/rdar-10967107/TestRdar10967107.py
R lldb/test/API/lang/objc/rdar-10967107/main.m
R lldb/test/API/lang/objc/rdar-12408181/Makefile
R lldb/test/API/lang/objc/rdar-12408181/TestRdar12408181.py
R lldb/test/API/lang/objc/rdar-12408181/main.m
Log Message:
-----------
[lldb][test] Get rid of radar references in test names (#208673)
No one outside Apple can access the associated radars and understand
what these tests are about. These tests have other problems, but this
makes them at least possible to comprehend for everyone.
Commit: 5394e2aec901f34dc3f92976529dab9ce7829d93
https://github.com/llvm/llvm-project/commit/5394e2aec901f34dc3f92976529dab9ce7829d93
Author: Raphael Isemann <rise at apple.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M lldb/test/API/lang/c/unions/TestUnionMembers.py
M lldb/test/API/lang/c/unions/main.c
Log Message:
-----------
[lldb][test] Modernize and expand C union test (#208662)
Replace most of the test's setup code with modern test utils and expand
the test case to cover more common or potentially problematic uses of
unions.
Commit: 54aa96fdd08c79bbd8143cbbd3b2fcb95b1377fc
https://github.com/llvm/llvm-project/commit/54aa96fdd08c79bbd8143cbbd3b2fcb95b1377fc
Author: Raphael Isemann <rise at apple.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
A lldb/test/API/lang/cpp/builtin_types/long_int/Makefile
A lldb/test/API/lang/cpp/builtin_types/long_int/TestLongIntTypes.py
A lldb/test/API/lang/cpp/builtin_types/long_int/main.cpp
Log Message:
-----------
[lldb][test] Add a new test for long types (#208447)
This is a new modern test for long types that replaces the test logic
from `API/types` test that is about to be deleted. This is a distinct
test from the normal integer types due to long depending on data models
which change depending on platform.
See also #208402
assisted-by: claude
Commit: a465ef6968f30abacde4f2d526b98b206b9a149f
https://github.com/llvm/llvm-project/commit/a465ef6968f30abacde4f2d526b98b206b9a149f
Author: Raphael Isemann <rise at apple.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
A lldb/test/API/lang/cpp/recursive_types/function-ptrs/Makefile
A lldb/test/API/lang/cpp/recursive_types/function-ptrs/TestRecursiveTypesFuncPtrs.py
A lldb/test/API/lang/cpp/recursive_types/function-ptrs/main.cpp
A lldb/test/API/lang/cpp/recursive_types/function-ptrs/recursive_types.cpp
Log Message:
-----------
[lldb][test] Add a new test for recursive types (#208449)
This is a new modern test for recursive types that self-reference
themselves via function pointers.
This replaces the test logic from `API/types` test that is about to be
deleted.
See also #208402
assisted-by: claude
Commit: 2c0541b661c98467caf0b70d147ff8ffa34a6331
https://github.com/llvm/llvm-project/commit/2c0541b661c98467caf0b70d147ff8ffa34a6331
Author: Raphael Isemann <rise at apple.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
A lldb/test/API/lang/cpp/builtin_types/char/Makefile
A lldb/test/API/lang/cpp/builtin_types/char/TestCharTypes.py
A lldb/test/API/lang/cpp/builtin_types/char/main.cpp
Log Message:
-----------
[lldb][test] Add a new test for char types (#208442)
This is a new modern test for char types that replaces the test logic
from `API/types` test that is about to be deleted.
See also #208402
assisted-by: claude
Commit: c8b02ba5ac7a37c4fa0100431b357da74f1b200f
https://github.com/llvm/llvm-project/commit/c8b02ba5ac7a37c4fa0100431b357da74f1b200f
Author: Raphael Isemann <rise at apple.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M lldb/test/API/lang/c/blocks/TestBlocks.py
M lldb/test/API/lang/c/blocks/main.c
Log Message:
-----------
[lldb][test] Expand blocks test (#208406)
This moves some of the tested logic from the `types/` test that is about
to be deleted to the already existing c/blocks test.
See also #208402
assisted-by: claude
Commit: ff5363bf29ba9f426b241abb9e72d12d9b785221
https://github.com/llvm/llvm-project/commit/ff5363bf29ba9f426b241abb9e72d12d9b785221
Author: Bartosz Wiklak <bwiklak at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang-tools-extra/clangd/index/remote/marshalling/Marshalling.cpp
M clang-tools-extra/clangd/index/remote/server/Server.cpp
A clang-tools-extra/clangd/test/remote-index/cross-platform-root.test
M clang-tools-extra/clangd/unittests/remote/MarshallingTests.cpp
Log Message:
-----------
[clangd][remote] Add clangd-index-server support for cross platform indexes (#207202)
The main use case is to serve windows index on linux server.
Without this change server wasn't able to check if project_root path is
absolute and was closed with error: "Index root should be an absolute
path."
This change is meant to solve issue:
https://github.com/clangd/clangd/issues/2646
Commit: 72b8db717ac2a5dfb03755b592e796a61c7db60b
https://github.com/llvm/llvm-project/commit/72b8db717ac2a5dfb03755b592e796a61c7db60b
Author: Federico Bruzzone <federico.bruzzone.i at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/invalid.mlir
Log Message:
-----------
[mlir][vector] add consistent stride verification to masked load/store and gather/scatter ops (#205869)
Extend negative stride checks to MaskedLoadOp, MaskedStoreOp, GatherOp,
and ScatterOp to match LoadOp and StoreOp behavior.
Depends on: https://github.com/llvm/llvm-project/pull/204611.
AI Disclaimer: I used AI for the tests.
@banach-space @dcaballe If you look at the latest commit, you can see
why the integration tests were failing in #204842. Those two calls were
added in this PR, I sincerely apologize to you!
---------
Signed-off-by: Federico Bruzzone <federico.bruzzone.i at gmail.com>
Commit: b12c64e0a26e9d0a45bc013bb1740e16100a700c
https://github.com/llvm/llvm-project/commit/b12c64e0a26e9d0a45bc013bb1740e16100a700c
Author: Marquis <98034810+marquisburg at users.noreply.github.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
M mlir/test/Dialect/Vector/emulate-narrow-type-unsupported.mlir
Log Message:
-----------
[mlir][vector] Fix crash on untraceable masks in getCompressedMaskOp (#207299)
The loop tracing a mask back to its creation op assumed the chain always
ends at a create_mask/constant_mask/arith.constant, a block-argument
mask made it fall through to isa<> on a null op (segfault), and any
other unhandled defining op spun it forever.
Fixes #206928
Claude Fable 5 did assist with this.
Commit: 6211a71358a4d23d810a0bca526ea28f98e07996
https://github.com/llvm/llvm-project/commit/6211a71358a4d23d810a0bca526ea28f98e07996
Author: Adam Scott <adamscott200322 at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/avx512-calling-conv.ll
M llvm/test/CodeGen/X86/avx512-ext.ll
M llvm/test/CodeGen/X86/avx512-insert-extract.ll
M llvm/test/CodeGen/X86/avx512-load-store.ll
M llvm/test/CodeGen/X86/avx512-mask-op.ll
M llvm/test/CodeGen/X86/avx512-masked_memop-16-8.ll
M llvm/test/CodeGen/X86/avx512fp16-mov.ll
M llvm/test/CodeGen/X86/build-vector-128.ll
M llvm/test/CodeGen/X86/build-vector-256.ll
M llvm/test/CodeGen/X86/build-vector-512.ll
A llvm/test/CodeGen/X86/buildvec-strided-loads.ll
M llvm/test/CodeGen/X86/masked_gather_scatter_widen.ll
M llvm/test/CodeGen/X86/vector-compress.ll
Log Message:
-----------
[X86] EltsFromConsecutiveLoads - handle trunc(wideload()) patterns (#199371)
The existing path emits N x vpinsrb for buildvecs whose elements are
loads at a regular byte stride larger than the element size:
```asm
movzbl 216(%rsp), %eax
vmovd %eax, %xmm0
vpinsrb $1, 224(%rsp), %xmm0, %xmm0
vpinsrb $2, 232(%rsp), %xmm0, %xmm0
...
vpinsrb $15, 336(%rsp), %xmm0, %xmm0
```
This patch adds a strided-load path to EltsFromConsecutiveLoads that
folds these into wide load(s) + vector truncation:
```asm
vmovdqu64 216(%rsp), %zmm0
vmovdqu64 280(%rsp), %zmm1
vpmovqb %zmm0, %xmm0
vpmovqb %zmm1, %xmm1
vpunpcklqdq %xmm1, %xmm0, %xmm0
```
The combine detects element loads at a uniform power of 2 byte stride
larger than the element size, picks a wide-load size (ZMM/YMM/XMM) from
the buildvec lane count, and emits X86ISD::VTRUNC for partial pieces or
ISD::TRUNCATE for full pieces. Multi-piece results recombine with
pairwise shuffle (partial) or CONCAT_VECTORS (full).
This simplifies 12 existing X86 codegen tests where many-arg functions
hit the strided pattern naturally.
Also created a new test file with 14 tests covering:
- 3 cases with 4-byte stride: v16i8, v8i16, and v32i8 destinations
(single-piece full and 2-piece full with CONCAT_VECTORS)
- 3 cases with 8-byte stride and partial truncation: v16i8 (2-piece
pairwise), v16i16 (2-piece pairwise), v32i8 (4-piece pairwise tree)
- 1 sub-xmm destination (v8i8) that widens to v16i8
- 3 partial-fill destinations of v32i8: trailing zero padding,
INSERT_SUBVECTOR placement at lane 16, vector shuffle placement at lane
8
- 1 reverse-stride case
- 3 negative tests: volatile loads, non-uniform stride, sparse loaded
positions with interleaved undefs
Fixes #198175
Commit: 9d1c207b18fea9bacbe921d182be647d75bf3e95
https://github.com/llvm/llvm-project/commit/9d1c207b18fea9bacbe921d182be647d75bf3e95
Author: Guy David <guyda96 at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/neg-sign-masked-and.ll
Log Message:
-----------
[AArch64] Reassociate neg (and X, M) with an all-0/1's mask M (#207671)
Commit: 7138e1f3e2170de61e10f2d1fae03690de591548
https://github.com/llvm/llvm-project/commit/7138e1f3e2170de61e10f2d1fae03690de591548
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVISelLowering.h
A llvm/test/CodeGen/SPIRV/extensions/SPV_ALTERA_arbitrary_precision_integers/i128-switch-condition-type.ll
A llvm/test/CodeGen/SPIRV/switch-odd-width-condition.ll
Log Message:
-----------
[SPIR-V] Fix crash on switch with odd-width condition type (#208026)
getPreferredSwitchConditionType called getSimpleVT unconditionally,
which asserts on extended EVTs like i31
Return i1 for non-simple types to keep CodeGenPrepare from widening the
condition
Commit: 4c6646f1e497e25cb4e6a633ce565c864e66de93
https://github.com/llvm/llvm-project/commit/4c6646f1e497e25cb4e6a633ce565c864e66de93
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/alloca.ll
A llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call-addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll
M llvm/test/CodeGen/AMDGPU/attributor-noopt.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx908.ll
M llvm/test/CodeGen/AMDGPU/comdat.ll
M llvm/test/CodeGen/AMDGPU/default-fp-mode.ll
M llvm/test/CodeGen/AMDGPU/elf-notes.ll
M llvm/test/CodeGen/AMDGPU/exceed-max-sgprs.ll
M llvm/test/CodeGen/AMDGPU/fract-match.ll
M llvm/test/CodeGen/AMDGPU/gfx902-without-xnack.ll
M llvm/test/CodeGen/AMDGPU/global_smrd_cfg.ll
M llvm/test/CodeGen/AMDGPU/hsa-fp-mode.ll
M llvm/test/CodeGen/AMDGPU/hsa-func.ll
M llvm/test/CodeGen/AMDGPU/hsa-note-no-func.ll
M llvm/test/CodeGen/AMDGPU/hsa.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
A llvm/test/CodeGen/AMDGPU/lower-kernargs-lds-ptr.ll
M llvm/test/CodeGen/AMDGPU/lower-kernargs.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-hybrid.ll
M llvm/test/CodeGen/AMDGPU/opencl-printf-invalid-signature.ll
M llvm/test/CodeGen/AMDGPU/preload-kernarg-header.ll
M llvm/test/CodeGen/AMDGPU/private-memory-atomics.ll
M llvm/test/CodeGen/AMDGPU/promote-kernel-arguments.ll
M llvm/test/CodeGen/AMDGPU/sgpr-regalloc-flags.ll
M llvm/test/CodeGen/AMDGPU/stack-size-overflow.ll
M llvm/test/CodeGen/AMDGPU/unknown-processor.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-wcg-attributes.mir
M llvm/test/Transforms/LoopStrengthReduce/AMDGPU/different-addrspace-crash.ll
M llvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-void.ll
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/source-lines.ll
Log Message:
-----------
AMDGPU: Manually convert some tests to use subarches (#208638)
Commit: 618ac1068f42a03eda1a2e4d2e160ae441665302
https://github.com/llvm/llvm-project/commit/618ac1068f42a03eda1a2e4d2e160ae441665302
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
Log Message:
-----------
AMDGPU/GlobalISel: Fix buildbot failure for unused variable (used in assert) (#208743)
Commit: 8834939829a3e3cfee2b98a3db6f12d068686ed8
https://github.com/llvm/llvm-project/commit/8834939829a3e3cfee2b98a3db6f12d068686ed8
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/test/CodeGen/M68k/Control/cmp.ll
M llvm/test/CodeGen/M68k/setcc-redundant.ll
Log Message:
-----------
[M68k] Update tests (#208748)
After f2dfbf06f7db1a3cace4beb9f65d5a7f6a8b6235.
Commit: ef3ac7a77a06442ab2ac57f5417cfa9ded7a3b46
https://github.com/llvm/llvm-project/commit/ef3ac7a77a06442ab2ac57f5417cfa9ded7a3b46
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M lldb/source/Plugins/Platform/Windows/PlatformWindows.cpp
A lldb/test/API/driver/longpath/Makefile
A lldb/test/API/driver/longpath/TestLongPathDriver.py
A lldb/test/API/driver/longpath/main.c
A lldb/test/API/functionalities/longpath/Makefile
A lldb/test/API/functionalities/longpath/TestLongPath.py
A lldb/test/API/functionalities/longpath/main.c
A lldb/test/API/tools/lldb-dap/longpath/Makefile
A lldb/test/API/tools/lldb-dap/longpath/TestDAP_launch_longPath.py
A lldb/test/API/tools/lldb-dap/longpath/main.c
Log Message:
-----------
[lldb][Windows] Support modules with long paths (#206099)
`PlatformWindows::DoLoadImage` injected a 261-byte buffer for the loaded
module path. Longer paths would be truncated and fail to load. This
patch adds a growing buffer (up to the NT limit) which is used only when
`GetModuleFileNameA` reports truncation, re-querying without taking an
extra reference on the module.
This patch also adds 3 tests for lldb, lldb-driver and the SBAPI. They
are really regression tests which break if long path support regresses.
Requires:
- https://github.com/llvm/llvm-project/pull/206046
- https://github.com/llvm/llvm-project/pull/206060
Commit: d58b0562a340b043ed83b0fb4375e89ed74fc621
https://github.com/llvm/llvm-project/commit/d58b0562a340b043ed83b0fb4375e89ed74fc621
Author: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/test/OpenMP/error_codegen.cpp
M compiler-rt/test/profile/Linux/instrprof-debug-info-correlate-warnings.ll
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
M llvm/include/llvm/IR/DIBuilder.h
M llvm/include/llvm/IR/DebugInfo.h
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/include/llvm/IR/Metadata.h
M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
M llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
M llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.h
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVIRReader.cpp
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/IR/DebugInfoMetadata.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Target/BPF/BPFAbstractMemberAccess.cpp
M llvm/lib/Target/BPF/BTFDebug.cpp
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/Debugify.cpp
M llvm/test/Bitcode/DIModule-fortran-external-module.ll
A llvm/test/Bitcode/upgrade-cu-static-locals.ll
A llvm/test/Bitcode/upgrade-cu-static-locals.ll.bc
M llvm/test/CodeGen/AArch64/arm64-2011-03-17-AsmPrinterCrash.ll
M llvm/test/CodeGen/BPF/BTF/static-var-inited-sec.ll
M llvm/test/CodeGen/BPF/BTF/static-var-inited.ll
M llvm/test/CodeGen/BPF/BTF/static-var-readonly-sec.ll
M llvm/test/CodeGen/BPF/BTF/static-var-readonly.ll
M llvm/test/CodeGen/BPF/BTF/static-var-sec.ll
M llvm/test/CodeGen/BPF/BTF/static-var.ll
M llvm/test/CodeGen/BPF/dwarfdump.ll
M llvm/test/CodeGen/PowerPC/pr24546.ll
M llvm/test/CodeGen/X86/dbg-distringtype-uint.ll
M llvm/test/DebugInfo/COFF/fortran-basic.ll
M llvm/test/DebugInfo/COFF/fortran-contained-proc.ll
M llvm/test/DebugInfo/COFF/global_visibility.ll
M llvm/test/DebugInfo/COFF/type-quals.ll
M llvm/test/DebugInfo/Generic/2009-11-05-DeadGlobalVariable.ll
M llvm/test/DebugInfo/Generic/global-var-in-abstract-lexical-block.ll
M llvm/test/DebugInfo/Generic/inlined-static-var.ll
A llvm/test/DebugInfo/Generic/verifier-invalid-dicompileunit.ll
M llvm/test/DebugInfo/Generic/verifier-invalid-disubprogram.ll
M llvm/test/DebugInfo/Symbolize/XCOFF/xcoff-symbolize-data.ll
M llvm/test/DebugInfo/X86/DW_AT_specification.ll
M llvm/test/DebugInfo/X86/dbg-value-transfer-order.ll
M llvm/test/DebugInfo/X86/dimodule-external-fortran.ll
M llvm/test/DebugInfo/X86/distringtype.ll
M llvm/test/DebugInfo/X86/global-sra-struct-fit-segment.ll
M llvm/test/DebugInfo/X86/global-sra-struct-part-overlap-segment.ll
M llvm/test/DebugInfo/X86/gnu-public-names.ll
A llvm/test/DebugInfo/X86/lexical-block-static-var.ll
M llvm/test/DebugInfo/X86/namelist1.ll
M llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-4.ll
M llvm/test/DebugInfo/duplicate_dbgvalue.ll
M llvm/test/Instrumentation/InstrProfiling/debug-info-correlate-bitmap.ll
M llvm/test/Instrumentation/InstrProfiling/debug-info-correlate.ll
M llvm/test/Transforms/Util/clone-dicompileunit.ll
M llvm/test/tools/llvm-debuginfo-analyzer/DWARF/Inputs/ThreadLocalStorage.ll
M llvm/unittests/Transforms/Utils/CloningTest.cpp
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMDialectBytecode.td
M mlir/lib/CAPI/Dialect/LLVM.cpp
M mlir/lib/Target/LLVMIR/DebugImporter.cpp
M mlir/lib/Target/LLVMIR/DebugTranslation.cpp
M mlir/lib/Target/LLVMIR/DebugTranslation.h
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Target/LLVMIR/Import/debug-info.ll
M mlir/test/Target/LLVMIR/llvmir-debug.mlir
Log Message:
-----------
[DebugMetadata][DwarfDebug][CodeView] Support function-local static variables in lexical block scopes (6/7) (#187927)
RFC
https://discourse.llvm.org/t/rfc-dwarfdebug-fix-and-improve-handling-imported-entities-types-and-static-local-in-subprogram-and-lexical-block-scopes/68544
Similar to imported declarations and types, the patch tracks
function-local static variables (globals in terms of LLVM IR) in
DISubprogram's 'retainedNodes'. DwarfDebug is adjusted in accordance
with the aforementioned metadata change and provided a support of static
locals scoped by a lexical block. CodeViewDebug is modified to collect
global variables from DISubprogram's 'retainedNodes' too.
The patch assumes that DICompileUnit's 'globals' no longer tracks static
locals and DwarfDebug would assert if any locally-scoped variables get
placed there.
This change has already been reviewed in
https://reviews.llvm.org/D144008, but I’m opening a new PR because it
has been a while since it was approved. Additional logic was added to
CloneFunction to deal with DISubprograms that have static locals: if
such a subprogram is cloned, DIGlobalVariableExpressions are removed
from retainedNodes of the clone. This is consistent with the current
behavior, in which DIGlobalVariableExpressions are not cloned.
Authored-by: Kristina Bessonova <kbessonova at accesssoftek.com>
Co-authored-by: Tobias Gysi <tobias.gysi at nextsilicon.com>
Commit: b4cf9c7c89ec541495c38c4e34fa8967713bf843
https://github.com/llvm/llvm-project/commit/b4cf9c7c89ec541495c38c4e34fa8967713bf843
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorUnroll.cpp
M mlir/test/Dialect/Vector/vector-unroll-options.mlir
M mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
Log Message:
-----------
[MLIR][Vector] Relax shape_cast unrolling to per-reassociation-group contiguity (#205684)
UnrollShapeCastPattern previously only unrolled a vector.shape_cast when
the target unroll tile was contiguous in the whole result vector
(isContiguous(targetShape, resultShape)). This rejected valid cases such
as:
```mlir
%0 = vector.shape_cast %src : vector<8x32xf8> to vector<8x1x32xf8> // target tile [8, 1, 4]
%1 = vector.shape_cast %src : vector<8x32x32xf8> to vector<256x32xf8> // target tile [16, 4]
```
This PR factors the source and result shapes of a shape_cast into
independent reassociation groups — maximal aligned source/result dim
ranges that hold equal element counts:
```
- 8x32 → 8x1x32 ⇒ groups {8 ↔ 8x1}, {32 ↔ 32}
- 8x32x32 → 256x32 ⇒ groups {8x32 ↔ 256}, {32 ↔ 32}
```
Instead of requiring the target tile to be contiguous in the whole
result vector, it only checks that the tile is contiguous within each
group.
This criterion is correct because a shape_cast preserves row-major
linear order. The groups partition the dimensions into blocks whose
element ranges don't overlap, so the global linear index breaks down
into one independent sub-index per group. A tile that is contiguous
within each group therefore corresponds to a slice that is contiguous
within each group of both the source and result.
Assist-by-Claude
---------
Co-authored-by: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
Commit: bd97ce04dd43e4345d5930946eaba1623782f0d5
https://github.com/llvm/llvm-project/commit/bd97ce04dd43e4345d5930946eaba1623782f0d5
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/test/CodeGen/X86/vector-compress.ll
Log Message:
-----------
[X86] vector-compress.ll - test with x86-64 levels not raw AVX levels (#208745)
Prep work for VECREDUCE_ADD lowering support (VECTOR_COMPRESS expansion
creates VECREDUCE_ADD nodes)
Test with/without vbmi2 to show the terrible v32i8/v64i8 compress
codegen on x86-64-v4 targets
Commit: 0fa1ae1a8bb10f6d237a411e9d343c5d07e34d23
https://github.com/llvm/llvm-project/commit/0fa1ae1a8bb10f6d237a411e9d343c5d07e34d23
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/and.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fabs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fma.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fneg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fsub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/icmp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.abs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.interp.inreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.swap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sbfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.swap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ubfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-uniform-in-vgpr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mad.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/minmaxabs-i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mubuf-global.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/or.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/orn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-abs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-add.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-add.v2s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-s-buffer-load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.div.fmas.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.load.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.sample.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.kill.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.wqm.demote.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgpu-ffbh-u32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgpu-ffbl-b32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-and-s1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-anyext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ashr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-brcond.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ctlz-zero-poison.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ctpop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-cttz-zero-poison.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-dyn-stackalloc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-extract-vector-elt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fcanonicalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fcmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fexp2.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-freeze.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fsqrt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-icmp.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-lshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-regbanklegalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-or.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sadde.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-salu-float.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sbfx.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-select.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sext-inreg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-shl.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-smax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-smin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-split-scalar-load-metadata.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ssube.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uadde.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uaddo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ubfx.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-umax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-umin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uniform-load-noclobber.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-usube.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-usubo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-waterfall-call.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-widen-scalar-loads.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-xor.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-zext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sbfx.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sext_inreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/true16-merge-values-s16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ubfx.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/unmerge-sgpr-s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/xnor.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/xor.ll
M llvm/test/CodeGen/AMDGPU/add-max.ll
M llvm/test/CodeGen/AMDGPU/bfi_int.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll
M llvm/test/CodeGen/AMDGPU/buffer-rsrc-ptr-ops.ll
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_poison.ll
M llvm/test/CodeGen/AMDGPU/ctpop16.ll
M llvm/test/CodeGen/AMDGPU/ctpop64.ll
M llvm/test/CodeGen/AMDGPU/cttz.ll
M llvm/test/CodeGen/AMDGPU/cttz_zero_poison.ll
M llvm/test/CodeGen/AMDGPU/ds-alignment.ll
M llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
M llvm/test/CodeGen/AMDGPU/fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fmaximum.ll
M llvm/test/CodeGen/AMDGPU/fmaxnum.ll
M llvm/test/CodeGen/AMDGPU/fminimum.ll
M llvm/test/CodeGen/AMDGPU/fminnum.ll
M llvm/test/CodeGen/AMDGPU/fold-gep-offset.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
M llvm/test/CodeGen/AMDGPU/literal64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fixup.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmad.ftz.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.inreg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.ll
M llvm/test/CodeGen/AMDGPU/llvm.get.rounding.ll
M llvm/test/CodeGen/AMDGPU/llvm.modf.ll
M llvm/test/CodeGen/AMDGPU/llvm.set.rounding.ll
M llvm/test/CodeGen/AMDGPU/llvm.sqrt.f16.ll
M llvm/test/CodeGen/AMDGPU/lrint.ll
M llvm/test/CodeGen/AMDGPU/lround.ll
M llvm/test/CodeGen/AMDGPU/roundeven.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-flat.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-global.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-smem.ll
M llvm/test/CodeGen/AMDGPU/strict_fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/v_pack.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-and.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-or.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-xor.ll
Log Message:
-----------
AMDGPU/GlobalISel: Switch RegBankLegalize lowering to extended LLTs (#208270)
Stop using LLT::scalar for lowering in AMDGPURegBankLegalizeHelper
Affects integer lowering code for RegBankLLTMappingApplyID and
custom cpp for LoweringMethodID.
Commit: c5fbabb36e9be13e001cc6b96bfef7b4db33210d
https://github.com/llvm/llvm-project/commit/c5fbabb36e9be13e001cc6b96bfef7b4db33210d
Author: Chi-Chun, Chen <chichun.chen at hpe.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/check-omp-variant.cpp
A flang/test/Semantics/OpenMP/metadirective-loop-applicability.f90
A flang/test/Semantics/OpenMP/metadirective-loop-nest.f90
A flang/test/Semantics/OpenMP/metadirective-loop-sequence.f90
Log Message:
-----------
[flang][OpenMP] Semantic checks for metadirective loop nests (#207088)
A loop-associated metadirective variant (`do`, `simd`, ...) is only
resolved during lowering, so it is never checked as a loop construct
during semantic analysis. A malformed or non-canonical associated nest
therefore reaches lowering, which assumes a canonical nest.
This patch validates the nest that follows such a variant (the next
executable construct) during semantics, reusing the diagnostics of a
real loop-associated construct. Each applicable variant is checked
against it:
* Canonical loop: the affected loop must be a canonical DO loop, so a
`DO WHILE`, a pre-6.0 `DO CONCURRENT`, or a `DO` without loop control is
rejected.
* Nest depth: `collapse(n)` and `ordered(n)` must not exceed the depth
of the associated loop nest.
* Rectangularity: loops that must be rectangular (e.g. under `tile`) may
not have bounds that depend on an outer loop's variable.
A loop-associated variant may also have no loop nest at all. This
happens when the metadirective ends the execution part or a non-loop
construct follows it. Such a variant is rejected like a bare loop
directive with no associated loop.
Only variants that could be selected are checked: when a target is
known, a WHEN variant whose device or implementation selector cannot
match it is skipped (runtime `user` conditions never cause a skip).
Part of the feature work for #188820. Builds on top of
[#193664](https://github.com/llvm/llvm-project/issues/193664) and
[#194424](https://github.com/llvm/llvm-project/pull/194424).
Assisted with Copilot.
Commit: 23d7ed226e3e70e6f116457a77e5ec24396186f6
https://github.com/llvm/llvm-project/commit/23d7ed226e3e70e6f116457a77e5ec24396186f6
Author: Ikhlas Ajbar <iajbar at quicinc.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
A llvm/test/CodeGen/Hexagon/pr196966.ll
Log Message:
-----------
[Hexagon] Add S2_pstorerf{t,f}_io to isValidOffset (PR196966) (#208616)
The predicated store-high-halfword opcodes S2_pstorerft_io and
S2_pstorerff_io share the memh(Rs32+#u6:1) encoding with
S2_pstorerh{t,f}_io but were missing from
HexagonInstrInfo::isValidOffset. This caused an llvm_unreachable in
HexagonOptAddrMode when it queried the offset range for these opcodes.
Fixes #196966
Commit: 114f2675514ffb8ab0e9092bb3071e3fdb31dad3
https://github.com/llvm/llvm-project/commit/114f2675514ffb8ab0e9092bb3071e3fdb31dad3
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/test/CodeGen/SPIRV/GlobalISel/fn-ptr-addrspacecast.ll
M llvm/test/CodeGen/SPIRV/pointers/fun-ptr-to-itself.ll
Log Message:
-----------
[NFC][SPIR-V] Enable spirv-val checks fixed after accepting Generic casts to/from CodeSectionINTEL storage class (#208739)
https://github.com/KhronosGroup/SPIRV-Tools/pull/6787
Commit: 034fd4c90d5b5a991048e62193ed74f00d504d69
https://github.com/llvm/llvm-project/commit/034fd4c90d5b5a991048e62193ed74f00d504d69
Author: Ying Chen <chenying at inchitech.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/test/MC/RISCV/rv32-only-csr-names.s
Log Message:
-----------
[RISCV] Fix state enable CSR coverage in rv32-only-csr-names.s (#208603)
Fix duplicate `mstateen3h` and `hstateen3h` test entries and add the
missing RV64 rejection coverage for `mstateen2h` and `hstateen2h`.
Commit: 54b5b78a6332a0faa13f2297a5b3751a1d7544a9
https://github.com/llvm/llvm-project/commit/54b5b78a6332a0faa13f2297a5b3751a1d7544a9
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/StackMaps.h
M llvm/lib/CodeGen/StackMaps.cpp
Log Message:
-----------
[CodeGen] Use natural type for StackMaps::ConstPool. NFC. (#208732)
This is mostly just a revert of e839965faa22 which switched to using
unsigned types to work around problems with DenseMap sentinel values.
Since DenseMaps no longer have sentinels we can use signed types to
match the values that are stored in the map.
Commit: 74cc7fdcc850416b5760b8245c6f80e468220732
https://github.com/llvm/llvm-project/commit/74cc7fdcc850416b5760b8245c6f80e468220732
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/include/llvm/MC/ConstantPools.h
Log Message:
-----------
[MC] Use DenseMap for ConstantPool::CachedEntries. NFC. (#208728)
This is mostly just a revert of:
3d0f9507d5e3 "[MC] Fix constant pools with DenseMap sentinel values"
although the key type has changed in the mean time. DenseMap no longer
uses sentinels so the reasons for avoiding it no longer apply.
Commit: fe80624dc6d62902319e34af8e9c709308957776
https://github.com/llvm/llvm-project/commit/fe80624dc6d62902319e34af8e9c709308957776
Author: Fabian Parzefall <parzefall at meta.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M bolt/include/bolt/Rewrite/RewriteInstance.h
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/test/X86/indirect-goto.test
Log Message:
-----------
[BOLT] Treat relr relocations like rela (#206830)
The linker can emit certain relative .dyn.rela relocations in .dyn.relr.
This includes relocations for jumptables emitted for indirect goto. The
current processing recognizes these relocations as jump targets only for
relative relocations from .dyn.rela, but not from .dyn.relr. Give
.dyn.relr the same treatment, so CFG construction does not dismiss
blocks that are only reachable indirectly.
Commit: 8ece73c9f8b54fea6a98e9e4c55f9a2e6ccc9b3c
https://github.com/llvm/llvm-project/commit/8ece73c9f8b54fea6a98e9e4c55f9a2e6ccc9b3c
Author: Yihan Wang <yronglin777 at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M libcxx/utils/ci/docker/linux-builder-base.dockerfile
Log Message:
-----------
[libc++] Update the base image hash to get most recent clang-23 (#208766)
Commit: 4bf0737d68bbb86d9d693e96a94c4175f27acebe
https://github.com/llvm/llvm-project/commit/4bf0737d68bbb86d9d693e96a94c4175f27acebe
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M .github/workflows/build-ci-container-tooling.yml
M .github/workflows/containers/github-action-ci-tooling/Dockerfile
Log Message:
-----------
[Github] Add ids container (#208498)
This will be used for the ids check workflow. This will enable us to use
a PGO optimized compiler that we also use elsewhere, which should help
speed up the builds on top of reducing redundant work like needing to
configure/build ids for every job. This also makes things a bit more
hermetic.
This is a bit of a hack with how the ids build is setup now (e.g.,
copying over libLLVM.so), but that's something that can be rectified
pretty easily later.
Commit: 2b0a79ec3f0c7b6919661f437f5474f3f9a3c942
https://github.com/llvm/llvm-project/commit/2b0a79ec3f0c7b6919661f437f5474f3f9a3c942
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefMemberChecker.cpp
M clang/test/Analysis/Checkers/WebKit/binding-to-refptr.cpp
M clang/test/Analysis/Checkers/WebKit/call-args-checked-const-member.cpp
M clang/test/Analysis/Checkers/WebKit/call-args-checked-ptr.cpp
M clang/test/Analysis/Checkers/WebKit/call-args-checked.cpp
M clang/test/Analysis/Checkers/WebKit/call-args-counted-const-member.cpp
M clang/test/Analysis/Checkers/WebKit/call-args-loop-init-opaque-value.cpp
M clang/test/Analysis/Checkers/WebKit/call-args-safe-functions.cpp
M clang/test/Analysis/Checkers/WebKit/call-args-wtf-containers.cpp
M clang/test/Analysis/Checkers/WebKit/call-args.cpp
M clang/test/Analysis/Checkers/WebKit/ref-countable-default-arg-nullptr.cpp
M clang/test/Analysis/Checkers/WebKit/unchecked-call-arg.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-obj-arg.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-obj-arg.mm
M clang/test/Analysis/Checkers/WebKit/uncounted-obj-const-v-muable.cpp
M clang/test/Analysis/Checkers/WebKit/unretained-call-args-arc.mm
M clang/test/Analysis/Checkers/WebKit/unretained-call-args-member.mm
M clang/test/Analysis/Checkers/WebKit/unretained-call-args.mm
M clang/test/Analysis/Checkers/WebKit/unretained-obj-arg.mm
Log Message:
-----------
[alpha.webkit.UncountedCallArgsChecker] Improve the warning text (#202724)
This PR improves UncountedCallArgsChecker and its variant's warning
message to explicitly state the argument expression, the qualified
callee type as well as the type which needs to be kept alive.
Commit: 01f376888e118ada65c88a59b183ba6139756a11
https://github.com/llvm/llvm-project/commit/01f376888e118ada65c88a59b183ba6139756a11
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Transforms/InstCombine/frexp-implied-exponent-range-dominating-conditions.ll
Log Message:
-----------
ValueTracking: Fix off by one in known frexp exponent range (#208295)
Also restrict the optimization to the exactly 1 case for now.
There was an additional bug for values less than 1 to be fixed
separately.
Fixes #208192
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 4cd865f00afd8ef6c7947fae51328b7a168152c4
https://github.com/llvm/llvm-project/commit/4cd865f00afd8ef6c7947fae51328b7a168152c4
Author: Eli Friedman <efriedma at qti.qualcomm.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/test/AST/ByteCode/placement-new.cpp
M clang/test/SemaCXX/cxx2c-constexpr-placement-new.cpp
Log Message:
-----------
[clang] Fix constexpr placement new of arrays. (#196669)
The existing code tried to implement a overly generous rule, and it
didn't really work. Restrict the accepted constructs to what we can
easily support. Adjust the representation of the destination pointer to
match the array which will be constructed.
Fixes #117294
Commit: 5ea45502aab0df356213d06651c62f59619a56a1
https://github.com/llvm/llvm-project/commit/5ea45502aab0df356213d06651c62f59619a56a1
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.abs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.offset-split.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-constant.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/minmaxabs-i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smul.ll
M llvm/test/CodeGen/AMDGPU/add-max.ll
M llvm/test/CodeGen/AMDGPU/add_u64.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-gas.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
M llvm/test/CodeGen/AMDGPU/bf16-conversions.ll
M llvm/test/CodeGen/AMDGPU/bf16-math.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/bitop3.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/clmul.ll
M llvm/test/CodeGen/AMDGPU/code-size-estimate.ll
M llvm/test/CodeGen/AMDGPU/coexec-scheduler.ll
M llvm/test/CodeGen/AMDGPU/ds_read2-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/ds_write2.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.bf16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
M llvm/test/CodeGen/AMDGPU/fence-barrier-latency.ll
M llvm/test/CodeGen/AMDGPU/flat-load-saddr-to-vaddr.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-store.ll
M llvm/test/CodeGen/AMDGPU/fmax3.ll
M llvm/test/CodeGen/AMDGPU/fmin3.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx942.ll
M llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
M llvm/test/CodeGen/AMDGPU/global-address.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-attr.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/intrinsic-amdgcn-s-alloc-vgpr.ll
M llvm/test/CodeGen/AMDGPU/literal64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.av.store.b128.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitop3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.load.async.to.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.workgroup.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.workgroup.max.flat.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.workgroup.max.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cos.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.f16.fp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.dpp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.e5m3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.sat.pk.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scale.pk.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk16.gfx1250.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk.gfx1250.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.sr.pk.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.atomic.async.barrier.arrive.b64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.atomic.barrier.arrive.rtn.b64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.flat.prefetch.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.async.to.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.prefetch.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.store.async.from.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.shared.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.monitor.gfx1250.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.tr.gfx1250.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.log.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.perm.pk.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.store.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.prefetch.inst.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.wait.gfx1250.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx12.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sendmsg.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sin.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sqrt.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tanh.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tensor.load.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.gfx1250.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.gfx1251.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imm.gfx1250.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imm.gfx1251.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imod.gfx1250.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imod.gfx1251.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.index.gfx1250.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.cos.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.prefetch.ll
M llvm/test/CodeGen/AMDGPU/llvm.sin.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.sqrt.bf16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-saddr-offset-imm.ll
M llvm/test/CodeGen/AMDGPU/loop-prefetch-data.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad_64_32.ll
M llvm/test/CodeGen/AMDGPU/mad_u64_u32.ll
M llvm/test/CodeGen/AMDGPU/max.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-barriers.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-fence-mmra-global.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-fence-mmra-local.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-fence.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-lastuse.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-lastuse.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-lastuse.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-workgroup.ll
M llvm/test/CodeGen/AMDGPU/min.ll
M llvm/test/CodeGen/AMDGPU/minmax.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/CodeGen/AMDGPU/packed-fp64.ll
M llvm/test/CodeGen/AMDGPU/packed-u64.ll
M llvm/test/CodeGen/AMDGPU/packed_shl64_combine.ll
M llvm/test/CodeGen/AMDGPU/pk-lshl-add-u64.ll
M llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs.ll
M llvm/test/CodeGen/AMDGPU/preload-kernargs.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm-gfx12.ll
M llvm/test/CodeGen/AMDGPU/reassoc-mul-add-1-to-mad.ll
M llvm/test/CodeGen/AMDGPU/s-barrier-signal-var-gep.ll
M llvm/test/CodeGen/AMDGPU/s-cluster-barrier.ll
M llvm/test/CodeGen/AMDGPU/s-wakeup-barrier.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-flat.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-global.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-scratch.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-smem.ll
M llvm/test/CodeGen/AMDGPU/shl.v2i64.ll
M llvm/test/CodeGen/AMDGPU/spillv16Kernel.ll
M llvm/test/CodeGen/AMDGPU/strict_fptrunc_bf16.ll
M llvm/test/CodeGen/AMDGPU/sub_u64.ll
M llvm/test/CodeGen/AMDGPU/v_ashr_pk.ll
M llvm/test/CodeGen/AMDGPU/wait-before-stores-with-scope_sys.ll
M llvm/test/CodeGen/AMDGPU/wait-xcnt-atomic-rmw-optimization.ll
M llvm/test/CodeGen/AMDGPU/wait-xcnt-drain.mir
M llvm/test/CodeGen/AMDGPU/wait-xcnt.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-loop-ds-prefetch-flushed.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-loop-ds-prefetch-flushed.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-loop-ds-prefetch-pattern.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-loop-ds-store-barrier.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-loop-opt.mir
M llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
M llvm/test/CodeGen/AMDGPU/workgroup-id-in-arch-sgprs.ll
Log Message:
-----------
[AMDGPU] Add GFX1250 unclaused VMEM workaround (#208467)
Commit: c03584a783b03cb0a4c90a7d16ce3e2f7acd42fd
https://github.com/llvm/llvm-project/commit/c03584a783b03cb0a4c90a7d16ce3e2f7acd42fd
Author: Fateme Hosseini <Fhossein at qti.qualcomm.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonXQFloatGenerator.cpp
A llvm/test/CodeGen/Hexagon/autohvx/xqf-mult-normalize-second-operand.mir
Log Message:
-----------
[Hexagon] Fix wrong operand in XQFloat qf32 multiply normalization (#208489)
In convertNormalizeMultOp32, when only the second operand of a
V6_vmpy_qf32 comes from an add/sub/mul unit (secondconvert), the
generated multiply incorrectly used the raw second operand (Reg2)
instead of the first operand (Reg1). This dropped the first operand and
multiplied the normalized second operand by the un-normalized second
operand.
This patch fixed the multiply to use Reg1 and the normalized input_mpy2,
matching the correct arrangement used elsewhere. The bug was not
observed on v81 (which takes the V81normalizeMultF32 path); it only
affected the v79 fallback.
Co-authored-by: Santanu Das <quic_santdas at qti.qualcomm.com>
Commit: beffef686fde396bee59bf31ce44fffa0e6fc2ca
https://github.com/llvm/llvm-project/commit/beffef686fde396bee59bf31ce44fffa0e6fc2ca
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M lldb/docs/python_extensions.md
Log Message:
-----------
[lldb][docs] Try to fix forward the Sphinx automodapi doc generation (#208608)
Fixes LLDB doc generation errors for me locally
Commit: 4d834cd7644bfa083b3bac0604fc56455354c605
https://github.com/llvm/llvm-project/commit/4d834cd7644bfa083b3bac0604fc56455354c605
Author: timon-ul <timon.ulrich at advantest.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang-tools-extra/clangd/unittests/CodeCompleteTests.cpp
M clang-tools-extra/clangd/unittests/IndexActionTests.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
Log Message:
-----------
[clangd] CodeCompletion surface param names if possible (#206716)
Resolves issue https://github.com/clangd/clangd/issues/2651
Commit: 7c35673039cf52ebe9458420e2ef712ffff9ad1a
https://github.com/llvm/llvm-project/commit/7c35673039cf52ebe9458420e2ef712ffff9ad1a
Author: Charitha Saumya <136391709+charithaintc at users.noreply.github.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
M mlir/test/Conversion/VectorToXeGPU/transfer-read-to-xegpu.mlir
M mlir/test/Conversion/VectorToXeGPU/transfer-write-to-xegpu.mlir
Log Message:
-----------
[mlir][xegpu] Add support for 1D SLM case in vector-to-xepgu (#208276)
Currently vector-to-xegpu only support 2D SLM buffers. However
load/store_matrix op definition allows 1D access.
Assisted by: Claude
Commit: d981ae2be3be6fd65ad66e763fcc20b3a6cac58a
https://github.com/llvm/llvm-project/commit/d981ae2be3be6fd65ad66e763fcc20b3a6cac58a
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Utils/CallPromotionUtils.cpp
A llvm/test/Transforms/SampleProfile/icp_target_feature.ll
Log Message:
-----------
Reapply "[PGO][ICP] Prevent indirect call promotion to functions with incompatible target features" (#208774)
Reverts llvm/llvm-project#208079
We're still seeing build failures without this, so reapply for now.
Commit: 5ddad72b154e4c4ddc2547b6cd17abd7b9a6ae53
https://github.com/llvm/llvm-project/commit/5ddad72b154e4c4ddc2547b6cd17abd7b9a6ae53
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M lldb/include/lldb/Protocol/MCP/Protocol.h
M lldb/source/Plugins/Protocol/MCP/ProtocolServerMCP.cpp
M lldb/source/Protocol/MCP/Protocol.cpp
M lldb/tools/lldb-mcp/CMakeLists.txt
A lldb/tools/lldb-mcp/Multiplexer.cpp
A lldb/tools/lldb-mcp/Multiplexer.h
M lldb/tools/lldb-mcp/lldb-mcp.cpp
Log Message:
-----------
[lldb-mcp] Replace byte forwarding with a protocol-aware multiplexer (#208506)
To serve several LLDB instances behind one endpoint it has to act as a
multiplexer. This PR adds a Multiplexer that presents a unified MCP
server to the client. It answers initialize and tools/list locally, and
forwards tools/call and the resource requests to the different instances
through an mcp::Client (added in #208371), relaying the answer back.
For now, this still drives a single backend. Discovering and routing
across several instances is coming next.
Assisted-by: Claude
Commit: 5b9d51ffcfa60e986be6cc4335bcf6c636b48d91
https://github.com/llvm/llvm-project/commit/5b9d51ffcfa60e986be6cc4335bcf6c636b48d91
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 5ddad72 (#208792)
This fixes 5ddad72b154e4c4ddc2547b6cd17abd7b9a6ae53.
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=5ddad72b154e4c4ddc2547b6cd17abd7b9a6ae53
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: cc0f75682622778349cef748d2a8d1dfd09e8185
https://github.com/llvm/llvm-project/commit/cc0f75682622778349cef748d2a8d1dfd09e8185
Author: Ian Anderson <iana at apple.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M compiler-rt/test/asan/TestCases/Posix/new_array_cookie_with_new_from_class.cpp
Log Message:
-----------
[asan][test] Fix Posix/new_array_cookie_with_new_from_class.cpp to work for arm targets (#208378)
arm targets, and arm64 targets on Darwin, use a 2-pointer array cookie
size. Update the test to support that.
Assisted-by: Claude Code
rdar://181775880
Commit: d1dbd484ada2a323a83ec9db64bcc247badc3025
https://github.com/llvm/llvm-project/commit/d1dbd484ada2a323a83ec9db64bcc247badc3025
Author: Rithik Sharma <rithiksh02 at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/test/CIR/CodeGen/array-init-loop-exprs.cpp
M clang/test/CIR/CodeGen/ctor-try-body.cpp
M clang/test/CIR/CodeGen/cxx-special-member-attr.cpp
M clang/test/CIR/CodeGen/inherited-ctors.cpp
M clang/test/CIR/IR/func.cir
M clang/test/CIR/IR/invalid-func.cir
M clang/test/CIR/Transforms/cxx-abi-lowering-attrs.cir
M clang/unittests/CIR/CMakeLists.txt
A clang/unittests/CIR/CallOpTest.cpp
Log Message:
-----------
[CIR] Generalize the special member attribute into func_info and add a callee resolver (#207261)
The `cxx_special_member` slot on `cir.func` becomes a general slot named
`func_info`, so facts about a function that are not special member facts
can join later without redesign.
Nothing about the special member forms changes. The attribute stays the
same union of the constructor, destructor, and assignment forms. Each
form keeps its shape and its embedded record type, and the CXX ABI
lowering still replaces that type with the converted one. The FuncOp
helpers keep their names, so passes that read the special member facts
do not change.
The printed keyword on `cir.func` changes from `special_member` to
`func_info`, so the old spelling no longer parses. The existing tests
update their check lines with no other change.
Calls gain a resolver named `resolveCallee` that returns the function a
direct call targets, so a pass standing at a call can read the facts
recorded on its callee. It returns null when the call is indirect, when
the callee symbol does not resolve, and when the target is not a
`cir.func`. A second form takes a symbol table collection so a pass can
reuse its cached lookup. Both `cir.call` and `cir.try_call` get the
resolver through one shared implementation, and a unit test drives all
of these cases.
Commit: 340bd05d5f3c5dbd8bb49618aaaf39188cd2014b
https://github.com/llvm/llvm-project/commit/340bd05d5f3c5dbd8bb49618aaaf39188cd2014b
Author: Alex Langford <alangford at apple.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M lldb/include/lldb/Target/DynamicRegisterInfo.h
M lldb/source/Target/DynamicRegisterInfo.cpp
Log Message:
-----------
[lldb] Simplify creating RegisterSets in DynamicRegisterInfo (#208592)
`DynamicRegisterInfo::GetRegisterSetIndexByName` is only used in
`DynamicRegisterInfo::SetRegisterInfo` so I inlined it and removed the
function. I also noticed that `m_set_names` is only used in this
function for setup, so I made it a local variable instead of a member.
Commit: 93737c9d36ad89f83c64ea201bd6d8f364e1f8c6
https://github.com/llvm/llvm-project/commit/93737c9d36ad89f83c64ea201bd6d8f364e1f8c6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/test/Driver/hip-include-path.hip
Log Message:
-----------
clang/AMDGPU: Forward host system includes in offload compiles (#208783)
Commit 640079288c5e merged the AMDGPU toolchain subclasses but dropped
the HIPAMDToolChain::AddClangSystemIncludeArgs override, which forwarded to
the host toolchain.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 8709f6f18fe29c4a9e3bac970e05326bc5b3d9d6
https://github.com/llvm/llvm-project/commit/8709f6f18fe29c4a9e3bac970e05326bc5b3d9d6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
A llvm/include/llvm/TargetParser/TripleName.def
M llvm/include/module.modulemap
M llvm/lib/TargetParser/Triple.cpp
Log Message:
-----------
Triple: Move OS/vendor/environment names into a def file (#208722)
Extract the component name lists into a macro .def file, similar
to how many targets do for CPU names. The arch/subarch names are
left alone because they have trickier manual parsing logic.
Co-Authored-By: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 22ca91ce27af31f579a8a770a4d584f47bcc607f
https://github.com/llvm/llvm-project/commit/22ca91ce27af31f579a8a770a4d584f47bcc607f
Author: Kevin Bravo <kbravjr at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang-tools-extra/test/clang-tidy/checkers/misc/misplaced-const-cxx17.cpp
M clang/docs/ReleaseNotes.md
M clang/include/clang/AST/DeclCXX.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/test/PCH/cxx1z-decomposition.cpp
M clang/test/Parser/cxx1z-decomposition.cpp
Log Message:
-----------
[clang] more useful error message for decomposition declaration missing initializer (#127924)
#90107
Diagnostic message for decomposition declaration missing an initializer
only highlights the declared identifier. This change adds an additional
diagnostic message to highlight the token found where the initializer
was expected. So, for example:
auto [a, b] S = {1, 2}
The new error points to 'S' and says that 'S' was found where an
initializer was expected.
Commit: 92d9e0dad82b6acb3e836a255580bb3eebcc3dd4
https://github.com/llvm/llvm-project/commit/92d9e0dad82b6acb3e836a255580bb3eebcc3dd4
Author: Rifet-c <levinale17 at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M lldb/source/Commands/CommandObjectRegister.cpp
A lldb/test/Shell/Commands/command-register-read-alignment.test
Log Message:
-----------
[lldb] Improved formatting of 'register read' command. (#188049)
Made alignment of 'register read' command's output to be dynamic to the
register's name lengths -> `=` signs of different registers align when
printed as sets, also aligned when picked in some custom ordering. No
alignment between separate sets is included (i.e, each set is aligned to
itself only). Sample change:
```
Micro-architectural Registers:
r_pc = 0x0000108c main.xexe`main + 20 at main.c:5:5
instr_trace_r_init_print = 0x00
wb_csr_file_r_mstatus = 0x00000000
wb_csr_file_r_mie = 0x00000000
```
This example is changed into:
```
Micro-architectural Registers:
r_pc = 0x0000108c main.xexe`main + 20 at main.c:5:5
instr_trace_r_init_print = 0x00
wb_csr_file_r_mstatus = 0x00000000
wb_csr_file_r_mie = 0x00000000
```
---------
Co-authored-by: Aleksandr Levin <alexander.levin03 at mail.ru>
Commit: 2396c15bd38f50c49ee2eda0f8978a9f43ff7693
https://github.com/llvm/llvm-project/commit/2396c15bd38f50c49ee2eda0f8978a9f43ff7693
Author: Yitzhak Mandelbaum <ymand at users.noreply.github.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
Log Message:
-----------
[NFC][clang][dataflow] Add explanatory comment to test. (#208779)
Commit: 188b9a3bfbc4e3720999b282c0c8c9af4c110e17
https://github.com/llvm/llvm-project/commit/188b9a3bfbc4e3720999b282c0c8c9af4c110e17
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Transforms/InstCombine/frexp-implied-exponent-range-dominating-conditions.ll
Log Message:
-----------
ValueTracking: Generalize known frexp exponent range to any constant (#208316)
Extend computeKnownExponentRangeFromContext beyond the special case of a
dominating fabs(V) compare against exactly 1.0 to any finite limit.
Generalizing below 1.0 exposes a soundness issue: frexp(0) has exponent
0, so a bound derived assuming a nonzero value could wrongly exclude it
when the limit implies a negative maximum exponent. Query fcZero and
clamp the maximum exponent to at least 0 when the source may be zero.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 9e13720eb81fd8a68fe82ac962c17fd522547464
https://github.com/llvm/llvm-project/commit/9e13720eb81fd8a68fe82ac962c17fd522547464
Author: Stephan T. Lavavej <stl at nuwen.net>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M libcxx/CREDITS.TXT
M libcxx/docs/ReleaseNotes/22.rst
M libcxx/include/__exception/exception_ptr.h
M libcxx/src/support/runtime/exception_pointer_msvc.ipp
Log Message:
-----------
[libc++] Add MSVC's implementation of exception_ptr for Windows (#94977)
Microsoft is happy to contribute our implementation of exception_ptr for
Windows, under the Apache License v2.0 with LLVM Exception that our STLs
share.
* excptptr.cpp, copied verbatim as:
https://github.com/microsoft/STL/blob/e36ee6c2b9bc6f5b1f70776c18cf5d3a93a69798/stl/src/excptptr.cpp
* <exception>, copied verbatim as:
https://github.com/microsoft/STL/blob/e36ee6c2b9bc6f5b1f70776c18cf5d3a93a69798/stl/inc/exception
The implementation was integrated into libc++:
* Deleted STL copy of <exception>. All standard exception classes are
already provided by libc++'s standard headers.
* Replaced MSVC STL naming conventions and macros (_STD,
_CRTIMP2_PURE, _Ref_count_base, _Ptr_base, _EXCEPTION_RECORD, etc.)
with standard libc++ style and identifiers (_LIBCPP_EXPORTED_FROM_ABI,
__double_leading_underscore variable/function names).
* Replaced internal MSVC CRT headers (<trnsctrl.h>,
<internal_shared.h>, <xcall_once.h>) with portable standard C++
constructs (e.g., standard C++ function-local static initialization
for immortal static exception objects) and inline pointer-to-member
invocation helpers.
* Removed all exported __ExceptionPtr... C functions. These symbols
were originally present in Microsoft's CRT DLL exports solely to
support inline methods in MSVC STL's <exception> header.
* Moved all SEH/EH exception record definitions, SEH copying helpers
(__populate_cpp_exception_record, __copy_exception_object), and
reference-counted control blocks (__exception_ptr_static and
__exception_ptr_normal) directly into exception_pointer_msvc.ipp.
* Use reference-counted control block representation on Windows which
removed the platform #ifdef _LIBCPP_ABI_MICROSOFT bifurcation for
class exception_ptr in exception_ptr.h. std::exception_ptr now uses
the same layout across all operating systems.
Co-authored-by: Petr Hosek <phosek at google.com>
Commit: a8319d8bee48936c7748afc81a01907a6398adef
https://github.com/llvm/llvm-project/commit/a8319d8bee48936c7748afc81a01907a6398adef
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M libcxx/src/atomic.cpp
Log Message:
-----------
[libc++] Merge atomic-wait contention tables into a single table (#208493)
PR #161086 (73a13839d3ec) introduced a new contention table for atomics
with a native size. However, this also increases the size of the dylib
and the footprint of processes using the dylib by a non-negligible
margin.
To mitigate this issue, this change folds the two tables into a single
one. The native waiter count can be stored for free inside padding that
was previously unused.
rdar://179161875
Commit: f505ece3359d778f06752e518046589ef6e544ff
https://github.com/llvm/llvm-project/commit/f505ece3359d778f06752e518046589ef6e544ff
Author: Matsu <47756807+khaki3 at users.noreply.github.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M flang/include/flang/Lower/DirectivesCommon.h
M flang/test/Lower/OpenACC/acc-bounds.f90
Log Message:
-----------
[flang][OpenACC] Preserve source extents in section strides (#208594)
Use the source array extent when advancing cumulative strides across
scalar subscripts, whose selected extent is one. Add coverage for mixed
scalar and triplet dimensions.
Commit: 59b0935b1494c90e02cc95a625f168f606966c3d
https://github.com/llvm/llvm-project/commit/59b0935b1494c90e02cc95a625f168f606966c3d
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/test/SemaTemplate/overload-candidates.cpp
Log Message:
-----------
[Clang] Treat address-of template substitution as SFINAE
Taking the address of a function template specialization can instantiate
its trailing return type as part of a SFINAE probe:
struct X {};
template <class T> void f(T) = delete;
template <class T> auto probe(T t) -> decltype(f(t), void());
template <class T, class = decltype(&probe<T>)> int test(int);
template <class T> char test(...);
static_assert(sizeof(test<X>(0)) == sizeof(char));
Here, substituting the return type of probe<X> selects the deleted f<X>.
The deleted call is in the immediate context of substitution, so it should
remove test(int) from overload resolution. GCC accepts this example. Clang
instead kept deduction as successful and later replayed the stored
diagnostic as a hard error.
The call-deduction path already checks the SFINAE trap after finishing
template argument deduction. Do the same for the address-of path, so the
stored diagnostic is not replayed after deduction succeeds.
Commit: fbc9c356e11b8b47ed60c1329d7a2f2363e6b388
https://github.com/llvm/llvm-project/commit/fbc9c356e11b8b47ed60c1329d7a2f2363e6b388
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
A libc/docs/arch_support.md
R libc/docs/arch_support.rst
A libc/docs/build_and_test.md
R libc/docs/build_and_test.rst
A libc/docs/build_concepts.md
R libc/docs/build_concepts.rst
A libc/docs/compiler_support.md
R libc/docs/compiler_support.rst
A libc/docs/contributing.md
R libc/docs/contributing.rst
A libc/docs/dev/building_docs.md
R libc/docs/dev/building_docs.rst
A libc/docs/dev/builtin_compatibility.md
R libc/docs/dev/builtin_compatibility.rst
A libc/docs/dev/code_style.md
R libc/docs/dev/code_style.rst
A libc/docs/dev/config_options.md
R libc/docs/dev/config_options.rst
A libc/docs/dev/entrypoints.md
R libc/docs/dev/entrypoints.rst
A libc/docs/dev/fuzzing.md
R libc/docs/dev/fuzzing.rst
A libc/docs/dev/header_generation.md
R libc/docs/dev/header_generation.rst
A libc/docs/dev/implementation_standard.md
R libc/docs/dev/implementation_standard.rst
A libc/docs/dev/implementing_a_function.md
R libc/docs/dev/implementing_a_function.rst
A libc/docs/dev/index.md
R libc/docs/dev/index.rst
A libc/docs/dev/modular_format.md
R libc/docs/dev/modular_format.rst
A libc/docs/dev/printf_behavior.md
R libc/docs/dev/printf_behavior.rst
A libc/docs/dev/source_tree_layout.md
R libc/docs/dev/source_tree_layout.rst
A libc/docs/dev/syscall_wrapper_refactor.md
R libc/docs/dev/syscall_wrapper_refactor.rst
A libc/docs/dev/undefined_behavior.md
R libc/docs/dev/undefined_behavior.rst
A libc/docs/full_cross_build.md
R libc/docs/full_cross_build.rst
A libc/docs/full_host_build.md
R libc/docs/full_host_build.rst
A libc/docs/getting_started.md
R libc/docs/getting_started.rst
A libc/docs/hand_in_hand.md
R libc/docs/hand_in_hand.rst
A libc/docs/index.md
R libc/docs/index.rst
A libc/docs/overlay_mode.md
R libc/docs/overlay_mode.rst
A libc/docs/platform_support.md
R libc/docs/platform_support.rst
A libc/docs/porting.md
R libc/docs/porting.rst
A libc/docs/talks.md
R libc/docs/talks.rst
Log Message:
-----------
[docs] Rename selected libc docs to Markdown (#208354)
Tracking issue: https://github.com/llvm/llvm-project/issues/201242
Migration guide docs:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
RFC:
https://discourse.llvm.org/t/rfc-make-myst-markdown-the-llvm-docs-format-rip-rest/90840
This is the initial straight rename commit. It will probably break the
docs build, but it has to be a separate PR for blame preservation
purposes.
Commit: 71fe35814f4b4b5dc88b9caa65f44da5da946df8
https://github.com/llvm/llvm-project/commit/71fe35814f4b4b5dc88b9caa65f44da5da946df8
Author: Kewen Meng <Kewen.Meng at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M offload/CMakeLists.txt
M offload/ci/openmp-offload-amdgpu-clang-flang.py
M offload/test/lit.cfg
M offload/test/offloading/fortran/basic_array.c
M offload/test/offloading/fortran/target-use-dev-ptr.f90
M offload/test/offloading/fortran/usm_map_close.f90
M openmp/CMakeLists.txt
M openmp/device/CMakeLists.txt
Log Message:
-----------
[OpenMP][Offload][AMDGPU] Fix offload tests failure after the new triple (#208617)
Offload tests failed after introducing the new triple. This PR attempts
to address that. It includes the changes in
https://github.com/llvm/llvm-project/pull/208551. In addition, it also
made following changes:
- Updated flang builder that our buildbot uses;
- Updated the CMakeLists for offload and AMDGPU device runtime (a little
duplications to avoid breaking other buildbots);
- Added per target linker path and mapping for lit substitution/features
in lit config;
- Updated hard-coded check lines in the tests.
This PR reduces the failed offload tests from 246 to 2 on my test runs
locally. Test results and the two failed tests:
```
Failed Tests (2):
libomptarget :: amdgpu-amd-amdhsa :: offloading/fortran/declare-target-common-block-main.f90
libomptarget :: amdgpu-amd-amdhsa :: sanitizer/use_after_free_2.c
Total Discovered Tests: 3478
Skipped : 77 (2.21%)
Unsupported : 341 (9.80%)
Passed : 3053 (87.78%)
Expectedly Failed: 5 (0.14%)
Failed : 2 (0.06%)
```
I was not able to identify the commits for the two failed tests yet
(didn't look like flakiness), will try again later.
Co-authored-by: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Commit: 03ce818a29ac8385e879fe3f0d464ca95c128088
https://github.com/llvm/llvm-project/commit/03ce818a29ac8385e879fe3f0d464ca95c128088
Author: Kyungtak Woo <kevinwkt at google.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] Update bazel amdgpu to use extended llt (#208797)
Updating flags since this is changed in cmake:
https://github.com/llvm/llvm-project/pull/207419/changes#diff-e857fdc8c81a5cc9f4fafbd85d56b409a7bf316e4d6da23a1c0a6418d66e5db6R23
Commit: 7bb9626d5ab901e5c1a8e9acbbb1684c982401b4
https://github.com/llvm/llvm-project/commit/7bb9626d5ab901e5c1a8e9acbbb1684c982401b4
Author: Tulio Magno Quites Machado Filho <tuliom at redhat.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/IntrinsicInst.cpp
M llvm/test/Verifier/gc_relocate_out_of_bounds.ll
Log Message:
-----------
[LLVM][Verifier] Fix buffer overflow when verifying gc.statepoint (#208278)
When a negative base index is passed, the verification detects the
out-of-bounds value and start printing information that helps to
identify what caused the error. In order to print all the information,
it tries to dereference the Base pointer at
GCRelocateInst::getBasePtr(), causing the buffer overflow. Add a bounds
check to getBasePTR() and getDerivedPtr() in order to avoid this.
Improve the test in order to validate negative values passed as indexes.
They're based on the reproducer from issue #199191.
Fixes #199191
Commit: 821afb2ed82f66513cbaab1657d680179f10ed35
https://github.com/llvm/llvm-project/commit/821afb2ed82f66513cbaab1657d680179f10ed35
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M libc/docs/arch_support.md
M libc/docs/build_and_test.md
M libc/docs/build_concepts.md
M libc/docs/compiler_support.md
M libc/docs/conf.py
M libc/docs/contributing.md
M libc/docs/dev/building_docs.md
M libc/docs/dev/builtin_compatibility.md
M libc/docs/dev/code_style.md
M libc/docs/dev/config_options.md
M libc/docs/dev/entrypoints.md
M libc/docs/dev/fuzzing.md
M libc/docs/dev/header_generation.md
M libc/docs/dev/implementation_standard.md
M libc/docs/dev/implementing_a_function.md
M libc/docs/dev/index.md
M libc/docs/dev/modular_format.md
M libc/docs/dev/printf_behavior.md
M libc/docs/dev/source_tree_layout.md
M libc/docs/dev/syscall_wrapper_refactor.md
M libc/docs/dev/undefined_behavior.md
M libc/docs/full_cross_build.md
M libc/docs/full_host_build.md
M libc/docs/getting_started.md
M libc/docs/hand_in_hand.md
M libc/docs/index.md
M libc/docs/overlay_mode.md
M libc/docs/platform_support.md
M libc/docs/porting.md
M libc/docs/talks.md
Log Message:
-----------
[docs] Rewrite libc docs from reST to markdown (#208802)
Tracking issue: https://github.com/llvm/llvm-project/issues/201242
Migration guide docs:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
RFC:
https://discourse.llvm.org/t/rfc-make-myst-markdown-the-llvm-docs-format-rip-rest/90840
This was prepared with rst2myst plus LLM-assisted cleanup. I paged
through all the generated HTML looking for migration artifacts, and all
of the differences I could find appear to be formatting error
corrections. Please spot check my work and approve if it looks good.
Commit: b33af86b032e4a89a947b1c2818cb36861814ad9
https://github.com/llvm/llvm-project/commit/b33af86b032e4a89a947b1c2818cb36861814ad9
Author: Aleksandr Popov <42888396+aleks-tmb at users.noreply.github.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
A llvm/test/Transforms/LoopVectorize/single_early_exit_zext_trip_count.ll
Log Message:
-----------
[SCEV][NFC] Precommit tests for #208778 (#208784)
These tests capture the current missed vectorization behavior and serve
as a baseline for the upcoming fix.
Commit: a6cf9ec73060bf2b38b3981459071d86b254e8fc
https://github.com/llvm/llvm-project/commit/a6cf9ec73060bf2b38b3981459071d86b254e8fc
Author: Yihan Wang <yronglin777 at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M libcxx/utils/ci/docker/docker-compose.yml
Log Message:
-----------
[libc++] Bump base image version to most recent (#208776)
Signed-off-by: yronglin <yronglin777 at gmail.com>
Commit: 95a117bc8a724095e26d942228564ff7c685ca25
https://github.com/llvm/llvm-project/commit/95a117bc8a724095e26d942228564ff7c685ca25
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
A llvm/test/CodeGen/AMDGPU/directive-amdgcn-target-legacy-triples.ll
R llvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
M llvm/test/CodeGen/AMDGPU/target-id-xnack-always-on.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-any.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-not-supported.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-off.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-on.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-off-1.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-off-2.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-on-1.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-on-2.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-any.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-not-supported.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-off.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-on.ll
Log Message:
-----------
AMDGPU: Migrate target id tests to use new subarch triples (#206488)
Commit: b29d4b270b96b6e291306332ab87d72e639ccba9
https://github.com/llvm/llvm-project/commit/b29d4b270b96b6e291306332ab87d72e639ccba9
Author: Ron Green [NVIDIA] <rogreen at nvidia.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M flang/lib/Lower/OpenACC.cpp
A flang/test/Lower/OpenACC/acc-loop-nested-in-do-concurrent.f90
Log Message:
-----------
[flang][OpenACC] Bind DO CONCURRENT construct index for nested acc loops (#208529)
A DO CONCURRENT index-name is a construct entity that lives in the
construct's own scope, distinct from a like-named variable in the
enclosing subprogram scope. When a DO CONCURRENT is associated with an
`!$acc loop`, lowering privatizes the symbol referenced by the loop
control, which inside an OpenACC compute construct is the
enclosing-scope variable. However, a reference to that index from within
a *nested* explicit `!$acc loop` construct resolves to the construct
entity instead. That entity was never bound in the symbol map, so
lowering the reference hit the "lowering symbol to HLFIR" TODO and
aborted.
Bind the construct entity to the same privatized storage as the loop
control so such references lower correctly.
Commit: b2ae07fde4029f9c40932101680fbade34e237ff
https://github.com/llvm/llvm-project/commit/b2ae07fde4029f9c40932101680fbade34e237ff
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/utils/TableGen/SubtargetEmitter.cpp
Log Message:
-----------
[TableGen] Add MCReadAdvanceEntry to vector first, then write its fields. NFC (#208789)
Commit: 3bc47c8dc927e0d6145eb128e588179f7654b5f7
https://github.com/llvm/llvm-project/commit/3bc47c8dc927e0d6145eb128e588179f7654b5f7
Author: Ziqing Luo <ziqing_luo at apple.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/include/clang/ScalableStaticAnalysis/Analyses/OperatorNewDelete/OperatorNewDeletePointers.h
M clang/include/clang/ScalableStaticAnalysis/BuiltinAnchorSources.def
M clang/lib/ScalableStaticAnalysis/Analyses/CMakeLists.txt
A clang/lib/ScalableStaticAnalysis/Analyses/OperatorNewDelete/OperatorNewDeletePointers.cpp
R clang/lib/ScalableStaticAnalysis/Analyses/OperatorNewDelete/OperatorNewDeletePointersExtractor.cpp
A clang/test/Analysis/Scalable/OperatorNewDelete/Inputs/tu-summary-bad-id.json
A clang/test/Analysis/Scalable/OperatorNewDelete/Inputs/tu-summary-no-key.json
A clang/test/Analysis/Scalable/OperatorNewDelete/Inputs/tu-summary.json
A clang/test/Analysis/Scalable/OperatorNewDelete/Inputs/wpa-result-bad-id.json
A clang/test/Analysis/Scalable/OperatorNewDelete/Inputs/wpa-result-empty.json
A clang/test/Analysis/Scalable/OperatorNewDelete/Inputs/wpa-result-no-key.json
A clang/test/Analysis/Scalable/OperatorNewDelete/operator-new-delete.cpp
A clang/test/Analysis/Scalable/OperatorNewDelete/tu-summary-serialization.test
A clang/test/Analysis/Scalable/OperatorNewDelete/wpa-result-serialization.test
Log Message:
-----------
[SSAF][WPA] Operator new/delete overload entities that shall retain their types (#208342)
A follow-up change to #206600. This commit adds the WPA implementation
for those operator new/delete overload entities that shall retain their
types. This WPA result will later be used to filter unsafe buffer
analysis results.
rdar://179151541
Assisted by Claude Sonnet 4.6
Commit: 15480d2d7f4519b4bdda633d2f9e8f8e6413b19d
https://github.com/llvm/llvm-project/commit/15480d2d7f4519b4bdda633d2f9e8f8e6413b19d
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/test/CodeGenCXX/ms-mangle-requires.cpp
Log Message:
-----------
[Clang][NFC] Add two CWG2369 regression tests (#186380)
Some of the MS ABI regressions, which were caused by CWG2369, were fixed
by https://github.com/llvm/llvm-project/pull/197215. Let's add those
regressions to our tests.
Closes https://github.com/llvm/llvm-project/issues/173160
Closes https://github.com/llvm/llvm-project/issues/191588
Commit: 1e713b277aff89ea2a64ebf4a8a1ec62004ac146
https://github.com/llvm/llvm-project/commit/1e713b277aff89ea2a64ebf4a8a1ec62004ac146
Author: Kyungtak Woo <kevinwkt at google.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/test/Driver/offload-parallel-device-cc1.cu
Log Message:
-----------
[Clang][Driver][NFC] Fix offload-parallel-device-cc1.cu failing in read-only runfiles sandbox (#208801)
When running offload-parallel-device-cc1.cu with multiple
--cuda-gpu-arch
flags and --cuda-device-only -S, Clang generates multiple .s outputs in
the
current working directory (.). In sandboxed test environments, . is
read-only,
causing compilation to fail with "Permission denied".
Fix by executing the CUDA compilation step inside a temporary directory
(%t).
This pattern is being used in other tests like in
clang/test/Driver/ftime-trace-offload.cpp and
clang/test/Driver/unix-conformance.c.
Commit: 9c8485a2c216160bfc5d64a71cbbd298776618bd
https://github.com/llvm/llvm-project/commit/9c8485a2c216160bfc5d64a71cbbd298776618bd
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Basic/Targets/AArch64.h
M clang/test/Preprocessor/init-aarch64.c
M clang/test/Preprocessor/init.c
Log Message:
-----------
[clang] Use a 128-byte destructive interference size on Apple AArch64 (#208716)
Apple arm64 cores use a 128-byte cache line, as reported by `sysctl -a`.
However, Clang inherited the generic AArch64 value and was setting
`__GCC_DESTRUCTIVE_SIZE` to 256 for Apple targets (see bce2cc15133a).
While the value of 256 matches what GCC uses and is what's documented by
ARM, 128 seems to be a better value for Apple arm64 specifically, with
256 simply being wasteful.
Note that changing this value should in principle not be an issue since
it (and constructive interference) are explicitly documented as being
"ABI unstable" values, in the sense that users should not rely on them
in ABI-sensitive places.
Fixes #182951
Commit: 2fd14194bf8c01d8b3a5364ea17d04409d0e942c
https://github.com/llvm/llvm-project/commit/2fd14194bf8c01d8b3a5364ea17d04409d0e942c
Author: sujianIBM <Jian.Su at ibm.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Options/Options.td
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
A clang/test/CodeGen/SystemZ/zos-ppa1-name.c
A clang/test/Driver/zos-ppa1-name.c
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/test/CodeGen/SystemZ/zos-ppa1.ll
Log Message:
-----------
[SystemZ][z/OS] Add options -m[no-]zos-ppa1-name to remove the function name in PPA1. (#207416)
This PR adds a pair of flag options `-m[no-]zos-ppa1-name` to clang,
which controls whether the function name is emitted in PPA1 on z/OS.
Commit: a1956712099b11ae7b218fce93115e45935933d9
https://github.com/llvm/llvm-project/commit/a1956712099b11ae7b218fce93115e45935933d9
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/test/Analysis/CostModel/AMDGPU/abs.ll
M llvm/test/Analysis/CostModel/AMDGPU/add-sub.ll
M llvm/test/Analysis/CostModel/AMDGPU/addrspacecast.ll
M llvm/test/Analysis/CostModel/AMDGPU/aggregates.ll
M llvm/test/Analysis/CostModel/AMDGPU/arith-sminmax.ll
M llvm/test/Analysis/CostModel/AMDGPU/arith-ssat.ll
M llvm/test/Analysis/CostModel/AMDGPU/arith-uminmax.ll
M llvm/test/Analysis/CostModel/AMDGPU/arith-usat.ll
M llvm/test/Analysis/CostModel/AMDGPU/arithmetic_fence.ll
M llvm/test/Analysis/CostModel/AMDGPU/bit-ops.ll
M llvm/test/Analysis/CostModel/AMDGPU/canonicalize.ll
M llvm/test/Analysis/CostModel/AMDGPU/cast.ll
M llvm/test/Analysis/CostModel/AMDGPU/control-flow.ll
M llvm/test/Analysis/CostModel/AMDGPU/copysign.ll
M llvm/test/Analysis/CostModel/AMDGPU/div.ll
M llvm/test/Analysis/CostModel/AMDGPU/exp.ll
M llvm/test/Analysis/CostModel/AMDGPU/exp10.ll
M llvm/test/Analysis/CostModel/AMDGPU/exp2.ll
M llvm/test/Analysis/CostModel/AMDGPU/extractelement.ll
M llvm/test/Analysis/CostModel/AMDGPU/fabs.ll
M llvm/test/Analysis/CostModel/AMDGPU/fadd.ll
M llvm/test/Analysis/CostModel/AMDGPU/fdiv.ll
M llvm/test/Analysis/CostModel/AMDGPU/fma.ll
M llvm/test/Analysis/CostModel/AMDGPU/fmul.ll
M llvm/test/Analysis/CostModel/AMDGPU/fmuladd.ll
M llvm/test/Analysis/CostModel/AMDGPU/fneg.ll
M llvm/test/Analysis/CostModel/AMDGPU/fptosi.ll
M llvm/test/Analysis/CostModel/AMDGPU/fptoui.ll
M llvm/test/Analysis/CostModel/AMDGPU/frexp.ll
M llvm/test/Analysis/CostModel/AMDGPU/fround.ll
M llvm/test/Analysis/CostModel/AMDGPU/fsub.ll
M llvm/test/Analysis/CostModel/AMDGPU/fused_costs.ll
M llvm/test/Analysis/CostModel/AMDGPU/gep.ll
M llvm/test/Analysis/CostModel/AMDGPU/insertelement.ll
M llvm/test/Analysis/CostModel/AMDGPU/is_fpclass.ll
M llvm/test/Analysis/CostModel/AMDGPU/ldexp.ll
M llvm/test/Analysis/CostModel/AMDGPU/load-to-trunc.ll
M llvm/test/Analysis/CostModel/AMDGPU/load.ll
M llvm/test/Analysis/CostModel/AMDGPU/log.ll
M llvm/test/Analysis/CostModel/AMDGPU/log10.ll
M llvm/test/Analysis/CostModel/AMDGPU/log2.ll
M llvm/test/Analysis/CostModel/AMDGPU/logicalop.ll
M llvm/test/Analysis/CostModel/AMDGPU/maximum.ll
M llvm/test/Analysis/CostModel/AMDGPU/maximumnum.ll
M llvm/test/Analysis/CostModel/AMDGPU/maxnum.ll
M llvm/test/Analysis/CostModel/AMDGPU/minimum.ll
M llvm/test/Analysis/CostModel/AMDGPU/minimumnum.ll
M llvm/test/Analysis/CostModel/AMDGPU/minnum.ll
M llvm/test/Analysis/CostModel/AMDGPU/mul.ll
M llvm/test/Analysis/CostModel/AMDGPU/ptrmask.ll
M llvm/test/Analysis/CostModel/AMDGPU/reduce-and.ll
M llvm/test/Analysis/CostModel/AMDGPU/reduce-or.ll
M llvm/test/Analysis/CostModel/AMDGPU/rem.ll
M llvm/test/Analysis/CostModel/AMDGPU/shifts.ll
M llvm/test/Analysis/CostModel/AMDGPU/shufflevector.ll
M llvm/test/Analysis/CostModel/AMDGPU/special-argument-intrinsics.ll
M llvm/test/Analysis/CostModel/AMDGPU/sqrt.ll
M llvm/test/Analysis/CostModel/AMDGPU/store.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/addrspacecast.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/control-flow-intrinsics.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/inline-asm.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/uses-value-from-cycle.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/addrspacecast.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/reducible-subgraph.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i16-system.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i16.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i8-system.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i8.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fadd-flat-specialization-preserve-name.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fadd-flat-specialization.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fadd.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fmax.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fmin.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fsub.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-nand.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-simplify-cfg-CAS-block.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-cmpxchg-flat-maybe-private.ll
Log Message:
-----------
AMDGPU: Migrate Analysis/Transforms tests to amdgpu subarch triple (1) (#208809)
Mechanically migrate the command-line target spelling on RUN lines from
-mtriple=amdgcn ... -mcpu=<gfx> to the folded subarch triple form (e.g.
-mtriple=amdgpu9.00-amd-amdhsa), dropping the redundant -mcpu.
This first batch covers Analysis and Transforms tests. Tests whose
output materially depends on -mcpu (e.g. opt runs that record a target-cpu
attribute, or cost-model tests whose default subtarget differs) are left for
separate handling. This begins a series of ~62 PRs covering backend tests.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: 82922454d89f5d34481af2e8313cd25b1eb3868d
https://github.com/llvm/llvm-project/commit/82922454d89f5d34481af2e8313cd25b1eb3868d
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M .github/workflows/ids-check.yml
Log Message:
-----------
[Github] Make ids-check workflow use container (#208780)
4bf0737d68bbb86d9d693e96a94c4175f27acebe introduced a container for this
to enable the use of a PGO optimized compiler and to bake the idt build
into the container. This patch updates the workflow to use it.
Commit: 4a717571c2d313c6cf3a54b3d3da1fe52cbe5453
https://github.com/llvm/llvm-project/commit/4a717571c2d313c6cf3a54b3d3da1fe52cbe5453
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/test/Transforms/AggressiveInstCombine/X86/lower-table-based-log2-basics.ll
Log Message:
-----------
[AggressiveInstCombine] Support alternate deBruijn log2 table that isolates the MSB before the multiply. (#208532)
The existing deBruijn log2 match expects the multiply input to be a mask
that has all bits below the most significant set bit to be 1.
There is an alternate form in some programs where this mask is modified
to isolate the MSB by doing (mask - (mask >> 1)). A cttz table is then
used instead of a log2 table.
This patch teaches tryToRecognizeTableBasedLog2 to match this form too.
I think there's still some additional work needed elsewhere to recognize
that the sub+select in the output can be done with not+and.
Fixes #207571
Assisted-by: Claude
Commit: 4e5a44a332d020e668f350f65fd24019fe239c8d
https://github.com/llvm/llvm-project/commit/4e5a44a332d020e668f350f65fd24019fe239c8d
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M lld/ELF/Relocations.cpp
M lld/ELF/SyntheticSections.cpp
M lld/test/ELF/mips-tls-64-pic-local-variable.s
M lld/test/ELF/x86-64-tls-gd-local.s
Log Message:
-----------
[ELF] Fix TLS GD against non-preemptible dynamic symbols in DSOs (#207881)
Consider a DSO that uses TLS GD against a dynamic non-preemptible symbol
(e.g. protected, or linked with -Bsymbolic). The expected meaning of
this is to always reference the DSO's own TLS segment for that symbol,
regardless of any attempts to preempt it at load time, and LLD will
indeed emit a constant offset rather than a symbolic DTPOFF relocation
for the second GOT word. However, for the first GOT word, because we
currently only treat the isLocalInExecutable case as special (where the
module index is 1), we end up creating a symbolic DTPMOD relocation,
rather than a non-symbolic (i.e. against the null symbol) one to get
this DSO's index, and so any load-time preemption will cause us to use a
different module's TLS block. As a result, not only do we have symbol
preemption when we shouldn't, but also the two halves of the TLS GD GOT
entry end up inconsistent, using the offset of the symbol in this
module's TLS block for a different module's.
Fix this by breaking down the two !isLocalInExecutable cases, emitting
the expected non-symbolic DTPMOD relocation for any non-preemptible
symbol references in a DSO. Whilst here, combine the DTPMOD and DTPOFF
code rather than have two different if statements, so it's clearer what
the three cases are and they don't get out of sync.
Note that although, for the existing code, local symbols take the exact same
code paths in postScanRelocations, they do not end up with symbolic DTPMOD
relocations in the output, despite creating them. DynamicReloc::getSymIndex has
the quirk of silently squashing the symbol index to 0 for symbolic relocations
against non-dynamic symbols, which applies to local symbols but not other
non-preemptible symbols, i.e. the case relevant in the first paragraph. This
quirky behaviour of DynamicReloc::getSymIndex is probably something that should
be retired; I can't see a good reason for it, and any case that it squashes
could be hiding similar bugs like this. I take the view that a request to
create a symbolic relocation against a symbol that won't be in the dynamic
symbol table is a strong sign that the code is confused and doing something
wrong, even if it happens to work out.
Commit: 4c5e15667fe384e434961fe44cf5950dc309fdf1
https://github.com/llvm/llvm-project/commit/4c5e15667fe384e434961fe44cf5950dc309fdf1
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/cmake/modules/FindDIASDK.cmake
Log Message:
-----------
[cmake] Fix VSINSTALLDIR check in FindDIASDK module (#208524)
elseif($ENV{VSINSTALLDIR}) expands the env value into the condition,
where CMake treats it as an undefined variable, so the branch is always
false. Fix this by testing if the env variable is defined instead.
Commit: 2705f4613aee08fcbe7292ae4a2ce577c8192d48
https://github.com/llvm/llvm-project/commit/2705f4613aee08fcbe7292ae4a2ce577c8192d48
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
A libc/docs/dev/date_and_time.md
M libc/docs/dev/index.md
M libc/src/time/CMakeLists.txt
M libc/src/time/time_constants.h
M libc/src/time/time_utils.cpp
M libc/src/time/time_utils.h
M libc/test/src/time/CMakeLists.txt
M libc/test/src/time/gmtime_test.cpp
Log Message:
-----------
[libc] Implement fast date conversion algorithm of Ben Joffe (#208312)
Replaced the loop-based year/month/day extraction in update_from_seconds
with Ben Joffe's "Very Fast 64-bit" date algorithm using multiply-shift
division (4 multiplications, 0 hardware divisions). Also replaced the
mktime inverse with Ben Joffe's inverse date algorithm.
Updated is_leap_year to use the Drepper-Neri-Schneider algorithm (% 25
instead of % 100). Replaced the O(n) yday month-length loop with a
constant-time cumulative-days table lookup.
Uses UInt128 for portable 128-bit support across 64-bit (native) and
32-bit (software fallback) targets.
Raman's benchmarks on x86-64 show a ~13% wall-time improvement:
Before: real 2.215s, user 2.214s
After: real 1.919s, user 1.913s
Algorithm references:
https://www.benjoffe.com/fast-date-64
https://www.benjoffe.com/fast-date#inverse
https://www.benjoffe.com/fast-leap-year#drepper-neri-schneider
---------
Co-authored-by: Raman Tenneti <rtenneti at google.com>
Commit: ac88468d745f0f10d51029ca9d2ef717f43086a0
https://github.com/llvm/llvm-project/commit/ac88468d745f0f10d51029ca9d2ef717f43086a0
Author: Shafik Yaghmour <shafik.yaghmour at intel.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/AST/ExprConstant.cpp
M clang/test/SemaCXX/constexpr-array-unknown-bound.cpp
Log Message:
-----------
[Clang] Adjust assert in addUnsizedArray to check Base is set before … (#208112)
In addUnsizedArray we attempt to check the type of Base in an assert but
don't verify if it set before doing so. This can lead to a crash, check
Base is set before checking its type and add a regression test.
Fixes: https://github.com/llvm/llvm-project/issues/44212
Commit: ddbce7b55c368c9601feb803802274703bfa1854
https://github.com/llvm/llvm-project/commit/ddbce7b55c368c9601feb803802274703bfa1854
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/test/Transforms/AtomicExpand/AMDGPU/no-expand-atomic-load.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/no-expand-atomic-store.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/unaligned-atomic.ll
M llvm/test/Transforms/Attributor/AMDGPU/do-not-replace-addrspacecast-with-constantpointernull.ll
M llvm/test/Transforms/Attributor/AMDGPU/tag-invariant-loads.ll
M llvm/test/Transforms/Attributor/address_space_info.ll
M llvm/test/Transforms/CodeGenPrepare/AMDGPU/addressing-modes.ll
M llvm/test/Transforms/CodeGenPrepare/AMDGPU/bypass-slow-div-debug-info-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/AMDGPU/bypass-slow-div-debug-info.ll
M llvm/test/Transforms/CodeGenPrepare/AMDGPU/no-sink-addrspacecast.ll
M llvm/test/Transforms/CodeGenPrepare/AMDGPU/sink-addrspacecast.ll
M llvm/test/Transforms/DivRemPairs/AMDGPU/div-rem-pairs.ll
M llvm/test/Transforms/EarlyCSE/AMDGPU/convergent-call.ll
M llvm/test/Transforms/EarlyCSE/AMDGPU/intrinsics.ll
M llvm/test/Transforms/EarlyCSE/AMDGPU/memrealtime.ll
M llvm/test/Transforms/ExpandIRInsts/AMDGPU/frem-inf.ll
M llvm/test/Transforms/ExpandIRInsts/AMDGPU/frem.ll
M llvm/test/Transforms/ExpandIRInsts/AMDGPU/missing-analysis.ll
M llvm/test/Transforms/ExpandIRInsts/AMDGPU/pass-parameters.ll
M llvm/test/Transforms/GlobalOpt/address_space_initializer.ll
M llvm/test/Transforms/GlobalOpt/shrink-global-to-bool.ll
M llvm/test/Transforms/HipStdPar/accelerator-code-selection.ll
M llvm/test/Transforms/HipStdPar/global-var-indirection-wrong-table-member-0.ll
M llvm/test/Transforms/HipStdPar/global-var-indirection-wrong-table-member-1.ll
M llvm/test/Transforms/HipStdPar/global-var-indirection-wrong-table-member-2.ll
M llvm/test/Transforms/HipStdPar/global-var-indirection-wrong-table-member-count.ll
M llvm/test/Transforms/HipStdPar/global-var-indirection-wrong-table-type.ll
M llvm/test/Transforms/HipStdPar/global-var-indirection.ll
M llvm/test/Transforms/HipStdPar/global-var.ll
M llvm/test/Transforms/HipStdPar/unsupported-asm.ll
M llvm/test/Transforms/HipStdPar/unsupported-builtins.ll
M llvm/test/Transforms/HipStdPar/unsupported-thread-local-direct-use.ll
M llvm/test/Transforms/HipStdPar/unsupported-thread-local-indirect-use.ll
M llvm/test/Transforms/IndVarSimplify/AMDGPU/no-widen-to-i64.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/address-space-id-funcs.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/assumed-addrspace.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/basic.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/builtin-assumed-addrspace.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/debug-info.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/icmp.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/infer-address-space.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/infer-addrspacecast.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/infer-getelementptr.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/insert-pos-assert.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/int2ptr.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/intrinsics.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/is.constant.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/issue110433.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/issue53665.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/lifetime.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/masked-load-store.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/mem-intrinsics.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/multiple-uses-of-val.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/no-flat-addrspace.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/noop-ptrint-pair.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/old-pass-regressions.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/phi-poison.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/prefetch.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/preserving-debugloc-addrspacecast.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/ptrmask.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/redundant-addrspacecast.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/select.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/self-phi.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/store-pointer-to-self.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/unreachable-code-assert.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/volatile.ll
M llvm/test/Transforms/InferFunctionAttrs/enable-builtin.ll
M llvm/test/Transforms/Inline/AMDGPU/amdgpu-inline-alloca-argument-cost.ll
M llvm/test/Transforms/Inline/AMDGPU/amdgpu-inline-alloca-argument.ll
M llvm/test/Transforms/Inline/AMDGPU/amdgpu-inline-only-one-live-use.ll
M llvm/test/Transforms/Inline/AMDGPU/amdgpu-inline-stack-argument-i64.ll
M llvm/test/Transforms/Inline/AMDGPU/amdgpu-inline-stack-argument.ll
M llvm/test/Transforms/Inline/AMDGPU/amdgpu-inline-stack-array-ptr-argument.ll
M llvm/test/Transforms/Inline/AMDGPU/amdgpu-inline-stack-indirect-call-argument.ll
M llvm/test/Transforms/Inline/AMDGPU/amdgpu-inline-stack-ptr-argument.ll
M llvm/test/Transforms/Inline/AMDGPU/amdgpu-inline-stack-struct-argument.ll
M llvm/test/Transforms/Inline/AMDGPU/amdgpu-inline-stack-vector-ptr-argument.ll
M llvm/test/Transforms/Inline/AMDGPU/inline-amdgpu-dx10-clamp.ll
M llvm/test/Transforms/Inline/AMDGPU/inline-amdgpu-ieee.ll
M llvm/test/Transforms/Inline/AMDGPU/inline-amdgpu-vecbonus.ll
M llvm/test/Transforms/Inline/AMDGPU/inline-atomicrmw-md-preserve.ll
M llvm/test/Transforms/Inline/AMDGPU/inline-denormal-fp-math.ll
M llvm/test/Transforms/Inline/AMDGPU/inline-hint.ll
M llvm/test/Transforms/Inline/AMDGPU/inline-target-cpu.ll
M llvm/test/Transforms/Inline/AMDGPU/inline-target-feature-sram-ecc.ll
M llvm/test/Transforms/Inline/AMDGPU/inline-target-feature-xnack.ll
M llvm/test/Transforms/Inline/AMDGPU/load-intrinsics.ll
M llvm/test/Transforms/InstCombine/AMDGPU/addrspacecast.ll
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-demanded-vector-elts-inseltpoison.ll
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-demanded-vector-elts.ll
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics-gfx8.ll
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-simplify-image-buffer-stores.ll
M llvm/test/Transforms/InstCombine/AMDGPU/canonicalize-add-to-gep.ll
M llvm/test/Transforms/InstCombine/AMDGPU/fma_legacy.ll
M llvm/test/Transforms/InstCombine/AMDGPU/fmed3-fpext-fold.ll
Log Message:
-----------
AMDGPU: Migrate Analysis/Transforms tests to amdgpu subarch triple (2) (#208810)
Commit: a2fc23854f963cbf63cc6266b73a2df7cc4a5068
https://github.com/llvm/llvm-project/commit/a2fc23854f963cbf63cc6266b73a2df7cc4a5068
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/test/Transforms/InstCombine/AMDGPU/fmul_legacy.ll
M llvm/test/Transforms/InstCombine/AMDGPU/image-d16.ll
M llvm/test/Transforms/InstCombine/AMDGPU/issue68120.ll
M llvm/test/Transforms/InstCombine/AMDGPU/lane-index-simplify-demanded-bits.ll
M llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.implicitarg.ptr.ll
M llvm/test/Transforms/InstCombine/AMDGPU/mbcnt-negative-cases.ll
M llvm/test/Transforms/InstCombine/AMDGPU/mbcnt-wave32-optimizations.ll
M llvm/test/Transforms/InstCombine/AMDGPU/mbcnt-wave64-optimizations.ll
M llvm/test/Transforms/InstCombine/AMDGPU/memcpy-from-constant.ll
M llvm/test/Transforms/InstCombine/AMDGPU/mfma-scale.ll
M llvm/test/Transforms/InstCombine/AMDGPU/permlane64.ll
M llvm/test/Transforms/InstCombine/AMDGPU/ptr-replace-alloca.ll
M llvm/test/Transforms/InstCombine/AMDGPU/sendmsg-m0-poison.ll
M llvm/test/Transforms/InstCombine/AMDGPU/simplify-amdgcn.cvt.off.f32.i4.ll
M llvm/test/Transforms/InstCombine/AMDGPU/tan.ll
M llvm/test/Transforms/InstCombine/AMDGPU/wave-shuffle-patterns-wave64.ll
M llvm/test/Transforms/InstCombine/AMDGPU/wave-shuffle-patterns.ll
M llvm/test/Transforms/InstCombine/AMDGPU/wmma-f8f6f4.ll
M llvm/test/Transforms/InstCombine/exp2-1.ll
M llvm/test/Transforms/InstCombine/pow-1.ll
M llvm/test/Transforms/JumpThreading/divergent-target-test.ll
M llvm/test/Transforms/LICM/AMDGPU/bitcast.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/aa-metadata.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/addrspace-7.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/complex-index.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/extended-index.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/fence-noalias-metadata.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/gep-bitcast.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/insertion-point.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/interleaved-mayalias-store.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/invariant-load.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/merge-stores-private.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/merge-stores.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/merge-vectors-complex.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/merge-vectors.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/missing-alignment.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/multiple_tails.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/no-implicit-float.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/opaque_ptr.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/optnone.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/pointer-elements.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/selects-inseltpoison.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/selects.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/store_with_aliasing_load.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/unaligned-buffer.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/vectorize-redund-loads.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/weird-type-accesses.ll
M llvm/test/Transforms/LoopIdiom/AMDGPU/popcnt.ll
M llvm/test/Transforms/LoopStrengthReduce/AMDGPU/atomics.ll
M llvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-invalid-ptr-extend.ll
M llvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-postinc-pos-addrspace.ll
M llvm/test/Transforms/LoopStrengthReduce/AMDGPU/preserve-addrspace-assert.ll
M llvm/test/Transforms/LoopUnroll/AMDGPU/runtime-unroll.ll
M llvm/test/Transforms/LoopUnroll/AMDGPU/unroll-analyze-small-loops.ll
M llvm/test/Transforms/LoopUnroll/AMDGPU/unroll-barrier.ll
M llvm/test/Transforms/LoopUnroll/AMDGPU/unroll-convergent-uniform-tripcount.ll
M llvm/test/Transforms/LoopUnroll/AMDGPU/unroll-cost-addrspacecast.ll
M llvm/test/Transforms/LoopUnroll/AMDGPU/unroll-cost-call.ll
M llvm/test/Transforms/LoopUnroll/AMDGPU/unroll-for-private.ll
M llvm/test/Transforms/LoopUnroll/AMDGPU/unroll-threshold.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/divergent-runtime-check.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/packed-fp32.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/packed-fp64.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/packed-math.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/unroll-in-loop-vectorizer.ll
M llvm/test/Transforms/MemCpyOpt/no-libcalls.ll
M llvm/test/Transforms/OpenMP/custom_state_machines.ll
M llvm/test/Transforms/OpenMP/custom_state_machines_pre_lto.ll
M llvm/test/Transforms/OpenMP/heap-to-shared-missing-declarations.ll
M llvm/test/Transforms/OpenMP/spmdization.ll
M llvm/test/Transforms/OpenMP/spmdization_indirect.ll
M llvm/test/Transforms/OpenMP/spmdization_kernel_env_dep.ll
M llvm/test/Transforms/PhaseOrdering/AMDGPU/infer-address-space.ll
M llvm/test/Transforms/PhaseOrdering/varargs.ll
M llvm/test/Transforms/PreISelIntrinsicLowering/AMDGPU/expand-mem-intrinsics.ll
M llvm/test/Transforms/PreISelIntrinsicLowering/AMDGPU/memset-pattern.ll
M llvm/test/Transforms/ScalarizeMaskedMemIntrin/AMDGPU/expamd-masked-load.ll
M llvm/test/Transforms/ScalarizeMaskedMemIntrin/AMDGPU/expand-masked-gather.ll
M llvm/test/Transforms/ScalarizeMaskedMemIntrin/AMDGPU/expand-masked-scatter.ll
M llvm/test/Transforms/ScalarizeMaskedMemIntrin/AMDGPU/expand-masked-store.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/preserve-inbounds.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/split-gep-and-gvn-addrspace-addressing-modes.ll
Log Message:
-----------
AMDGPU: Migrate Analysis/Transforms tests to amdgpu subarch triple (3) (#208811)
Continue migrating command-line target spelling on RUN lines to the
folded amdgpu subarch triple form, covering more Transforms tests.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: 37593bf3c58e693fb3bdaa2f5e7ab136a5ddbe75
https://github.com/llvm/llvm-project/commit/37593bf3c58e693fb3bdaa2f5e7ab136a5ddbe75
Author: Kyungtak Woo <kevinwkt at google.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M compiler-rt/test/builtins/Unit/hexagon_fmadf5_test.c
Log Message:
-----------
[compiler-rt][hexagon][test] Guard __hexagon_fmadf5 unit test with __hexagon__ define (#208818)
When `compiler-rt/test/builtins/Unit/` C test files are compiled outside
of a standard `lit` pipeline (such as direct standalone compilation or
downstream test harnesses where each `.c` file is built and run as an
independent executable against `libclang_rt.builtins.a`),
`hexagon_fmadf5_test.c` unconditionally referenced `__hexagon_fmadf5`.
Because `__hexagon_fmadf5` is only provided in
`libclang_rt.builtins-hexagon.a`, non-Hexagon builds failed at link
time.
This change is consistent with other architecture-specific builtin unit
tests (such as `divdf3vfp_test.c`, `adddf3vfp_test.c`, and ARM/PPC
builtin tests), this change wraps Hexagon-specific declarations,
helpers, and test logic inside `#if defined(__hexagon__)`. On
non-Hexagon targets, `main()` prints `"skipped\n"` and returns `0`.
Introduced by https://github.com/llvm/llvm-project/pull/207373
Commit: 98e5f18078ca87ff59bb6e6b07e341a77d599f81
https://github.com/llvm/llvm-project/commit/98e5f18078ca87ff59bb6e6b07e341a77d599f81
Author: jimingham <jingham at apple.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFCompileUnit.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
Log Message:
-----------
Move the error about DIE not having an address range to the Verbose channel (#208593)
This particular error, when it comes tends to come over and over and
over and swamps all the other logging output.
It's clearly a candidate for the verbose log channel. Since this was
emitted with LLDB_LOG_ERROR that also meant it went to the always on
log, where again it was swamping the other output and making logs quite
difficult to read. I asked around and nobody felt the need to have this
always on.
Commit: 6d3cf7f436a01f4622fb660e413a4020209777b8
https://github.com/llvm/llvm-project/commit/6d3cf7f436a01f4622fb660e413a4020209777b8
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M libcxx/utils/ci/docker/docker-compose.yml
Log Message:
-----------
[libcxx] Bump GitHub runner version (#208823)
To stay ahead of the 6-month deprecation curve, we might as well bump
this as we update the image to get a more recent clang version.
Commit: 5b1484c828448675dbfddc50be7280c2dcab80da
https://github.com/llvm/llvm-project/commit/5b1484c828448675dbfddc50be7280c2dcab80da
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/include/clang/Driver/CommonArgs.h
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/test/Driver/opencl-libclc.cl
Log Message:
-----------
clang/AMDGPU: Fix double linking opencl libs with --libclc-lib (#204865)
Noticed by inspection. If using an explicit --libclc-lib flag,
do not attempt to also link the rocm device libs which will contain
different implementations of the same opencl symbols.
Co-Authored-By: Claude <noreply at anthropic.com>
Commit: f8ea8223d2ab1d6c3aa6c7c21444cf4d23a6d184
https://github.com/llvm/llvm-project/commit/f8ea8223d2ab1d6c3aa6c7c21444cf4d23a6d184
Author: Ikhlas Ajbar <iajbar at quicinc.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonRDFOpt.cpp
A llvm/test/CodeGen/Hexagon/pr207422.ll
Log Message:
-----------
[Hexagon] Recompute physreg live-ins after HexagonRDFOpt (PR207422) (#208050)
HexagonRDFOpt's Liveness recomputation (LV.resetLiveIns) can leave
stale, over-approximate physical register live-ins on some blocks.
Downstream this has surfaced as If Converter inserting incorrect
implicit-use operands on predicated loads, tripping the machine verifier
with 'Using an undefined physical register'.
Run a conventional backward liveness recomputation after the RDF update
to correct the live-in lists. The entry block is skipped because its
live-ins reflect the calling convention and include argument registers
that may not be read directly.
Commit: d1fc322223b6e1e9e45b4ec3af3f2b1aa7c4f1fc
https://github.com/llvm/llvm-project/commit/d1fc322223b6e1e9e45b4ec3af3f2b1aa7c4f1fc
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/CMakeLists.txt
Log Message:
-----------
[CMake] Use minimum python version of 3.8 everywhere (#208822)
We used to set a minimum of 3.0, and only 3.8 if tests were enabled. But
it doesn't seem like anyone is actually testing this config and it just
seems to cause more confusion/breakage than anything else, so just set
the global minimum to 3.8.
Commit: 956777b773f81f6103c621857c3784b2c3f76c66
https://github.com/llvm/llvm-project/commit/956777b773f81f6103c621857c3784b2c3f76c66
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M .github/workflows/containers/github-action-ci-windows/Dockerfile
M .github/workflows/containers/github-action-ci/Dockerfile
Log Message:
-----------
[Github] Bump runner version to 2.335.1 (#208824)
To stay ahead of the 6-month deprecation window.
Commit: 60474dc123ab46badaccc237e43c1fe5ebb87481
https://github.com/llvm/llvm-project/commit/60474dc123ab46badaccc237e43c1fe5ebb87481
Author: lianjinfeng2003 <101249452+mygitljf at users.noreply.github.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M mlir/test/Dialect/SCF/loop-pipelining.mlir
M mlir/test/lib/Dialect/SCF/TestSCFUtils.cpp
Log Message:
-----------
[mlir][scf] Validate pipelining annotations in test pass (#208788)
I made the SCF pipelining test pass validate malformed scheduling
annotations before building the schedule. Bad annotations now produce
diagnostics instead of crashing, while valid schedules keep using the
existing path.
Fixes #206918
Commit: 372e0ab3a8c3ff57781a432ab35190cc9aca144d
https://github.com/llvm/llvm-project/commit/372e0ab3a8c3ff57781a432ab35190cc9aca144d
Author: Aleksandr Platonov <platonov.aleksandr at huawei.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M clang-tools-extra/clangd/index/remote/marshalling/Marshalling.cpp
Log Message:
-----------
[clangd][remote] Fix SmallVector assertion in uriToRelativePath for Windows paths (#208830)
After https://github.com/llvm/llvm-project/pull/207202 buildbot has
detected a new failure.
Assertion happens in newly created test:
```
ClangdTests: /vol/worker/clangd-ubuntu-clang/clangd-ubuntu-tsan/llvm-project/llvm/include/llvm/ADT/SmallVector.h:196: void llvm::SmallVectorTemplateCommon<char>::assertSafeToReferenceAfterResize(const void *, size_t) [T = char]: Assertion `isSafeToReferenceAfterResize(Elt, NewSize) && "Attempting to reference an element of the vector in an operation " "that invalidates it"' failed.
```
The root cause is that `Path` is a `StringRef` aliasing `Result`s
buffer. Assigning `Result` to `Path.drop_front()` triggers
`SmallVector`s `assertSafeToReferenceAfterResize` assertion (that
assertion checks if we are passing an iterator that points into the own
buffer).
With this patch we convert `Path.drop_front()` to `std::string` to break
the aliasing before assignment.
Commit: ff77f06bcc287458041f876106d7f8ae86d3a118
https://github.com/llvm/llvm-project/commit/ff77f06bcc287458041f876106d7f8ae86d3a118
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Driver/bbc-implicit-use-module.f90
Log Message:
-----------
[flang][cuda] Restrict implicit use to non-cuda subprogram (#208808)
Commit: 3b3509a2adcbab4dfc224ba1d85c0ce7fab786c1
https://github.com/llvm/llvm-project/commit/3b3509a2adcbab4dfc224ba1d85c0ce7fab786c1
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/cse-replicate-regions.ll
Log Message:
-----------
[VPlan] Enable CSE of VPWidenPHIRecipe. (#207573)
Add VPWidenPHIRecipe to the set of recipes CSE can handle. Besides their
operands (incoming values), they also depend on their predecessors, so
canHandle checks for that.
PR: https://github.com/llvm/llvm-project/pull/207573/
Commit: 1dbefed159e96e875e1f898093c8e872ab760035
https://github.com/llvm/llvm-project/commit/1dbefed159e96e875e1f898093c8e872ab760035
Author: Paul Kirth <paulkirth at google.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang-tools-extra/clang-doc/Representation.cpp
Log Message:
-----------
[clang-doc][nfc] Remove stale FIXME (#208795)
This was fixed a long time ago when relanding arena support. This FIXME
was missed when we folded in the deep copying to the reland. It can
safely be removed, as the situation it warns about cannot happen
anymore.
Commit: 160ff82534b171965da6d5d2bd079547dbf73547
https://github.com/llvm/llvm-project/commit/160ff82534b171965da6d5d2bd079547dbf73547
Author: Paul Kirth <paulkirth at google.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang-tools-extra/clang-doc/BitcodeWriter.cpp
Log Message:
-----------
[clang-doc][nfc] Delete commented out code (#208843)
Commit: 8a4a2aed7d758d004576c5fa3666dcfe9e669728
https://github.com/llvm/llvm-project/commit/8a4a2aed7d758d004576c5fa3666dcfe9e669728
Author: Eli Friedman <efriedma at qti.qualcomm.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/docs/GettingStarted.md
Log Message:
-----------
[GettingStarted] Clarify Python requirement. (#208790)
We don't support building LLVM without python in any configuration;
clarify that it's a hard requirement.
Commit: cf51c12c49526af7f9291a6f060b31def85b9a24
https://github.com/llvm/llvm-project/commit/cf51c12c49526af7f9291a6f060b31def85b9a24
Author: Paul Kirth <paulkirth at google.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang-tools-extra/clang-doc/support/File.h
M clang-tools-extra/clang-doc/support/Utils.h
Log Message:
-----------
[clang-doc] Update include guards in header files (#208840)
These do not follow the style guide, and Utils.h has the wrong macro
definition.
Commit: d09048a46401b8e8385196679a9515516e16288a
https://github.com/llvm/llvm-project/commit/d09048a46401b8e8385196679a9515516e16288a
Author: Sirraide <aeternalmail at gmail.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M clang/include/clang/AST/ASTNodeTraverser.h
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/DeclBase.h
M clang/include/clang/AST/DeclTemplate.h
M clang/include/clang/AST/ExprCXX.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/AST/StmtCXX.h
M clang/include/clang/AST/TextNodeDumper.h
M clang/include/clang/Basic/DeclNodes.td
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/StmtNodes.td
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/Scope.h
M clang/include/clang/Sema/ScopeInfo.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/DeclBase.cpp
M clang/lib/AST/DeclPrinter.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprCXX.cpp
M clang/lib/AST/ExprClassification.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/StmtCXX.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseInit.cpp
M clang/lib/Parse/ParseStmt.cpp
M clang/lib/Sema/CMakeLists.txt
M clang/lib/Sema/IdentifierResolver.cpp
M clang/lib/Sema/Scope.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
A clang/lib/Sema/SemaExpand.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaStmtAttr.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTCommon.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
A clang/test/AST/ast-dump-expansion-stmt.cpp
A clang/test/AST/ast-print-expansion-stmts.cpp
A clang/test/CodeGenCXX/cxx2c-destructuring-expansion-stmt.cpp
A clang/test/CodeGenCXX/cxx2c-enumerating-expansion-statements.cpp
A clang/test/CodeGenCXX/cxx2c-expansion-stmts-control-flow.cpp
A clang/test/CodeGenCXX/cxx2c-expansion-stmts-mangling.cpp
A clang/test/CodeGenCXX/cxx2c-expansion-stmts-templates.cpp
A clang/test/CodeGenCXX/cxx2c-iterating-expansion-stmt.cpp
A clang/test/Parser/cxx2c-expansion-statements-not-backported.cpp
A clang/test/Parser/cxx2c-expansion-statements.cpp
A clang/test/SemaCXX/cxx2c-expansion-statements-shadow.cpp
A clang/test/SemaCXX/cxx2c-expansion-stmts-control-flow.cpp
A clang/test/SemaCXX/cxx2c-expansion-stmts.cpp
M clang/test/SemaTemplate/GH176155.cpp
M clang/tools/libclang/CIndex.cpp
M clang/tools/libclang/CXCursor.cpp
M clang/www/cxx_status.html
Log Message:
-----------
[Clang] [C++26] Expansion Statements (P1306R5) (#169680)
This implements C++26's expansion statements, i.e.
[P1306R5](https://wg21.link/P1306R5).
An expansion statement is implemented using a number of new AST
nodes. Since an expansion statement is a template, we need it to be
a dependent DeclContext, but only nodes that inherit from Decl can
be DeclContexts, for which reason this introduces a CXXExpansionStmtDecl.
This holds a synthesised constant template parameter used as the
expansion index as well as a 'CXXExpansionStmtPattern' and a
'CXXExpansionStmtInstantiation.
These two AST nodes are similar to the semantic vs syntactic form
of an InitListExpr: the 'Pattern' represents an unexpanded expansion
statement, and the resulting AST after expansion is stored in an
'Instantiation'.
Since expansion statements require us to perform template instantiation
*inside* a function without instantiating the rest of a function, I had to
remove a number of assertions in the template instantiation engine (e.g.
the assertion that a function parameter must always have an instantiation
by the time we encounter a DeclRefExpr to it no longer holds).
For more implementation details, see the corresponding doc comments
in DeclTemplate.h and StmtCXX.h.
There is some follow up work to be done after this lands, which is
tracked in #207776.
Commit: 4df43305b846fd5cb8da85da6d23272985d1d1ba
https://github.com/llvm/llvm-project/commit/4df43305b846fd5cb8da85da6d23272985d1d1ba
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M lldb/test/API/functionalities/gdb_remote_client/TestAArch64XMLRegistersSVEOnly.py
M lldb/test/API/functionalities/gdb_remote_client/TestXMLRegisterFlags.py
M lldb/test/API/linux/aarch64/permission_overlay/TestAArch64LinuxPOE.py
Log Message:
-----------
[lldb][test] Update whitespace of `register read` in some tests (#208838)
#188049 changed the formatting of `register read` output. A few tests
are failing now due to small space changes.
Commit: ed1e356f888ff3bfa846ad4902d4645030bc0a6d
https://github.com/llvm/llvm-project/commit/ed1e356f888ff3bfa846ad4902d4645030bc0a6d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChains/AMDGPU.cpp
A clang/test/Driver/amdgpu-openmp-gpu-max-threads-per-block.c
A clang/test/Frontend/openmp-warn-gpu-max-threads-per-block.c
Log Message:
-----------
clang/AMDGPU: Remove driver restriction on --gpu-max-threads-per-block (#204864)
Commit: 3b36c2d642778249dd6f15249a827be979fafbb7
https://github.com/llvm/llvm-project/commit/3b36c2d642778249dd6f15249a827be979fafbb7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/AMDGPU/add_sub_sat-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/add_sub_sat.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/address-space-ptr-sze-gep-index-assert.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/bswap-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/bswap.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/crash_extract_subvector_cost.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/horizontal-store.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/invariant-load-no-alias-store.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/min_max.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/packed-math.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/phi-result-use-order.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/reduction.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/round-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/round.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/slp-v2f32.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/slp-v2f64.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/slp-v2i64.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/transform-node-gather-struct.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/split-gep.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/xor-decompose.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/crash-in-unreachable-code.ll
M llvm/test/Transforms/SimpleLoopUnswitch/AMDGPU/nontrivial-unswitch-divergent-target.ll
M llvm/test/Transforms/SimpleLoopUnswitch/AMDGPU/uniform-unswitch.ll
M llvm/test/Transforms/SimplifyCFG/AMDGPU/cttz-ctlz.ll
M llvm/test/Transforms/SimplifyCFG/switch-transformations-no-lut.ll
M llvm/test/Transforms/SpeculativeExecution/single-lane-execution.ll
M llvm/test/Transforms/StraightLineStrengthReduce/AMDGPU/reassociate-geps-and-slsr-addrspace.ll
M llvm/test/Transforms/StructurizeCFG/AMDGPU/backedge-id-bug.ll
M llvm/test/Transforms/StructurizeCFG/AMDGPU/loop-subregion-misordered.ll
M llvm/test/Transforms/StructurizeCFG/AMDGPU/uniform-regions.ll
M llvm/test/Transforms/StructurizeCFG/structurizer-keep-perf-md.ll
M llvm/test/Transforms/VectorCombine/AMDGPU/as-transition-inseltpoison.ll
M llvm/test/Transforms/VectorCombine/AMDGPU/as-transition.ll
M llvm/test/Transforms/VectorCombine/AMDGPU/extract-insert-chain-to-shuffles.ll
M llvm/test/Transforms/VectorCombine/AMDGPU/narrow-phi-of-shuffles.ll
M llvm/test/Transforms/VectorCombine/AMDGPU/no-scalarize-vector-extract.ll
Log Message:
-----------
AMDGPU: Migrate Analysis/Transforms tests to amdgpu subarch triple (4) (#208812)
Continue migrating command-line target spelling on RUN lines to the
folded amdgpu subarch triple form, covering the remaining Transforms tests in
this group.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: a8ba0ad546660542b7200cd8269574b988c89f86
https://github.com/llvm/llvm-project/commit/a8ba0ad546660542b7200cd8269574b988c89f86
Author: Lukas Stephan <kulst at mailbox.org>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
A llvm/test/CodeGen/NVPTX/convert-fp-i128.ll
Log Message:
-----------
[NVPTX] Expand fp/int conversions involving integers wider than 64 bits (#201679)
NVPTX does not support direct PTX conversion instructions between
floating point types and integer types wider than 64 bits.
Previously, such conversions could reach instruction selection and fail
with an _unsupported library call operation_ error.
Reproducer on godbolt: https://godbolt.org/z/G6Yr9cE1d
This patch sets the maximum supported fp/int conversion width to 64 bits
so larger conversions are expanded before instruction selection.
It also adds a regression test for 128-bit integer/floating-point
conversions.
Related to #191013
Co-authored-by: Justin Fargnoli <jfargnoli at nvidia.com>
Commit: 5a73020f0261922e1f30cd458f7d0bd757fb9ba1
https://github.com/llvm/llvm-project/commit/5a73020f0261922e1f30cd458f7d0bd757fb9ba1
Author: Mike Kruskal <mkruskal at google.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
A compiler-rt/test/sanitizer_common/TestCases/Linux/dlopen_image_base.c
Log Message:
-----------
[compiler-rt] [sanitizer_common] Add a testcase reproducing SIGSEGV in ForEachMappedRegion (#208358)
Likely related to https://github.com/llvm/llvm-project/issues/84482 and
https://github.com/llvm/llvm-project/issues/21068
Assisted-by: Gemini
Commit: 7e89dcfba2dcc4d85f04c05a3fee483b6d2e3150
https://github.com/llvm/llvm-project/commit/7e89dcfba2dcc4d85f04c05a3fee483b6d2e3150
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/test/Integration/OpenMP/map-types-and-sizes.f90
M flang/test/Lower/OpenMP/defaultmap.f90
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/omptarget-record-type-with-ptr-member-host.mlir
A offload/test/offloading/fortran/map-zero-size-array.f90
Log Message:
-----------
[Flang][OpenMP] Support mapping of zero-sized arrays (#208133)
Whilst there is no data in theory to map with a zero sized array, the
Fortran OpenMP specification considers the case of a zero sized array
being mapped to device as the data being present on device. This
includes both the data and the descriptor, and it should fundamentlaly
work as a zero-sized array would on device with the respective Fortran
functions for presence and size checking etc.
We can't actually map a nullptr to device and expect it to be present in
current OpenMP (for good reason), however, thankfully, a zero sized
array isn't actually a nullptr, it is a descriptor contianing an
allocated 1-byte of data. So, we can map this to device, alongside the
descriptor and then the zero sized array is correctlly on device for all
intents and purposes. This case is notably different from a
non-allocated or non-zero sized array so we can do this without shooting
ourselves in the foot.
Commit: a9a709f01bfb6204816db9b3bedbe4b627c4bfc3
https://github.com/llvm/llvm-project/commit/a9a709f01bfb6204816db9b3bedbe4b627c4bfc3
Author: Sirraide <aeternalmail at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/include/clang/Sema/Scope.h
M clang/lib/Parse/ParseStmt.cpp
M clang/lib/Sema/Scope.cpp
Log Message:
-----------
[Clang] [NFC] Use ScopeFlags for expansion statement scopes (#208849)
Previously, we were using a separate `bool` member in `Scope` for this
because we ran out of bits in `ScopeFlags`. #198436 recently freed up a
bit for this, so switch to using it instead.
Fixes #207774.
Commit: 1dd5ad4c3342313a7b8804277db9395c5326eb9b
https://github.com/llvm/llvm-project/commit/1dd5ad4c3342313a7b8804277db9395c5326eb9b
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/test/CodeGenCXX/cxx2a-destroying-delete.cpp
M clang/test/CodeGenCXX/microsoft-abi-structors.cpp
M clang/test/CodeGenCXX/microsoft-vector-deleting-dtors.cpp
M clang/test/CodeGenCXX/microsoft-vector-deleting-dtors2.cpp
A clang/test/CodeGenCXX/msvc-global-delete-scalar-array-split.cpp
A clang/test/CodeGenCXX/msvc-global-delete-scope-no-dtor.cpp
A clang/test/CodeGenCXX/msvc-no-global-delete-forwarding.cpp
M clang/test/CodeGenCXX/msvc-vector-deleting-dtors-sized-delete.cpp
M clang/test/Modules/glob-delete-with-virtual-dtor.cpp
M clang/test/Modules/msvc-vector-deleting-destructors.cpp
M clang/test/PCH/glob-delete-with-virtual-dtor.cpp
M clang/test/PCH/msvc-vector-deleting-destructors.cpp
Log Message:
-----------
[clang][win] MSVC-compat: Use `__global_delete` wrapper in deleting destructors instead of directly referencing `::operator delete` (#188372)
When Clang emits scalar/vector deleting destructors for classes with a
class-level `operator delete`, it generates a conditional dispatch that
can call either the class-level or global `::operator delete`. The
global path directly referenced `::operator delete`, causing `LNK2001`
linker errors in environments where no global `::operator delete`
exists.
MSVC handles this by calling `__global_delete` (and
`__global_array_delete` for vector deletes) - this is a compiler
generated function that is ONLY defined if there is a direct call to
global `::operator delete` for type with non-trivial destructors.
Additionally, it always emits an empty `__empty_global_delete` and uses
`/ALTERNATIVENAME` linker arg to default `__global_delete` (and
`__global_array_delete`) to `__empty_global_delete` if there is NEVER an
delete operator call that would triffer the body to be emitted (thus the
empty function should never be called).
This change aligns Clang's behavior with MSVC when MSVC compatibility
mode and non-LLVM 21 ABI is used, with one difference: the LLVM
generated `__empty_global_delete` traps since it should never be called.
Commit: 1b879464b362c7dc591ac7b5ce4fd78b2353fe30
https://github.com/llvm/llvm-project/commit/1b879464b362c7dc591ac7b5ce4fd78b2353fe30
Author: Qiongsi Wu <qiongsiwu at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
A clang/include/clang/Basic/AtomicLineLogger.h
A clang/lib/Basic/AtomicLineLogger.cpp
M clang/lib/Basic/CMakeLists.txt
A clang/unittests/Basic/AtomicLineLoggerTest.cpp
M clang/unittests/Basic/CMakeLists.txt
Log Message:
-----------
[clang] Adding an Atomic Line Logger (#205395)
This PR adds an atomic line logger to `clang`.
Situations have arisen where `clang` performs multi-threaded tasks (such
as dependency scanning), and race conditions may happen. Such race
conditions are difficult to debug using either `lldb` or with
`llvm::errs()`.
This logger provides atomic logging per line to a file on disk with time
stamps at each line to facilitate such investigations. Specifically, the
logger is designed with the following properties:
1. Each line is atomically written to the backing file. This avoids
concurrent writes making the output text interleaving.
2. Each line is prefixed with a timestamp, a process ID and a thread ID.
3. `LogLine` implements a `<<` operator to allow arbitrary printable
types to be piped into it.
4. The `LogLine`'s user does not need to check if it is setup or valid.
A LogLine is always valid and can always accept input from `<<`. It
becomes a no-op if the `LogLine` object is returned from a default
constructed `AtomicLineLogger`.
5. The write happens when a `LogLine` object goes out of scope.
The logger is inspired by the
[OnDiskCASLogger](https://github.com/llvm/llvm-project/blob/09abee845d2136630fc3f50524148daa55a740a8/llvm/include/llvm/CAS/OnDiskCASLogger.h#L33).
A followup PR https://github.com/llvm/llvm-project/pull/195896 wires up
this logger to clang's dependency scanning stack.
Assisted-by: claude-opus-4.6
rdar://39907408
Commit: b5a7d1e675f222f7e6a3d3e6536e2214c415e1b6
https://github.com/llvm/llvm-project/commit/b5a7d1e675f222f7e6a3d3e6536e2214c415e1b6
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M lldb/unittests/SymbolFile/PDB/SymbolFilePDBTests.cpp
Log Message:
-----------
[lldb] Fix SymbolFilePDBTests build for StringRef FileSpec getters (#208857)
f9b5264523b1 changed FileSpec::GetDirectory() to return llvm::StringRef
instead of ConstString. ConstString had an operator bool, so the guard
```
if (left.GetDirectory() && right.GetDirectory())
```
compiled. StringRef has neither a bool conversion nor operator&&, so the
test no longer builds. Check for a non-empty directory instead, which
preserves the original "if BOTH have a directory" intent.
Commit: 18f8a356957608d8b6c4318698af53aa4f27a36f
https://github.com/llvm/llvm-project/commit/18f8a356957608d8b6c4318698af53aa4f27a36f
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M lldb/include/lldb/Utility/Policy.h
M lldb/source/Utility/Policy.cpp
Log Message:
-----------
[lldb] Make PolicyStack::Get() out-of-line (#208815)
LLDB builds with hidden visibility by default, so a function-local
static in an inline function is not shared across shared library
boundaries: each dylib that includes this header and calls an inline
Get() gets its own private copy of the thread_local stack, silently
splitting one logical per-thread stack into several. Declaring it
out-of-line ensures every dylib resolves to the single instance defined
in Policy.cpp.
Nothing currently pushes a policy from outside liblldb, so this has no
observable effect yet, but any future capability that needs to be set in
one shared library and read in another depends on this.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: a35565161078268c253df85369b3878ca33c726b
https://github.com/llvm/llvm-project/commit/a35565161078268c253df85369b3878ca33c726b
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M lldb/include/lldb/Core/Debugger.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPythonImpl.h
M lldb/test/API/functionalities/statusline/TestStatusline.py
A lldb/test/API/functionalities/statusline/statusline_flood.py
Log Message:
-----------
[lldb] Serialize scripted-command output with the statusline (#208609)
A Python command's print() writes to sys.stdout, which the interpreter
session pointed at the debugger's raw terminal descriptor via
PyFile_FromFd. Those writes bypass the debugger's output lock, so they
can race with the statusline, resulting in truncated output. Back the
session's terminal stdout and stderr with a pipe instead. A reader
thread drains the pipe and writes to the terminal through
Debugger::PrintAsync, which takes the same output lock as the
statusline.
Only redirect when a statusline could actually be drawing: the pipe and
reader thread are set up only when StatuslineSupported() holds
(show-statusline is enabled and the output is an escape-code-capable
terminal) and the target is the debugger's own terminal. The interactive
interpreter opts out entirely, since input()'s readline line editing and
echo need both sys.stdin and sys.stdout to be the real terminal.
Python still gets a real line-buffered text file over the pipe, so
output stays live and file objects passed to SB APIs
(SetImmediateOutputFile, subprocess, fileno) keep working. On session
teardown the wrappers are flushed before the pipe is closed so a
retained sys.stdout does not strand a trailing line or write into a
closed descriptor.
rdar://181841574
Commit: 8e955ee22fbd1bd41e8adb9a0c333113824f1dfe
https://github.com/llvm/llvm-project/commit/8e955ee22fbd1bd41e8adb9a0c333113824f1dfe
Author: Alex Langford <alangford at apple.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M lldb/include/lldb/DataFormatters/TypeCategoryMap.h
M lldb/source/DataFormatters/TypeCategoryMap.cpp
Log Message:
-----------
[lldb] TypeCategoryMap: Replace ConstString with StringRef (#208117)
I plan on removing ConstStrings from DataFormatters where possible.
There's a lot of entangled classes in DataFormatters but TypeCategoryMap
feels approachable to start with.
Commit: ea2148117950cbc0236ff3416fffa58a44f58fb1
https://github.com/llvm/llvm-project/commit/ea2148117950cbc0236ff3416fffa58a44f58fb1
Author: Sirraide <aeternalmail at gmail.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M clang/lib/Sema/SemaExpand.cpp
Log Message:
-----------
[Clang] Fix APSInt width of template argument in FinishCXXExpansionStmt() (#208859)
After merging #169680, we started getting assertions in
IntegerLiteral::Create() on some ARM systems:
```
Assertion `V.getBitWidth() == C.getIntWidth(type) &&
"Integer type is not the correct size for constant."'
```
The expansion statements patch doesn't ever create an IntegerLiteral
directly, but there is one place where we create a TemplateArgument of
type 'ptrdiff_t', but we unconditionally set the bit width of its APSInt
to 64 bits.
Presumably, the assertion is due to 'ptrdiff_t' not being a 64-bit type
on these systems, so make sure that we query its bit width and use that
as the width of the APSInt.
I don't have a way of verifying if this patch fixes the CI issue since
pre-commit CI doesn't run on the affected system and I don't have an ARM
machine, but I'm merging this anyway since this issue is breaking CI and
querying the width of 'ptrdiff_t' is something we should be doing here regardless.
Commit: 20e952ec610f0ff99fe67dd69f1eac86b6132bda
https://github.com/llvm/llvm-project/commit/20e952ec610f0ff99fe67dd69f1eac86b6132bda
Author: Wenju He <wenju.he at intel.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M clang/include/clang/Basic/OpenCLOptions.h
M clang/lib/Sema/SemaOpenCL.cpp
M clang/lib/Sema/SemaType.cpp
M clang/test/SemaOpenCL/access-qualifier.cl
M clang/test/SemaOpenCL/fp64-fp16-options.cl
M clang/test/SemaOpenCL/storageclass.cl
M clang/test/SemaOpenCL/unsupported-image.cl
Log Message:
-----------
[OpenCL] Fix extensions checks for 3.1 (#208370)
These extension checks apply to 3.1 as well.
This fix kernel build fails when OpenCL 3.1 is enabled in
https://github.com/intel/opencl-clang/pull/752
Assisted-by: Claude
Commit: 43ef833f39af617eea9850a1818d74ac376296ae
https://github.com/llvm/llvm-project/commit/43ef833f39af617eea9850a1818d74ac376296ae
Author: Andrew Haberlandt <ahaberlandt at apple.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M compiler-rt/test/builtins/Unit/compiler_rt_scalbn_test.c
M compiler-rt/test/builtins/Unit/compiler_rt_scalbnf_test.c
M compiler-rt/test/lit.common.cfg.py
Log Message:
-----------
[Darwin] Mark scalbn tests unsupported on macOS 26.4 (#208858)
Commit: a1feacb3e4fdf447ca15052cf4124d06691bf56a
https://github.com/llvm/llvm-project/commit/a1feacb3e4fdf447ca15052cf4124d06691bf56a
Author: Jade Abraham <jademabraham17 at gmail.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M clang/CMakeLists.txt
Log Message:
-----------
Add build option CLANG_INCLUDE_EXAMPLES (#187317)
Adds a new build option for clang, CLANG_INCLUDE_EXAMPLES, which
controls if the examples directory is included in the build. It defaults
to the value for LLVM_INCLUDE_EXAMPLES (same as CLANG_INCLUDE_DOCS and
CLANG_INCLUDE_TESTS)
Signed-off-by: Jade Abraham <jademabraham17 at gmail.com>
Commit: 7d38440aecf6c131f3c8887afea759b102ae2704
https://github.com/llvm/llvm-project/commit/7d38440aecf6c131f3c8887afea759b102ae2704
Author: Petr Hosek <phosek at google.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M libcxx/src/include/overridable_function.h
Log Message:
-----------
[libc++] Replace the of use custom sections for detecting overriden functions (#208330)
This is a follow up to #133876 and an alternative to #120805 which
doesn't rely on aliases and works across both ELF and Mach-O. This
mechanism is preferable in baremetal environments since it doesn't
require special handling of the custom sections.
Commit: a83ec0fb845e04b1b579decc4cc8f56245267c16
https://github.com/llvm/llvm-project/commit/a83ec0fb845e04b1b579decc4cc8f56245267c16
Author: Congzhe Cao <congzhe.cao at huawei.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/lib/Transforms/Utils/CloneFunction.cpp
Log Message:
-----------
[Utils] Improve documentation for `cloneLoopWithPreheader()` (#208817)
Fixed #191471.
The client needs to further update the CFG and DominatorTree after
calling `cloneLoopWithPreheader()` to ensure the IR remains valid,
the function itself does not automatically update the control flow fully.
Clarified and improved the comments for the function.
Commit: 184d97baded92622778a701b66e7f148903f3525
https://github.com/llvm/llvm-project/commit/184d97baded92622778a701b66e7f148903f3525
Author: Sirraide <aeternalmail at gmail.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
Log Message:
-----------
[Clang] [Docs] Add release note for expansion statements (#208878)
This was supposed to be part of the original patch, but we lost it
because I didn't pay enough attention when I was merging the release
notes after the migration from RST -> MD (I deleted the RST file but
forgot to move the release note to the MD file...)
Commit: 1a8a53f30e386b0b136e833bfd7fb83839035f37
https://github.com/llvm/llvm-project/commit/1a8a53f30e386b0b136e833bfd7fb83839035f37
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M orc-rt/lib/executor/Logging.cpp
M orc-rt/test/unit/LoggingTest.cpp
Log Message:
-----------
[orc-rt] Hold log level names as uppercase (#208880)
orc_rt_log_Level_getName is used primarily in text prefixes (e.g. the
upcoming printf backend's "[orc-rt:General:LEVEL]"), where uppercase is
the intended rendering. Storing the names as uppercase lets the backend
use them directly without case conversion. orc_rt_log_Level_parse
performs a case-insensitive parse, so ORC_RT_LOG=info and similar still
work.
[orc-rt] Hold log level names as uppercase.
orc_rt_log_Level_getName is expected to be primarily used in
text-prefixes (e.g. in the upcoming printf backend), where it should be
printed as uppercase. Storing as uppercase in the first place will save
us a toupper conversion on each log call.
Commit: 4d5856669efa7a1271d2f5201bb3ebf32420ffde
https://github.com/llvm/llvm-project/commit/4d5856669efa7a1271d2f5201bb3ebf32420ffde
Author: Ömer Sinan Ağacan <omeragacan at gmail.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
Log Message:
-----------
[GlobalISel][AArch64] Improve legalization of shift amounts (#208676)
Fixes crashes when the shift amount type is already between s32 and s64,
but not s32 or s64.
The shift amount should have the same type with the shifted value for
the shift instructions, so add the same `widenScalarToNextPow2`
legalization that we apply to the shifted value, to the shift amount.
Fixes crashes in programs like:
define i8 @test(i48 %a) {
entry:
%b = lshr i48 %a, 15
%c = trunc i48 %b to i8
ret i8 %c
}
The new test crashes before this PR.
Commit: 0730f680b6ac237ee1c81b2c55a741ba7065ee97
https://github.com/llvm/llvm-project/commit/0730f680b6ac237ee1c81b2c55a741ba7065ee97
Author: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M clang-tools-extra/clang-tidy/misc/ConstCorrectnessCheck.cpp
M clang-tools-extra/clang-tidy/misc/ConstCorrectnessCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/const-correctness.rst
A clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-auto-parameters.cpp
A clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-auto.cpp
A clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-lambdas.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-parameters.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-pointer-as-pointers.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-pointer-as-values.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-templates.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-transform-values.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-values.cpp
Log Message:
-----------
[clang-tidy] make `misc-const-correctness` work with `auto` variables and lambdas (#157319)
Fixes #60789.
Currently, the check will never make `auto` variables `const`. Here's
the relevant bit of code:
https://github.com/llvm/llvm-project/blob/6b200e21adec0e28407def6fcb2e6c7359fd881b/clang-tools-extra/clang-tidy/misc/ConstCorrectnessCheck.cpp#L108-L110
Notice how the matcher's name is `AutoTemplateType`, but it has nothing
to do with templates. What it *was* intended to do, I'm not sure, but
excluding all `auto` variables can't be right.
For lambdas, this is the only justification I can find:
https://github.com/llvm/llvm-project/blob/36627e1724504d783dc1cbc466666516d28260e4/clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-values.cpp#L30-L34
Which doesn't convince me.
Looking at the test changes, I believe there's only one new false
positive, and that one seems to be a symptom of an existing problem that
was only being masked by `auto`, but we can absolutely discuss whether
the now-diagnosed cases are correct.
---------
Co-authored-by: Victor Baranov <bar.victor.2002 at gmail.com>
Commit: b2f93b13fea00ea6550b7154a16548f8fe952b63
https://github.com/llvm/llvm-project/commit/b2f93b13fea00ea6550b7154a16548f8fe952b63
Author: Kewen Meng <Kewen.Meng at amd.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M offload/test/offloading/fortran/declare-target-common-block-main.f90
Log Message:
-----------
[OpenMP][Offload] Fix flang offload test (#208829)
This PR attempts to address the remaining flang offload test failure
after https://github.com/llvm/llvm-project/pull/208617. Bot:
https://lab.llvm.org/buildbot/#/builders/67/builds/8412
The problem with is test is that `foo__l8` kernel was not linked into
device image without explicitly use the amdgpu-amd-amdhsa triple in the
compilation. It only happened to this specific test.
Local test results after fix:
```
Testing Time: 146.44s
Total Discovered Tests: 3478
Skipped : 77 (2.21%)
Unsupported : 341 (9.80%)
Passed : 3055 (87.84%)
Expectedly Failed: 5 (0.14%)
```
Commit: e2223e665eccd0580c3f1c9d4d31b2262a8ca823
https://github.com/llvm/llvm-project/commit/e2223e665eccd0580c3f1c9d4d31b2262a8ca823
Author: David Green <david.green at arm.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/select-shuffle-vector.mir
M llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
M llvm/test/CodeGen/AArch64/arm64-dup.ll
M llvm/test/CodeGen/AArch64/arm64-neon-aba-abd.ll
M llvm/test/CodeGen/AArch64/extend_inreg_of_concat_subvectors.ll
M llvm/test/CodeGen/AArch64/neon-bitwise-instructions.ll
M llvm/test/CodeGen/AArch64/neon-wide-splat.ll
M llvm/test/CodeGen/AArch64/neon-widen-shuffle.ll
M llvm/test/CodeGen/AArch64/shuffle-slide-to-shift.ll
M llvm/test/CodeGen/AArch64/shuffle-tbl34.ll
M llvm/test/CodeGen/AArch64/shuffles.ll
Log Message:
-----------
[AArch64][GlobalISel] Fold G_SHUFFLE to single-element TBL with zero elements. (#200938)
A TBL with out-of-range values will place zero into the respective
vector lane. Use this to generate a more efficient 1 operand TBL where
possible.
Commit: ced9fa35844724063b20d4b0d67a7960247c8067
https://github.com/llvm/llvm-project/commit/ced9fa35844724063b20d4b0d67a7960247c8067
Author: wanglei <wanglei at loongson.cn>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M clang/test/Interpreter/emulated-tls.cpp
Log Message:
-----------
[clang][test] Fix emulated-tls.cpp failure on LoongArch (#208886)
The LoongArch backend does not support emulated TLS, so
mark the test as unsupported to fix the LoongArch buildbot
failure.
Failure: https://lab.llvm.org/staging/#/builders/20/builds/28875
Commit: 290279b6b69138f4162cace4865713efa12ec262
https://github.com/llvm/llvm-project/commit/290279b6b69138f4162cace4865713efa12ec262
Author: dong jianqiang <dongjianqiang2 at huawei.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMFastISel.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMSubtarget.cpp
M llvm/lib/Target/ARM/ARMTargetMachine.h
M llvm/test/CodeGen/ARM/elf-preemption.ll
M llvm/test/CodeGen/ARM/weak-hidden-pic.ll
Log Message:
-----------
[ARM] Use .reloc for weak symbols in PIC mode instead of GOT indirection (#208372)
In ARM ELF PIC mode, weak symbols referenced via the constant pool use a
PC-relative expression like `.long sym-(.LPC+8)`. The assembler eagerly
resolves this when both the symbol and reference are in the same
section, which prevents the linker from overriding a weak definition
with a strong one from another object file.
The previous approach (#198577) forced weak symbols to go through GOT
indirection to avoid this, but that adds an extra load. This patch
instead emits a `.reloc` directive alongside the local PC-relative
expression, forcing the assembler to emit a proper `R_ARM_REL32`
relocation. This lets the linker perform the override without the
runtime cost of a GOT load.
Commit: 72af746a3e19627fc1d1c40bf6eabb2887850ac5
https://github.com/llvm/llvm-project/commit/72af746a3e19627fc1d1c40bf6eabb2887850ac5
Author: Osama Abdelkader <osama.abdelkader at gmail.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/DeclSpec.h
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Sema/DeclSpec.cpp
M clang/test/CXX/dcl.dcl/dcl.spec/dcl.stc/p2.cpp
M clang/test/CXX/dcl.dcl/dcl.spec/dcl.type/dcl.spec.auto/p3-1y.cpp
M clang/test/CXX/dcl.dcl/dcl.spec/dcl.type/dcl.spec.auto/p3-generic-lambda-1y.cpp
M clang/test/CXX/dcl.dcl/dcl.spec/dcl.type/dcl.spec.auto/p3.cpp
M clang/test/CXX/dcl/dcl.fct/p17.cpp
M clang/test/CXX/drs/cwg3xx.cpp
M clang/test/Parser/c2x-auto.c
M clang/test/SemaCXX/auto-cxx0x.cpp
M clang/test/SemaCXX/class.cpp
M clang/test/SemaCXX/static-data-member.cpp
Log Message:
-----------
Reject auto combined with type specifiers in C++ (#208552)
Follow-up of https://github.com/llvm/llvm-project/pull/166004
- Diagnose C++ declarations that combine `auto` with another type
specifier, such as `auto int` .
- Preserve C/C23 handling where `auto` can still be interpreted as a
storage-class specifier in valid combinations.
- Fix parser disambiguation so `auto Use = 0` treats `Use` as the
declarator name before type lookup, avoiding ambiguous lookup
regressions.
---------
Signed-off-by: Osama Abdelkader <osama.abdelkader at gmail.com>
Commit: cce2b5acd7b0307c7985d58e7348a3e06b928eb4
https://github.com/llvm/llvm-project/commit/cce2b5acd7b0307c7985d58e7348a3e06b928eb4
Author: Yanzuo Liu <zwuis at outlook.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M clang-tools-extra/clang-tidy/readability/RedundantParenthesesCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/readability/redundant-parentheses.cpp
Log Message:
-----------
[clang-tidy] Support parentheses around subscript operators in readability-redundant-parentheses (#208759)
Subscript operators have the same operator procedure as function calls.
Treat overloaded `()` as built-in operators as a drive-by. I missed this
case when reviewing #192254.
Commit: d5ff29d5b4b9cd7ba446d1cff138a8e626ec27d0
https://github.com/llvm/llvm-project/commit/d5ff29d5b4b9cd7ba446d1cff138a8e626ec27d0
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/32-bit-local-address-space.ll
M llvm/test/CodeGen/AMDGPU/a-v-ds-atomic-cmpxchg.ll
M llvm/test/CodeGen/AMDGPU/a-v-ds-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomic-cmpxchg.ll
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/a-v-global-atomic-cmpxchg.ll
M llvm/test/CodeGen/AMDGPU/a-v-global-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/aa-as-infer.ll
M llvm/test/CodeGen/AMDGPU/aa-points-to-constant-memory.ll
M llvm/test/CodeGen/AMDGPU/abi-attribute-hints-undefined-behavior.ll
M llvm/test/CodeGen/AMDGPU/abs_i16.ll
M llvm/test/CodeGen/AMDGPU/abs_i32.ll
M llvm/test/CodeGen/AMDGPU/absdiff.ll
M llvm/test/CodeGen/AMDGPU/acc-ldst.ll
M llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir
M llvm/test/CodeGen/AMDGPU/accvgpr-spill-scc-clobber.mir
M llvm/test/CodeGen/AMDGPU/add-debug.ll
M llvm/test/CodeGen/AMDGPU/add-max.ll
M llvm/test/CodeGen/AMDGPU/add.i16.ll
M llvm/test/CodeGen/AMDGPU/add.ll
M llvm/test/CodeGen/AMDGPU/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/add3.ll
M llvm/test/CodeGen/AMDGPU/add64-low-32-bits-known-zero.ll
M llvm/test/CodeGen/AMDGPU/add_i1.ll
M llvm/test/CodeGen/AMDGPU/add_shl.ll
M llvm/test/CodeGen/AMDGPU/add_sub_u64_pseudos.mir
M llvm/test/CodeGen/AMDGPU/add_u64.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-captured.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-constantexpr.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-gas.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-known-non-null.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast.gfx6.ll
M llvm/test/CodeGen/AMDGPU/addsub64_carry.ll
M llvm/test/CodeGen/AMDGPU/adjust-writemask-cse.ll
M llvm/test/CodeGen/AMDGPU/adjust-writemask-invalid-copy.ll
M llvm/test/CodeGen/AMDGPU/adjust-writemask-vectorized.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers-assertion-after-ra-failure.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-vgprs.mir
M llvm/test/CodeGen/AMDGPU/agpr-copy-propagation.mir
M llvm/test/CodeGen/AMDGPU/agpr-copy-reuse-writes.mir
M llvm/test/CodeGen/AMDGPU/agpr-copy-sgpr-no-vgprs.mir
M llvm/test/CodeGen/AMDGPU/agpr-csr.ll
M llvm/test/CodeGen/AMDGPU/agpr-register-count.ll
M llvm/test/CodeGen/AMDGPU/agpr-remat.ll
M llvm/test/CodeGen/AMDGPU/agpr-spill-copy.mir
M llvm/test/CodeGen/AMDGPU/agpr-to-agpr-copy.mir
M llvm/test/CodeGen/AMDGPU/alloc-aligned-tuples-gfx1250.mir
M llvm/test/CodeGen/AMDGPU/alloc-aligned-tuples-gfx908.mir
M llvm/test/CodeGen/AMDGPU/alloc-aligned-tuples-gfx90a.mir
M llvm/test/CodeGen/AMDGPU/alloc-all-regs-reserved-in-class.mir
M llvm/test/CodeGen/AMDGPU/amd.endpgm.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-av-scopes.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-call-whole-wave.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-cs-chain-intrinsic-dyn-vgpr-w32.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-ieee.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-load-offset-from-reg.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-sin-cos-f16-f32.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.160bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.16bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.192bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.224bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.288bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.352bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.384bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.448bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.ptr.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.private-memory.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-alias-analysis.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-attributor-accesslist-offsetbins-out-of-sync.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-branch-weight-metadata.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-break-large-phis-heuristics.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-break-large-phis.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fdiv.f64.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fdiv.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fold-binop-select.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-mul24.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (5) (#208834)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: a9987b7049c11e2f5694a4ab69ffcfc785080758
https://github.com/llvm/llvm-project/commit/a9987b7049c11e2f5694a4ab69ffcfc785080758
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-sqrt.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-fp-nosave.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-export-kernel-runtime-handles.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-inline.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-late-codegenprepare-crash-splat.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-late-codegenprepare.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-libcall-sincos-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync-and-module-lds.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync-and-sw-lds.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-max-num-workgroups-load-annotate.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-miscellaneous-uniform-intrinsic.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-no-agprs-violations.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-nsa-threshold.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-num-agpr.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-prepare-agpr-alloc.mir
M llvm/test/CodeGen/AMDGPU/amdgpu-reloc-const.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-shader-calling-convention.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-demanded-bits-for-target-node.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-ceil.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-copysign.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-exp.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-exp2.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-fabs.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-floor.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-fma.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-fmax-splat.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-fmax.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-fmin-splat.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-fmin.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-image-function-signatures.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-ldexp-splat.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-ldexp.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-log.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-log10.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-log2.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-mad.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-fast.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pown-fast.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pown.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-powr-fast.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-powr.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-rint.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-rootn-fast.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-rootn.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-round.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.defined.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.defined.nobuiltin.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.defined.sin.cos.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.nobuiltins.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.weak.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sqrt.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-acos.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-acosh.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-acospi.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-asin.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-asinh.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-asinpi.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-atan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-atanh.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-atanpi.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-cbrt.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-cos.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-cosh.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-cospi.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-erf.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-erfc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-exp.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-exp10.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-exp2.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-expm1.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-log.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-log10.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-log2.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-rsqrt.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-sin.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-sinh.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-sinpi.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-sqrt.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-tan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-tanh.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-tanpi.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-tgamma.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-trunc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-unexpected-types.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-snop-padding.mir
M llvm/test/CodeGen/AMDGPU/amdgpu-spill-cfi-saved-regs.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-dynamic-indirect-access-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-dynamic-indirect-access.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-dynamic-lds-test-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-dynamic-lds-test.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-lower-all.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-lower-none.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-multi-static-dynamic-indirect-access-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-multi-static-dynamic-indirect-access.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (6) (#208835)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: 4f94d25bc15865037cf5fd7c228012f8204d3eda
https://github.com/llvm/llvm-project/commit/4f94d25bc15865037cf5fd7c228012f8204d3eda
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-multiple-blocks-return-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-multiple-blocks-return.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-non-kernel-declaration.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-alloca-placement.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-indirect-access-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-indirect-access.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-lds-test-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-lds-test.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-function-param-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-function-param.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-lower-all.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-lower-none.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-nested-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-nested.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-no-kernel-lds-id.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-O0.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-no-heap-ptr.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test-atomic-cmpxchg-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test-atomicrmw-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test-memintrinsic-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-vector-ptrs.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-uniform-intrinsic-wwm-single-lane.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-unroll-threshold.ll
M llvm/test/CodeGen/AMDGPU/amdgpu.private-memory.ll
M llvm/test/CodeGen/AMDGPU/amdgpu.work-item-intrinsics.deprecated.ll
M llvm/test/CodeGen/AMDGPU/amdhsa-kernarg-preload-num-sgprs.ll
M llvm/test/CodeGen/AMDGPU/amdhsa-trap-num-sgprs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-callable.ll
M llvm/test/CodeGen/AMDGPU/amdpal-chain-metadata.ll
M llvm/test/CodeGen/AMDGPU/amdpal-cs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-elf.ll
M llvm/test/CodeGen/AMDGPU/amdpal-es.ll
M llvm/test/CodeGen/AMDGPU/amdpal-gs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-hs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-ls.ll
M llvm/test/CodeGen/AMDGPU/amdpal-metadata-agpr-register-count.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-cs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-default.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-denormal.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-dx10-clamp-on.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-dx10-clamp.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-es.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-gs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-hs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ieee.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ls.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ps.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-psenable.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-vs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-ps.ll
M llvm/test/CodeGen/AMDGPU/amdpal-psenable.ll
M llvm/test/CodeGen/AMDGPU/amdpal-usersgpr-init.ll
M llvm/test/CodeGen/AMDGPU/amdpal-vs.ll
M llvm/test/CodeGen/AMDGPU/amdpal.ll
M llvm/test/CodeGen/AMDGPU/amdpal_scratch_mergedshader.ll
M llvm/test/CodeGen/AMDGPU/and-gcn.ll
M llvm/test/CodeGen/AMDGPU/and.ll
M llvm/test/CodeGen/AMDGPU/and_or.ll
M llvm/test/CodeGen/AMDGPU/andorbitset.ll
M llvm/test/CodeGen/AMDGPU/andorn2.ll
M llvm/test/CodeGen/AMDGPU/andorxorinvimm.ll
M llvm/test/CodeGen/AMDGPU/annotate-existing-abi-attributes.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features.ll
M llvm/test/CodeGen/AMDGPU/annotate-noclobber.ll
M llvm/test/CodeGen/AMDGPU/anonymous-gv.ll
M llvm/test/CodeGen/AMDGPU/any_extend_vector_inreg.ll
M llvm/test/CodeGen/AMDGPU/anyext.ll
M llvm/test/CodeGen/AMDGPU/arbitrary-fp-to-float.ll
M llvm/test/CodeGen/AMDGPU/are-loads-from-same-base-ptr.ll
M llvm/test/CodeGen/AMDGPU/array-ptr-calc-i32.ll
M llvm/test/CodeGen/AMDGPU/artificial-terminators.mir
M llvm/test/CodeGen/AMDGPU/ashr.v2i16.ll
M llvm/test/CodeGen/AMDGPU/ashr64_reduce.ll
M llvm/test/CodeGen/AMDGPU/ashr64_reduce_flags.ll
M llvm/test/CodeGen/AMDGPU/asm-printer-check-vcc.mir
M llvm/test/CodeGen/AMDGPU/async-buffer-loads.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-max-pregfx12.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-merge-empty-other.mir
M llvm/test/CodeGen/AMDGPU/asyncmark-pregfx12.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-waitcnt.mir
M llvm/test/CodeGen/AMDGPU/at-least-one-def-value-assert.mir
M llvm/test/CodeGen/AMDGPU/atomic_cmp_swap_local.ll
M llvm/test/CodeGen/AMDGPU/atomic_load_add.ll
M llvm/test/CodeGen/AMDGPU/atomic_load_local.ll
M llvm/test/CodeGen/AMDGPU/atomic_load_sub.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (7) (#208836)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: d90e6c8674724dedb21bc20e2b47c378a471275b
https://github.com/llvm/llvm-project/commit/d90e6c8674724dedb21bc20e2b47c378a471275b
Author: Philipp Rados <philipp.rados at openchip.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/StackColoring.cpp
A llvm/test/CodeGen/RISCV/stack-coloring-large-stack.ll
Log Message:
-----------
[StackColoring] Change TotalStackSize from unsigned to int64_t (#208671)
StackColoring tracks the total size of the stack as `unsigned int`. This
will wrap around, even on 64-bit systems, if the stack is greater than
that resulting in a wrong size. This can happen on both PPC and RISCV64.
Commit: 4125b6fce8bab893145b265f112d9c9fb2ea609b
https://github.com/llvm/llvm-project/commit/4125b6fce8bab893145b265f112d9c9fb2ea609b
Author: David Green <david.green at arm.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/arm64-vcvt_f.ll
M llvm/test/CodeGen/AArch64/bf16-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v4-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
M llvm/test/CodeGen/AArch64/ldexp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fdiv.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmad.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpow.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpowi.mir
Log Message:
-----------
[GlobalISel] Improve bf16 converts with fast-math flags. (#200741)
This alters the lowering of bf16 G_TRUNC to exclude the check for nan if
the operation being extended is nnan. Flags are then threaded through so
that the G_FPEXT and G_FPTRUNC from promoted nodes keep the same FMF.
Commit: a54fc1f407d4d05a51688638230e54761831d31a
https://github.com/llvm/llvm-project/commit/a54fc1f407d4d05a51688638230e54761831d31a
Author: David Green <david.green at arm.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/bf16-v4-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
Log Message:
-----------
[AArch64][GlobalISel] Extend handling to bf16 vecreduce. (#208684)
This alters the extension of f16 vecreduce to bf16, allowing us to
handle the non-strict fadd and fmul reductions, along with fmin and fmax
variants.
Commit: 79ebcadfd492bb22c2c96e651146bd10b6bd8ae9
https://github.com/llvm/llvm-project/commit/79ebcadfd492bb22c2c96e651146bd10b6bd8ae9
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/BlockInCriticalSectionChecker.cpp
A clang/test/Analysis/block-in-critical-section-raii.cpp
Log Message:
-----------
[analyzer] Prevent inlining RAII ctors/dtors (#208729)
BlockInCriticalSectionChecker registers the pre-call for the RAII ctors
and Dtors - and also the raw 'lock' and 'unlock' handlers.
However, pre-call does not prevent inlining. This means that (in the
likely case of) that the body is present, the analyzer will model the
effect of the lock twice. This happens on libc++ unique_lock.
We really should have eval-called the ctor/dtor to avoid the inlining of
those, but here we are.
rdar://175814310
Commit: e490b437555b1f5fce7636d383fc2d7f22097577
https://github.com/llvm/llvm-project/commit/e490b437555b1f5fce7636d383fc2d7f22097577
Author: Luan Rabelo <96793857+Lu4nScr1pt1ng at users.noreply.github.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M clang/lib/Rewrite/HTMLRewrite.cpp
M clang/lib/StaticAnalyzer/Core/HTMLDiagnostics.cpp
A clang/test/Analysis/html_diagnostics/variable-popups-eol.c
Log Message:
-----------
[analyzer] Fix invalid HTML nesting for popups at end of line (#207793)
The static analyzer's HTML reports contain misnested tags whenever a
variable with a `variable_popup` is the last token on a source line.
`AddLineNumber` inserts the row-closing `</td></tr>` with `InsertTextBefore`, which
places it in front of text previously inserted at the same offset. As a result,
the popup's closing `</table></span>` tags and the arrow anchor `</span>`
tags end up outside the table row. HTML parsers (jsoup, pup) and validators
reject the file from that point on.
Before:
<span class='variable'>b</td></tr><table
class='variable_popup'>...</table></span></span></span>
<img width="786" height="414" alt="image"
src="https://github.com/user-attachments/assets/023461ad-73e4-424e-a4fb-42faf7a945f0"
/>
After:
<span class='variable'>b<table
class='variable_popup'>...</table></span></span></span></td></tr>
<img width="877" height="477" alt="image"
src="https://github.com/user-attachments/assets/cf8aada4-21c8-4af7-9e07-c2d8cc1d0724"
/>
The fix inserts `</td></tr>` with `InsertTextAfter` so tags closing at
the end-of-line offset stay inside the row. To keep the message bubbles
outside the code rows, the line number table is now added before the path pieces
are processed, and bubbles are inserted after the newline, between the
current and the next row.
The pre-existing tests only exercised popups on variables followed by
more tokens (`if (b)`), which is why this was never caught; the new test
places the variable at the end of the line. This has been broken since at least
clang 10; the earlier fix (D73993 / commit 482e236e569e)
only covered the macro popup variant.
I verified this with the Analysis/html_diagnostics tests, the full
clang/test/Analysis suite, and by running generated reports through an
HTML parser that checks tag nesting: 4 errors before / 0 after on the
reproducer above, and 8 → 0 on a larger file with macro popups, multiple
events per line, and mid-line popups. The visible report content is
unchanged.
Fixes #46089
Commit: 847fe431d082fe134ea88031ca3705792fb1bb61
https://github.com/llvm/llvm-project/commit/847fe431d082fe134ea88031ca3705792fb1bb61
Author: Jerry Dang <kuroyukiasuna at gmail.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
A llvm/test/CodeGen/AArch64/preserve-all-large-csr.ll
Log Message:
-----------
[AArch64] Fix miscompilation due to integer overflow in immediate offset for stack store/load instructions with preserve_all (#207026)
Fix AArch64 framelowering bug exposed by a preserve_all function that
spills 30+ callee-saved registers: paired stp/ldp offsets overflows the
signed 7-bit immediate, fixed by spilling those registers as single
str/ldr instead.
AI Usage Disclosure
AI was used to help the:
- investigation process
- suggestion of solution
- suggestion of comment wordings
Fixes #204564
Commit: 9d5d8834793da9efe297620db3ef39633688f830
https://github.com/llvm/llvm-project/commit/9d5d8834793da9efe297620db3ef39633688f830
Author: Kyungtak Woo <kevinwkt at google.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/test/Transforms/AggressiveInstCombine/X86/or-load.ll
Log Message:
-----------
[AggressiveInstCombine] Fix crash when folding consecutive loads into a type smaller than the combined load (#207229)
Commit: a11e844f4e3302d47c7934e4817f14639e510aad
https://github.com/llvm/llvm-project/commit/a11e844f4e3302d47c7934e4817f14639e510aad
Author: Gábor Horváth <xazax.hun at gmail.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Utils.h
Log Message:
-----------
[clang][LifetimeSafety] Short-circuit joins of identical immutable containers (#208908)
Commit: 31ddc7e564814a42af39f0e71371469d0b1fca24
https://github.com/llvm/llvm-project/commit/31ddc7e564814a42af39f0e71371469d0b1fca24
Author: lonely eagle <2020382038 at qq.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M mlir/lib/Analysis/Presburger/Matrix.cpp
Log Message:
-----------
[mlir][presburger] Avoid redundant zero-initialization in insertColumns (#199911)
When insertColumns does not trigger a physical reallocation, the inner
loop needlessly loops up to nReservedColumns - 1. This causes massive
redundant zero-writes on trailing columns that are already zero. This
patch truncates the inner loop start boundary to nColumns - 1, when the
reserved capacity is unchanged, optimizing the non-realloc path from
O(nRows * nReservedColumns) to O(nRows * nColumns).
Commit: 670e0a0c147aeade297b3235f5ade3786abd7d4c
https://github.com/llvm/llvm-project/commit/670e0a0c147aeade297b3235f5ade3786abd7d4c
Author: Serge Pavlov <sepavloff at gmail.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M clang/test/CodeGen/AArch64/strictfp-builtins.c
M clang/test/CodeGen/X86/strictfp_builtins.c
M clang/test/CodeGen/builtin_float.c
M clang/test/CodeGen/builtin_float_strictfp.c
M clang/test/CodeGen/builtins.c
M clang/test/CodeGen/isfpclass.c
M clang/test/CodeGen/strictfp_builtins.c
M clang/test/Headers/amdgcn-openmp-device-math-complex.c
M clang/test/Headers/amdgcn-openmp-device-math-complex.cpp
M clang/test/Headers/hip-header.hip
M clang/test/Headers/nvptx_device_math_complex.c
M clang/test/Headers/nvptx_device_math_complex.cpp
M clang/test/Headers/openmp_device_math_isnan.cpp
M llvm/include/llvm/IR/Intrinsics.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/lib/IR/Intrinsics.cpp
M llvm/test/Analysis/CostModel/AMDGPU/is_fpclass.ll
A llvm/test/Assembler/print-formatted.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fdiv.f64.ll
M llvm/test/Instrumentation/MemorySanitizer/is-fpclass.ll
M llvm/test/Transforms/Attributor/nofpclass-select.ll
M llvm/test/Transforms/Attributor/nofpclass.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/fpclass-test.ll
M llvm/test/Transforms/CodeGenPrepare/RISCV/fpclass-test.ll
M llvm/test/Transforms/CodeGenPrepare/X86/fpclass-test.ll
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
M llvm/test/Transforms/InstCombine/combine-is.fpclass-and-fcmp.ll
M llvm/test/Transforms/InstCombine/create-class-from-logic-fcmp.ll
M llvm/test/Transforms/InstCombine/fabs.ll
M llvm/test/Transforms/InstCombine/fadd.ll
M llvm/test/Transforms/InstCombine/fpclass-check-idioms.ll
M llvm/test/Transforms/InstCombine/fpclass-from-dom-cond.ll
M llvm/test/Transforms/InstCombine/freeze-fp-ops.ll
M llvm/test/Transforms/InstCombine/freeze-phi.ll
M llvm/test/Transforms/InstCombine/is_fpclass.ll
M llvm/test/Transforms/InstCombine/pr80941.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-fdiv.ll
M llvm/test/Transforms/InstSimplify/canonicalize.ll
M llvm/test/Transforms/LoopVectorize/is_fpclass.ll
M llvm/test/Transforms/SLPVectorizer/is_fpclass.ll
M llvm/test/Transforms/Scalarizer/intrinsics.ll
M llvm/test/Transforms/SpeculativeExecution/spec-calls.ll
M llvm/test/Transforms/VectorCombine/AArch64/shuffle-of-intrinsics.ll
M llvm/test/Transforms/VectorCombine/RISCV/shuffle-of-intrinsics.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle-of-intrinsics.ll
M llvm/test/tools/llubi/intr_fp_is_fpclass.ll
M llvm/utils/TableGen/Basic/IntrinsicEmitter.cpp
Log Message:
-----------
[IR] Use pretty printing for mask in is_fpclass (#207653)
The second argument of `llvm.is_fpclass` is a mask, where each bit
represents a floating-point class. Understanding the check that the call
makes in an IR dump requires additional effort. To simplify the
interpretation of IR dumps, a previously implemented pretty-printing
mechanism can be used:
https://github.com/llvm/llvm-project/commit/39e7712ac520ccfc43383b3e9d6ea8cf2958b8e3.
This commit implements this mechanism for printing the arguments of
`llvm.is_fpclass`.
This change also fixes the printing of argument names: if an argument
name is absent, it is simply not printed.
Commit: 419cce0bb5e5fea52f701a20124f88ea1eee3e29
https://github.com/llvm/llvm-project/commit/419cce0bb5e5fea52f701a20124f88ea1eee3e29
Author: Petr Hosek <phosek at google.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M libcxx/docs/ReleaseNotes/22.rst
M libcxx/docs/ReleaseNotes/23.rst
Log Message:
-----------
[libcxx][NFC] Move release notes for MSVC's implementation of exception_ptr (#208883)
These were accidentally placed in LLVM 22 rather than 23 file.
Commit: 6e01e7334d7b9f8696f5b883b433d56e7a8b2851
https://github.com/llvm/llvm-project/commit/6e01e7334d7b9f8696f5b883b433d56e7a8b2851
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M libcxx/utils/ci/images/libcxx_runners.txt
Log Message:
-----------
[libcxx] Bump runner set (#208929)
This pulls in 6d3cf7f436a01f4622fb660e413a4020209777b8, and
8ece73c9f8b54fea6a98e9e4c55f9a2e6ccc9b3c.
Commit: 09796808802f99c30a23bc0f2cd68243764e84ab
https://github.com/llvm/llvm-project/commit/09796808802f99c30a23bc0f2cd68243764e84ab
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPlan] Remove dead member functions (NFC) (#208936)
Remove member functions with no remaining callers anywhere in the tree:
- VPExpressionRecipe::getOperandOfResultType
- VPBlockBase::getSingleHierarchicalSuccessor
- VPIRFlags::hasNonNegFlag
- VPWidenIntOrFpInductionRecipe::getStartValue, which is an exact
duplicate of the inherited VPWidenInductionRecipe::getStartValue.
Commit: 030fdcef27fe29b5e2c1ef0c6c9df6050b51569a
https://github.com/llvm/llvm-project/commit/030fdcef27fe29b5e2c1ef0c6c9df6050b51569a
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Re-use VPSlotTracker when printing recipes for costs (NFC). (#203386)
VPRecipeBase::dump() constructs a fresh VPSlotTracker instance on each
call. VPSlotTracker construction requires iterating over all recipes in
the plan, to number all VPValues.
To avoid doing lots of unnecessary work when printing VPlan costs,
construct a shared VPSlotTracker in VPCostContext, re-used by all
prints.
This can speed up debug output for large loops.
PR: https://github.com/llvm/llvm-project/pull/203386
Commit: 5742a30a749a5cc9271bd5bd8945c3033285c775
https://github.com/llvm/llvm-project/commit/5742a30a749a5cc9271bd5bd8945c3033285c775
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/atomic-optimizer-strict-wqm.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_single_lane.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_store_local.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-bf16-gfx11plus.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-expand.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-nand.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw_usub_cond.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw_usub_sat.ll
M llvm/test/CodeGen/AMDGPU/atomics-cas-remarks-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/atomics-hw-remarks-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/atomics-system-scope.ll
M llvm/test/CodeGen/AMDGPU/atomics_cond_sub.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-align.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size-vgpr-limit.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-max-num-workgroups-propagate.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-max-num-workgroups.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-vgpr.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-workgroups_error_check.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-waves-per-eu.ll
M llvm/test/CodeGen/AMDGPU/attr-unparseable.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior2.ll
M llvm/test/CodeGen/AMDGPU/attributor-loop-issue-58639.ll
M llvm/test/CodeGen/AMDGPU/attributor-noalias-addrspace.ll
M llvm/test/CodeGen/AMDGPU/av-invalid-scope.ll
M llvm/test/CodeGen/AMDGPU/av-spill-expansion-with-machine-cp.mir
M llvm/test/CodeGen/AMDGPU/av-split-dead-valno-crash.ll
M llvm/test/CodeGen/AMDGPU/av_movimm_pseudo_expansion.mir
M llvm/test/CodeGen/AMDGPU/av_spill_cross_bb_usage.mir
M llvm/test/CodeGen/AMDGPU/back-off-barrier-subtarget-feature.ll
M llvm/test/CodeGen/AMDGPU/bad-agpr-vgpr-regalloc-priority.mir
M llvm/test/CodeGen/AMDGPU/barrier-elimination-gfx12.ll
M llvm/test/CodeGen/AMDGPU/barrier-signal-wait-latency.ll
M llvm/test/CodeGen/AMDGPU/basic-branch.ll
M llvm/test/CodeGen/AMDGPU/basic-call-return.ll
M llvm/test/CodeGen/AMDGPU/basic-loop.ll
M llvm/test/CodeGen/AMDGPU/bb-prolog-spill-during-regalloc.ll
M llvm/test/CodeGen/AMDGPU/bf16-conversions.ll
M llvm/test/CodeGen/AMDGPU/bf16-math.ll
M llvm/test/CodeGen/AMDGPU/bf16-ops.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/bfe-combine.ll
M llvm/test/CodeGen/AMDGPU/bfe-i8-i16.ll
M llvm/test/CodeGen/AMDGPU/bfe-patterns.ll
M llvm/test/CodeGen/AMDGPU/bfi_int.ll
M llvm/test/CodeGen/AMDGPU/bfm.ll
M llvm/test/CodeGen/AMDGPU/bit-op-reduce-width-known-bits.ll
M llvm/test/CodeGen/AMDGPU/bitcast-constant-to-vector.ll
M llvm/test/CodeGen/AMDGPU/bitcast-v4f16-v4i16.ll
M llvm/test/CodeGen/AMDGPU/bitcast-vector-extract.ll
M llvm/test/CodeGen/AMDGPU/bitcast_vector_bigint.ll
M llvm/test/CodeGen/AMDGPU/bitop3-shared-operand.ll
M llvm/test/CodeGen/AMDGPU/bitop3.ll
M llvm/test/CodeGen/AMDGPU/bitreverse-inline-immediates.ll
M llvm/test/CodeGen/AMDGPU/bitreverse.ll
M llvm/test/CodeGen/AMDGPU/blender-coalescer-verifier-error-empty-subrange.mir
M llvm/test/CodeGen/AMDGPU/blender-no-live-segment-at-def-implicit-def.ll
M llvm/test/CodeGen/AMDGPU/block-should-not-be-in-alive-blocks.mir
M llvm/test/CodeGen/AMDGPU/br_cc.f16.ll
M llvm/test/CodeGen/AMDGPU/branch-condition-and.ll
M llvm/test/CodeGen/AMDGPU/branch-folder-requires-no-phis.mir
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-bundle.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-no-terminators.mir
M llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-debug-info.mir
M llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx10-branch-offset-bug.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-inst-size-gfx10.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-inst-size-gfx11.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-inst-size-gfx1250.mir
M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
M llvm/test/CodeGen/AMDGPU/break-smem-soft-clauses.mir
M llvm/test/CodeGen/AMDGPU/break-vmem-soft-clauses.mir
M llvm/test/CodeGen/AMDGPU/bswap.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.v2f16-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.v2f16-rtn.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-usub_cond.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-usub_sat.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-unsupported-errors.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
M llvm/test/CodeGen/AMDGPU/buffer-intrinsic-mmo-type.ll
M llvm/test/CodeGen/AMDGPU/buffer-intrinsics-mmo-offsets.ll
M llvm/test/CodeGen/AMDGPU/buffer-rsrc-ptr-ops.ll
M llvm/test/CodeGen/AMDGPU/buffer-schedule.ll
M llvm/test/CodeGen/AMDGPU/buffer-store-dwordx4-vpk-mul-war-hazard-gfx942.mir
M llvm/test/CodeGen/AMDGPU/bug-cselect-b64.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (8) (#208837)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: c84e264eb8539f05a7347fb12183ea04001bc1a9
https://github.com/llvm/llvm-project/commit/c84e264eb8539f05a7347fb12183ea04001bc1a9
Author: David Green <david.green at arm.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/bf16-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v4-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
Log Message:
-----------
[AArch64][GlobalISel] Add test coverage for bf16 fptosi.sat. NFC (#208955)
Commit: 63f4d28adf0af9f275f6c09450d5a48d451b59b1
https://github.com/llvm/llvm-project/commit/63f4d28adf0af9f275f6c09450d5a48d451b59b1
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M lld/ELF/RelocScan.h
M lld/test/ELF/i386-tls-ie-shared.s
Log Message:
-----------
[ELF] Fix data race when handleTlsIe adds a RELATIVE relocation (#208956)
The ieExpr == R_GOT PIC case (e.g. R_386_TLS_IE in -shared links) calls
the unsynchronized addRelativeReloc from concurrent scanSectionImpl
tasks, racing on relaDyn->relativeRelocs. Use the sharded variant like
processAux. Split i386-tls-ie-shared.s into two input files so that a
ThreadSanitizer build detects the race.
Commit: 905f654bb721f1df119bd2cfaa23736e30838e90
https://github.com/llvm/llvm-project/commit/905f654bb721f1df119bd2cfaa23736e30838e90
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/Hexagon.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/Mips.cpp
M lld/ELF/Arch/PPC.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Arch/SPARCV9.cpp
M lld/ELF/Arch/SystemZ.cpp
M lld/ELF/Arch/X86.cpp
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/RelocScan.h
M lld/ELF/Relocations.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Target.h
Log Message:
-----------
[ELF] Replace getThreadIndex with explicit shards in RelocScan. NFC (#208959)
Parallel relocation scanning (https://reviews.llvm.org/D133003) appends
dynamic relocations to `relocsVec[parallel::getThreadIndex()]`.
`getThreadIndex` returns -1u on main, which is a known hazard.
Instead, run one scan task per worker via `parallelFor`, with tasks
claiming object files off a shared counter, and pass the task index
through scanSection/RelocScan as the relocsVec shard.
Commit: 410a2a236355a432c6a73cbd3338badabd280dc8
https://github.com/llvm/llvm-project/commit/410a2a236355a432c6a73cbd3338badabd280dc8
Author: Michael G. Kazakov <mike.kazakov at gmail.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M libcxx/include/__algorithm/pstl.h
M libcxx/include/__pstl/backend_fwd.h
M libcxx/include/__pstl/backends/default.h
M libcxx/test/libcxx/algorithms/pstl.iterator-requirements.verify.cpp
M libcxx/test/libcxx/algorithms/pstl.nodiscard.verify.cpp
A libcxx/test/std/algorithms/alg.modifying.operations/alg.reverse/pstl.reverse_copy.pass.cpp
M libcxx/test/std/algorithms/pstl.exception_handling.pass.cpp
Log Message:
-----------
[libc++][pstl] Default implementation of parallel std::reverse_copy (#208085)
This PR adds a default parallel implementation of `std::reverse_copy`
based on `std::reverse_iterator` + parallel `std::copy`.
Effectively it's a one-liner:
```c++
return _Copy()(__policy,
std::reverse_iterator<_BidirectionalIterator>(std::move(__last)),
std::reverse_iterator<_BidirectionalIterator>(std::move(__first)),
std::move(__result));
```
Included tests check that:
- Semantics of the function is correct.
- The function correctly SFINAE out when the first argument is not an
execution policy.
- The `nodiscard` policy is followed.
- The `noexcept` policy is followed.
- `static_assert` verifies iterators' categories (bidirectional and
forward).
Part of #99938.
---------
Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>
Commit: d6d0ccce19d1dee79fd9b5b655aae554e7455d97
https://github.com/llvm/llvm-project/commit/d6d0ccce19d1dee79fd9b5b655aae554e7455d97
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M lldb/include/lldb/Host/JSONTransport.h
M lldb/include/lldb/Protocol/MCP/Client.h
M lldb/include/lldb/Protocol/MCP/Server.h
M lldb/source/Protocol/MCP/Client.cpp
M lldb/source/Protocol/MCP/Server.cpp
M lldb/tools/lldb-mcp/Multiplexer.cpp
M lldb/tools/lldb-mcp/Multiplexer.h
M lldb/tools/lldb-mcp/lldb-mcp.cpp
M lldb/unittests/Host/JSONTransportTest.cpp
M lldb/unittests/Protocol/MCPServerInfoTest.cpp
M lldb/unittests/tools/CMakeLists.txt
A lldb/unittests/tools/lldb-mcp/CMakeLists.txt
A lldb/unittests/tools/lldb-mcp/MultiplexerTest.cpp
Log Message:
-----------
[lldb-mcp] Multiplex across all discovered LLDB instances (#208827)
Connect to every LLDB MCP server advertised under ~/.lldb rather than a
single one, and present them to the client as one server. A stale
registry entry from a crashed instance simply fails to connect and is
skipped.
Each instance is identified by the pid of its lldb process, now recorded
in the ServerInfo registry file. Tools and resources are addressed with
instance-qualified URIs, e.g. lldb-mcp://instance/{pid}/debugger/{id}
and lldb://instance/{pid}/debugger/{id}/target/{idx}. Listing requests
(sessions_list, resources/list) fan out to every backend and aggregate;
targeted requests (command, resources/read) are routed by the pid parsed
from the URI. Backends only know their local lldb-mcp://debugger/{id}
form, so URIs are rewritten in both directions.
Add Binder::FailPendingRequests (and Client::CancelPendingRequests) so
that when the client disconnects with a request still in flight to a
backend, the abandoned reply is satisfied with an error instead of being
destroyed unanswered, which would trip the binder's "must reply" assert.
The multiplexer cancels its backends on shutdown before unwinding.
Assisted-by: Claude
Commit: 074c4b35fba7eb7bfbb514e5ebdf16b1ff074311
https://github.com/llvm/llvm-project/commit/074c4b35fba7eb7bfbb514e5ebdf16b1ff074311
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M lld/ELF/MarkLive.cpp
Log Message:
-----------
[ELF] Replace getThreadIndex with explicit shards in markLive. NFC (#208974)
The parallel mark loop appends deeper discoveries to per-thread queues
indexed by `parallel::getThreadIndex()`, the last getThreadIndex user in
lld. Instead, have each worker claim frontier items off a shared
counter, accumulating into an explicit shard.
The finer-grained item claiming improves load balancing: the markLive
--time-trace phase is ~5% faster for a clang --gc-sections link and ~4%
for a larger chromium one.
Commit: 61b5d7802713e9634750d24456597b28ca85a335
https://github.com/llvm/llvm-project/commit/61b5d7802713e9634750d24456597b28ca85a335
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
Log Message:
-----------
[CIR][NFC] Add missing enum values related to CXXExpansionStmt (#208919)
Add missing enum values related to CXXExpansionStmt
Commit: 3a6048dbea15390c20e4ea063ffed2c2610fcaaf
https://github.com/llvm/llvm-project/commit/3a6048dbea15390c20e4ea063ffed2c2610fcaaf
Author: Tony Guillot <tony.guillot at protonmail.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMFastISel.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMSubtarget.cpp
M llvm/lib/Target/ARM/ARMTargetMachine.h
M llvm/test/CodeGen/ARM/elf-preemption.ll
M llvm/test/CodeGen/ARM/weak-hidden-pic.ll
Log Message:
-----------
Revert "[ARM] Use .reloc for weak symbols in PIC mode instead of GOT indirection" (#208968)
There is a few breakages between `clang-armv8-quick` failing the
`Interpreter/execute-weak.cpp` test and bots failing linking
`libclang_rt.atomic.so`.
Reverts llvm/llvm-project#208372
Commit: e9e21f520ccd8f4c292686dfdeb04eae080110e3
https://github.com/llvm/llvm-project/commit/e9e21f520ccd8f4c292686dfdeb04eae080110e3
Author: Adam Scott <adamscott200322 at gmail.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/avx512-calling-conv.ll
M llvm/test/CodeGen/X86/avx512-ext.ll
M llvm/test/CodeGen/X86/avx512-insert-extract.ll
M llvm/test/CodeGen/X86/avx512-load-store.ll
M llvm/test/CodeGen/X86/avx512-mask-op.ll
M llvm/test/CodeGen/X86/avx512-masked_memop-16-8.ll
M llvm/test/CodeGen/X86/avx512fp16-mov.ll
M llvm/test/CodeGen/X86/build-vector-128.ll
M llvm/test/CodeGen/X86/build-vector-256.ll
M llvm/test/CodeGen/X86/build-vector-512.ll
R llvm/test/CodeGen/X86/buildvec-strided-loads.ll
M llvm/test/CodeGen/X86/masked_gather_scatter_widen.ll
M llvm/test/CodeGen/X86/vector-compress.ll
Log Message:
-----------
Revert [X86] EltsFromConsecutiveLoads - handle trunc(wideload()) patterns (#199371) (#208960)
Reverts llvm/llvm-project#199371.
The strided path emits wide loads without checking that the widened
range is dereferenceable. The last wide load reads up to (stride -
element) bytes past the last element and faults when the data ends at a
page boundary. Flagged by @nikic in
https://github.com/llvm/llvm-project/pull/199371#issuecomment-4947406318.
Reproducer on current main **MADE WITH CLAUDE OPUS**
strided.ll, 8 x i16 at a 4 byte stride, the source only touches bytes
[0, 30):
```llvm
define void @strided8i16(ptr %p, ptr %out) {
%g0 = getelementptr inbounds i8, ptr %p, i64 0
%g1 = getelementptr inbounds i8, ptr %p, i64 4
%g2 = getelementptr inbounds i8, ptr %p, i64 8
%g3 = getelementptr inbounds i8, ptr %p, i64 12
%g4 = getelementptr inbounds i8, ptr %p, i64 16
%g5 = getelementptr inbounds i8, ptr %p, i64 20
%g6 = getelementptr inbounds i8, ptr %p, i64 24
%g7 = getelementptr inbounds i8, ptr %p, i64 28
%v0 = load i16, ptr %g0, align 1
%v1 = load i16, ptr %g1, align 1
%v2 = load i16, ptr %g2, align 1
%v3 = load i16, ptr %g3, align 1
%v4 = load i16, ptr %g4, align 1
%v5 = load i16, ptr %g5, align 1
%v6 = load i16, ptr %g6, align 1
%v7 = load i16, ptr %g7, align 1
%r0 = insertelement <8 x i16> undef, i16 %v0, i32 0
%r1 = insertelement <8 x i16> %r0, i16 %v1, i32 1
%r2 = insertelement <8 x i16> %r1, i16 %v2, i32 2
%r3 = insertelement <8 x i16> %r2, i16 %v3, i32 3
%r4 = insertelement <8 x i16> %r3, i16 %v4, i32 4
%r5 = insertelement <8 x i16> %r4, i16 %v5, i32 5
%r6 = insertelement <8 x i16> %r5, i16 %v6, i32 6
%r7 = insertelement <8 x i16> %r6, i16 %v7, i32 7
store <8 x i16> %r7, ptr %out, align 1
ret void
}
```
driver.c, puts the 30 data bytes flush against a PROT_NONE page:
```c
#include <sys/mman.h>
#include <unistd.h>
#include <string.h>
#include <stdint.h>
#include <stdio.h>
void strided8i16(void *p, void *out);
int main(void) {
long pg = sysconf(_SC_PAGESIZE);
char *m = mmap(0, 2*pg, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_ANONYMOUS, -1, 0);
mprotect(m + pg, pg, PROT_NONE); /* unmapped guard page right after */
memset(m, 0x11, pg);
char *p = m + pg - 30; /* data [0,30) ends exactly at page end */
uint16_t out[8];
strided8i16(p, out); /* source touches only bytes [0,30) */
printf(" returned OK, out[0]=%u\n", out[0]);
return 0;
}
```
```
$ llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 -filetype=obj strided.ll -o strided.o
$ cc driver.c strided.o -o repro
$ ./repro; echo "exit: $?"
Segmentation fault (core dumped)
exit: 139
$ llc -mtriple=x86_64-unknown-linux-gnu -mattr=+sse2 -filetype=obj strided.ll -o strided_sse2.o
$ cc driver.c strided_sse2.o -o repro_sse2
$ ./repro_sse2; echo "exit: $?"
returned OK, out[0]=4369
exit: 0
```
With +avx2 the fold fires and emits a 32 byte `vmovdqu (%rdi), %ymm0`
over the 30 byte footprint. With plain sse2 the buildvector stays scalar
and only the accessed bytes are read.
Commit: 9dffcd2752af16a09eeb4131f90a1a0fe2b76a1f
https://github.com/llvm/llvm-project/commit/9dffcd2752af16a09eeb4131f90a1a0fe2b76a1f
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M lld/ELF/Writer.cpp
M lld/test/ELF/aarch64-reloc-pauth.s
Log Message:
-----------
[PAC][lld] Properly handle `.relr.auth.dyn` -> `.rela.dyn` movement (#195649)
Address the following issues reported in #171475:
1. Proper adjustment of `__rela_iplt_end` address if a move from
`.relr.auth.dyn` to `.rela.dyn` took place
2. Set `__rela_iplt_start` properly if prior to such movement from
`.relr.auth.dyn`, the `.rela.dyn` was empty
3. Allocate enough space for both RELA* and AARCH64_AUTH_RELR* tags in
the `.dynamic` section in case we end up with both `.relr.auth.dyn` and
`.rela.dyn`. If one of the sections becomes empty - just pad the
`.dynamic` section with null tags in the end.
Resolves #171475
---------
Co-authored-by: Jessica Clarke <jrtc27 at jrtc27.com>
Commit: 77929619bc93b86e99f6ae6a9b10ef85a27c4c18
https://github.com/llvm/llvm-project/commit/77929619bc93b86e99f6ae6a9b10ef85a27c4c18
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/EvalEmitter.h
M clang/utils/TableGen/ClangOpcodesEmitter.cpp
Log Message:
-----------
[clang][bytecode] Remove EvalEmitter::OpPC (#208988)
We pass this when evaluting opcodes in EvalEmitter, but we never set it
to anything, so the underlying pointer is always null and we later and
up using the source location of the expression we're evaluating.
This seems to only cause problems when Statement expressions are
involved so far.
Commit: 02a38835c2f0cea609290ead1280d1102042081f
https://github.com/llvm/llvm-project/commit/02a38835c2f0cea609290ead1280d1102042081f
Author: amosher-nvidia <amosher at nvidia.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M lld/ELF/LinkerScript.cpp
A lld/test/ELF/linkerscript/tbss-addr-expr.s
Log Message:
-----------
[lld][ELF] Allow explicit address expressions on .tbss output sections (#196447)
D107208 allows consecutive SHF_TLS SHT_NOBITS (.tbss) output sections by
making
each .tbss start at the end address of the previous one
(state->tbssAddr). This
happens unconditionally, so an explicit output section address
(`.tbss ADDR : { ... }`) is silently ignored, unlike GNU ld.
Apply the tbssAddr fallback only when the section has no address
expression.
Some embedded/RTOS applications link the kernel and several mutually
isolated
tasks into a single ELF and require every section, .tbss included, to
sit at a
specific address matching the memory map. Placing a task's .tbss in its
own
protected region is a security boundary: one task must not be able to
modify
another's TLS. Previously lld placed .tbss adjacent to .text in RX
memory
instead of where the linker script directed it, in RW memory.
Commit: 359b99c85332edc17ab5cdbcfb7d272d24509f60
https://github.com/llvm/llvm-project/commit/359b99c85332edc17ab5cdbcfb7d272d24509f60
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/InstructionsState-is-invalid-0.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/commute.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/div-like-mixed-with-undefs.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/div.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/externally-used-copyables.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/extract-subvector-long-input.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/extractelements-to-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/fma-conversion-multi-use-guard.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/fma-reduce-regression.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/fmulladd.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/gather-buildvector-with-minbitwidth-user.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/gather-cost.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/gather-reduce.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/getelementptr.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/getelementptr2.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/landing_pad.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/loadi8.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/long-non-power-of-2.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/matmul.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/memory-runtime-checks.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/non-inst-abs-sub-copyable-value.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/non-power-of-2-with-adjusted-gathers.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/phi-node-bitwidt-op-not.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/recalc-copyable-node.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reduce-fadd.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reorder-fmuladd-crash.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reused-scalar-repeated-in-node.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/scalarization-overhead.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/shuffle-vectors-mask-size.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/slp-extval-struct-operand-no-scalar-reuse.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/slp-fma-loss.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/spillcost-loop-backedge.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/spillcost-noreturn-block.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/splat-loads.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/transpose-with-constants.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/trunc-insertion.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/tsc-s116.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/tsc-s352.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/unique_values.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/uselistorder.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-calls.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-reorder-reshuffle.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-uniform-cmps.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/horizontal-store.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/inst-count-heuristic.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/notriviallyvectorizableintrinsicoperands.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/packed-math.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/slp-v2f16.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/basic-strided-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/buildvector-all-external-scalars.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/fmuladd_width_prop.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/gather-insert-point-restore.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/gather-node-with-no-users.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/loads-ordering.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/mixed-extracts-types.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/non-commutative-second-arg-only-copyable.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/partial-vec-invalid-cost.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/remark-zext-incoming-for-neg-icmp.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/remarks-insert-into-small-vector.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reordered-buildvector-scalars.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reordered-interleaved-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/revec-strided-load.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/revec.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reversed-strided-node-with-external-ptr.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/rotated-strided-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/runtime-strided-stores.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/scatter-vectorize-reversed.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/select-profitability.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/shuffled-gather-casted.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/smax-reduction-unsigned-missing-sign.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/smin-reduction-unsigned-missing-sign.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/smin-signed-zextended.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/split-vectorize-parent-for-copyables.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-loads-with-external-indices.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-loads-with-external-use-ptr.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-unsupported-type.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/trunc-bv-multi-uses.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/unsigned-icmp-signed-op.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/unsigned-node-trunc-with-signed-users.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/cmp-ptr-minmax.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/ext-alt-node-must-ext.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/ext-not-resized-op-resized.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/minbitwidth-root-trunc.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/minbitwidth-trunc.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/non-power-2-subvector-extract.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/pr34619.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/reductions-fadd.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/reductions-fmin-fmax.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/reductions-fmul.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/reuse-non-power-of-2-reorder.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/vec-elt-insertion.ll
M llvm/test/Transforms/SLPVectorizer/WebAssembly/or-reduction-zero-test.ll
M llvm/test/Transforms/SLPVectorizer/WebAssembly/simd-splat-shuffle-cost.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR35628_1.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR35628_2.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR35777.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR39774.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR40310.ll
M llvm/test/Transforms/SLPVectorizer/X86/add-sub-nsw-intmin.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-cmp-swapped-pred.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-int-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-int.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-opcode-strict-bitwidth-than-main.ll
M llvm/test/Transforms/SLPVectorizer/X86/ashr-main-opcode-copyables.ll
M llvm/test/Transforms/SLPVectorizer/X86/bad-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/barriercall.ll
M llvm/test/Transforms/SLPVectorizer/X86/blending-shuffle-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/blending-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/broadcast-load-cost.ll
M llvm/test/Transforms/SLPVectorizer/X86/broadcast.ll
M llvm/test/Transforms/SLPVectorizer/X86/broadcast_long.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-reused-with-bv-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-same-lane-insert.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-schedule-for-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-shuffle-with-root.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-store-chains.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-with-reuses.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvectors-parent-phi-nodes.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvectors-with-same-parents.ll
M llvm/test/Transforms/SLPVectorizer/X86/bv-root-part-of-graph.ll
M llvm/test/Transforms/SLPVectorizer/X86/bv-shuffle-mask.ll
M llvm/test/Transforms/SLPVectorizer/X86/c-ray.ll
M llvm/test/Transforms/SLPVectorizer/X86/call.ll
M llvm/test/Transforms/SLPVectorizer/X86/cast-operand-extracted.ll
M llvm/test/Transforms/SLPVectorizer/X86/cmp-after-intrinsic-call-minbitwidth.ll
M llvm/test/Transforms/SLPVectorizer/X86/cmp-as-alternate-ops.ll
M llvm/test/Transforms/SLPVectorizer/X86/cmp_sel.ll
M llvm/test/Transforms/SLPVectorizer/X86/commutable-member-in-non-commutable-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/commutable-node-with-non-sched-parent.ll
M llvm/test/Transforms/SLPVectorizer/X86/commutative-copyable-external-phi-use.ll
M llvm/test/Transforms/SLPVectorizer/X86/commutativity.ll
M llvm/test/Transforms/SLPVectorizer/X86/compare-node-with-reuses.ll
M llvm/test/Transforms/SLPVectorizer/X86/compare-reduce.ll
M llvm/test/Transforms/SLPVectorizer/X86/complex-fma-combine.ll
M llvm/test/Transforms/SLPVectorizer/X86/control-dependence.ll
M llvm/test/Transforms/SLPVectorizer/X86/conversion-fp16.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-child-node-used-outside.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-non-inst-in-stores.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-operand-non-scheduled-parent-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-operands-reordering.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-phi-scheduled-non-copyable.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-phi-used-non-copyable.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-reduced-erased.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-used-outside-with-immediate-op.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-with-non-scheduled-parent-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-with-used-outside-bb.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable_reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyables-with-parent-scalars-in-phis.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_bullet.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_clear_undefs.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_cmpop.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_dequeue.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_mandeltext.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_scheduling-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_scheduling.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_sim4b1.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_vectorizeTree.ll
M llvm/test/Transforms/SLPVectorizer/X86/cse.ll
M llvm/test/Transforms/SLPVectorizer/X86/debug-counter.ll
M llvm/test/Transforms/SLPVectorizer/X86/debug-info-salvage.ll
M llvm/test/Transforms/SLPVectorizer/X86/delayed-gather-emission.ll
M llvm/test/Transforms/SLPVectorizer/X86/deleted-inst-reduction-attempt.ll
M llvm/test/Transforms/SLPVectorizer/X86/deleted-instructions-clear.ll
M llvm/test/Transforms/SLPVectorizer/X86/deleted-node-with-copyable-operands.ll
M llvm/test/Transforms/SLPVectorizer/X86/diamond.ll
M llvm/test/Transforms/SLPVectorizer/X86/diamond_broadcast_extra_shuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/div-possibly-extended-with-poisons.ll
M llvm/test/Transforms/SLPVectorizer/X86/dot-product.ll
M llvm/test/Transforms/SLPVectorizer/X86/entries-different-vf.ll
M llvm/test/Transforms/SLPVectorizer/X86/entries-shuffled-diff-sizes.ll
M llvm/test/Transforms/SLPVectorizer/X86/entry-no-bundle-but-extra-use-on-vec.ll
M llvm/test/Transforms/SLPVectorizer/X86/expanded-binop-doesnotneedschedule-user.ll
M llvm/test/Transforms/SLPVectorizer/X86/expanded-operand-already-scheduled.ll
M llvm/test/Transforms/SLPVectorizer/X86/expected-prof-consecutive-access.ll
M llvm/test/Transforms/SLPVectorizer/X86/ext-used-scalar-different-bitwidth.ll
M llvm/test/Transforms/SLPVectorizer/X86/external-bin-op-user.ll
M llvm/test/Transforms/SLPVectorizer/X86/external-reduced-value-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/X86/external_user.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-scalar-from-undef.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-subvector-long-input.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-used-in-many-nodes.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract_in_tree_user.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractcost.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelement-multi-register-use.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelement-multiple-uses.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelement-single-use-many-nodes.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelement.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelements-subnodes-same-index.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelements-with-undef-vector.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelemets-extended-by-poison.ll
M llvm/test/Transforms/SLPVectorizer/X86/extracts-non-extendable.ll
M llvm/test/Transforms/SLPVectorizer/X86/fabs-cost-softfp.ll
M llvm/test/Transforms/SLPVectorizer/X86/fptosi-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/fptosi.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-match-with-poison-scalar.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-matched-bv-with-subvectors.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-non-schedulable-overlap.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather-move-out-of-loop.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather-node-same-as-vect-but-order.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather-with-cmp-user.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-delayed-nodes-with-reused-user.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-loads-non-full-reg.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-node-with-in-order-parent.ll
M llvm/test/Transforms/SLPVectorizer/X86/hoist.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-list.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-minmax.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal.ll
M llvm/test/Transforms/SLPVectorizer/X86/icmp-altopcode-after-reordering.ll
M llvm/test/Transforms/SLPVectorizer/X86/identity-match-splat-less-defined.ll
M llvm/test/Transforms/SLPVectorizer/X86/in-tree-user.ll
M llvm/test/Transforms/SLPVectorizer/X86/insert-after-bundle.ll
M llvm/test/Transforms/SLPVectorizer/X86/insert-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/insertelement-with-copyable-args.ll
M llvm/test/Transforms/SLPVectorizer/X86/insertvalue.ll
M llvm/test/Transforms/SLPVectorizer/X86/inst_size_bug.ll
M llvm/test/Transforms/SLPVectorizer/X86/inversed-icmp-to-gather.ll
M llvm/test/Transforms/SLPVectorizer/X86/landing-pad-for-split-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/landing_pad.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge.ll
M llvm/test/Transforms/SLPVectorizer/X86/lookahead.ll
M llvm/test/Transforms/SLPVectorizer/X86/loopinvariant.ll
M llvm/test/Transforms/SLPVectorizer/X86/malformed_phis.ll
M llvm/test/Transforms/SLPVectorizer/X86/many-uses-parent-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/matched-bv-schedulable.ll
M llvm/test/Transforms/SLPVectorizer/X86/matched-gather-part-of-combined.ll
M llvm/test/Transforms/SLPVectorizer/X86/matched-nodes-updated.ll
M llvm/test/Transforms/SLPVectorizer/X86/matched-shuffled-entries.ll
M llvm/test/Transforms/SLPVectorizer/X86/matching-gather-nodes-phi-users.ll
M llvm/test/Transforms/SLPVectorizer/X86/matching-insert-point-for-nodes.ll
M llvm/test/Transforms/SLPVectorizer/X86/memory-runtime-checks.ll
M llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-cast.ll
M llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-drop-wrapping-flags.ll
M llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-icmp-to-trunc.ll
M llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-transformed-operand.ll
M llvm/test/Transforms/SLPVectorizer/X86/minbw-bitcast-to-fp.ll
M llvm/test/Transforms/SLPVectorizer/X86/minimum-sizes.ll
M llvm/test/Transforms/SLPVectorizer/X86/mul-shl-nsw-intmin.ll
M llvm/test/Transforms/SLPVectorizer/X86/multi-extracts-bv-combined.ll
M llvm/test/Transforms/SLPVectorizer/X86/multi-node-for-copyable-parent.ll
M llvm/test/Transforms/SLPVectorizer/X86/multi-node-reuse-in-bv.ll
M llvm/test/Transforms/SLPVectorizer/X86/multi-node-user-with-copyable-ops.ll
M llvm/test/Transforms/SLPVectorizer/X86/multi-nodes-to-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/multi-parent-instr-copyable-regular.ll
M llvm/test/Transforms/SLPVectorizer/X86/multi-use-bitcasted-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/multi_user.ll
M llvm/test/Transforms/SLPVectorizer/X86/no_alternate_divrem.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-commutative-op-in-commutative-inst.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-power-2-num-elems-reused.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-power-of-2-bswap.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-power-of-2-order-detection.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-reduced-select-of-bits.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-before-main.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-instructions-become-schedulable.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-parent-multi-copyables.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-split-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-user-different-bb.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-scheduled-inst-extern-use.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-scheduled-inst-reused-as-last-inst.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-vectorizable-inst-operand.ll
M llvm/test/Transforms/SLPVectorizer/X86/odd_store.ll
M llvm/test/Transforms/SLPVectorizer/X86/opaque-ptr.ll
M llvm/test/Transforms/SLPVectorizer/X86/operand-reorder-with-copyables.ll
M llvm/test/Transforms/SLPVectorizer/X86/operandorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/ordered-reduction-root-deleted.ll
M llvm/test/Transforms/SLPVectorizer/X86/ordered-reductions.ll
M llvm/test/Transforms/SLPVectorizer/X86/ordering-bug.ll
M llvm/test/Transforms/SLPVectorizer/X86/original-inst-scheduled-after-copyable.ll
M llvm/test/Transforms/SLPVectorizer/X86/parent-node-schedulable-with-multi-copyables.ll
M llvm/test/Transforms/SLPVectorizer/X86/parent-node-split-non-schedulable.ll
M llvm/test/Transforms/SLPVectorizer/X86/parent-phi-node-reordered.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi-node-bitwidt-op-not.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi-node-with-cycle.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi3.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi_landingpad.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi_overalignedtype.ll
M llvm/test/Transforms/SLPVectorizer/X86/phis-different-order.ll
M llvm/test/Transforms/SLPVectorizer/X86/poor-throughput-seeds.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr27163.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr35497.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr40522.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr42022-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr42022.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr44067-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr44067.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr46983.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47642.ll
M llvm/test/Transforms/SLPVectorizer/X86/propagate-mmra.ll
M llvm/test/Transforms/SLPVectorizer/X86/recalc-copyable-operand-deps-non-scheduled-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/recalc-copyable-operand-deps-shared-inst.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-bswap-with-larger-reduced-type.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-val-extracted-and-externally-used.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-value-replace-extractelement-cost.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-value-replace-extractelement.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-value-stored.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-across-different-bb.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-bool-logic-op-inside.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-copyable-reused-scalars.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-logical.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-same-vals.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-shl1-add-merge.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-with-removed-extracts.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction2.ll
M llvm/test/Transforms/SLPVectorizer/X86/redux-feed-buildvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/remark-partial-loads-vectorize.ll
M llvm/test/Transforms/SLPVectorizer/X86/remark_gather-load-redux-cost.ll
M llvm/test/Transforms/SLPVectorizer/X86/remark_not_all_parts.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-possible-strided-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-reused-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder_diamond_match.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder_phi.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder_with_external_users.ll
M llvm/test/Transforms/SLPVectorizer/X86/replaced-external-in-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/resched.ll
M llvm/test/Transforms/SLPVectorizer/X86/reschedule-only-scheduled.ll
M llvm/test/Transforms/SLPVectorizer/X86/resized-bv-values-non-power-of2-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/reused-extract-scalar-lanes.ll
M llvm/test/Transforms/SLPVectorizer/X86/reused-extracts.ll
M llvm/test/Transforms/SLPVectorizer/X86/reused-last-instruction-in-split-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/reused-mask-with-poison-index.ll
M llvm/test/Transforms/SLPVectorizer/X86/reused-reductions-with-minbitwidth.ll
M llvm/test/Transforms/SLPVectorizer/X86/reused-scalars-in-buildvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/reused-undefs.ll
M llvm/test/Transforms/SLPVectorizer/X86/revec-fma-vectorize.ll
M llvm/test/Transforms/SLPVectorizer/X86/revec-non-power-2-to-power-2-large-vect.ll
M llvm/test/Transforms/SLPVectorizer/X86/revec-reduced-value-replace-extractelement.ll
M llvm/test/Transforms/SLPVectorizer/X86/revec-scalar-insertelement.ll
M llvm/test/Transforms/SLPVectorizer/X86/same-last-instruction-different-parents.ll
M llvm/test/Transforms/SLPVectorizer/X86/same-operands-but-copyable.ll
M llvm/test/Transforms/SLPVectorizer/X86/same-values-sub-node-with-poisons.ll
M llvm/test/Transforms/SLPVectorizer/X86/saxpy.ll
M llvm/test/Transforms/SLPVectorizer/X86/scatter-vectorize-reorder-non-empty.ll
M llvm/test/Transforms/SLPVectorizer/X86/scatter-vectorize-reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/schedule_budget.ll
M llvm/test/Transforms/SLPVectorizer/X86/select-copyable-cmp-poison.ll
M llvm/test/Transforms/SLPVectorizer/X86/select-logical-or-and-i1-vector.ll
M llvm/test/Transforms/SLPVectorizer/X86/select-reduction-op.ll
M llvm/test/Transforms/SLPVectorizer/X86/shl-compatible-with-add.ll
M llvm/test/Transforms/SLPVectorizer/X86/shl-to-add-transformation.ll
M llvm/test/Transforms/SLPVectorizer/X86/shl-to-add-transformation5.ll
M llvm/test/Transforms/SLPVectorizer/X86/shuffle-mask-emission.ll
M llvm/test/Transforms/SLPVectorizer/X86/sibling-loops-mismatched-tripcount.ll
M llvm/test/Transforms/SLPVectorizer/X86/simplebb.ll
M llvm/test/Transforms/SLPVectorizer/X86/sitofp-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/sitofp-minbitwidth-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/sitofp.ll
M llvm/test/Transforms/SLPVectorizer/X86/slp-fma-loss.ll
M llvm/test/Transforms/SLPVectorizer/X86/slp-throttle.ll
M llvm/test/Transforms/SLPVectorizer/X86/small-graph-diff-block-instructions.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-load8_2_unord_geps.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-full-match.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-last-inst-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-no-reorder-copy.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-num-operands.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-parent-operands-in-spill.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-reduce-root.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-reorder-node-with-ops.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-reused-in-later-vector.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-throttled.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-vector-operand-with-reuses.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-vectorize-gathered-def-after-use.ll
M llvm/test/Transforms/SLPVectorizer/X86/stacksave-dependence.ll
M llvm/test/Transforms/SLPVectorizer/X86/store-load-forward-conflict.ll
M llvm/test/Transforms/SLPVectorizer/X86/stores_vectorize.ll
M llvm/test/Transforms/SLPVectorizer/X86/struct-return-extract-dominance.ll
M llvm/test/Transforms/SLPVectorizer/X86/struct-return-ordering-stress.ll
M llvm/test/Transforms/SLPVectorizer/X86/subvector-minbitwidth-unsigned-value.ll
M llvm/test/Transforms/SLPVectorizer/X86/supernode.ll
M llvm/test/Transforms/SLPVectorizer/X86/tiny-tree.ll
M llvm/test/Transforms/SLPVectorizer/X86/trunc-store-value-ty-not-power-of-2.ll
M llvm/test/Transforms/SLPVectorizer/X86/trunced-buildvector-scalar-extended.ll
M llvm/test/Transforms/SLPVectorizer/X86/uitofp-with-signed-value-bitwidth.ll
M llvm/test/Transforms/SLPVectorizer/X86/used-reduced-op.ll
M llvm/test/Transforms/SLPVectorizer/X86/user-node-with-same-last-instr.ll
M llvm/test/Transforms/SLPVectorizer/X86/user-with-multi-copyable-ops.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec3-calls.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec3-gather-some-loads.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec3-reorder-reshuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias_external_insert_shuffled.ll
M llvm/test/Transforms/SLPVectorizer/X86/vect-gather-same-nodes.ll
M llvm/test/Transforms/SLPVectorizer/X86/vectorize-pair-path.ll
M llvm/test/Transforms/SLPVectorizer/X86/vectorize-widest-phis.ll
M llvm/test/Transforms/SLPVectorizer/X86/whole-registers-compare.ll
M llvm/test/Transforms/SLPVectorizer/X86/xor-combined-opcode.ll
M llvm/test/Transforms/SLPVectorizer/X86/xor-with-zero-and-incompat.ll
M llvm/test/Transforms/SLPVectorizer/abs-overflow-incorrect-minbws.ll
M llvm/test/Transforms/SLPVectorizer/alt-cmp-vectorize.ll
M llvm/test/Transforms/SLPVectorizer/alternate-cmp-swapped-pred-parent.ll
M llvm/test/Transforms/SLPVectorizer/alternate-non-profitable.ll
M llvm/test/Transforms/SLPVectorizer/bool-logical-op-reduction-with-poison.ll
M llvm/test/Transforms/SLPVectorizer/buildvector-nodes-dependency.ll
M llvm/test/Transforms/SLPVectorizer/call-arg-reduced-by-minbitwidth.ll
M llvm/test/Transforms/SLPVectorizer/consecutive-access.ll
M llvm/test/Transforms/SLPVectorizer/crash_exceed_scheduling.ll
M llvm/test/Transforms/SLPVectorizer/crash_extractelement_poison.ll
M llvm/test/Transforms/SLPVectorizer/diamond_broadcast.ll
M llvm/test/Transforms/SLPVectorizer/ext-after-phi-node.ll
M llvm/test/Transforms/SLPVectorizer/ext-int-reduced-not-operand.ll
M llvm/test/Transforms/SLPVectorizer/extended-vectorized-gathered-inst.ll
M llvm/test/Transforms/SLPVectorizer/external-user-instruction-minbitwidth.ll
M llvm/test/Transforms/SLPVectorizer/extract-many-users-buildvector.ll
M llvm/test/Transforms/SLPVectorizer/extractelement-insertpoint.ll
M llvm/test/Transforms/SLPVectorizer/extracts-with-undefs.ll
M llvm/test/Transforms/SLPVectorizer/freeze-signedness-missed.ll
M llvm/test/Transforms/SLPVectorizer/gather_extract_from_vectorbuild.ll
M llvm/test/Transforms/SLPVectorizer/gathered-consecutive-loads-different-types.ll
M llvm/test/Transforms/SLPVectorizer/insert-element-build-vector-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/insert-element-build-vector.ll
M llvm/test/Transforms/SLPVectorizer/insert-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/insertelement-across-zero.ll
M llvm/test/Transforms/SLPVectorizer/insertelement-postpone.ll
M llvm/test/Transforms/SLPVectorizer/insertelement-uses-vectorized-index.ll
M llvm/test/Transforms/SLPVectorizer/int-bitcast-minbitwidth.ll
M llvm/test/Transforms/SLPVectorizer/jumbled_store_crash.ll
M llvm/test/Transforms/SLPVectorizer/last-buildvector-node.ll
M llvm/test/Transforms/SLPVectorizer/materialize-vector-of-consts.ll
M llvm/test/Transforms/SLPVectorizer/minbitwidth-multiuse-with-insertelement.ll
M llvm/test/Transforms/SLPVectorizer/minbitwidth-user-not-min.ll
M llvm/test/Transforms/SLPVectorizer/multi-node-vectorized-insts.ll
M llvm/test/Transforms/SLPVectorizer/multi-uses-with-deps-in-first.ll
M llvm/test/Transforms/SLPVectorizer/operand-is-reduced-val.ll
M llvm/test/Transforms/SLPVectorizer/partial-register-extract.ll
M llvm/test/Transforms/SLPVectorizer/phi-undef-input.ll
M llvm/test/Transforms/SLPVectorizer/postponed_gathers.ll
M llvm/test/Transforms/SLPVectorizer/reduced-gathered-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/reorder-clustered-node.ll
M llvm/test/Transforms/SLPVectorizer/reordered-top-scalars.ll
M llvm/test/Transforms/SLPVectorizer/reordering-single-phi.ll
M llvm/test/Transforms/SLPVectorizer/reschedule.ll
M llvm/test/Transforms/SLPVectorizer/resized-alt-shuffle-after-minbw.ll
M llvm/test/Transforms/SLPVectorizer/return.ll
M llvm/test/Transforms/SLPVectorizer/reudction-or-non-poisoned.ll
M llvm/test/Transforms/SLPVectorizer/reused-buildvector-matching-vectorized-node.ll
M llvm/test/Transforms/SLPVectorizer/revec.ll
M llvm/test/Transforms/SLPVectorizer/root-trunc-extract-reuse.ll
M llvm/test/Transforms/SLPVectorizer/same-scalar-in-same-phi-extract.ll
M llvm/test/Transforms/SLPVectorizer/semanticly-same.ll
M llvm/test/Transforms/SLPVectorizer/shrink_after_reorder2.ll
M llvm/test/Transforms/SLPVectorizer/shuffle-multivector.ll
M llvm/test/Transforms/SLPVectorizer/shufflebuilder-bug.ll
M llvm/test/Transforms/SLPVectorizer/slp-deleted-inst.ll
M llvm/test/Transforms/SLPVectorizer/slp-max-phi-size.ll
M llvm/test/Transforms/SLPVectorizer/splat-buildvector.ll
M llvm/test/Transforms/SLPVectorizer/stores-non-ordered.ll
M llvm/test/Transforms/SLPVectorizer/unknown-entries.ll
M llvm/test/Transforms/SLPVectorizer/vectorize-reorder-alt-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/zext-incoming-for-neg-icmp.ll
Log Message:
-----------
[SLP] Use constant 64-bit indices for Extract/InsertElement (#208957)
The canonical form preferred by instCombine is to use 64-bit values for
constant index in ExtractElement and InsertElement.
Commit: 76f0d4693463ec2c09b4e14eca8f96020bb710e6
https://github.com/llvm/llvm-project/commit/76f0d4693463ec2c09b4e14eca8f96020bb710e6
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M lld/test/ELF/aarch64-reloc-pauth.s
M lld/test/ELF/pack-dyn-relocs-relr-loop.s
Log Message:
-----------
[ELF,test] Improve .relr.auth.dyn -> .rela.dyn movement coverage (#208991)
Test two behaviors of #195649 that were unasserted:
- .dynamic shrinks when all .relr.auth.dyn entries are moved to a
non-empty .rela.dyn. Check the section header size: readelf -d stops
at the first DT_NULL and cannot show stale padding. This subsumes
empty-relr.s (a size-neutral tag swap, which passed even without the
fix), so remove it.
- An empty .rela.dyn is removed when .relr.auth.dyn is unused. Assert
this in pack-dyn-relocs-relr-loop.s.
Commit: 7215a1a19c13c79e66a9e8661aa7798cb3261b94
https://github.com/llvm/llvm-project/commit/7215a1a19c13c79e66a9e8661aa7798cb3261b94
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/adjust-alloca-alignment.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/fence-noalias-metadata.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/merge-stores.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/merge-vectors-complex.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/missing-alignment.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/multiple_tails.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/opaque_ptr.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/pointer-elements.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/unaligned-buffer.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/vectorize-redund-loads.ll
M llvm/test/Transforms/LoadStoreVectorizer/NVPTX/4x2xhalf.ll
M llvm/test/Transforms/LoadStoreVectorizer/NVPTX/extend-chain.ll
M llvm/test/Transforms/LoadStoreVectorizer/NVPTX/gap-fill-cleanup.ll
M llvm/test/Transforms/LoadStoreVectorizer/NVPTX/gap-fill-invariant.ll
M llvm/test/Transforms/LoadStoreVectorizer/NVPTX/gap-fill-with-redundant-elements.ll
M llvm/test/Transforms/LoadStoreVectorizer/NVPTX/gap-fill.ll
M llvm/test/Transforms/LoadStoreVectorizer/NVPTX/load-store-256-bit.ll
M llvm/test/Transforms/LoadStoreVectorizer/NVPTX/masked-store.ll
M llvm/test/Transforms/LoadStoreVectorizer/NVPTX/propagate-invariance-metadata.ll
M llvm/test/Transforms/LoadStoreVectorizer/NVPTX/vectorize_i8.ll
M llvm/test/Transforms/LoadStoreVectorizer/X86/correct-order.ll
M llvm/test/Transforms/LoadStoreVectorizer/X86/massive_indirection.ll
M llvm/test/Transforms/LoadStoreVectorizer/X86/opaque-ptr.ll
M llvm/test/Transforms/LoadStoreVectorizer/X86/or-disjoint-nested-add.ll
M llvm/test/Transforms/LoadStoreVectorizer/X86/or-disjoint-zext.ll
M llvm/test/Transforms/LoadStoreVectorizer/X86/scev-range-zext.ll
M llvm/test/Transforms/LoadStoreVectorizer/X86/vectorize-i8-nested-add-inseltpoison.ll
M llvm/test/Transforms/LoadStoreVectorizer/X86/vectorize-i8-nested-add.ll
M llvm/test/Transforms/LoadStoreVectorizer/X86/vectorize-redund-loads.ll
M llvm/test/Transforms/LoadStoreVectorizer/int_sideeffect.ll
Log Message:
-----------
[LoadStoreVectorizer] Use constant 64-bit indices for Extract/InsertElement (#208941)
The canonical form preferred by instCombine is to use 64-bit values for
constant index in ExtractElement and InsertElement.
Commit: 2aab89554cbf800bf50928fe7b1b3de2cbd41b26
https://github.com/llvm/llvm-project/commit/2aab89554cbf800bf50928fe7b1b3de2cbd41b26
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M clang/test/CodeGen/AArch64/bf16-reinterpret-intrinsics.c
M clang/test/CodeGen/AArch64/fp8-intrinsics/acle_neon_fp8_reinterpret.c
M clang/test/CodeGen/AArch64/neon-2velem.c
M clang/test/CodeGen/AArch64/neon-extract.c
M clang/test/CodeGen/AArch64/neon-intrinsics-constrained.c
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon-ldst-one-rcpc3.c
M clang/test/CodeGen/AArch64/neon-ldst-one.c
M clang/test/CodeGen/AArch64/neon-misc.c
M clang/test/CodeGen/AArch64/neon-scalar-x-indexed-elem-constrained.c
M clang/test/CodeGen/AArch64/neon-vcmla.c
M clang/test/CodeGen/AArch64/neon/fused-multiply.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
M clang/test/CodeGen/AArch64/v8.5a-neon-frint3264-intrinsic.c
M clang/test/CodeGen/arm-neon-vst.c
M clang/test/CodeGen/arm64_vdupq_n_f64.c
M clang/test/CodeGen/arm_neon_intrinsics.c
M clang/test/CodeGen/cx-complex-range-real.c
M clang/test/CodeGen/cx-complex-range.c
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/vec-2.ll
M llvm/test/Transforms/SROA/basictest.ll
M llvm/test/Transforms/SROA/prefer-integer-partition.ll
M llvm/test/Transforms/SROA/sroa-common-type-fail-promotion.ll
M llvm/test/Transforms/SROA/struct-to-vector-fp-store-only-tail.ll
M llvm/test/Transforms/SROA/vector-conversion.ll
M llvm/test/Transforms/SROA/vector-promotion-rmw-cannot-tree-merge.ll
M llvm/test/Transforms/SROA/vector-promotion.ll
Log Message:
-----------
[SROA] Use constant 64-bit indices for Extract/InsertElement (#208918)
The canonical form preferred by instCombine is to use 64-bit values for
constant index in ExtractElement and InsertElement.
Commit: e62c0cb076fbcb70752530571726944648a48829
https://github.com/llvm/llvm-project/commit/e62c0cb076fbcb70752530571726944648a48829
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/test/PCH/cxx20-template-args.cpp
Log Message:
-----------
[clang][bytecode] Fix comparing `TemplateParamObjectDecl`s (#208734)
1) When creating the global variables for them, always use the first
decl
2) When converting null pointers to `APValue`, don't cast the nullptr
base to `Expr` or `ValueDecl`. Use `LValueBase()` instead, so the
internal `PointerUnion` has an all-zeros value as `getOpaqueValue()`. If
we don't do this, we run into problems with merging of
`TemplateParamObjectDecls` because they don't compare equal via
`::Profile()`.
Commit: 25a5b7869cd13698f7556af6b4084cca835ae988
https://github.com/llvm/llvm-project/commit/25a5b7869cd13698f7556af6b4084cca835ae988
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Vectorize/LoopIdiomVectorize.cpp
Log Message:
-----------
[PatternMatch] Add capturing m_Phi matcher (NFC) (#208949)
Add a new capturing m_Phi matcher and use it in some patterns instead of
manually casting/checking if operand is a phi.
PR: https://github.com/llvm/llvm-project/pull/208949
Commit: af812fc18a8ab488bf8b70f9b8ae19bbdd1aea48
https://github.com/llvm/llvm-project/commit/af812fc18a8ab488bf8b70f9b8ae19bbdd1aea48
Author: 陈子昂 <2802328816 at qq.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/rvp-widening-convert.ll
Log Message:
-----------
[Clang][RISCV][P-ext] Support packed widening convert intrinsics (#208394)
This patch implements all packed widening convert intrinsics using
general vector operations. Low widening conversions use
`__builtin_convertvector`, while high-half conversions use general
shuffles.
The generated code for high-half conversions is correct but not yet
optimal.
Commit: 4c7948d06c93e8d233cd4733fd4107f3b68bc7bc
https://github.com/llvm/llvm-project/commit/4c7948d06c93e8d233cd4733fd4107f3b68bc7bc
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
Revert "[VPlan] Re-use VPSlotTracker when printing recipes for costs (NFC)." (#209003)
Reverts llvm/llvm-project#203386.
This causes a large compile-time regression.
Commit: a34cb573eae65f48f0e51147289e042a86b55d16
https://github.com/llvm/llvm-project/commit/a34cb573eae65f48f0e51147289e042a86b55d16
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/CStringChecker.cpp
A clang/test/Analysis/string-search-modeling.c
Log Message:
-----------
[analyzer] Model strchr/strrchr/memchr/strstr/strpbrk/strchrnul (#207267)
CStringChecker did not model these buffer-search functions, so the
engine bound each call to a fresh conjured symbol unrelated to the source.
As a consequence, we could not track the origin of the returned pointer,
thus the fact that it shares provenance of the source pointer.
Fixes #203260
Assisted-by: Claude Opus 4.8
Commit: 97bceede1059b67d3491011f415856f32de21c9c
https://github.com/llvm/llvm-project/commit/97bceede1059b67d3491011f415856f32de21c9c
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rvp-srl-bitcast-bv.ll
M llvm/test/CodeGen/RISCV/rvp-zip.ll
Log Message:
-----------
[RISCV][P-ext] Improve the codegen for unzip-like shuffle and buildvector (#208763)
This patch selects `pncvt*`/`unzip*` for unzip-like patterns.
On RV32, we select packed narrow shift for i8x4 and i16x2 BUILD_VECTOR
that are equivalent to deinterleave shuffle.
On RV64, we select packed unzip for i8x4 and i16x2 deinterleave shuffle.
Apart from the packed unzip intrinsics, this patch also adds support for
the codegen of two-source unzip.
Commit: a06b1c9f4bd49af7e2c68cacf5922136906bb335
https://github.com/llvm/llvm-project/commit/a06b1c9f4bd49af7e2c68cacf5922136906bb335
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt-c/Logging.h
M orc-rt/lib/executor/CMakeLists.txt
A orc-rt/lib/executor/Logging_printf.cpp
M orc-rt/test/CMakeLists.txt
M orc-rt/test/regression/lit.cfg.py
A orc-rt/test/regression/logging/lit.local.cfg
A orc-rt/test/regression/logging/printf-backend/bad-level.test
A orc-rt/test/regression/logging/printf-backend/debug-compiled-out.test
A orc-rt/test/regression/logging/printf-backend/debug-level.test
A orc-rt/test/regression/logging/printf-backend/format.test
A orc-rt/test/regression/logging/printf-backend/level-off.test
A orc-rt/test/regression/logging/printf-backend/lit.local.cfg
A orc-rt/test/regression/logging/printf-backend/output-redirect.test
A orc-rt/test/regression/logging/printf-backend/runtime-level.test
M orc-rt/test/tools/CMakeLists.txt
A orc-rt/test/tools/orc-rt-log-check.cpp
Log Message:
-----------
[orc-rt] Add printf logging backend (#209006)
Implement the printf backend, selected at configure-time with
ORC_RT_LOG_BACKEND=printf. Messages are written to stderr, or to the
file named by the ORC_RT_LOG_OUTPUT environment variable.
The ORC_RT_LOG environment variable sets the runtime level floor (error,
warning, info, debug, or off) -- only messages at or above it are shown.
When unset it defaults to warning, so warnings and errors are shown and
info and debug are opt-in. The runtime floor cannot go below the
compile-time ORC_RT_LOG_LEVEL floor (the lowest level built in).
Also add regression tests, driven by a new orc-rt-log-check tool that
reports the compiled-in backend and levels (which lit exposes as
features) and emits a message at each level.
Commit: 3187f2659848d0cfadc9caa601215afb8bd9b242
https://github.com/llvm/llvm-project/commit/3187f2659848d0cfadc9caa601215afb8bd9b242
Author: Zinovy Nis <zinovy.nis at gmail.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M clang-tools-extra/clang-tidy/modernize/UseStringViewCheck.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-string-view.cpp
Log Message:
-----------
[clang-tidy] Modernize-use-string-view: fix todo for ternary (#209008)
Add a support for any-depth ternary expressions
Commit: 3f2d8eb20a8d86d9aeea75a00e21a4ecff0a5234
https://github.com/llvm/llvm-project/commit/3f2d8eb20a8d86d9aeea75a00e21a4ecff0a5234
Author: Lukas <43409484+hertelukas at users.noreply.github.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/BasicBlockUtils.h
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/FixIrreducible.cpp
M llvm/lib/Transforms/Utils/UnifyLoopExits.cpp
A llvm/test/Transforms/FixIrreducible/multiedge.ll
M llvm/test/Transforms/UnifyLoopExits/basic.ll
A llvm/test/Transforms/UnifyLoopExits/multiedge.ll
Log Message:
-----------
[FixIrreducible][UnifyLoopExits] Fix callbr multiedge splitting (#207598)
This fixes a bug where splitting `callbr` multiedges corrupts the
successor's PHI nodes.
Originally, the first split edge would replace all incoming edges from
the `callbr` block with the newly introduced target block by using
`replacePhiUsesWith`. Later edges would create new target blocks and
would try to update their edge's PHI as well, but would not find it,
leading to a corrupted PHI node.
To fix this, it is theoretically only necessary to ensure that exactly
one PHI argument is replaced per split edge. However, as all the PHI
nodes must have the same argument for every edge from one predecessor, a
single target block suffices, through which all traffic can be routed,
which will be especially useful for switches, where multiedges are
common.
[Trunk crashing](https://godbolt.org/z/4MM5eMrW5)
Found while working on PR #206567, cc @ro-i.
Commit: b82a9a57e72c29a5e8fc81109a62eb827fa5d8f0
https://github.com/llvm/llvm-project/commit/b82a9a57e72c29a5e8fc81109a62eb827fa5d8f0
Author: Gábor Horváth <xazax.hun at gmail.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/benchmarks/CMakeLists.txt
A llvm/benchmarks/ImmutableSetBuildBM.cpp
M llvm/include/llvm/ADT/ImmutableSet.h
Log Message:
-----------
[ADT] Fuse the two post-mutation tree walks in ImutAVLFactory (#208907)
Commit: f99f2a582e947af3f20580fa2674ca0c6bde1b2c
https://github.com/llvm/llvm-project/commit/f99f2a582e947af3f20580fa2674ca0c6bde1b2c
Author: Benedek Kaibas <82393336+benedekaibas at users.noreply.github.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/lib/StaticAnalyzer/Checkers/CMakeLists.txt
A clang/lib/StaticAnalyzer/Checkers/LifetimeModeling.cpp
A clang/lib/StaticAnalyzer/Checkers/LifetimeModeling.h
M clang/lib/StaticAnalyzer/Checkers/UseAfterLifetimeEnd.cpp
M clang/test/Analysis/debug-lifetime-bound.cpp
M clang/test/Analysis/lifetime-bound.cpp
Log Message:
-----------
[analyzer] Implement LifetimeModeling checker and refactor UseAfterLifetimeEnd (#205951)
Commit: 7c2f4db828e5b9fd391c7f69bdd7dfe866b41bc0
https://github.com/llvm/llvm-project/commit/7c2f4db828e5b9fd391c7f69bdd7dfe866b41bc0
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M orc-rt/lib/executor/CMakeLists.txt
A orc-rt/lib/executor/Environment.cpp
A orc-rt/lib/executor/Environment.h
M orc-rt/lib/executor/Logging_printf.cpp
Log Message:
-----------
[orc-rt] Add internal secureGetenv utility and use it in the printf b… (#209014)
…ackend
orc_rt::secureGetenv is like getenv, but returns null when the process
is running with elevated privileges (e.g. a set-user-ID or set-group-ID
program), so that a variable in an attacker-controlled environment
cannot influence a privileged host. On libcs where privilege can't be
checked (anything other than glibc or the BSDs/macOS), it fails secure
and returns null, so those environment variables are ignored until a
branch for the platform is added.
Switch the printf logging backend to read ORC_RT_LOG and
ORC_RT_LOG_OUTPUT through secureGetenv, so a redirected log file or
level can't be forced via the environment in a privileged process.
Note that running the ORC runtime in a process with elevated privileges
is extremely risky (since the JIT'd code will typically inherit these
elevated privileges), and expected to be rare. Exercise extreme caution
with such setups.
Commit: a259ffb45c84f930d3ad810dd4ddde50c2667766
https://github.com/llvm/llvm-project/commit/a259ffb45c84f930d3ad810dd4ddde50c2667766
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/minmax-main-opcode-copyables-cost.ll
A llvm/test/Transforms/SLPVectorizer/X86/minmax-main-opcode-copyables.ll
Log Message:
-----------
[SLP][NFC]Add tests for copyables in minmax int intrinsics, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/209021
Commit: 7206149c21b420a3aa5a0c9a78f1a1ad6ff8ed89
https://github.com/llvm/llvm-project/commit/7206149c21b420a3aa5a0c9a78f1a1ad6ff8ed89
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M clang/unittests/Lex/PPMemoryAllocationsTest.cpp
Log Message:
-----------
[NFC][clang] Adjust PPMemoryAllocationsTest threshold for ASan (#209024)
PPMemoryAllocationsTest.PPMacroDefinesAllocations measures the memory
footprint of the preprocessor allocator and asserts a strict threshold
of 130.0 bytes per define.
When built with ASan, the allocator adds redzones to allocations,
which increases the total memory reported by `getTotalMemory()` and
causes the test to fail (reporting ~136.8 bytes per define).
Adjust the threshold to 145.0 bytes per define when built with ASan
(detected via `LLVM_ADDRESS_SANITIZER_BUILD`) to account for this
overhead while maintaining the strict limit for standard builds.
Assisted-by: Gemini
Commit: 97e24c8d1cfd7259733ef4b3476f4429402415fb
https://github.com/llvm/llvm-project/commit/97e24c8d1cfd7259733ef4b3476f4429402415fb
Author: darkbuck <michael.hliao at gmail.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M clang/test/CIR/CodeGenBuiltins/builtin-fpclassify.c
M clang/test/CIR/CodeGenBuiltins/builtin-isfpclass.c
M clang/test/CIR/CodeGenBuiltins/builtin-isinf-sign.c
Log Message:
-----------
[CIR] Fix lit tests after is.fpclass pretty printing. NFC (#209026)
Commit: 715cf355b1324117a4456cd79bd05df39f65643c
https://github.com/llvm/llvm-project/commit/715cf355b1324117a4456cd79bd05df39f65643c
Author: savchart <metaartem at protonmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang-tools-extra/clang-tidy/readability/IdentifierNamingCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/test/clang-tidy/checkers/readability/Inputs/identifier-naming-macro-argument/.clang-tidy
A clang-tools-extra/test/clang-tidy/checkers/readability/Inputs/identifier-naming-macro-argument/include/macro.h
A clang-tools-extra/test/clang-tidy/checkers/readability/Inputs/identifier-naming-macro-argument/subdir/.clang-tidy
A clang-tools-extra/test/clang-tidy/checkers/readability/identifier-naming-macro-argument.cpp
Log Message:
-----------
[clang-tidy] Fix identifier-naming style lookup in macro arguments (#206809)
Problem statement: the var lambda parameter was written inside a macro
argument. The declaration location was treated as a macro location, and
the filename lookup returned an empty filename for that location.
Fix: use a file location for the style lookup. Alternative options
considered were spelling location and expansion location.
Fixes #154957
Assisted-by: GPT
---------
Co-authored-by: Zeyi Xu <mitchell.xu2 at gmail.com>
Co-authored-by: Baranov Victor <bar.victor.2002 at gmail.com>
Commit: 4e15b551e06b188f8280c752b29e13ac53ddb70a
https://github.com/llvm/llvm-project/commit/4e15b551e06b188f8280c752b29e13ac53ddb70a
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M lld/include/lld/Common/BPSectionOrdererBase.inc
M lld/test/ELF/bp-section-orderer.s
M lld/test/MachO/bp-section-orderer-errs.s
Log Message:
-----------
[lld] Report missing --irpgo-profile file instead of asserting (#209028)
When --irpgo-profile names a missing file, takeError() asserts
```
ld.lld: error: No such file or directory
ld.lld: Error.h:686: ... Assertion `!HasError && "Cannot get value when an error exists!"' failed.
```
Check the Expected before use. Fixes #203761
Co-authored-by: Peter Chen J. <peter941221 at gmail.com>
Co-authored-by: Peter Chen J. <peter941221 at gmail.com>
Commit: 5790cc0f6c7f1570f8cca222c19801a6c7c2f076
https://github.com/llvm/llvm-project/commit/5790cc0f6c7f1570f8cca222c19801a6c7c2f076
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/docs/LangRef.md
M llvm/lib/IR/Instructions.cpp
Log Message:
-----------
[IR] Use constant 64-bit indices for Extract/InsertElement (#208996)
The canonical form preferred by instCombine is to use 64-bit values for
constant index in ExtractElement and InsertElement
Commit: ede6a16b1bc4a870ff6180caeb87b727699cd9c1
https://github.com/llvm/llvm-project/commit/ede6a16b1bc4a870ff6180caeb87b727699cd9c1
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
Log Message:
-----------
[PowerPC] Use constant 64-bit indices for Extract/InsertElement (#209015)
The canonical form preferred by instCombine is to use 64-bit values for
constant index in ExtractElement and InsertElement.
Commit: 66e9ac6aeab326e5d4f6e0c1cbdbc31bda5dec0e
https://github.com/llvm/llvm-project/commit/66e9ac6aeab326e5d4f6e0c1cbdbc31bda5dec0e
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
Log Message:
-----------
[InstCombine] Use constant 64-bit indices for InsertElement (#209017)
The canonical form preferred by instCombine is to use 64-bit values for
constant index in InsertElement.
Commit: 83d95d89c520656306130b461252cd0ed9b4f542
https://github.com/llvm/llvm-project/commit/83d95d89c520656306130b461252cd0ed9b4f542
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
Log Message:
-----------
[SimplifyLibCalls] Use constant 64-bit indices for ExtractElement (#209020)
The canonical form preferred by instCombine is to use 64-bit values for
constant index in ExtractElement.
Commit: 3a27d292c353328a9a03422319ff1c0b9264648b
https://github.com/llvm/llvm-project/commit/3a27d292c353328a9a03422319ff1c0b9264648b
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M lld/ELF/MarkLive.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Move markUsedLocalSymbols from Writer to markLive. NFC (#209035)
markUsedLocalSymbols (https://reviews.llvm.org/D77807) sets the USED
flag on local symbols referenced by relocations so that -r/--emit-relocs
with --discard-{locals,all} preserves them in the symbol table.
Move the scan into markLive's !gcSections branch to be closer to
MarkLive::resolveReloc. The scan now iterates sections via relsOrRelas,
handling CREL uniformly, and runs in parallel.
This is a step toward fixing #160789
Commit: 937ac000a69012546d851638b1410cfe9f07980f
https://github.com/llvm/llvm-project/commit/937ac000a69012546d851638b1410cfe9f07980f
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Debuginfod/BuildIDFetcher.cpp
M llvm/lib/HTTP/HTTPClient.cpp
A llvm/test/tools/llvm-debuginfod-find/Inputs/delay_req.py
M llvm/test/tools/llvm-debuginfod-find/headers-winhttp.test
A llvm/test/tools/llvm-debuginfod-find/timeout.test
M llvm/tools/llvm-debuginfod-find/llvm-debuginfod-find.cpp
Log Message:
-----------
[llvm][HTTP] Apply WinHTTP timeout setting after WinHttpOpen (#188969)
`setTimeout()` required the session handle, but it was only created
inside `HTTPClient::perform()`. This patch stores the incoming value and
applies it after the session handle is created with `WinHttpOpen()`.
---------
Co-authored-by: Nerixyz <nerixdev at outlook.de>
Commit: fafd0de9e4a84921cce55ea8c6da05b515006fa2
https://github.com/llvm/llvm-project/commit/fafd0de9e4a84921cce55ea8c6da05b515006fa2
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/copyable-addsub-reorder.ll
Log Message:
-----------
[SLP][NFC]Add a test with incorrect add/sub operands reorder, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/209039
Commit: 2fdc877f7209a32d9632aafe75d2d61199a7089f
https://github.com/llvm/llvm-project/commit/2fdc877f7209a32d9632aafe75d2d61199a7089f
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/copyable-addsub-reorder.ll
Log Message:
-----------
[SLP] Fix miscompile from unsafe operand-order normalization
IsCommutative(MainOp) is also true for a Sub/FSub feeding only
fabs/icmp-eq-0, but that doesn't make every lane swappable: a
converted Add/FAdd lane's operand order is fixed to preserve its
value, and swapping it into a native Sub/FSub's layout negates it.
Re-check each lane before swapping instead of trusting MainOp's.
Fixes #208944
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/209041
Commit: 5485d624eb95bb7a753c6088e452d32d0bd0c03d
https://github.com/llvm/llvm-project/commit/5485d624eb95bb7a753c6088e452d32d0bd0c03d
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M lld/ELF/MarkLive.cpp
M lld/test/ELF/emit-relocs-discard-locals.s
Log Message:
-----------
[ELF] --discard-{locals,all}: mark local symbols referenced by retained non-SHF_ALLOC sections (#209042)
With --gc-sections, mark() does not scan relocations of retained
non-SHF_ALLOC sections, so local symbols referenced only by such
sections (e.g. .L symbols in .debug_str_offsets referenced by
.debug_info) do not get the USED flag.
-r/--emit-relocs with --discard-{locals,all} would discard the symbols
and rewrite relocations to reference the null symbol, corrupting DWARF
in the output. This is common on RISC-V, where
RISCVELFObjectWriter::needsRelocateWithSymbol returns true, but is also
possible on other targets with --reloc-section-sym=none.
Call markUsedLocalSymbols from the retention loop (introduced by
#209035)
to set the flag.
Fix #160789
Commit: 36876394a96b053a03aecacec566eadc292d7053
https://github.com/llvm/llvm-project/commit/36876394a96b053a03aecacec566eadc292d7053
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/test/tools/llvm-debuginfod-find/Inputs/delay_req.py
Log Message:
-----------
[llvm][HTTP] Increase request handler sleep (#209038)
Fixup for
https://github.com/llvm/llvm-project/pull/188969#issuecomment-4952185708.
The issue is likely the same as I described in
https://github.com/llvm/llvm-project/pull/192061#issuecomment-4926882131
where WinHTTP doesn't time out immediately but adds some delay. The fix
here is to increase the sleep in the mock server.
Commit: 65735abd4d0af888840929be6356628a05eaa179
https://github.com/llvm/llvm-project/commit/65735abd4d0af888840929be6356628a05eaa179
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/add-sub-nuw.ll
Log Message:
-----------
[SLP][NFC]Add a test with incorrect nuw propagation in add/sub vectorization, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/209045
Commit: 927878dab67545e7448a82921446e339b6b55f79
https://github.com/llvm/llvm-project/commit/927878dab67545e7448a82921446e339b6b55f79
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/add-sub-nuw.ll
Log Message:
-----------
[SLP] Drop nuw when add/sub interchange negates a nonzero constant
sub nuw X, C requires X u>= C, but add nuw X, -C requires X u< C, so
nuw must always be dropped on interchange.
Fixes #209023
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/209047
Commit: b8d37cbc139a5adcd56611c21850e02600e560f2
https://github.com/llvm/llvm-project/commit/b8d37cbc139a5adcd56611c21850e02600e560f2
Author: David Green <david.green at arm.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h
M llvm/test/CodeGen/AArch64/verify-imm.mir
M llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
Log Message:
-----------
[AArch64] Add an OPERAND_IMM_UINT8 operand type. (#209050)
This helps verify that certain operands are in the correct range, in
this case
0-255.
Commit: 5566928ef0b0788da6582ea3bcc8ab9ae416e80f
https://github.com/llvm/llvm-project/commit/5566928ef0b0788da6582ea3bcc8ab9ae416e80f
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
A llvm/test/Analysis/LoopAccessAnalysis/wide-pointer-index-distance.ll
Log Message:
-----------
[LAA] Bail out of dependence analysis when distance exceeds 64 bits. (#209052)
isDependent extracts the dependence distance into 64 bit integers.
Bail out conservatively when the constant distance or the signed minimum
distance needs more than 64 bits.
Commit: 349542f7e122b8fda1d60f0b37c8f92ad65635d6
https://github.com/llvm/llvm-project/commit/349542f7e122b8fda1d60f0b37c8f92ad65635d6
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
Log Message:
-----------
[VPlan] Add strided access test with disjoint or. (NFC) (#209051)
Currently this is missed by VPlan SCEV due to disjoint OR not being
handled.
Commit: 62377815c4cc03130608158a8d51cc37e4549288
https://github.com/llvm/llvm-project/commit/62377815c4cc03130608158a8d51cc37e4549288
Author: David Green <david.green at arm.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/test/CodeGen/AArch64/verify-imm.mir
M llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
Log Message:
-----------
[AArch64] Add an OPERAND_IMM_UINT5 operand type. (#209057)
This helps verify that certain operands are in the correct range, in
this case
0-31.
Commit: fd6524963bf1ec6b4d2c688337af8f9f41562575
https://github.com/llvm/llvm-project/commit/fd6524963bf1ec6b4d2c688337af8f9f41562575
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
A llvm/test/Transforms/LoopVectorize/outer-loop-atomic.ll
Log Message:
-----------
[VPlan] Handle AtomicRMW/AtomicCmpXchg/Fence in outer loop creation. (#209031)
Teach VPInstruction::getNumOperandsForOpcode about AtomicRMW,
AtomicCmpXchg and Fence, so VPlan construction over an outer loop that
still contains these operations does not crash before later legality
rejects the loop.
Fixes crashes in the added tests.
Commit: bb4aea6303e7470be3ccd37db9398fc9b8f03f50
https://github.com/llvm/llvm-project/commit/bb4aea6303e7470be3ccd37db9398fc9b8f03f50
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
A llvm/test/Analysis/ScalarEvolution/ptrtoint-special-pointers.ll
M llvm/test/Transforms/GVN/ptrtoaddr.ll
A llvm/test/Transforms/IndVarSimplify/AArch64/expand-ptrtoaddr-reuse-ptrtoint.ll
Log Message:
-----------
[SCEV,GVN] Add additional ptrtoaddr tests (NFC) (#209049)
Extend test coverage with files with mixied ptrtoaddr/ptrtoint, as well
as wide pointers.
Extra test coverage for
https://github.com/llvm/llvm-project/pull/180244.
Commit: d036d309eebee3ac0b8077f0cc6e3a318bc0e6ab
https://github.com/llvm/llvm-project/commit/d036d309eebee3ac0b8077f0cc6e3a318bc0e6ab
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M lld/test/MachO/bp-section-orderer-errs.s
Log Message:
-----------
[test] Add REQUIRES: aarch64 (#209058)
Commit: 0188651ae4a0d38f014fc315f182aa813a73dfbe
https://github.com/llvm/llvm-project/commit/0188651ae4a0d38f014fc315f182aa813a73dfbe
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-signed-icmp-const.ll
Log Message:
-----------
[SLP][NFC]Add a test with the incorrect const trunc in signed compare, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/209059
Commit: fe85b5be435add42d83d85e09059ae2e6e0896e4
https://github.com/llvm/llvm-project/commit/fe85b5be435add42d83d85e09059ae2e6e0896e4
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-signed-icmp-const.ll
Log Message:
-----------
[SLP] Fix miscompile from truncating signed icmp constant
getActiveBits() ignores sign, so a positive constant needing the
narrower type's top bit was truncated to a negative value. Use
getSignificantBits() for signed comparisons.
Fixes #209010
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/209061
Commit: 9083925dadb45d99836b75ac0354265d6cbd46ab
https://github.com/llvm/llvm-project/commit/9083925dadb45d99836b75ac0354265d6cbd46ab
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M lld/test/ELF/retain-symbols-file.s
M lld/test/ELF/retain-und.s
Log Message:
-----------
[ELF,test] Modernize --retain-symbols-file tests (#209062)
Switch to llvm-readelf, compact FileCheck directives, and
split-file-style naming. Prepares for a --retain-symbols-file behavior
change.
Commit: b6e77d6af14b6b4d0d98248c1579b1be0194187a
https://github.com/llvm/llvm-project/commit/b6e77d6af14b6b4d0d98248c1579b1be0194187a
Author: Wenju He <wenju.he at intel.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/unittests/ScalableStaticAnalysis/Analyses/OperatorNewDelete/OperatorNewDeletePointersExtractorTest.cpp
Log Message:
-----------
[Clang][Test] Fix -Wctad-maybe-unsupported in OperatorNewDeletePointersExtractorTest.cpp (#209012)
Fix warning: `'std::set' may not intend to support class template
argument deduction [-Wctad-maybe-unsupported]`, which is error under
-Werror.
std::set{*PtrId} does implicitly deduce to std::set<EntityId>, but it
is not explicit or user-defined CATD guide. Opt-in warning
-Wctad-maybe-unsupported flags it as maybe unsafe and unintended. The
warning is enabled at
https://github.com/llvm/llvm-project/blob/9083925dadb4/llvm/cmake/modules/HandleLLVMOptions.cmake#L977
Relates to #206600.
Commit: c847ddf8f18d3edde84fa99bf9d15511a7978cdd
https://github.com/llvm/llvm-project/commit/c847ddf8f18d3edde84fa99bf9d15511a7978cdd
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M lld/ELF/Writer.cpp
M lld/unittests/AsLibELF/CMakeLists.txt
A lld/unittests/AsLibELF/OutputStream.cpp
Log Message:
-----------
[ELF] Write the output to lld::outs() when -o is - (#209064)
When the output file is "-", write the image to lld::outs() (the
stdoutOS
argument of lld::elf::link()) instead of committing the
FileOutputBuffer,
which writes to the process's stdout. This lets lld used as a library
capture
the output in a raw_ostream without an open syscall.
This reimplements the stale #72061 and adds a unittest.
Commit: 7d24dfa5f29e1794e452aadaa27f994f15568763
https://github.com/llvm/llvm-project/commit/7d24dfa5f29e1794e452aadaa27f994f15568763
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M lld/docs/ReleaseNotes.rst
Log Message:
-----------
ReleaseNotes: add lld/ELF notes (#209066)
Summarize `git log origin/release/22.x..main` entries, excluding
cherry-picked notes `git rev-list main..origin/release/22.x -- lld/ELF`,
following the style of my previous release notes.
Commit: c7812f661d843e666c6ab3ab9c4a33b83e930c29
https://github.com/llvm/llvm-project/commit/c7812f661d843e666c6ab3ab9c4a33b83e930c29
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/copyable-repeated-operand-partial-commutativity.ll
Log Message:
-----------
[SLP] Fix crash from repeated operand with mixed commutativity
A value used as both a commutable and non-commutable operand of the
same call got double-counted in dependency tracking, adding a
dependency scheduling never releases and tripping an assertion.
Fixes #209005
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/209067
Commit: 692d89dc02deb30d14bcaa2dbb2ed91ea8f88acd
https://github.com/llvm/llvm-project/commit/692d89dc02deb30d14bcaa2dbb2ed91ea8f88acd
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M lldb/source/Host/freebsd/Host.cpp
Log Message:
-----------
[LLDB][FreeBSD] Fill pgid and sid in ProcessInfo (#209009)
These two fields are required by HostTest.cpp. Although I don't see any
usecase, we add these two fields to prevent failure.
Commit: 461f0b699c8dbcafaec0e4b2d171d42ee05f6999
https://github.com/llvm/llvm-project/commit/461f0b699c8dbcafaec0e4b2d171d42ee05f6999
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M lldb/include/lldb/Host/JSONTransport.h
Log Message:
-----------
[LLDB] Fix use-after-free destroying a Binder from its OnClosed handler (#209019)
transport::Binder::OnClosed() holds m_mutex (a recursive_mutex) while
invoking m_disconnect_handler. In the MCP server, that handler removes
the disconnected client, which owns the transport and therefore the
Binder itself. As a result, the Binder -- and its m_mutex -- are
destroyed while the scoped_lock in OnClosed still holds the lock.
This is a use-after-free everywhere, as the lock guard later unlocks
freed memory.
Move the disconnect handler out of the critical section and release the
lock before invoking it, so the Binder can be safely destroyed without
holding or destroying a locked mutex.
Commit: 171ba71128eec9f1859bb995c597dcff296ee730
https://github.com/llvm/llvm-project/commit/171ba71128eec9f1859bb995c597dcff296ee730
Author: Thrrreeee <shijinrui at bytedance.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M bolt/lib/Rewrite/DWARFRewriter.cpp
M bolt/test/X86/dwarf4-cross-cu-ranges.test
M bolt/test/X86/dwarf5-debug-names-cross-cu.s
Log Message:
-----------
[BOLT] fix DIE traversal incorrect loop termination condition. (#208450)
The DIE traversal loop in partitionCUs() used an incorrect termination
condition, causing it to read past the end of the CU. Fix the loop to
stop at NextCUOffset so traversal no longer runs beyond the unit's
boundary.
Fixed [#208440](https://github.com/llvm/llvm-project/issues/208440).
Commit: e6673bd0377104b681ad9f456f3b7742c8f3a9a9
https://github.com/llvm/llvm-project/commit/e6673bd0377104b681ad9f456f3b7742c8f3a9a9
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
A llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.h
Log Message:
-----------
[SLP][Modularization][NFC] Extract type and constant helpers into SLPUtils (1/3) (#206881)
As we discussed on RFC:
https://discourse.llvm.org/t/modularizing-slpvectorizer-cpp/90922
This patch introduces the SLPVectorizer/ subdirectory and adds
SLPUtils.{h,cpp} under namespace llvm::slpvectorizer, then moves the
type and constant query helpers into it:
- isConstant
- isVectorLikeInstWithConstOps
- isSplat
- allConstant
- allSameBlock
- allSameType
- allSameOpcode
- getNumElements
- getPartNumElems
- getNumElems
- getInsertExtractIndex
- getExtractIndex
Commit: d91a1e88891d9737535198137c73632f57cc629a
https://github.com/llvm/llvm-project/commit/d91a1e88891d9737535198137c73632f57cc629a
Author: Yihan Wang <yronglin777 at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
Log Message:
-----------
[libc++] Switch use llvm-premerge-libcxx-runner (#208928)
Signed-off-by: yronglin <yronglin777 at gmail.com>
Co-authored-by: Aiden Grossman <aidengrossman at google.com>
Commit: d8df9b5e925c580f076779e5cbfe2bffc451c3b6
https://github.com/llvm/llvm-project/commit/d8df9b5e925c580f076779e5cbfe2bffc451c3b6
Author: ejose02 <ejose at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M flang/lib/Semantics/check-call.cpp
A flang/test/Semantics/call48.f90
Log Message:
-----------
[Flang] Fix for the spurious error for VOLATILE actual argument in implicit interface CALL (#192605)
Fixes #191343
Replaced the error with warning. Now it permits calling an external
procedure with implicit interface and passing a volatile argument. There
will be a warning that the procedure should have an explicit interface.
In addition to fixing the VOLATILE error, I updated the semantic check
for the ASYNCHRONOUS attribute. Both attributes were incorrectly
throwing a hard error when used as actual arguments in an implicit
interface call. According to the Fortran 2018 standard, an explicit
interface is only mandatory when the dummy argument has the VOLATILE or
ASYNCHRONOUS attribute. Since the standard doesn't restrict actual
arguments in this scenario, I downgraded both to emit a
-Wimplicit-interface-actual warning instead.
Commit: b1c56fb53a9c76d6b045ede49083b647ae049ffe
https://github.com/llvm/llvm-project/commit/b1c56fb53a9c76d6b045ede49083b647ae049ffe
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt-c/Logging.h
M orc-rt/lib/executor/CMakeLists.txt
A orc-rt/lib/executor/Logging_oslog.cpp
M orc-rt/test/regression/lit.cfg.py
A orc-rt/test/regression/logging/os_log/delivery.test
A orc-rt/test/regression/logging/os_log/lit.local.cfg
A orc-rt/test/regression/logging/os_log/no-printf-output.test
M orc-rt/test/tools/orc-rt-log-check.cpp
Log Message:
-----------
[orc-rt] Add os_log logging backend (Darwin only) (#209081)
Implement the os_log backend, selected with ORC_RT_LOG_BACKEND=os_log.
With this backend selected, the ORC_RT_LOG macros expand at the call
site to os_log_with_type. Each ORC runtime log level maps to an
os_log_type_t (error -> ERROR, warning -> DEFAULT, info -> INFO, debug
-> DEBUG). The compile-time ORC_RT_LOG_LEVEL floor still applies, but
runtime filtering is left to the system (e.g. `log config`), so the
printf backend's ORC_RT_LOG and ORC_RT_LOG_OUTPUT have no effect.
Records go to the "org.llvm.orc-rt" subsystem with the category as the
os_log category. (Per-category handles are created on first use and
cached).
Add regression tests under test/regression/logging/os_log:
no-printf-output.test checks that the backend produces no console
output, and an opt-in delivery test (llvm-lit --param
run-os-log-tests=1) scrapes `log show` to confirm records reach the
expected subsystem and category.
Commit: 9b9f44d1c55ca4f3e8d6d5d9350ef872e000df0a
https://github.com/llvm/llvm-project/commit/9b9f44d1c55ca4f3e8d6d5d9350ef872e000df0a
Author: Kazu Hirata <kazu at google.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
A llvm/include/llvm/ADT/Eytzinger.h
M llvm/unittests/ADT/CMakeLists.txt
A llvm/unittests/ADT/EytzingerTest.cpp
Log Message:
-----------
[ADT] Introduce EytzingerTableSpan (#208885)
This patch introduces EytzingerTableSpan, a non-owning view of a buffer
formatted as a complete binary search tree in Eytzinger (breadth-first)
order.
RFC:
https://discourse.llvm.org/t/rfc-faster-sample-profile-loading/90957/7
Assisted-by: Antigravity
Commit: fd17f88189525a81488294912bff8b9f429585a2
https://github.com/llvm/llvm-project/commit/fd17f88189525a81488294912bff8b9f429585a2
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
Log Message:
-----------
[RISCV][P-ext] Replace RISCVISD::PPAIRE_DB with RISCVISD::PPAIRE. NFC (#208980)
This replaces RISCVISD::PPAIRE_DB with the RISCVISD::PPAIRE added by
#208763.
This adds two CONCAT_VECTORS and two EXTRACT_SUBVECTORs during lowering
instead of waiting until isel to form the GPR pairs.
Commit: 11112ed9b7eb7deb69b97178a0c4921e6222049c
https://github.com/llvm/llvm-project/commit/11112ed9b7eb7deb69b97178a0c4921e6222049c
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M libc/src/__support/CPP/expected.h
M libc/test/src/__support/CPP/CMakeLists.txt
A libc/test/src/__support/CPP/expected_test.cpp
Log Message:
-----------
[libc] Make cpp::expected::operator bool explicit (#208681)
Without explicit, expected<T, E> implicitly converts to bool in all
sorts of unexpected contexts (e.g. `EXPECT_EQ(ErrorOr<int>(47), 1)`),
and also deviates from std::expected in C++23.
While in there, add basic unit tests for expected and unexpected (we
didn't have any tests for this utility yet), and update the file header.
Assisted by Gemini.
Commit: 26e34c6896626f0874a1eface84b8fb25111f4b0
https://github.com/llvm/llvm-project/commit/26e34c6896626f0874a1eface84b8fb25111f4b0
Author: Justin Lebar <justin.lebar at gmail.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/IR/Constants.cpp
M llvm/test/Transforms/TailCallElim/accum_recursion.ll
M llvm/test/Transforms/TailCallElim/tre-minmax-intrinsic.ll
Log Message:
-----------
[IR] Handle vector tys in ConstantExpr::getIntrinsicIdentity for smin/max. (#208367)
The code was using getIntegerBitWidth() when it should have been using
getScalarSizeInBits(). This resulted in an assert in debug builds, and
who-knows-what in opt builds.
Reproducer:
```
define <4 x i32> @f(<4 x i32> %a, i32 %b) {
%c = call <4 x i32> @f(<4 x i32> %a, i32 %b)
%m = call <4 x i32> @llvm.smax.v4i32(<4 x i32> %c, <4 x i32> %a)
ret <4 x i32> %m
}
$ opt -passes=tailcallelim repro.ll
Casting.h:572: Assertion `isa<To>(Val) && "cast<Ty>() argument of
incompatible type!"' failed.
```
Bug found and fixed by Claude Mythos 5.
Commit: 3f80df8698145f0188f305b748e60e70bf942d3d
https://github.com/llvm/llvm-project/commit/3f80df8698145f0188f305b748e60e70bf942d3d
Author: Sergey Shcherbinin <sscherbinin at nvidia.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M bolt/test/X86/match-blocks-with-pseudo-probes-inline.test
M bolt/test/X86/pseudoprobe-decoding-inline.test
M bolt/test/X86/pseudoprobe-decoding-noinline.test
A llvm/test/tools/llvm-profgen/AArch64/aarch64-disassemble-all-features.test
A llvm/test/tools/llvm-profgen/AArch64/lit.local.cfg
A llvm/test/tools/llvm-profgen/ARM/Inputs/etm-opencsd.yaml
A llvm/test/tools/llvm-profgen/ARM/etm-arch.test
A llvm/test/tools/llvm-profgen/ARM/etm-opencsd.test
A llvm/test/tools/llvm-profgen/ARM/lit.local.cfg
R llvm/test/tools/llvm-profgen/Inputs/artificial-branch.perfscript
R llvm/test/tools/llvm-profgen/Inputs/callback-external-addr.perfbin
R llvm/test/tools/llvm-profgen/Inputs/callback-external-addr.perfscript
R llvm/test/tools/llvm-profgen/Inputs/coff-profile.exe
R llvm/test/tools/llvm-profgen/Inputs/coff-profile.pdb
R llvm/test/tools/llvm-profgen/Inputs/coff-profile.perfscript
R llvm/test/tools/llvm-profgen/Inputs/cold-profile-trimming.raw.prof
R llvm/test/tools/llvm-profgen/Inputs/coroutine.perfbin
R llvm/test/tools/llvm-profgen/Inputs/coroutine.perfscript
R llvm/test/tools/llvm-profgen/Inputs/cs-interrupt.perfscript
R llvm/test/tools/llvm-profgen/Inputs/cs-invalid-ret-addr.perfscript
R llvm/test/tools/llvm-profgen/Inputs/cs-preinline-cost.perfbin
R llvm/test/tools/llvm-profgen/Inputs/cs-preinline-cost.perfscript
R llvm/test/tools/llvm-profgen/Inputs/css-pgo-perf.script
R llvm/test/tools/llvm-profgen/Inputs/dap-perf-trace.txt
R llvm/test/tools/llvm-profgen/Inputs/dap-pie.bin
R llvm/test/tools/llvm-profgen/Inputs/dap.bin
R llvm/test/tools/llvm-profgen/Inputs/etm-opencsd.yaml
R llvm/test/tools/llvm-profgen/Inputs/external-address.perfscript
R llvm/test/tools/llvm-profgen/Inputs/filter-ambiguous-profile.prof
R llvm/test/tools/llvm-profgen/Inputs/fs-discriminator-probe.perfbin
R llvm/test/tools/llvm-profgen/Inputs/fs-discriminator-probe.raw.prof
R llvm/test/tools/llvm-profgen/Inputs/fs-discriminator.perfbin
R llvm/test/tools/llvm-profgen/Inputs/fs-discriminator.raw.prof
R llvm/test/tools/llvm-profgen/Inputs/func-split.perfbin
R llvm/test/tools/llvm-profgen/Inputs/func-split.perfscript
R llvm/test/tools/llvm-profgen/Inputs/inline-cs-noprobe.perfbin
R llvm/test/tools/llvm-profgen/Inputs/inline-cs-noprobe.perfscript
R llvm/test/tools/llvm-profgen/Inputs/inline-cs-pseudoprobe.perfbin
R llvm/test/tools/llvm-profgen/Inputs/inline-cs-pseudoprobe.perfscript
R llvm/test/tools/llvm-profgen/Inputs/inline-noprobe.perfbin
R llvm/test/tools/llvm-profgen/Inputs/inline-noprobe.perfscript
R llvm/test/tools/llvm-profgen/Inputs/inline-noprobe2.perfbin
R llvm/test/tools/llvm-profgen/Inputs/inline-noprobe2.perfscript
R llvm/test/tools/llvm-profgen/Inputs/invalid-range.perfscript
R llvm/test/tools/llvm-profgen/Inputs/lbr-perf-for-dap.script
R llvm/test/tools/llvm-profgen/Inputs/missing-dwarf.exe
R llvm/test/tools/llvm-profgen/Inputs/multi-load-segs.perfbin
R llvm/test/tools/llvm-profgen/Inputs/multi-load-segs.perfscript
R llvm/test/tools/llvm-profgen/Inputs/noinline-cs-noprobe.aggperfscript
R llvm/test/tools/llvm-profgen/Inputs/noinline-cs-noprobe.perfbin
R llvm/test/tools/llvm-profgen/Inputs/noinline-cs-noprobe.perfscript
R llvm/test/tools/llvm-profgen/Inputs/noinline-cs-pseudoprobe.aggperfscript
R llvm/test/tools/llvm-profgen/Inputs/noinline-cs-pseudoprobe.perfbin
R llvm/test/tools/llvm-profgen/Inputs/noinline-cs-pseudoprobe.perfscript
R llvm/test/tools/llvm-profgen/Inputs/noinline-tailcall-probe.perfbin
R llvm/test/tools/llvm-profgen/Inputs/noinline-tailcall-probe.perfscript
R llvm/test/tools/llvm-profgen/Inputs/noprobe.aggperfscript
R llvm/test/tools/llvm-profgen/Inputs/noprobe.mmap.perfscript
R llvm/test/tools/llvm-profgen/Inputs/noprobe.perfbin
R llvm/test/tools/llvm-profgen/Inputs/noprobe.perfscript
R llvm/test/tools/llvm-profgen/Inputs/out-of-bounds.raw.prof
R llvm/test/tools/llvm-profgen/Inputs/pie-dap-perf.txt
R llvm/test/tools/llvm-profgen/Inputs/pie-lbr-perf.script
R llvm/test/tools/llvm-profgen/Inputs/profile-density-cs.raw.prof
R llvm/test/tools/llvm-profgen/Inputs/profile-density.raw.prof
R llvm/test/tools/llvm-profgen/Inputs/recursion-compression-noprobe.perfbin
R llvm/test/tools/llvm-profgen/Inputs/recursion-compression-noprobe.perfscript
R llvm/test/tools/llvm-profgen/Inputs/recursion-compression-pseudoprobe-nommap.perfscript
R llvm/test/tools/llvm-profgen/Inputs/recursion-compression-pseudoprobe.perfbin
R llvm/test/tools/llvm-profgen/Inputs/recursion-compression-pseudoprobe.perfscript
R llvm/test/tools/llvm-profgen/Inputs/split-dwarf-single.exe
R llvm/test/tools/llvm-profgen/Inputs/split-dwarf-single.o.yaml
R llvm/test/tools/llvm-profgen/Inputs/split-dwarf-split.dwo.yaml
R llvm/test/tools/llvm-profgen/Inputs/split-dwarf-split.exe
R llvm/test/tools/llvm-profgen/Inputs/symbolize.ll
R llvm/test/tools/llvm-profgen/Inputs/symbolize.perfbin
R llvm/test/tools/llvm-profgen/Inputs/truncated-pseudoprobe.ll
R llvm/test/tools/llvm-profgen/Inputs/truncated-pseudoprobe.perfbin
R llvm/test/tools/llvm-profgen/Inputs/truncated-pseudoprobe.perfscript
R llvm/test/tools/llvm-profgen/Inputs/unique-linkage-name-dwarf.perfbin
R llvm/test/tools/llvm-profgen/Inputs/unique-linkage-name-dwarf.perfscript
R llvm/test/tools/llvm-profgen/Inputs/unique-linkage-name-probe.perfbin
R llvm/test/tools/llvm-profgen/Inputs/unique-linkage-name-probe.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/artificial-branch.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/callback-external-addr.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/callback-external-addr.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/coff-profile.exe
A llvm/test/tools/llvm-profgen/X86/Inputs/coff-profile.pdb
A llvm/test/tools/llvm-profgen/X86/Inputs/coff-profile.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/cold-profile-trimming.raw.prof
A llvm/test/tools/llvm-profgen/X86/Inputs/coroutine.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/coroutine.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/cs-interrupt.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/cs-invalid-ret-addr.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/cs-preinline-cost.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/cs-preinline-cost.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/css-pgo-perf.script
A llvm/test/tools/llvm-profgen/X86/Inputs/dap-perf-trace.txt
A llvm/test/tools/llvm-profgen/X86/Inputs/dap-pie.bin
A llvm/test/tools/llvm-profgen/X86/Inputs/dap.bin
A llvm/test/tools/llvm-profgen/X86/Inputs/external-address.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/filter-ambiguous-profile.prof
A llvm/test/tools/llvm-profgen/X86/Inputs/fs-discriminator-probe.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/fs-discriminator-probe.raw.prof
A llvm/test/tools/llvm-profgen/X86/Inputs/fs-discriminator.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/fs-discriminator.raw.prof
A llvm/test/tools/llvm-profgen/X86/Inputs/func-split.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/func-split.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/inline-cs-noprobe.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/inline-cs-noprobe.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/inline-cs-pseudoprobe.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/inline-cs-pseudoprobe.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/inline-noprobe.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/inline-noprobe.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/inline-noprobe2.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/inline-noprobe2.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/invalid-range.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/lbr-perf-for-dap.script
A llvm/test/tools/llvm-profgen/X86/Inputs/missing-dwarf.exe
A llvm/test/tools/llvm-profgen/X86/Inputs/multi-load-segs.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/multi-load-segs.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/noinline-cs-noprobe.aggperfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/noinline-cs-noprobe.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/noinline-cs-noprobe.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/noinline-cs-pseudoprobe.aggperfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/noinline-cs-pseudoprobe.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/noinline-cs-pseudoprobe.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/noinline-tailcall-probe.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/noinline-tailcall-probe.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/noprobe.aggperfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/noprobe.mmap.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/noprobe.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/noprobe.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/out-of-bounds.raw.prof
A llvm/test/tools/llvm-profgen/X86/Inputs/pie-dap-perf.txt
A llvm/test/tools/llvm-profgen/X86/Inputs/pie-lbr-perf.script
A llvm/test/tools/llvm-profgen/X86/Inputs/profile-density-cs.raw.prof
A llvm/test/tools/llvm-profgen/X86/Inputs/profile-density.raw.prof
A llvm/test/tools/llvm-profgen/X86/Inputs/recursion-compression-noprobe.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/recursion-compression-noprobe.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/recursion-compression-pseudoprobe-nommap.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/recursion-compression-pseudoprobe.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/recursion-compression-pseudoprobe.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/split-dwarf-single.exe
A llvm/test/tools/llvm-profgen/X86/Inputs/split-dwarf-single.o.yaml
A llvm/test/tools/llvm-profgen/X86/Inputs/split-dwarf-split.dwo.yaml
A llvm/test/tools/llvm-profgen/X86/Inputs/split-dwarf-split.exe
A llvm/test/tools/llvm-profgen/X86/Inputs/symbolize.ll
A llvm/test/tools/llvm-profgen/X86/Inputs/symbolize.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/truncated-pseudoprobe.ll
A llvm/test/tools/llvm-profgen/X86/Inputs/truncated-pseudoprobe.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/truncated-pseudoprobe.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/unique-linkage-name-dwarf.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/unique-linkage-name-dwarf.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/unique-linkage-name-probe.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/unique-linkage-name-probe.perfscript
A llvm/test/tools/llvm-profgen/X86/afdo-with-vtable-pie.test
A llvm/test/tools/llvm-profgen/X86/afdo-with-vtable.test
A llvm/test/tools/llvm-profgen/X86/callback-external-addr.test
A llvm/test/tools/llvm-profgen/X86/coff-profile.test
A llvm/test/tools/llvm-profgen/X86/cold-profile-trimming-symbolized.test
A llvm/test/tools/llvm-profgen/X86/cold-profile-trimming.test
A llvm/test/tools/llvm-profgen/X86/context-depth.test
A llvm/test/tools/llvm-profgen/X86/coroutine.test
A llvm/test/tools/llvm-profgen/X86/cs-extbinary.test
A llvm/test/tools/llvm-profgen/X86/cs-external-address.test
A llvm/test/tools/llvm-profgen/X86/cs-interrupt.test
A llvm/test/tools/llvm-profgen/X86/cs-invalid-ret-addr.test
A llvm/test/tools/llvm-profgen/X86/cs-preinline-cost.test
A llvm/test/tools/llvm-profgen/X86/cs-preinline-sample-profile.test
A llvm/test/tools/llvm-profgen/X86/cs-preinline.test
A llvm/test/tools/llvm-profgen/X86/cs-tailcall.test
A llvm/test/tools/llvm-profgen/X86/disassemble.test
A llvm/test/tools/llvm-profgen/X86/etm-non-arm.test
A llvm/test/tools/llvm-profgen/X86/filter-ambiguous-profile.test
A llvm/test/tools/llvm-profgen/X86/fname-canonicalization.test
A llvm/test/tools/llvm-profgen/X86/fs-discriminator-probe.test
A llvm/test/tools/llvm-profgen/X86/fs-discriminator.test
A llvm/test/tools/llvm-profgen/X86/func-split.test
A llvm/test/tools/llvm-profgen/X86/inline-cs-noprobe.test
A llvm/test/tools/llvm-profgen/X86/inline-cs-pseudoprobe.test
A llvm/test/tools/llvm-profgen/X86/inline-force-dwarf.test
A llvm/test/tools/llvm-profgen/X86/inline-noprobe.test
A llvm/test/tools/llvm-profgen/X86/inline-noprobe2.test
A llvm/test/tools/llvm-profgen/X86/inline-probe-afdo.test
A llvm/test/tools/llvm-profgen/X86/inline-pseudoprobe.test
A llvm/test/tools/llvm-profgen/X86/invalid-perfscript.test
A llvm/test/tools/llvm-profgen/X86/invalid-range.test
A llvm/test/tools/llvm-profgen/X86/lit.local.cfg
A llvm/test/tools/llvm-profgen/X86/merge-cold-profile.test
A llvm/test/tools/llvm-profgen/X86/missing-dwarf.test
A llvm/test/tools/llvm-profgen/X86/mmapEvent.test
A llvm/test/tools/llvm-profgen/X86/multi-load-segs.test
A llvm/test/tools/llvm-profgen/X86/noinline-cs-noprobe.test
A llvm/test/tools/llvm-profgen/X86/noinline-cs-pseudoprobe.test
A llvm/test/tools/llvm-profgen/X86/noinline-noprobe.test
A llvm/test/tools/llvm-profgen/X86/noinline-pseudoprobe.test
A llvm/test/tools/llvm-profgen/X86/profile-density.test
A llvm/test/tools/llvm-profgen/X86/pseudo-probe-desc-mismatch.test
A llvm/test/tools/llvm-profgen/X86/pseudoprobe-decoding-discriminator.test
A llvm/test/tools/llvm-profgen/X86/pseudoprobe-decoding.test
A llvm/test/tools/llvm-profgen/X86/recursion-compression-noprobe.test
A llvm/test/tools/llvm-profgen/X86/recursion-compression-pseudoprobe.test
A llvm/test/tools/llvm-profgen/X86/separate-debuginfo-binary.test
A llvm/test/tools/llvm-profgen/X86/split-dwarf.test
A llvm/test/tools/llvm-profgen/X86/symbolize.test
A llvm/test/tools/llvm-profgen/X86/truncated-pseudoprobe.test
A llvm/test/tools/llvm-profgen/X86/update-samples.test
R llvm/test/tools/llvm-profgen/aarch64-disassemble-all-features.test
R llvm/test/tools/llvm-profgen/afdo-with-vtable-pie.test
R llvm/test/tools/llvm-profgen/afdo-with-vtable.test
R llvm/test/tools/llvm-profgen/callback-external-addr.test
R llvm/test/tools/llvm-profgen/coff-profile.test
R llvm/test/tools/llvm-profgen/cold-profile-trimming-symbolized.test
R llvm/test/tools/llvm-profgen/cold-profile-trimming.test
R llvm/test/tools/llvm-profgen/context-depth.test
R llvm/test/tools/llvm-profgen/coroutine.test
R llvm/test/tools/llvm-profgen/cs-extbinary.test
R llvm/test/tools/llvm-profgen/cs-external-address.test
R llvm/test/tools/llvm-profgen/cs-interrupt.test
R llvm/test/tools/llvm-profgen/cs-invalid-ret-addr.test
R llvm/test/tools/llvm-profgen/cs-preinline-cost.test
R llvm/test/tools/llvm-profgen/cs-preinline-sample-profile.test
R llvm/test/tools/llvm-profgen/cs-preinline.test
R llvm/test/tools/llvm-profgen/cs-tailcall.test
R llvm/test/tools/llvm-profgen/disassemble.test
R llvm/test/tools/llvm-profgen/etm-arch.test
R llvm/test/tools/llvm-profgen/etm-opencsd.test
R llvm/test/tools/llvm-profgen/filter-ambiguous-profile.test
R llvm/test/tools/llvm-profgen/fname-canonicalization.test
R llvm/test/tools/llvm-profgen/fs-discriminator-probe.test
R llvm/test/tools/llvm-profgen/fs-discriminator.test
R llvm/test/tools/llvm-profgen/func-split.test
R llvm/test/tools/llvm-profgen/inline-cs-noprobe.test
R llvm/test/tools/llvm-profgen/inline-cs-pseudoprobe.test
R llvm/test/tools/llvm-profgen/inline-force-dwarf.test
R llvm/test/tools/llvm-profgen/inline-noprobe.test
R llvm/test/tools/llvm-profgen/inline-noprobe2.test
R llvm/test/tools/llvm-profgen/inline-probe-afdo.test
R llvm/test/tools/llvm-profgen/inline-pseudoprobe.test
R llvm/test/tools/llvm-profgen/invalid-perfscript.test
R llvm/test/tools/llvm-profgen/invalid-range.test
M llvm/test/tools/llvm-profgen/lit.local.cfg
R llvm/test/tools/llvm-profgen/merge-cold-profile.test
R llvm/test/tools/llvm-profgen/missing-dwarf.test
R llvm/test/tools/llvm-profgen/mmapEvent.test
R llvm/test/tools/llvm-profgen/multi-load-segs.test
R llvm/test/tools/llvm-profgen/noinline-cs-noprobe.test
R llvm/test/tools/llvm-profgen/noinline-cs-pseudoprobe.test
R llvm/test/tools/llvm-profgen/noinline-noprobe.test
R llvm/test/tools/llvm-profgen/noinline-pseudoprobe.test
R llvm/test/tools/llvm-profgen/profile-density.test
R llvm/test/tools/llvm-profgen/pseudo-probe-desc-mismatch.test
R llvm/test/tools/llvm-profgen/pseudoprobe-decoding-discriminator.test
R llvm/test/tools/llvm-profgen/pseudoprobe-decoding.test
R llvm/test/tools/llvm-profgen/recursion-compression-noprobe.test
R llvm/test/tools/llvm-profgen/recursion-compression-pseudoprobe.test
R llvm/test/tools/llvm-profgen/separate-debuginfo-binary.test
R llvm/test/tools/llvm-profgen/split-dwarf.test
R llvm/test/tools/llvm-profgen/symbolize.test
R llvm/test/tools/llvm-profgen/truncated-pseudoprobe.test
R llvm/test/tools/llvm-profgen/update-samples.test
Log Message:
-----------
[llvm-profgen][test] Split tests by target architecture (#207724)
The top-level llvm-profgen lit configuration previously disabled the
entire test directory unless the X86 target was registered. As a result,
target-independent tests and tests for ARM and AArch64 also implicitly
depended on X86.
Split target-specific tests and inputs into X86, ARM, and AArch64
directories with per-directory lit.local.cfg files. Leave help.test at
the top level because it is target-independent. Existing X86 tests
remain guarded by X86 and run as before, while ARM and AArch64 tests no
longer require the X86 target. The X86 non-ARM ETM rejection case also
no longer requires the ARM target; it only requires X86 and OpenCSD.
Split the former etm-arch.test into ARM/etm-arch.test, containing the
two ARM-specific checks, and X86/etm-non-arm.test, containing the
existing X86 rejection check. The tested inputs and expected diagnostics
are preserved.
Update match-blocks-with-pseudo-probes-inline.test,
pseudoprobe-decoding-inline.test, and pseudoprobe-decoding-noinline.test
in BOLT to refer to the relocated X86 inputs. All other llvm-profgen
tests and inputs are pure renames.
This does not change llvm-profgen runtime behavior; it only removes
unnecessary cross-target dependencies from its test suite.
This is a preparatory change for extending llvm-profgen profiling
support to AArch64 and for introducing the universal profile-guided
automatic software loop data prefetcher described in the RFC:
https://discourse.llvm.org/t/rfc-universal-profile-guided-automatic-software-loop-data-prefetcher-for-llvm/90916
Commit: 6e7afc10170d711659cbbf0dc25e81f457bda409
https://github.com/llvm/llvm-project/commit/6e7afc10170d711659cbbf0dc25e81f457bda409
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt-c/Logging.h
Log Message:
-----------
[orc-rt] Remove doxygen comments from logging implemenetation APIs (#209086)
These APIs are intended for internal consumption by the ORC runtime's
logging system: plain comments are more appropriate here than doxygen
comments.
Commit: 2bcb848904ae3a2bd7bd3bfb8a8f562529ccb318
https://github.com/llvm/llvm-project/commit/2bcb848904ae3a2bd7bd3bfb8a8f562529ccb318
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt-c/Logging.h
Log Message:
-----------
[orc-rt] Require ORC_RT_LOG format strings to be string literals (#209090)
os_log needs the format string as a literal (it builds format metadata
at the call site), while the none and printf backends accept a runtime
const char*. That mismatch let a non-literal format compile on
none/printf and fail only on an os_log build. Enforce the literal
requirement uniformly in the ORC_RT_LOG macro via an unevaluated
sizeof("" ...) check, so it is caught at the call site on every backend.
Commit: a0f98011c4a82aab540fe9efa68aafb251a3b1b7
https://github.com/llvm/llvm-project/commit/a0f98011c4a82aab540fe9efa68aafb251a3b1b7
Author: Sam Elliott <aelliott at qti.qualcomm.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVMacroFusion.td
M llvm/test/CodeGen/RISCV/features-info.ll
A llvm/test/CodeGen/RISCV/xqci-macro-fusions.mir
Log Message:
-----------
[RISCV] Fuse QC_E_LI to Loads/Store (#208134)
The QC Access relocations require the `qc.e.li` to be adjacent to its
load/store. This ensures that happens, and allows more relaxation
opportunities.
Commit: fb8c7da5b86b9911e1ae677e147bead6e9b115b8
https://github.com/llvm/llvm-project/commit/fb8c7da5b86b9911e1ae677e147bead6e9b115b8
Author: Matthias Wippich <mfwippich at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/include/clang/Basic/IdentifierTable.h
M clang/include/clang/Basic/TokenKinds.h
Log Message:
-----------
[clang][NFC] move TokenKey to TokenKinds.h (#208867)
This patch moves the `TokenKey` enum closer to where it's actually used.
This is in preparation to generate it from tablegen once the definition
has been moved.
Commit: ca970f3bb3ce41365dfc85049db44489c88cb0a5
https://github.com/llvm/llvm-project/commit/ca970f3bb3ce41365dfc85049db44489c88cb0a5
Author: Luke Lau <luke at igalia.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/test/Transforms/LoopVectorize/simplify-reverse-reverse.ll
Log Message:
-----------
[VPlan] Simplify reverses through unary ops (fneg) (#208257)
By marking fneg as elementwise
Commit: f97cdc4aaad6990f6c9adfad50f67acf9c5349ac
https://github.com/llvm/llvm-project/commit/f97cdc4aaad6990f6c9adfad50f67acf9c5349ac
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPC.td
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h
M llvm/test/Transforms/Inline/PowerPC/inline-target-attr.ll
Log Message:
-----------
[PowerPC] Specify inlining behavior in TableGen (#206938)
Remove the custom areInlineCompatible() implementation and specify the
inlining behavior in TableGen instead.
I've tried to classify these to the best of my ability. Most features
stay at InlineDefault with the usual "caller can have more features than
callee" semantics. Tuning features are InlineIgnore. This includes all
the directive features, which, as far as I can tell, are only used for
tuning heuristics.
I also marked a few InlineMustMatch/InlineInverse, though I'm not
particularly confident on which ones are required to match.
Commit: 2119e359b1f968da94ff27a4078d569e18903aef
https://github.com/llvm/llvm-project/commit/2119e359b1f968da94ff27a4078d569e18903aef
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M lld/ELF/LinkerScript.cpp
A lld/test/ELF/gnu-build-attributes.s
Log Message:
-----------
[lld][ELF] Concatenate .gnu.build.attributes.* sections (#208737)
ld.bfd/ld.gold have been concatenating the GNU build attribute sections
since 2018:
https://gitlab.com/gnutools/binutils-gdb/-/commit/7d8a31665739412395f6dd370d2279acd322e78e
Do the same in LLD. These do not have a dedicated section type or flags,
so this is handled by the name-based logic. (Peculiarly, there used to
be SHF_GNU_BUILD_NOTE, but it was removed again.)
Not concatenating these results in a huge number of sections, which
breaks tools like `file`.
Commit: 56e62e539eb65ebe4ec9fc6de0328fea21ae86fd
https://github.com/llvm/llvm-project/commit/56e62e539eb65ebe4ec9fc6de0328fea21ae86fd
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
M llvm/test/CodeGen/WebAssembly/simd-arith.ll
M llvm/test/CodeGen/WebAssembly/simd-relaxed-fmax.ll
M llvm/test/CodeGen/WebAssembly/simd-relaxed-fmin.ll
M llvm/test/CodeGen/WebAssembly/vector-reduce.ll
Log Message:
-----------
[WebAssembly] Use generic pseudo_fmin/pseudo_fmax opcodes (#208454)
The pmin/pmax instructions are equivalent to these with operands
swapped.
The existing matching code for these instructions was incorrect, because
it failed to handle signed zeros and NaNs properly. You can't treat
strict and non-strict comparisons the same in this context.
Commit: 32f3f9dfce7ba9042ebfe7b42e72139454d29672
https://github.com/llvm/llvm-project/commit/32f3f9dfce7ba9042ebfe7b42e72139454d29672
Author: ayrai-gb <ayrai at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/X86/propagate_ir_flags.ll
Log Message:
-----------
[SLP][NFC] Pre-commit tests for select IR-flag/metadata propagation (#208150)
Pre-commits regression tests for an upcoming SLPVectorizer fix (see
#207982). These IR shapes are currently vectorized by SLP, and the
vectorization is functionally correct but when a bundle of
scalar`select` instructions is vectorized, the resulting vector `select`
drops the fast-math flags (and other IR flags/metadata such as
`!unpredictable`) that were common to every scalar lane.
This NFC patch records the current (buggy) behavior so that the
follow-up fix's diff is limited to the behavioural change: `select_nnan`
currently loses `nnan` on the vectorized select, while
`select_not_all_nnan` (one lane missing `nnan`) correctly has none.
Co-authored-by: Ayush Rai <Ayush.Rai at amd.com>
Commit: 2de67c330a9739e559f88de9874d4cba3ffc50ca
https://github.com/llvm/llvm-project/commit/2de67c330a9739e559f88de9874d4cba3ffc50ca
Author: David Green <david.green at arm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
M llvm/test/CodeGen/AArch64/peephole-insert-subreg.mir
M llvm/test/CodeGen/AArch64/peephole-insvigpr.mir
Log Message:
-----------
[AArch64] Clear kill flags from visitINSvi64lane (#209096)
If we replace a reg, we can have more uses meaning the kill flags are no
longer
valid. Make sure we remove them in case.
Commit: f48baca733790625d08b7bbfb64ada65516c06f3
https://github.com/llvm/llvm-project/commit/f48baca733790625d08b7bbfb64ada65516c06f3
Author: Alon Filler <alonfiller at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M lld/docs/NewLLD.rst
Log Message:
-----------
[Docs][NFC] Fix a few typos in NewLLD.rst (#193569)
Commit: c47d1cf955f607fea1d089b9e05aedf8867231ff
https://github.com/llvm/llvm-project/commit/c47d1cf955f607fea1d089b9e05aedf8867231ff
Author: jeanPerier <jperier at nvidia.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIRTypes.td
M flang/lib/Optimizer/Dialect/FIRType.cpp
A flang/test/Fir/derived-type-aliases.fir
Log Message:
-----------
[flang][FIR] implement asm alias interface for fir.type under option (#208665)
FIR is extremely verbose with derived types because the type lists all
the component names and types, so in case of nested derived type, the
type length in the assembly may grow over thousands of characters.
This patch implements the `getAlias` that allows using the fir.type name
as the MLIR type alias. This significantly reduce the IR size in
application with derived type.
I am planning to enable this by default, but there will be some churn in
the lit test, so I am first adding it under a developer option.
Assisted-by: Cursor
Commit: 3a61e727bc056024bdf4960e914ec6651fd41a72
https://github.com/llvm/llvm-project/commit/3a61e727bc056024bdf4960e914ec6651fd41a72
Author: Simon Tatham <simon.tatham at arm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMFrameLowering.cpp
M llvm/lib/Target/ARM/ARMMachineFunctionInfo.h
M llvm/test/CodeGen/ARM/estimate-size-copy.mir
Log Message:
-----------
[ARM][Thumb1] Improve EstimateFunctionSizeInBytes accuracy (#203318)
The estimate of a function size now includes (what I hope are) upper
bounds on the size of the prologue and epilogue; adds size estimates for
some pseudo-instructions that were previously counted as 0; and
increases the estimates for things that were previously optimistic, such
as assuming no constant pool entry ever needs to be duplicated. The
estimation function is also passed extra information to use for
adjusting its estimates, such as the BigFrameOffsets flag which makes
some pseudos have much longer expansions.
Background:
EstimateFunctionSizeInBytes is supposed to estimate how large a Thumb1
function will end up, in advance of actually doing the full code
generation. It must overestimate rather than underestimating, because
large functions need a special precaution (namely, making sure LR is
stacked, so that BL can be used for an intra-function long branch). In
multiple cases recently it has underestimated, leading to a crash later
in code generation, when ARMConstantIslandsPass needs to insert an
intra-function BL and finds that it isn't safe to corrupt LR.
Discussion on Discourse suggested that it's OK to overestimate by quite
a large factor, because any significantly large function won't be badly
impacted by a push of LR that turns out to be unnecessary. The main
place where we want to leave out those unnecessary pushes is _really_
small leaf functions, where the extra push and pop might be a
significant fraction of the whole call.
Commit: 1651159f32cfcf82ecbb364dbf879e97b53d8060
https://github.com/llvm/llvm-project/commit/1651159f32cfcf82ecbb364dbf879e97b53d8060
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M mlir/tools/mlir-irdl-to-cpp/CMakeLists.txt
M mlir/tools/mlir-src-sharder/CMakeLists.txt
Log Message:
-----------
[MLIR] Install missing standalone helper tools (#205066)
Standalone MLIR installs CMake package files that can reference helper
executables needed by downstream builds. Most helper tools already have
install paths available through existing LLVM tool and utility install
options, but `mlir-src-sharder` does not pass an install destination to
`add_tablegen` and `mlir-irdl-to-cpp` does not define an install rule.
Install those two missing helpers.
Co-authored-by: Luca Fancellu <luca.fancellu at arm.com>
Commit: 6e8a4ce8343f2d489f5ecdca5cd443a584f77e71
https://github.com/llvm/llvm-project/commit/6e8a4ce8343f2d489f5ecdca5cd443a584f77e71
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M lldb/docs/resources/build.md
Log Message:
-----------
[lldb][docs] Make it clear that we require SWIG >= 4 (#208687)
We said this in "Preliminaries", but later had a note about SWIG < 4. So
if you hadn't read
the first part properly, it looked like we allow < 4.
We do not, so I've removed the note about < 4 and
added SWIG to the "Optional Dependencies" table
for extra emphasis.
Commit: cec7cf4c3dd71068495245111553e4fba3d35c5e
https://github.com/llvm/llvm-project/commit/cec7cf4c3dd71068495245111553e4fba3d35c5e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/bug-deadlanes.ll
M llvm/test/CodeGen/AMDGPU/bug-multi-operands-to-update-after-fold.mir
M llvm/test/CodeGen/AMDGPU/bug-pk-f32-imm-fold.mir
M llvm/test/CodeGen/AMDGPU/bug-sdag-emitcopyfromreg.ll
M llvm/test/CodeGen/AMDGPU/bug-sdag-scheduler-cycle.ll
M llvm/test/CodeGen/AMDGPU/bug-undef-spilled-agpr.mir
M llvm/test/CodeGen/AMDGPU/bug-v4f64-subvector.ll
M llvm/test/CodeGen/AMDGPU/bug-vopc-commute.ll
M llvm/test/CodeGen/AMDGPU/build-vector-insert-elt-infloop.ll
M llvm/test/CodeGen/AMDGPU/build-vector-packed-partial-undef.ll
M llvm/test/CodeGen/AMDGPU/build_vector.gfx11plus.ll
M llvm/test/CodeGen/AMDGPU/build_vector.ll
M llvm/test/CodeGen/AMDGPU/bundle-breaks-phy-liveness.mir
M llvm/test/CodeGen/AMDGPU/bundle-latency.mir
M llvm/test/CodeGen/AMDGPU/bypass-div.ll
M llvm/test/CodeGen/AMDGPU/byval-frame-setup.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage-agpr.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage0.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage1.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage2.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage3.ll
M llvm/test/CodeGen/AMDGPU/call-args-inreg-bfloat.ll
M llvm/test/CodeGen/AMDGPU/call-args-inreg-no-sgpr-for-csrspill.ll
M llvm/test/CodeGen/AMDGPU/call-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/call-c-function.ll
M llvm/test/CodeGen/AMDGPU/call-defs-mode-register.ll
M llvm/test/CodeGen/AMDGPU/call-graph-register-usage.ll
M llvm/test/CodeGen/AMDGPU/call-preserved-registers.ll
M llvm/test/CodeGen/AMDGPU/call-reqd-group-size.ll
M llvm/test/CodeGen/AMDGPU/call-return-types.ll
M llvm/test/CodeGen/AMDGPU/call-skip.ll
M llvm/test/CodeGen/AMDGPU/call-waitcnt.ll
M llvm/test/CodeGen/AMDGPU/call-waw-waitcnt.mir
M llvm/test/CodeGen/AMDGPU/callbr-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/callbr.ll
M llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/captured-frame-index.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/cc-entry.ll
M llvm/test/CodeGen/AMDGPU/cc-inreg-sgpr0-3-mismatch.ll
M llvm/test/CodeGen/AMDGPU/cc-sgpr-limit.ll
M llvm/test/CodeGen/AMDGPU/cc-sgpr-over-limit.ll
M llvm/test/CodeGen/AMDGPU/cc-update.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-flat.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx1030.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-smem.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll
M llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
M llvm/test/CodeGen/AMDGPU/chain-node-divergence-update-crash-issue-173885.ll
M llvm/test/CodeGen/AMDGPU/change-scc-to-vcc.mir
M llvm/test/CodeGen/AMDGPU/check-subtarget-features.ll
M llvm/test/CodeGen/AMDGPU/clamp-modifier.ll
M llvm/test/CodeGen/AMDGPU/clamp.ll
M llvm/test/CodeGen/AMDGPU/clmul.ll
M llvm/test/CodeGen/AMDGPU/cluster-dims.ll
M llvm/test/CodeGen/AMDGPU/cluster-flat-loads-postra.mir
M llvm/test/CodeGen/AMDGPU/cluster-flat-loads.mir
M llvm/test/CodeGen/AMDGPU/cluster_stores.ll
M llvm/test/CodeGen/AMDGPU/cmp_shrink.mir
M llvm/test/CodeGen/AMDGPU/coalesce-copy-to-agpr-to-av-registers.mir
M llvm/test/CodeGen/AMDGPU/coalesce-identity-copies-undef-subregs.mir
M llvm/test/CodeGen/AMDGPU/coalesce-into-dead-subreg-copies.mir
M llvm/test/CodeGen/AMDGPU/coalesce-liveout-undef-copy.mir
M llvm/test/CodeGen/AMDGPU/coalesce-vgpr-alignment.ll
M llvm/test/CodeGen/AMDGPU/coalescer-avoid-coalesce-class-with-no-registers.ll
M llvm/test/CodeGen/AMDGPU/coalescer-avoid-coalesce-class-with-no-registers.mir
M llvm/test/CodeGen/AMDGPU/coalescer-extend-pruned-subrange.mir
M llvm/test/CodeGen/AMDGPU/coalescer-remat-dead-use.mir
M llvm/test/CodeGen/AMDGPU/coalescer-removepartial-extend-undef-subrange.mir
M llvm/test/CodeGen/AMDGPU/coalescer-subranges-another-copymi-not-live.mir
M llvm/test/CodeGen/AMDGPU/coalescer-subranges-another-prune-error.mir
M llvm/test/CodeGen/AMDGPU/coalescer-subranges-prune-kill-copy.mir
M llvm/test/CodeGen/AMDGPU/coalescer-undef-subreg-use-invalid-lanemask.mir
M llvm/test/CodeGen/AMDGPU/coalescer-with-subregs-bad-identical.mir
M llvm/test/CodeGen/AMDGPU/coalescer_distribute.ll
M llvm/test/CodeGen/AMDGPU/coalescing-subreg-was-undef-but-became-def.mir
M llvm/test/CodeGen/AMDGPU/coalescing-with-subregs-in-loop-bug.mir
M llvm/test/CodeGen/AMDGPU/coalescing_makes_lanes_undef.mir
M llvm/test/CodeGen/AMDGPU/code-object-v3.ll
M llvm/test/CodeGen/AMDGPU/code-size-estimate-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/code-size-estimate.ll
M llvm/test/CodeGen/AMDGPU/code-size-estimate.mir
M llvm/test/CodeGen/AMDGPU/codegen-internal-only-func.ll
M llvm/test/CodeGen/AMDGPU/codegen-prepare-addrmode-sext.ll
M llvm/test/CodeGen/AMDGPU/codegen-prepare-addrspacecast-non-null-vector.ll
M llvm/test/CodeGen/AMDGPU/codegen-prepare-addrspacecast-non-null.ll
M llvm/test/CodeGen/AMDGPU/coexec-rewrite-mfma.ll
M llvm/test/CodeGen/AMDGPU/coexec-sched-effective-stall.mir
M llvm/test/CodeGen/AMDGPU/coexec-sched-flavor-classification.mir
M llvm/test/CodeGen/AMDGPU/coexec-sched-warning.mir
M llvm/test/CodeGen/AMDGPU/coexec-scheduler.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/combine-add-zext-xor.ll
M llvm/test/CodeGen/AMDGPU/combine-cond-add-sub.ll
M llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps.ll
M llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps_nnan.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (9) (#208893)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: 6e42e25efa9856d360fb38ef3a6e7a7c3334dd33
https://github.com/llvm/llvm-project/commit/6e42e25efa9856d360fb38ef3a6e7a7c3334dd33
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/combine-ftrunc.ll
M llvm/test/CodeGen/AMDGPU/combine-vload-extract.ll
M llvm/test/CodeGen/AMDGPU/commute-compares-scalar-float.ll
M llvm/test/CodeGen/AMDGPU/commute-frame-index-operand.mir
M llvm/test/CodeGen/AMDGPU/commute-op-sel.mir
M llvm/test/CodeGen/AMDGPU/commute-shifts.ll
M llvm/test/CodeGen/AMDGPU/commute-vop3.mir
M llvm/test/CodeGen/AMDGPU/compute-known-bits-nofpclass.ll
M llvm/test/CodeGen/AMDGPU/computeKnownBits-scalar-to-vector-crash.ll
M llvm/test/CodeGen/AMDGPU/computeNumSignBits-mul.ll
M llvm/test/CodeGen/AMDGPU/concat_vectors.ll
M llvm/test/CodeGen/AMDGPU/consecutive-loads-in-branch.ll
M llvm/test/CodeGen/AMDGPU/constant-address-space-32bit.ll
M llvm/test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir
M llvm/test/CodeGen/AMDGPU/constant-fold-mi-operands.ll
M llvm/test/CodeGen/AMDGPU/constrained-shift.ll
M llvm/test/CodeGen/AMDGPU/convergence-laneops.ll
M llvm/test/CodeGen/AMDGPU/convergence-tokens.ll
M llvm/test/CodeGen/AMDGPU/copy-hoist-no-spills.ll
M llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll
M llvm/test/CodeGen/AMDGPU/copy-overlap-sgpr-kill.mir
M llvm/test/CodeGen/AMDGPU/copy-overlap-vgpr-kill.mir
M llvm/test/CodeGen/AMDGPU/copy-phys-reg-implicit-operand-kills-subregs.mir
M llvm/test/CodeGen/AMDGPU/copy-to-reg-frameindex.ll
M llvm/test/CodeGen/AMDGPU/copy-to-reg-scc-clobber.ll
M llvm/test/CodeGen/AMDGPU/copy-to-reg.ll
M llvm/test/CodeGen/AMDGPU/copy-vgpr-clobber-spill-vgpr.mir
M llvm/test/CodeGen/AMDGPU/copy_phys_vgpr64.mir
M llvm/test/CodeGen/AMDGPU/copy_to_scc.ll
M llvm/test/CodeGen/AMDGPU/copysign-simplify-demanded-bits.ll
M llvm/test/CodeGen/AMDGPU/copysign-to-disjoint-or-combine.ll
M llvm/test/CodeGen/AMDGPU/couldnt-join-subrange-3.mir
M llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
M llvm/test/CodeGen/AMDGPU/cse-convergent.ll
M llvm/test/CodeGen/AMDGPU/cse-phi-incoming-val.ll
M llvm/test/CodeGen/AMDGPU/csr-gfx10.ll
M llvm/test/CodeGen/AMDGPU/csr-sgpr-spill-live-ins.mir
M llvm/test/CodeGen/AMDGPU/ctls.ll
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_poison.ll
M llvm/test/CodeGen/AMDGPU/ctpop.ll
M llvm/test/CodeGen/AMDGPU/ctpop16.ll
M llvm/test/CodeGen/AMDGPU/ctpop64.ll
M llvm/test/CodeGen/AMDGPU/cttz.ll
M llvm/test/CodeGen/AMDGPU/cttz_zero_poison.ll
M llvm/test/CodeGen/AMDGPU/cube.ll
M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/cvt_flr_i32_f32.ll
M llvm/test/CodeGen/AMDGPU/cvt_rpi_i32_f32.ll
M llvm/test/CodeGen/AMDGPU/d16-write-vgpr32.ll
M llvm/test/CodeGen/AMDGPU/dag-divergence-atomic.ll
M llvm/test/CodeGen/AMDGPU/dag-divergence.ll
M llvm/test/CodeGen/AMDGPU/dag-preserve-disjoint-flag.ll
M llvm/test/CodeGen/AMDGPU/dagcomb-extract-vec-elt-different-sizes.ll
M llvm/test/CodeGen/AMDGPU/dagcomb-mullohi.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fma-crash.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-reassociate-multi-memop.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-select.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-setcc-select.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-v1i8-extractvecelt-crash.ll
M llvm/test/CodeGen/AMDGPU/dbg-info-inline-at.ll
M llvm/test/CodeGen/AMDGPU/dbg-value-ends-sched-region.mir
M llvm/test/CodeGen/AMDGPU/dbg-value-starts-sched-region.mir
M llvm/test/CodeGen/AMDGPU/dead-frame-index-dbg-value.ll
M llvm/test/CodeGen/AMDGPU/dead-lane.mir
M llvm/test/CodeGen/AMDGPU/dead-machine-elim-after-dead-lane.ll
M llvm/test/CodeGen/AMDGPU/dead_bundle.mir
M llvm/test/CodeGen/AMDGPU/dead_copy.mir
M llvm/test/CodeGen/AMDGPU/debug-frame.ll
M llvm/test/CodeGen/AMDGPU/debug-independence-dead-mi-elimination.mir
M llvm/test/CodeGen/AMDGPU/debug-independence-exec-masking.mir
M llvm/test/CodeGen/AMDGPU/debug-value-scheduler-crash.mir
M llvm/test/CodeGen/AMDGPU/debug-value-scheduler-liveins.mir
M llvm/test/CodeGen/AMDGPU/debug-value-scheduler.mir
M llvm/test/CodeGen/AMDGPU/debug.ll
M llvm/test/CodeGen/AMDGPU/default-flat-work-group-size-overrides-waves-per-eu.ll
M llvm/test/CodeGen/AMDGPU/direct-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/disable_form_clauses.ll
M llvm/test/CodeGen/AMDGPU/div-rem-by-constant-64.ll
M llvm/test/CodeGen/AMDGPU/div-rem-fast-path.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/diverge-extra-formal-args.ll
M llvm/test/CodeGen/AMDGPU/diverge-interp-mov-lower.ll
M llvm/test/CodeGen/AMDGPU/diverge-switch-default.ll
M llvm/test/CodeGen/AMDGPU/divergence-at-use.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-abs.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-buildvector.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-negsubinlineconst.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-xnor.ll
M llvm/test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll
M llvm/test/CodeGen/AMDGPU/divrem24-assume.ll
M llvm/test/CodeGen/AMDGPU/do-not-fold-copy.mir
M llvm/test/CodeGen/AMDGPU/dpp_combine-true16.mir
M llvm/test/CodeGen/AMDGPU/dpp_combine_gfx11.mir
M llvm/test/CodeGen/AMDGPU/dpp_combine_gfx1250.mir
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (10) (#208894)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: 9e8b030aa80b78abaa054b5f75c36f51d1995088
https://github.com/llvm/llvm-project/commit/9e8b030aa80b78abaa054b5f75c36f51d1995088
Author: Hugo Trachino <hugo.trachino at huawei.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/test/Dialect/Linalg/flatten-elementwise.mlir
M mlir/test/Dialect/Linalg/flatten-unsupported.mlir
Log Message:
-----------
[MLIR][Linalg] Fix FlattenElementwiseOp on broadcasted linalgs (#207005)
Applying FlattenElementwiseLinalgOp on Broadcasted linalg would break.
This transformation is not valid for those usecase, so I added a
condition to exit gracefully instead.
Commit: abd72b0eb7807a98c261a6cac35a969f954a76cd
https://github.com/llvm/llvm-project/commit/abd72b0eb7807a98c261a6cac35a969f954a76cd
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
A offload/test/offloading/fortran/target-teams-if-runtime-init.f90
M openmp/device/src/Kernel.cpp
Log Message:
-----------
[OpenMP] Publish target-init team state with acq_rel barrier (#208701)
In __kmpc_target_init, thread 0 initializes the team state in LDS
(HasThreadState = 0, ThreadStates = nullptr) and then releases the other
threads with synchronize::threadsAligned(atomic::relaxed). Because the
relaxed ordering emits no memory fence, the initializing LDS stores are
not guaranteed to be visible to the worker threads before they proceed.
A worker thread can then read the uninitialized team state and produce
wrong results or crash. This is the flow that causes the race as I
understand it.
```
__kmpc_target_init (Kernel.cpp:107)
-> initializeRuntime (Kernel.cpp:38)
-> state::init (State.cpp:286)
-> TeamState.init(IsSPMD) (State.cpp:295)
-> HasThreadState = false (State.cpp:248) // <-- the value later read stale
ThreadStates = nullptr (State.cpp:296)
-> synchronize::threadsAligned(atomic::relaxed) (Kernel.cpp:115) // <-- insufficient barrier:
// relaxed emits no fence, so the state stores above are not published to the other threads
... worker threads continue past the barrier ...
__kmpc_parallel_60 (Parallelism.cpp:143)
if (OMP_UNLIKELY(!if_expr || state::HasThreadState || ...)) (Parallelism.cpp:158)
^ reads HasThreadState from LDS; a stale/unpublished value (!= 0)
diverts the worker onto the wrong (serialized) path
```
The fix changes the barrier at Kernel.cpp:115 from atomic::relaxed to
atomic::acq_rel so that the memory fences are emitted.
Reproducing the problem requires an `if` clause with a non-constant
condition on the target region. The worker's read of HasThreadState
originates from the serialized-region check in __kmpc_parallel_60. When
the `if` condition is constant (or absent), the optimizer can prove that
branch is dead and eliminates the HasThreadState load entirely, so the
race has nothing to observe. A non-constant `if` keeps if_expr, and
hence the LDS read alive, exposing the problem.
I have added a Fortran offload regression test that launches a target
region many times to make the timing-dependent race likely to surface.
Fixes https://github.com/llvm/llvm-project/issues/208698.
Assisted-by: Cursor
Commit: 3de2e4a3f11390db0c026f54edf86bd8f6997947
https://github.com/llvm/llvm-project/commit/3de2e4a3f11390db0c026f54edf86bd8f6997947
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/literals.cpp
Log Message:
-----------
[clang][bytecode] diagnose reads from non-constant local variables... (#208990)
... if we're in the bottom frame.
Commit: 13dbff365eabc45fcc26a36ef077f52b6e168347
https://github.com/llvm/llvm-project/commit/13dbff365eabc45fcc26a36ef077f52b6e168347
Author: ShashwathiNavada <shashwathinavada at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
A flang/test/Lower/OpenMP/unroll-partial01.f90
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
A mlir/test/Dialect/OpenMP/cli-unroll-partial.mlir
M mlir/test/Dialect/OpenMP/invalid.mlir
A mlir/test/Target/LLVMIR/openmp-unroll-partial01.mlir
A mlir/test/Target/LLVMIR/openmp-unroll-partial02.mlir
Log Message:
-----------
[Flang][Openmp] Implement support for partial in unroll construct (#206642)
As described in section 9.2.2 of openmp 5.2 spec, the patch implements
support for partial in unroll construct.
Commit: e3e15695a0e9b1acd3a4821cdeea353ce951f5da
https://github.com/llvm/llvm-project/commit/e3e15695a0e9b1acd3a4821cdeea353ce951f5da
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/dpp64_combine.ll
M llvm/test/CodeGen/AMDGPU/dpp64_combine.mir
M llvm/test/CodeGen/AMDGPU/dpp_combine.ll
M llvm/test/CodeGen/AMDGPU/dpp_combine.mir
M llvm/test/CodeGen/AMDGPU/drop-mem-operand-move-smrd.ll
M llvm/test/CodeGen/AMDGPU/ds-alignment.ll
M llvm/test/CodeGen/AMDGPU/ds-combine-large-stride.ll
M llvm/test/CodeGen/AMDGPU/ds-combine-with-dependence.ll
M llvm/test/CodeGen/AMDGPU/ds-negative-offset-addressing-mode-loop.ll
M llvm/test/CodeGen/AMDGPU/ds-read2-write2-debug-info.ll
M llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
M llvm/test/CodeGen/AMDGPU/ds-vectorization-alignment.ll
M llvm/test/CodeGen/AMDGPU/ds_gws_align.ll
M llvm/test/CodeGen/AMDGPU/ds_permute_a_v.ll
M llvm/test/CodeGen/AMDGPU/ds_read2-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/ds_read2.ll
M llvm/test/CodeGen/AMDGPU/ds_read2_offset_order.ll
M llvm/test/CodeGen/AMDGPU/ds_read2_superreg.ll
M llvm/test/CodeGen/AMDGPU/ds_read2st64.ll
M llvm/test/CodeGen/AMDGPU/ds_write2.ll
M llvm/test/CodeGen/AMDGPU/ds_write2_a_v.ll
M llvm/test/CodeGen/AMDGPU/ds_write2st64.ll
M llvm/test/CodeGen/AMDGPU/dst-sel-hazard.mir
M llvm/test/CodeGen/AMDGPU/dual-source-blend-export.ll
M llvm/test/CodeGen/AMDGPU/dummy-regalloc-priority-advisor.mir
M llvm/test/CodeGen/AMDGPU/dumpcode.ll
M llvm/test/CodeGen/AMDGPU/duplicate-attribute-indirect.ll
M llvm/test/CodeGen/AMDGPU/dvgpr-vgpr-count-propagation-direct-chain.ll
M llvm/test/CodeGen/AMDGPU/dvgpr-vgpr-count-propagation-indirect.ll
M llvm/test/CodeGen/AMDGPU/dvgpr-vgpr-count-propagation.ll
M llvm/test/CodeGen/AMDGPU/dvgpr_sym.ll
M llvm/test/CodeGen/AMDGPU/dvgpr_sym_fail_too_many_block_size_16.ll
M llvm/test/CodeGen/AMDGPU/dvgpr_sym_fail_too_many_block_size_16_anon.ll
M llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll
M llvm/test/CodeGen/AMDGPU/dynamic-vgpr-reserve-stack-for-cwsr.ll
M llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
M llvm/test/CodeGen/AMDGPU/early-if-convert-cost.ll
M llvm/test/CodeGen/AMDGPU/early-if-convert.ll
M llvm/test/CodeGen/AMDGPU/early-inline-alias.ll
M llvm/test/CodeGen/AMDGPU/early-inline.ll
M llvm/test/CodeGen/AMDGPU/early-lis-two-address-partial-def.mir
M llvm/test/CodeGen/AMDGPU/early-tailduplicator-nophis.mir
M llvm/test/CodeGen/AMDGPU/early-tailduplicator-terminator.mir
M llvm/test/CodeGen/AMDGPU/early-term.mir
M llvm/test/CodeGen/AMDGPU/eh_frame.ll
M llvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
M llvm/test/CodeGen/AMDGPU/elf-header-flags-sramecc.ll
M llvm/test/CodeGen/AMDGPU/elf-header-flags-xnack.ll
M llvm/test/CodeGen/AMDGPU/elf-header-osabi.ll
M llvm/test/CodeGen/AMDGPU/elf-note-null-terminator.ll
M llvm/test/CodeGen/AMDGPU/elf.ll
M llvm/test/CodeGen/AMDGPU/elf.metadata.ll
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-i32.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-u32.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-mov-b32.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-scalar-bit-ops.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-scalar-scc-clobber.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-select.ll
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-select.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32-wave32.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-u32.mir
M llvm/test/CodeGen/AMDGPU/else.ll
M llvm/test/CodeGen/AMDGPU/emit-high-vgprs.mir
M llvm/test/CodeGen/AMDGPU/empty-function.ll
M llvm/test/CodeGen/AMDGPU/empty-text.ll
M llvm/test/CodeGen/AMDGPU/enable-scratch-only-dynamic-stack.ll
M llvm/test/CodeGen/AMDGPU/entry-function-cfi.mir
M llvm/test/CodeGen/AMDGPU/exec-mask-opt-cannot-create-empty-or-backward-segment.ll
M llvm/test/CodeGen/AMDGPU/expand-atomicrmw-syncscope.ll
M llvm/test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll
M llvm/test/CodeGen/AMDGPU/expand-si-indirect.mir
M llvm/test/CodeGen/AMDGPU/expand-waitcnt-profiling-no-outstanding.ll
M llvm/test/CodeGen/AMDGPU/expand-waitcnt-profiling.ll
M llvm/test/CodeGen/AMDGPU/expert_scheduling_gfx12.mir
M llvm/test/CodeGen/AMDGPU/expert_scheduling_gfx1250.mir
M llvm/test/CodeGen/AMDGPU/export-cluster-postra.mir
M llvm/test/CodeGen/AMDGPU/extend-bit-ops-i16.ll
M llvm/test/CodeGen/AMDGPU/extend-phi-subrange-not-in-parent.mir
M llvm/test/CodeGen/AMDGPU/extend-wwm-virt-reg-liveness.mir
M llvm/test/CodeGen/AMDGPU/extload-private.ll
M llvm/test/CodeGen/AMDGPU/extload.ll
M llvm/test/CodeGen/AMDGPU/extra-lds-size.ll
M llvm/test/CodeGen/AMDGPU/extra-sroa-after-unroll.ll
M llvm/test/CodeGen/AMDGPU/extract-i8-codegen.ll
M llvm/test/CodeGen/AMDGPU/extract-lowbits.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-16bit.ll
M llvm/test/CodeGen/AMDGPU/extract-vector-elt-binop-build-vector.ll
M llvm/test/CodeGen/AMDGPU/extract_subvector_vec4_vec3.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f64.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i16.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i64.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i8.ll
M llvm/test/CodeGen/AMDGPU/fabs-known-signbit-combine-fast-fdiv-lowering.ll
M llvm/test/CodeGen/AMDGPU/fabs.bf16.ll
M llvm/test/CodeGen/AMDGPU/fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fabs.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (11) (#208895)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: b4698d8d53e9b228bd84676ae83637b52a30d0e9
https://github.com/llvm/llvm-project/commit/b4698d8d53e9b228bd84676ae83637b52a30d0e9
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/fadd.ll
M llvm/test/CodeGen/AMDGPU/fadd64.ll
M llvm/test/CodeGen/AMDGPU/fast-ra-kills-vcc.mir
M llvm/test/CodeGen/AMDGPU/fast-regalloc-bundles.mir
M llvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.global.ll
M llvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.private.ll
M llvm/test/CodeGen/AMDGPU/fastregalloc-illegal-subreg-physreg.mir
M llvm/test/CodeGen/AMDGPU/fastregalloc-self-loop-heuristic.mir
M llvm/test/CodeGen/AMDGPU/fastregalloc-sgpr-only.mir
M llvm/test/CodeGen/AMDGPU/fcanonicalize-elimination.bf16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize-elimination.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.bf16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
M llvm/test/CodeGen/AMDGPU/fceil.ll
M llvm/test/CodeGen/AMDGPU/fceil64.ll
M llvm/test/CodeGen/AMDGPU/fcmp.f16.ll
M llvm/test/CodeGen/AMDGPU/fcmp64.ll
M llvm/test/CodeGen/AMDGPU/fconst64.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.bf16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f32.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f64.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.gfx11plus.ll
M llvm/test/CodeGen/AMDGPU/fdiv-nofpexcept.ll
M llvm/test/CodeGen/AMDGPU/fdiv.bf16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f64.ll
M llvm/test/CodeGen/AMDGPU/fdiv.ll
M llvm/test/CodeGen/AMDGPU/fdiv32-to-rcp-folding.ll
M llvm/test/CodeGen/AMDGPU/fdiv_flags.f32.ll
M llvm/test/CodeGen/AMDGPU/fdot2.ll
M llvm/test/CodeGen/AMDGPU/fence-barrier-latency.ll
M llvm/test/CodeGen/AMDGPU/fence-barrier.ll
M llvm/test/CodeGen/AMDGPU/fence-lds-read2-write2.ll
M llvm/test/CodeGen/AMDGPU/ffloor.f64.ll
M llvm/test/CodeGen/AMDGPU/ffloor.ll
M llvm/test/CodeGen/AMDGPU/finalizebundle.mir
M llvm/test/CodeGen/AMDGPU/fix-crash-valu-hazard.ll
M llvm/test/CodeGen/AMDGPU/fix-frame-ptr-reg-copy-livein.ll
M llvm/test/CodeGen/AMDGPU/fix-frame-reg-in-custom-csr-spills.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-fake16.mir
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-gfx12-fake16.mir
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-gfx12-true16.mir
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-true16.mir
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16.mir
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-nondeterminism.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-phi-block-end-iterator-debugloc.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-phi-regression-av-classes.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-phi-regression-issue130646-issue130119.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-phi-regression-issue130646.mir
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-readfirstlane-av-register-regression.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-sgpr32-to-vgpr16.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-vgpr16-to-spgr32.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-wmma-scale-lo256.mir
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-wwm.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-wwm.mir
M llvm/test/CodeGen/AMDGPU/fix-wwm-vgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/flat-address-space.ll
M llvm/test/CodeGen/AMDGPU/flat-atomic-fadd.f32.ll
M llvm/test/CodeGen/AMDGPU/flat-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/flat-error-unsupported-gpu-hsa.ll
M llvm/test/CodeGen/AMDGPU/flat-for-global-subtarget-feature.ll
M llvm/test/CodeGen/AMDGPU/flat-load-clustering.mir
M llvm/test/CodeGen/AMDGPU/flat-load-saddr-to-vaddr.ll
M llvm/test/CodeGen/AMDGPU/flat-offset-bug.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-store.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-alloca-issue-155902.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-fold-fi-gfx1250.mir
M llvm/test/CodeGen/AMDGPU/flat-scratch-fold-fi.mir
M llvm/test/CodeGen/AMDGPU/flat-scratch-i8-i16.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-init.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-reg.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-svs.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_noprivate.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system_noprivate.ll
M llvm/test/CodeGen/AMDGPU/float-sopc-vopc.ll
M llvm/test/CodeGen/AMDGPU/float-to-arbitrary-fp.ll
M llvm/test/CodeGen/AMDGPU/fma-combine.ll
M llvm/test/CodeGen/AMDGPU/fma-mix.gfx11plus.ll
M llvm/test/CodeGen/AMDGPU/fma.f16.gfx11plus.ll
M llvm/test/CodeGen/AMDGPU/fma.f16.ll
M llvm/test/CodeGen/AMDGPU/fma.f64.ll
M llvm/test/CodeGen/AMDGPU/fma.ll
M llvm/test/CodeGen/AMDGPU/fmac.sdwa.ll
M llvm/test/CodeGen/AMDGPU/fmad-formation-fmul-distribute-denormal-mode.ll
M llvm/test/CodeGen/AMDGPU/fmamk_fmaak-t16.mir
M llvm/test/CodeGen/AMDGPU/fmax_legacy.f16.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (12) (#208896)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in
llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded
subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: b5e94d5ffca8fe3d7b063af48d9535d7b13af66a
https://github.com/llvm/llvm-project/commit/b5e94d5ffca8fe3d7b063af48d9535d7b13af66a
Author: Jean-Didier PAILLEUX <jean-didier.pailleux at sipearl.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/Builder/MIFCommon.h
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/MIFCommon.cpp
M flang/lib/Optimizer/Dialect/MIF/MIFOps.cpp
M flang/lib/Optimizer/Transforms/MIFOpConversion.cpp
M flang/test/Lower/MIF/image_index.f90
Log Message:
-----------
[flang][MIF] Fix lowering sub argument in IMAGE_INDEX #208318 (#208544)
This PR fixes issue #208318, which did not correctly prepare the SUB
argument for IMAGE_INDEX in the correct type.
Commit: d097c2b764460284b186636b547573d309eaba8d
https://github.com/llvm/llvm-project/commit/d097c2b764460284b186636b547573d309eaba8d
Author: disservin <disservin.social at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/IR/Verifier.cpp
Log Message:
-----------
[IR][NFC] Add parentheses around logical AND (#208512)
Fixes a `-Wparentheses` warning about unclear priority of operators.
Commit: d62c903ffd049da2a80acc7f0c0671447adc76f7
https://github.com/llvm/llvm-project/commit/d62c903ffd049da2a80acc7f0c0671447adc76f7
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M libcxx/test/benchmarks/containers/string.bench.cpp
Log Message:
-----------
[libc++] Refactor the string benchmarks (#185397)
Fixes #179696
Commit: 95f1eab03f35545eb308246376541a7150a7a4e4
https://github.com/llvm/llvm-project/commit/95f1eab03f35545eb308246376541a7150a7a4e4
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.h
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/test/CodeGen/RISCV/double-previous-failure.ll
A llvm/test/CodeGen/RISCV/jump-cond-merging-optsize.ll
M llvm/test/CodeGen/RISCV/jump-is-expensive.ll
M llvm/test/CodeGen/RISCV/or-is-add.ll
M llvm/test/CodeGen/RISCV/rvv/pr93587.ll
M llvm/test/CodeGen/RISCV/rvv/vcpop-shl-zext-opt.ll
M llvm/test/CodeGen/RISCV/select-and.ll
M llvm/test/CodeGen/RISCV/select-or.ll
M llvm/test/CodeGen/RISCV/setcc-logic.ll
Log Message:
-----------
[RISCV] Add getJumpConditionMergingParams to support branch condition merging (#206897)
Override `getJumpConditionMergingParams` so that
`shouldKeepJumpConditionsTogether`
can decide whether to keep `br (and/or cond1, cond2)` merged into a
single
branch or split it into two branches, based on a configurable cost
threshold.
Previously RISC-V used the default cost `{-1, -1, -1}`, which always
split
the conditions. Now it returns a base cost calculated from
`MispredictPenalty`
(via scaling it down by an assumed misprediction rate 25%).
These values are controllable via
`riscv-br-merging-base-cost/-likely-bias/-unlikely-bias`.
This is another approach to #191158 when `TuneJumpIsExpensive` is not
set.
Commit: f8b07132c195ce2823f6a54cd978301af8c6d551
https://github.com/llvm/llvm-project/commit/f8b07132c195ce2823f6a54cd978301af8c6d551
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVAsmPrinter.cpp
Log Message:
-----------
[NFC][SPIR-V] Add emitSimpleExecutionMode helper to dedup single imm OpExecutionMode emission (#208674)
Commit: d0ac84b54b90c03f0ba54b7f1b75b43941d7a6b1
https://github.com/llvm/llvm-project/commit/d0ac84b54b90c03f0ba54b7f1b75b43941d7a6b1
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M lldb/test/API/functionalities/gdb_remote_client/TestXMLRegisterFlags.py
Log Message:
-----------
[lldb][test] Fix XML register info test (#209124)
Missed by #208838, which is a follow up to #188049 which changed the
alignment rules.
Some of these tests have incorrect outputs now
and I will fix that later. For now at least
they pass again.
XML related tests are not being run in CI,
which I will also address later.
Commit: dc8ee15f2bbc5b18316f071c5ae746bd95609ade
https://github.com/llvm/llvm-project/commit/dc8ee15f2bbc5b18316f071c5ae746bd95609ade
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
M mlir/test/Conversion/SPIRVToLLVM/arithmetic-ops-to-llvm.mlir
Log Message:
-----------
[mlir][SPIR-V] Add SPIRVToLLVM conversion for SNegate (#206950)
Commit: 19f997320131c3d01e8ee32e1f22ee98a1ee0ec7
https://github.com/llvm/llvm-project/commit/19f997320131c3d01e8ee32e1f22ee98a1ee0ec7
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
Log Message:
-----------
[NFC][SPIR-V] Remove unused LowLevelType parameter from buildLoadInst (#208428)
Commit: 717615829bba4035897a4ebdbdef919f31529762
https://github.com/llvm/llvm-project/commit/717615829bba4035897a4ebdbdef919f31529762
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/typeid.cpp
Log Message:
-----------
[clang][bytecode] Improve diagnostics on typeid field access (#209101)
Do some extra work to extract the requested field name.
Commit: da138053e78c5af7b83f49674b4e190e1803102d
https://github.com/llvm/llvm-project/commit/da138053e78c5af7b83f49674b4e190e1803102d
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx1250.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-vi-f16.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
Log Message:
-----------
[CIR][AMDGPU] Add support for AMDGCN rcp builtins (#197447)
Adds codegen for the following AMDGCN reciprocal builtins:
- __builtin_amdgcn_rcp (double)
- __builtin_amdgcn_rcpf (float)
- __builtin_amdgcn_rcph (half)
- __builtin_amdgcn_rcp_bf16 (bfloat16)
These are lowered to the corresponding `llvm.amdgcn.rcp` intrinsic.
Commit: a0df86deb4295ff9ebebe54eb515bc49a7fb65f8
https://github.com/llvm/llvm-project/commit/a0df86deb4295ff9ebebe54eb515bc49a7fb65f8
Author: Mark Zhuang <mark.zhuang at spacemit.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVProcessors.td
Log Message:
-----------
[RISCV] Add TuneNoDefaultUnroll to spacemit-x100 (#209069)
In the spec2k6int tests, some subtests improved while others
regressed. The overall score shows a 0.7% gain. Given that
most OoO CPUs enable this feature by default, also enable
it by default for X100.
Commit: cb71fefb2258fdd00747043a9c322f95d684b000
https://github.com/llvm/llvm-project/commit/cb71fefb2258fdd00747043a9c322f95d684b000
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/divs-with-scalable-vfs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fold-tail-low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-no-dotprod.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-multiexit.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-runtime-check-size-based-threshold.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt-too-many-deps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-counting-down.ll
M llvm/test/Transforms/LoopVectorize/RISCV/conditional-scalar-assignment.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dbg-tail-folding-by-evl.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/early-exit-live-out.ll
M llvm/test/Transforms/LoopVectorize/RISCV/fminimumnum.ll
M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-masked-access.ll
M llvm/test/Transforms/LoopVectorize/RISCV/iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/RISCV/partial-reduce-dot-product.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-bin-unary-ops-args.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-call-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cast-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-complex-mask.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-div.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-interleave.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-iv32.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-masked-loadstore.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reverse-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-safe-dep-distance.ll
M llvm/test/Transforms/LoopVectorize/RISCV/transform-narrow-interleave-to-widen-memory.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-vp-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/VPlan/expand-scev.ll
M llvm/test/Transforms/LoopVectorize/X86/pr35432.ll
M llvm/test/Transforms/LoopVectorize/X86/replicating-load-store-costs.ll
M llvm/test/Transforms/LoopVectorize/cast-induction.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr.ll
M llvm/test/Transforms/LoopVectorize/find-last.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/induction-ptrcasts.ll
M llvm/test/Transforms/LoopVectorize/invalidate-scev-at-scope-after-vectorization.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-decreasing.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-align.ll
M llvm/test/Transforms/LoopVectorize/nested-loops-scev-expansion.ll
M llvm/test/Transforms/LoopVectorize/pr125278.ll
M llvm/test/Transforms/LoopVectorize/pr37248.ll
M llvm/test/Transforms/LoopVectorize/pr38697.ll
M llvm/test/Transforms/LoopVectorize/reduction-small-size.ll
M llvm/test/Transforms/LoopVectorize/replace-first-order-recurrence-by-versioned-iv.ll
M llvm/test/Transforms/LoopVectorize/reuse-lcssa-phi-scev-expansion.ll
M llvm/test/Transforms/LoopVectorize/scev-exit-phi-invalidation.ll
M llvm/test/Transforms/LoopVectorize/scev-predicate-reasoning.ll
M llvm/test/Transforms/LoopVectorize/trip-count-expansion-may-introduce-ub.ll
M llvm/test/Transforms/LoopVectorize/vplan-native-path-inner-loop-with-runtime-checks.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/indvars-vectorization.ll
Log Message:
-----------
[VPlan] Expand SCEV min/max via scalar intrinsic VPInstructions. (#207842)
Use the VPInstruction::Intrinsic opcode to expand min/max SCEV
expressions to LLVM min/max intrinsics as VPInstructions.
The operands are chained in reverse order, matching SCEVExpander's
expansion of min/max expressions.
This helps to clean up another set of duplicated vscale calls.
Depends on https://github.com/llvm/llvm-project/pull/207541
Depends on https://github.com/llvm/llvm-project/pull/207836
PR: https://github.com/llvm/llvm-project/pull/207842
Commit: 6461bd3749dc09698b76c3349e7b4befab7f7f9b
https://github.com/llvm/llvm-project/commit/6461bd3749dc09698b76c3349e7b4befab7f7f9b
Author: Le Gia Bao <legiabao7300 at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M polly/lib/Support/ScopHelper.cpp
A polly/test/CodeGen/issue205137.ll
Log Message:
-----------
[Polly] Fix infinite recursion in `ScopExpander::visitAddRecExpr` (#206063)
visitUnknown follow VMap, call GenSE.getSCEV() on the mapped value, and
get back the original AddRec, recursing visitAddRecExpr infinitely.
Insert the result into SCEVCache before calling visit() to cut
recursion.
Fixes #205137.
Commit: 5db1f5442ef0c9bcb2f4ca362361daaf2a76acfb
https://github.com/llvm/llvm-project/commit/5db1f5442ef0c9bcb2f4ca362361daaf2a76acfb
Author: maflcko <6399679+maflcko at users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
A compiler-rt/test/ubsan/TestCases/Integer/Inputs/make_signed.h
A compiler-rt/test/ubsan/TestCases/Integer/Inputs/wrappers.h
A compiler-rt/test/ubsan/TestCases/Integer/suppressions-nested-calls.c
Log Message:
-----------
compiler-rt: ubsan: Add suppressions test for nested functions (#206962)
This is a test-only change to increase the test coverage of UBSan to
clarify that named suppressions only apply to the function itself and do
not cover (possibly inlined) called functions.
The background is that, while trying to fix
https://github.com/llvm/llvm-project/issues/132533, I discovered missing
test coverage and possibly confused myself into a wrong fix in
https://github.com/llvm/llvm-project/pull/206735#discussion_r3505816693
So I think it could make sense to add test coverage for the case that I
broke, which serves as a reference baseline ground truth.
---------
Co-authored-by: MarcoFalke <*~=`'#}+{/-|&$^_ at 721217.xyz>
Commit: 6d026ea1d89795532c7ead1e57676bd1d1018afb
https://github.com/llvm/llvm-project/commit/6d026ea1d89795532c7ead1e57676bd1d1018afb
Author: Carl Ritson <carl.ritson at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/lib/Target/AMDGPU/AMDGPUWaitSGPRHazards.cpp
M llvm/test/CodeGen/AMDGPU/valu-read-sgpr-hazard-attrs.mir
Log Message:
-----------
[AMDGPU] Remove option to disable SGPR hazard waits (#208720)
This was useful when initially implemented, but probably be removed now.
Commit: 13e9cc22ce4edfd4b1347d6bed9cd95868e2d4f4
https://github.com/llvm/llvm-project/commit/13e9cc22ce4edfd4b1347d6bed9cd95868e2d4f4
Author: LiqinWeng <liqin.weng at spacemit.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/test/Driver/print-enabled-extensions/riscv-spacemit-a100.c
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Driver/riscv-cpus.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.h
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrFormats.td
M llvm/lib/Target/RISCV/RISCVInstrFormatsSpacemitV.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXSpacemiT.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/test/CodeGen/RISCV/features-info.ll
A llvm/test/MC/RISCV/xsmtvdotii-invalid.s
A llvm/test/MC/RISCV/xsmtvdotii-valid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Support spacemit vsmtvdotii extensions (#202533)
SPEC: https://github.com/spacemit-com/docs-ai/blob/main/en/architecture/ime_extension.md
Commit: 8cb0e63054ce96860b12d68218eb67c97bc6c378
https://github.com/llvm/llvm-project/commit/8cb0e63054ce96860b12d68218eb67c97bc6c378
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
M llvm/lib/Target/AArch64/SMEInstrFormats.td
M llvm/test/MC/AArch64/SME2p3/luti6-diagnostics.s
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
Log Message:
-----------
[AArch64][llvm][tablegen] Restrict luti6 assembly (4 regs, 8-bit) to 0 <= Zn <= 7 (#200751)
The `luti6` instruction (four registers, 8-bit) should only allow
assembly of `0 <= Zn <= 7`, since there's only 3 bits for `Zn`. It
actually allows > 7:
```
luti6 { z0.b - z3.b }, zt0, { z8 - z10 }
```
which produces a duplicate encoding to the following:
```
luti6 { z0.b - z3.b }, zt0, { z0 - z2 }
```
Update tablegen to handle the inferred register-class naming
collision caused by adding the explicit z0-z7 ZPR3 class.
Commit: 3966381ccbd135e34b44a746187ac6c5140df4cd
https://github.com/llvm/llvm-project/commit/3966381ccbd135e34b44a746187ac6c5140df4cd
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M lldb/source/Core/DumpRegisterValue.cpp
M lldb/test/API/functionalities/gdb_remote_client/TestXMLRegisterFlags.py
M lldb/test/API/linux/aarch64/permission_overlay/TestAArch64LinuxPOE.py
Log Message:
-----------
[lldb] Correct alignment of register fields (#209140)
In #188049 the alignment of register names for the raw value part "pc =
0x..." changed.
This resulted in many register fields being 2 spaces off where they
should be, because the stream we were printing to had a 2 space indent
set where it had none before.
This is actually a bug in the original field formatting code. It assumed
the stream had no indent level of its own. So the fix is to indent using
the stream (the 2 spaces), then indent to where the register name ends.
Commit: 6c009ff4b39ec2a0233c40c87f8f3709e9dc2eff
https://github.com/llvm/llvm-project/commit/6c009ff4b39ec2a0233c40c87f8f3709e9dc2eff
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll
M llvm/test/CodeGen/AMDGPU/fmax3.f64.ll
M llvm/test/CodeGen/AMDGPU/fmax3.ll
M llvm/test/CodeGen/AMDGPU/fmax_legacy.f64.ll
M llvm/test/CodeGen/AMDGPU/fmax_legacy.ll
M llvm/test/CodeGen/AMDGPU/fmaximum.ll
M llvm/test/CodeGen/AMDGPU/fmaximum3.ll
M llvm/test/CodeGen/AMDGPU/fmaximum3.v2f16.ll
M llvm/test/CodeGen/AMDGPU/fmaxnum.f64.ll
M llvm/test/CodeGen/AMDGPU/fmaxnum.ll
M llvm/test/CodeGen/AMDGPU/fmed3-cast-combine.ll
M llvm/test/CodeGen/AMDGPU/fmed3.bf16.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll
M llvm/test/CodeGen/AMDGPU/fmin3.ll
M llvm/test/CodeGen/AMDGPU/fmin_fmax_legacy.amdgcn.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.f16.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.f64.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.ll
M llvm/test/CodeGen/AMDGPU/fminimum.ll
M llvm/test/CodeGen/AMDGPU/fminimum3.ll
M llvm/test/CodeGen/AMDGPU/fminimum3.v2f16.ll
M llvm/test/CodeGen/AMDGPU/fminnum.f64.ll
M llvm/test/CodeGen/AMDGPU/fminnum.ll
M llvm/test/CodeGen/AMDGPU/fmul-2-combine-multi-use.ll
M llvm/test/CodeGen/AMDGPU/fmul-to-ldexp.ll
M llvm/test/CodeGen/AMDGPU/fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/fmul.ll
M llvm/test/CodeGen/AMDGPU/fmul64.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.f16.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.f64.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.v2f16.ll
M llvm/test/CodeGen/AMDGPU/fncall-implicitdef.ll
M llvm/test/CodeGen/AMDGPU/fnearbyint.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines-gfx1200.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.legal.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.new.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.si.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs-divergence-driven-isel.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs-v2f32.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.bf16.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.f64.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.ll
M llvm/test/CodeGen/AMDGPU/fneg-fold-legalize-dag-increase-insts.ll
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
M llvm/test/CodeGen/AMDGPU/fneg.bf16.ll
M llvm/test/CodeGen/AMDGPU/fneg.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg.f64.ll
M llvm/test/CodeGen/AMDGPU/fneg.ll
M llvm/test/CodeGen/AMDGPU/fold-agpr-phis.mir
M llvm/test/CodeGen/AMDGPU/fold-cndmask-wave32.mir
M llvm/test/CodeGen/AMDGPU/fold-commute-sgpr.mir
M llvm/test/CodeGen/AMDGPU/fold-fabs.ll
M llvm/test/CodeGen/AMDGPU/fold-fmaak-bug.ll
M llvm/test/CodeGen/AMDGPU/fold-freeze-fmul-to-fma.ll
M llvm/test/CodeGen/AMDGPU/fold-gep-offset.ll
M llvm/test/CodeGen/AMDGPU/fold-imm-copy-agpr.mir
M llvm/test/CodeGen/AMDGPU/fold-imm-f16-f32.mir
M llvm/test/CodeGen/AMDGPU/fold-imm-pk64.mir
M llvm/test/CodeGen/AMDGPU/fold-int-pow2-with-fmul-or-fdiv.ll
M llvm/test/CodeGen/AMDGPU/fold-literal-multiple-gfx10.mir
M llvm/test/CodeGen/AMDGPU/fold-multiple-commute.mir
M llvm/test/CodeGen/AMDGPU/fold-multiple.mir
M llvm/test/CodeGen/AMDGPU/fold-omod-crash.mir
M llvm/test/CodeGen/AMDGPU/fold-operands-frame-index-agpr.mir
M llvm/test/CodeGen/AMDGPU/fold-operands-frame-index.gfx10.mir
M llvm/test/CodeGen/AMDGPU/fold-operands-frame-index.mir
M llvm/test/CodeGen/AMDGPU/fold-operands-order.mir
M llvm/test/CodeGen/AMDGPU/fold-operands-remove-m0-redef.mir
M llvm/test/CodeGen/AMDGPU/fold-operands-s-add-copy-to-vgpr.mir
M llvm/test/CodeGen/AMDGPU/fold-operands-scalar-fmac.mir
M llvm/test/CodeGen/AMDGPU/fold-reload-into-exec.mir
M llvm/test/CodeGen/AMDGPU/fold-reload-into-m0.mir
M llvm/test/CodeGen/AMDGPU/fold-restore-undef-use.mir
M llvm/test/CodeGen/AMDGPU/fold-sgpr-copy.mir
M llvm/test/CodeGen/AMDGPU/fold-sgpr-multi-imm.mir
M llvm/test/CodeGen/AMDGPU/fold-short-64-bit-literals.mir
M llvm/test/CodeGen/AMDGPU/fold-vgpr-copy.mir
M llvm/test/CodeGen/AMDGPU/fold-vgpr-phyreg.mir
M llvm/test/CodeGen/AMDGPU/fold-zero-high-bits-clear-kill-flags.mir
M llvm/test/CodeGen/AMDGPU/fold-zero-high-bits-skips-non-reg.mir
M llvm/test/CodeGen/AMDGPU/fold_acc_copy_into_valu.mir
M llvm/test/CodeGen/AMDGPU/folding-of-i32-as-i64.mir
M llvm/test/CodeGen/AMDGPU/force-alwaysinline-lds-global-address.ll
M llvm/test/CodeGen/AMDGPU/force-wait-after-always-gds.mir
M llvm/test/CodeGen/AMDGPU/fp-atomic-to-s_denormmode.mir
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx1200.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx942.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx950.ll
M llvm/test/CodeGen/AMDGPU/fp-classify.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp_to_sint.f64.ll
M llvm/test/CodeGen/AMDGPU/fp_to_sint.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.f64.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
M llvm/test/CodeGen/AMDGPU/fp_trunc_store_fp32_to_bf16.ll
M llvm/test/CodeGen/AMDGPU/fp_trunc_store_fp64_to_bf16.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (13) (#208897)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in
llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded
subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: d76f677c075b71e2a5c2ee35539992d753258e2a
https://github.com/llvm/llvm-project/commit/d76f677c075b71e2a5c2ee35539992d753258e2a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-ptr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-image-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-num-flat-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-num-global-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp32_to_fp16.ll
M llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-ptr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fpenv.ll
M llvm/test/CodeGen/AMDGPU/fpext-free.ll
M llvm/test/CodeGen/AMDGPU/fpext.f16.ll
M llvm/test/CodeGen/AMDGPU/fpext.ll
M llvm/test/CodeGen/AMDGPU/fpow.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptosi.f16.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptoui.f16.ll
M llvm/test/CodeGen/AMDGPU/fptoui_uitofp.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.v2f16.no.fast.math.ll
M llvm/test/CodeGen/AMDGPU/fract.f64.ll
M llvm/test/CodeGen/AMDGPU/fract.ll
M llvm/test/CodeGen/AMDGPU/frame-index-elimination-tied-operand.mir
M llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
M llvm/test/CodeGen/AMDGPU/frame-index.mir
M llvm/test/CodeGen/AMDGPU/frame-lowering-fp-adjusted.mir
M llvm/test/CodeGen/AMDGPU/frame-setup-without-sgpr-to-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/freeze-binary.ll
M llvm/test/CodeGen/AMDGPU/freeze.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/frexp-constant-fold.ll
M llvm/test/CodeGen/AMDGPU/fshl-scalar-shift-zero.ll
M llvm/test/CodeGen/AMDGPU/fshl.ll
M llvm/test/CodeGen/AMDGPU/fshr.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f32.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
M llvm/test/CodeGen/AMDGPU/fsub-as-fneg-src-modifier.ll
M llvm/test/CodeGen/AMDGPU/fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/fsub.ll
M llvm/test/CodeGen/AMDGPU/fsub64.ll
M llvm/test/CodeGen/AMDGPU/ftrunc.f64.ll
M llvm/test/CodeGen/AMDGPU/ftrunc.ll
M llvm/test/CodeGen/AMDGPU/function-alignment.ll
M llvm/test/CodeGen/AMDGPU/function-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/function-args.ll
M llvm/test/CodeGen/AMDGPU/function-call-relocs.ll
M llvm/test/CodeGen/AMDGPU/function-esm2-prologue-epilogue.ll
M llvm/test/CodeGen/AMDGPU/function-resource-usage.ll
M llvm/test/CodeGen/AMDGPU/function-returns.ll
M llvm/test/CodeGen/AMDGPU/fused-bitlogic.ll
M llvm/test/CodeGen/AMDGPU/gcn-reg-pressure-true16-integer-overflow.mir
M llvm/test/CodeGen/AMDGPU/gds-allocation.ll
M llvm/test/CodeGen/AMDGPU/gds-atomic.ll
M llvm/test/CodeGen/AMDGPU/gds-unsupported.ll
M llvm/test/CodeGen/AMDGPU/gep-address-space.ll
M llvm/test/CodeGen/AMDGPU/gep-const-address-space.ll
M llvm/test/CodeGen/AMDGPU/gep-flags-stack-offsets.ll
M llvm/test/CodeGen/AMDGPU/gfx-call-non-gfx-func.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-preserved-registers.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
M llvm/test/CodeGen/AMDGPU/gfx10-twoaddr-fma.mir
M llvm/test/CodeGen/AMDGPU/gfx10-vop-literal.ll
M llvm/test/CodeGen/AMDGPU/gfx10plus-wavefront-sgpr-count.ll
M llvm/test/CodeGen/AMDGPU/gfx11-sgpr-hazard-latency.mir
M llvm/test/CodeGen/AMDGPU/gfx11-twoaddr-fma.mir
M llvm/test/CodeGen/AMDGPU/gfx11-user-sgpr-init16-bug.ll
M llvm/test/CodeGen/AMDGPU/gfx12_scalar_subword_loads.ll
M llvm/test/CodeGen/AMDGPU/gfx90a-enc.ll
M llvm/test/CodeGen/AMDGPU/gfx942-hazards.mir
M llvm/test/CodeGen/AMDGPU/global-address.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.v2f16-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.v2f16-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-scan.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global-atomics-fp-wrong-subtarget.ll
M llvm/test/CodeGen/AMDGPU/global_atomic_optimizer_fp_rtn.ll
M llvm/test/CodeGen/AMDGPU/global_atomics.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_iterative_scan.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_iterative_scan_fp.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_optimizer_fp_no_rtn.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (14) (#209117)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in
llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded
subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: b0158bbd4fec69feda78752270573e505d53ddcf
https://github.com/llvm/llvm-project/commit/b0158bbd4fec69feda78752270573e505d53ddcf
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M orc-rt/test/CMakeLists.txt
M orc-rt/test/regression/init.test
M orc-rt/test/regression/lit.cfg.py
M orc-rt/tools/CMakeLists.txt
A orc-rt/tools/ogre/CMakeLists.txt
A orc-rt/tools/ogre/ogre.cpp
R orc-rt/tools/orc-executor/CMakeLists.txt
R orc-rt/tools/orc-executor/orc-executor.cpp
Log Message:
-----------
[orc-rt] Rename orc-executor to ogre (#209143)
The ORC Generic Runtime Environment (OGRE) will serve as our canonical
"blank executor" program: A program that simply listens for an ORC
controller connection, then runs whatever program is provided to it by
the controller.
Commit: 3081049a69f85dd4079a959c4e50c6ccf9f691d0
https://github.com/llvm/llvm-project/commit/3081049a69f85dd4079a959c4e50c6ccf9f691d0
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M lldb/include/lldb/Core/Opcode.h
M lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp
M lldb/unittests/Disassembler/CMakeLists.txt
A lldb/unittests/Disassembler/x86/TestGetOpcodeOversized.cpp
Log Message:
-----------
[lldb] Don't build an opcode from a failed disassembly (#208279)
lldb does not check if the instruction was decoded correctly. This
causes the following assert to hit:
https://github.com/llvm/llvm-project/blob/06499c927e5012166f4553c58f8af593521ea14d/lldb/include/lldb/Core/Opcode.h#L214
due to a buffer overflow. This happens when starting `lldb-dap` on
Windows with `lldb-server`.
This patch clamps the instruction size to the maximum possible
instruction size possible to avoid the assert to hit. It also adds a
regression test.
Related:
- https://github.com/llvm/llvm-project/pull/208277.
Commit: efd160260d8437710714d8a3ba9301f45d61ee95
https://github.com/llvm/llvm-project/commit/efd160260d8437710714d8a3ba9301f45d61ee95
Author: Aleksandr Popov <42888396+aleks-tmb at users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/single_early_exit_zext_trip_count.ll
Log Message:
-----------
[SCEV][NFC] Address post-merge comments on precommit test (#209094)
Drop unnecessary atomic/unordered loads, unify block label naming.
Follow-up to b33af86b032e (#208784).
Commit: a5fc1d68f995744af71b91663e9f46910d9345ca
https://github.com/llvm/llvm-project/commit/a5fc1d68f995744af71b91663e9f46910d9345ca
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-doc/BUILD.gn
A llvm/utils/gn/secondary/clang-tools-extra/clang-doc/markdown/BUILD.gn
Log Message:
-----------
[gn] port cc048e80b670 more (#209156)
00cd65638a7cf attempted this, but it was incomplete.
Commit: a4364df185433cd37b793aa4ff64cba1c72dcbda
https://github.com/llvm/llvm-project/commit/a4364df185433cd37b793aa4ff64cba1c72dcbda
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/invalid.cpp
Log Message:
-----------
[clang][bytecode] Handle invalid function in CXXInheritedCtorInitExpr (#209138)
Commit: db28e48d67e3b0c44d88be9ea2d28eca2d239a9a
https://github.com/llvm/llvm-project/commit/db28e48d67e3b0c44d88be9ea2d28eca2d239a9a
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Core/RangeConstraintManager.cpp
M clang/test/Analysis/ArrayBound/assumption-reporting.c
M clang/test/Analysis/bitwise-shift-common.c
M clang/test/Analysis/constant-folding.c
M clang/test/Analysis/malloc.c
M clang/test/Analysis/string.c
Log Message:
-----------
[analyzer] Smarter range inference for {+,-,*} (#209048)
SymbolicRangeInferrer previously fell back to the full range of the
result type for BO_Add, BO_Sub and BO_Mul, discarding any constraints
known about the operands.
This caused a false positive in optin.taint.TaintedAlloc: a bounded
tainted value multiplied by a constant
(e.g. `malloc(groups * sizeof(gid_t))` with `groups` bounded) was
treated as unbounded whenever the multiplication was done in a wide
(e.g. 64-bit size_t) type, because the operand's range was lost. A
32-bit multiplication accidentally avoided the warning only because the
narrow result type already bounds the value below SIZE_MAX/4. Fixes
#173113
---
With `inferFromCorners` we compute the smallest and largest possible
outcome of the two range sets for `LHS {+,-,*} RHS`. If fails for some
reason, it falls back to the previous behavior and takes [MIN, MAX] for
type T - the most conservative range.
This patch also covers some pre-existing FIXMEs in the tests. I didn't
evaluate this change - however, I think it's harmless.
Assisted-by: Claude Opus 4.8
Commit: 3ae6937d0491665c2f47505e71e53ce5ef758424
https://github.com/llvm/llvm-project/commit/3ae6937d0491665c2f47505e71e53ce5ef758424
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/Basic/BUILD.gn
Log Message:
-----------
[gn build] Port 1b879464b362 (#209147)
Commit: 7a9bbe00493434ad70bd3de0840c980fd88abde6
https://github.com/llvm/llvm-project/commit/7a9bbe00493434ad70bd3de0840c980fd88abde6
Author: rdevshp <rdevshp at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/BasicValueFactory.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SMTConstraintManager.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SMTConv.h
M clang/lib/StaticAnalyzer/Core/BasicValueFactory.cpp
M clang/lib/StaticAnalyzer/Core/Z3CrosscheckVisitor.cpp
A clang/test/Analysis/z3/z3-logicalexpr-eval.c
M clang/test/Analysis/z3/z3-unarysymexpr.c
Log Message:
-----------
[analyzer] Fix unary/binary op support for SMT symbolic execution (#205078)
SMT symbolic execution:
The patch fixes unary op support, converts operands of logical operators
to boolean in getBinExpr, and clears the hasComparison flag in
getSymExpr when a boolean operand is converted to a non-bool integer.
This PR allows C functions like
```
int f(int x, int y) {
if (~(x && y))
return 0;
return 1;
}
```
to be analyzed with `-cc1 -analyze -analyzer-checker=core
-analyzer-constraints=z3`
Fixes #205037.
Assisted-by: Codex
Commit: cc11dd4aa650abce746953c4c243427c2a6d16cc
https://github.com/llvm/llvm-project/commit/cc11dd4aa650abce746953c4c243427c2a6d16cc
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysis/Analyses/BUILD.gn
Log Message:
-----------
[gn build] Port 3bc47c8dc927 (#209148)
Commit: fb0563958e113bf9d384284ec2be1a73cfe7ff3e
https://github.com/llvm/llvm-project/commit/fb0563958e113bf9d384284ec2be1a73cfe7ff3e
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Driver/BUILD.gn
Log Message:
-----------
[gn build] Port 640079288c5e (#209149)
Commit: af30b76228e315fac32b8cf0b8282841d839c365
https://github.com/llvm/llvm-project/commit/af30b76228e315fac32b8cf0b8282841d839c365
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/ADT/BUILD.gn
Log Message:
-----------
[gn build] Port 9b9f44d1c55c (#209150)
Commit: ff331ac51c37746f5f3ea9679f791992e3d93918
https://github.com/llvm/llvm-project/commit/ff331ac51c37746f5f3ea9679f791992e3d93918
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/lld/unittests/AsLibELF/BUILD.gn
Log Message:
-----------
[gn build] Port c847ddf8f18d (#209151)
Commit: 6da5260422379a53aadc0aedacded102fcff3fac
https://github.com/llvm/llvm-project/commit/6da5260422379a53aadc0aedacded102fcff3fac
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn
Log Message:
-----------
[gn build] Port d09048a46401 (#209152)
Commit: d9a5286ac41e54ed8aa73b61a8f173a9d0460085
https://github.com/llvm/llvm-project/commit/d9a5286ac41e54ed8aa73b61a8f173a9d0460085
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/unittests/CIR/BUILD.gn
Log Message:
-----------
[gn build] Port d1dbd484ada2 (#209153)
Commit: 4df8add1fd27371378285cd68cbfd3474e3f84b5
https://github.com/llvm/llvm-project/commit/4df8add1fd27371378285cd68cbfd3474e3f84b5
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
Log Message:
-----------
[gn build] Port e6673bd03771 (#209154)
Commit: e2dee8e8d047f858b03d451c37b3cc21dcefe69c
https://github.com/llvm/llvm-project/commit/e2dee8e8d047f858b03d451c37b3cc21dcefe69c
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/StaticAnalyzer/Checkers/BUILD.gn
Log Message:
-----------
[gn build] Port f99f2a582e94 (#209155)
Commit: 477bb26c7c0c5eee0491ce058968ce3c4b89623b
https://github.com/llvm/llvm-project/commit/477bb26c7c0c5eee0491ce058968ce3c4b89623b
Author: Joel Walker <theagingboy05 at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-sat.mir
Log Message:
-----------
[GlobalISel] Add G_SADDSAT/G_UADDSAT/G_SSUBSAT/G_USUBSAT to computeKnownBits (#209075)
Add known-bits handling for the saturating arithmetic opcodes G_SADDSAT,
G_UADDSAT, G_SSUBSAT and G_USUBSAT in GISelValueTracking, using the
existing
`KnownBits::{sadd,uadd,ssub,usub}_sat` helpers - the same ones
ValueTracking
uses for the corresponding IR intrinsics. (On the SelectionDAG side only
`ISD::USUBSAT` is currently handled.)
The new test covers exact constant folding, all four saturation clamps
(255, 127, 0, -128), partially known operands, a vector case, and fully
unknown operands. Without the change, all of these results are unknown.
Part of #150515.
---
Assisted by Claude (Anthropic).
Commit: 308393ede14cc8533d1be122b5df88bf9ba4173b
https://github.com/llvm/llvm-project/commit/308393ede14cc8533d1be122b5df88bf9ba4173b
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/load-cast-context.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vscale-fixed.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse.ll
Log Message:
-----------
[LV] Allow scalable epilogue VFs matching the MainLoop VF (#208686)
This effectively limited scalable epilogue VFs to the MainLoopVF/2, as
all VFs are powers-of-two. This restriction does not exist for fixed
vector VFs. This could result in worse VF selections for scalable
epilogues (at high interleave counts), or in many cases only fixed
vectors selected (as there would be no allowed scalable VF in
ProfitableVFs).
Commit: 8a337c88d64e8d3fe918ae9fdc740fadbba2368c
https://github.com/llvm/llvm-project/commit/8a337c88d64e8d3fe918ae9fdc740fadbba2368c
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
Log Message:
-----------
Revert "[SPIR-V] Simplify and fix sign-extension bug in convertCharsToWord (#207769)" (#209162)
This reverts commit 503f0ca19cfcc9c0c88d6918939a2c0038ad0498.
This is obviously incorrect on big endian architectures.
Commit: 16bd5ce1184bb5683ea96290478e5912cf2975b9
https://github.com/llvm/llvm-project/commit/16bd5ce1184bb5683ea96290478e5912cf2975b9
Author: Alex Bradbury <asb at igalia.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Arm64ECCallLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/arm64ec-exit-thunks.ll
M llvm/test/CodeGen/AArch64/arm64ec-hybrid-patchable.ll
Log Message:
-----------
Reland [AArch64] Copy x4/x5 vararg payload into the x64 stack in Arm64EC exit thunks (#208453)
Reland llvm/llvm-project#190933, which was reverted by
llvm/llvm-project#198540 due to an EXPENSIVE_CHECKS build failure.
The fix relative to the reverted patch is to do the memcpy before the
final CALLSEQ_START for the dispatch call, avoiding nested call-frame
pseudos if memcpy lowers to a call.
Original commit message:
Currently the x4/x5 in a variadic Arm64EC exit thunks are treated by
LLVM like any other outgoing arguments. x4/x5 contain a pointer to the
first stack parameter and the size of the parameters passed on the
stack, and the generated exit thunk must memcpy these to the x86-64
stack. Current MSVC does this correctly.
Rather than introducing a new entry to the CallingConv enum, we mark the
call as vararg in AArch64ArmECCallLowering so that the lowering logic in
AArch64ISelLowering.cpp can recognise this case, perform the necessary
memcpy, and drop the x4/x5 arguments.
LLVM should additionally ensure that x0-x3 are mirrored to f0-f3 in
order to match the Windows x86-64 vararg ABI, but that change is left
for a follow-up patch.
Commit: 5595710093f7f8b9cdb0ff4f8d7400e58bde09b2
https://github.com/llvm/llvm-project/commit/5595710093f7f8b9cdb0ff4f8d7400e58bde09b2
Author: Jean-Didier PAILLEUX <jean-didier.pailleux at sipearl.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M flang/include/flang/Lower/MultiImageFortran.h
M flang/include/flang/Optimizer/Builder/MIFCommon.h
M flang/include/flang/Optimizer/Dialect/MIF/MIFOps.td
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/MultiImageFortran.cpp
M flang/lib/Optimizer/Builder/MIFCommon.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
A flang/lib/Optimizer/Transforms/EmitMIFGlobalCtors.cpp
M flang/test/Fir/basic-program.fir
M flang/test/Lower/MIF/coarray_allocation4.f90
M flang/test/Lower/MIF/coarray_allocation5.f90
Log Message:
-----------
[Flang][MIF] Allocation of NON-ALLOCATABLE SAVE coarray (#205847)
The goal of this PR is to add support for allocating NON-allocatable
coarrays that are not in the `Main` program.
All allocations will be performed in a function called
`__mif_save_coarrays_allocate`. If this function exists, then
LLVM::GlobalCtors is created (or modified).
The initialization of the MIF with `mif.init` is moved too in a
GlobalCtors with a priority of 0 to ensure that the initialization takes
place before any MIF allocations.
---------
Co-authored-by: Dan Bonachea <dobonachea at lbl.gov>
Commit: 40f2fda52c4b3b110f38acded24521217473d106
https://github.com/llvm/llvm-project/commit/40f2fda52c4b3b110f38acded24521217473d106
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/session_helpers.py
M lldb/test/API/tools/lldb-dap/variables/TestDAP_variables.py
M lldb/test/API/tools/lldb-dap/variables/children/TestDAP_variables_children.py
Log Message:
-----------
[lldb-dap] Migrate all DAP variables test. (#208215)
migrate TestDAP_variables and TestDAP_variables_children.
Commit: fff064e93d144a6499efcf091e1f226d144e514f
https://github.com/llvm/llvm-project/commit/fff064e93d144a6499efcf091e1f226d144e514f
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/Interpreter/Interpreter.cpp
M clang/test/Interpreter/cxx20-modules.cppm
M clang/test/Interpreter/execute-pch.cpp
A clang/test/Interpreter/pch-pic-mismatch.cpp
A clang/test/Interpreter/pcm-pic-mismatch.cpp
Log Message:
-----------
[Clang][Interpreter] Enable PIC to avoid 32-bit relocation overflows (#201286)
In clang-repl, R_*_32 relocations are emitted as direct 32-bit
PC-relative references. A conventional static linker can resolve
references to external symbols through the GOT or copy relocations, but
clang-repl directly mmaps shared objects into memory, bypassing the
static linker.
As a result, these relocations may exceed their 32-bit range if a
referenced symbol is located more than 2 GB away from the JIT
allocation, which can occur on FreeBSD.
Enable PIC to force accesses to external data through the GOT, avoiding
the generation of direct 32-bit relocations that are subject to the 2 GB
addressing limit.
Commit: a624d9999cf1ac83aa1fe0820c9311de8106175e
https://github.com/llvm/llvm-project/commit/a624d9999cf1ac83aa1fe0820c9311de8106175e
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt/AllocAction.h
Log Message:
-----------
[orc-rt] Remove redundant [[nodiscard]] from runFinalizeActions. NFC. (#209163)
runFinalizeActions returns an Expected, which already carries a
nodiscard attribute.
Commit: 9325f22f1cf17a6f192519163dd449d684700d2a
https://github.com/llvm/llvm-project/commit/9325f22f1cf17a6f192519163dd449d684700d2a
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M mlir/cmake/modules/CMakeLists.txt
Log Message:
-----------
[MLIR] Normalize path separator in MLIRConfig.cmake (#208659)
Under Windows, the paths may contain `\` path separators.
`MLIR_TABLEGEN_EXE` is added into MLIRConfig.cmake where backslashes are
interpreted as escape characters. This results in syntax errors during
`find_package(MLIR)`.
Fix by using CMake-normalized paths (`/` separator under all platforms).
LLVM/Clang do not put their tablegen paths in their config files.
Commit: 1884c7565155b603ec3946718801f53b276876bb
https://github.com/llvm/llvm-project/commit/1884c7565155b603ec3946718801f53b276876bb
Author: lianjinfeng2003 <101249452+mygitljf at users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-invalid.mlir
Log Message:
-----------
[mlir][tosa] Validate variable element types (#205873)
I changed the TOSA validation path so unsupported types report a normal
diagnostic instead of crashing.
Fixes #205710
Commit: 0f69d2804b9b2542fde2ecafbb23f1e8a8b48d86
https://github.com/llvm/llvm-project/commit/0f69d2804b9b2542fde2ecafbb23f1e8a8b48d86
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M libcxx/include/__iterator/segmented_iterator.h
Log Message:
-----------
[libc++][NFC] Remove unused includes from <__iterator/segmented_iterator.h> (#209105)
Commit: d4c6c8623e9bf9aa75ad049f55423223228116b3
https://github.com/llvm/llvm-project/commit/d4c6c8623e9bf9aa75ad049f55423223228116b3
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SLPVectorizer.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/loadi8.ll
M llvm/test/Transforms/SLPVectorizer/X86/runtime-alias-checks.ll
Log Message:
-----------
[SLP] Support memory runtime alias checks
Vectorize straight-line code blocked by runtime-checkable may-alias
dependencies by versioning the block. Drop the deps, and if the tree is
profitable, emit base-object address-range overlap checks branching to a
vector fast path or an original-order scalar fallback.
Fixes #201534
Reviewers: RKSimon, bababuck, hiraditya
Pull Request: https://github.com/llvm/llvm-project/pull/203631
Commit: 7f35300f0deb972606082122e4c7d76dda03203c
https://github.com/llvm/llvm-project/commit/7f35300f0deb972606082122e4c7d76dda03203c
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt/Compiler.h
M orc-rt/include/orc-rt/Error.h
Log Message:
-----------
[orc-rt] Replace ORC_RT_NODISCARD with [[nodiscard]]. NFCI. (#209169)
The ORC runtime requires C++17, so we can use the C++17 [[nodiscard]]
attribute directly, rather than going through a macro.
Commit: dc1273beba1c70cb74d03c760958ee625d8aecf5
https://github.com/llvm/llvm-project/commit/dc1273beba1c70cb74d03c760958ee625d8aecf5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper.c
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/lib/Object/OffloadBinary.cpp
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
clang-linker-wrapper: Use AMDGPU::TargetID for device-image compatibility (#209135)
Previously the link compatibilty was based on a raw string match of the
triple + cpu name. Start parsing the triple, and use the compatibility
function. Start using AMDGPU::TargetID from TargetParser, as a step
towards removing clang's redundant TargetID handling.
Co-authored-by: Claude (Opus 4.8)
Commit: 254472bc2edd6d8ec536656368869e36c386a339
https://github.com/llvm/llvm-project/commit/254472bc2edd6d8ec536656368869e36c386a339
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M flang/CMakeLists.txt
Log Message:
-----------
[Flang][CMake] Use LLVM-declared LLVM_EXTERNAL_LIT (#208680)
LLVM_EXTERNAL_LIT is already declared by
https://github.com/llvm/llvm-project/blob/99fb741b6e0da866bf3c6000531104bff347d787/llvm/cmake/modules/AddLLVM.cmake#L2175.
Flang's redeclaration in standalone builds is redundant and breaks on
Windows because the filename there is `llvm-lit.py`.
Commit: a9ba4d3fd27a05b31adfeaab5dcd42d8e43c1931
https://github.com/llvm/llvm-project/commit/a9ba4d3fd27a05b31adfeaab5dcd42d8e43c1931
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SLPVectorizer.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/loadi8.ll
M llvm/test/Transforms/SLPVectorizer/X86/runtime-alias-checks.ll
Log Message:
-----------
Revert "[SLP] Support memory runtime alias checks"
This reverts commit d4c6c8623e9bf9aa75ad049f55423223228116b3 to address
postcommit review https://github.com/llvm/llvm-project/pull/203631?email_source=notifications&email_token=ABI45DXYNFIHECEWI5IGYJT5ETMNLA5CNFSNUABKM5UWIORPF5TWS5BNNB2WEL2QOVWGYUTFOF2WK43UKJSXM2LFO4XTINRYGQ4TAMRWGAZ2M4TFMFZW63VMON2GC5DFL5RWQYLOM5S2KZLWMVXHJLDGN5XXIZLSL5RWY2LDNM#pullrequestreview-4684902603
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/209173
Commit: da0045a12dbc6cc5b07534ca9ddcceaef49f05de
https://github.com/llvm/llvm-project/commit/da0045a12dbc6cc5b07534ca9ddcceaef49f05de
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/global-constant.ll
M llvm/test/CodeGen/AMDGPU/global-directive.ll
M llvm/test/CodeGen/AMDGPU/global-extload-gfx11plus.ll
M llvm/test/CodeGen/AMDGPU/global-extload-i16.ll
M llvm/test/CodeGen/AMDGPU/global-i16-load-store.ll
M llvm/test/CodeGen/AMDGPU/global-load-saddr-to-vaddr.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics-min-max-system.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics.gfx1030.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics.gfx908.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-store.ll
M llvm/test/CodeGen/AMDGPU/global-smrd-unknown.ll
M llvm/test/CodeGen/AMDGPU/global-variable-relocs.ll
M llvm/test/CodeGen/AMDGPU/greedy-alloc-fail-sgpr1024-spill.mir
M llvm/test/CodeGen/AMDGPU/greedy-broken-ssa-verifier-error.mir
M llvm/test/CodeGen/AMDGPU/greedy-global-heuristic.mir
M llvm/test/CodeGen/AMDGPU/greedy-instruction-split-subrange.mir
M llvm/test/CodeGen/AMDGPU/greedy-liverange-priority.mir
M llvm/test/CodeGen/AMDGPU/greedy-remark-crash-unassigned-reg.mir
M llvm/test/CodeGen/AMDGPU/greedy-reverse-local-assignment.ll
M llvm/test/CodeGen/AMDGPU/group-image-instructions.ll
M llvm/test/CodeGen/AMDGPU/gv-const-addrspace.ll
M llvm/test/CodeGen/AMDGPU/gv-offset-folding.ll
M llvm/test/CodeGen/AMDGPU/gws-hazards.mir
M llvm/test/CodeGen/AMDGPU/gws_agpr.ll
M llvm/test/CodeGen/AMDGPU/half-alloca-promotion.ll
M llvm/test/CodeGen/AMDGPU/half.ll
M llvm/test/CodeGen/AMDGPU/hard-clause-limit-attr.mir
M llvm/test/CodeGen/AMDGPU/hard-clause-limit.mir
M llvm/test/CodeGen/AMDGPU/hard-clauses-gfx1250.mir
M llvm/test/CodeGen/AMDGPU/hard-clauses-img-gfx10.mir
M llvm/test/CodeGen/AMDGPU/hard-clauses-img-gfx11.mir
M llvm/test/CodeGen/AMDGPU/hard-clauses-img-gfx12.mir
M llvm/test/CodeGen/AMDGPU/hard-clauses-load-monitor.mir
M llvm/test/CodeGen/AMDGPU/hard-clauses.mir
M llvm/test/CodeGen/AMDGPU/hazard-buffer-store-v-interp.mir
M llvm/test/CodeGen/AMDGPU/hazard-flat-instruction-valu-check.mir
M llvm/test/CodeGen/AMDGPU/hazard-getreg-waitalu.mir
M llvm/test/CodeGen/AMDGPU/hazard-gfx1250-flat-scr-hi.mir
M llvm/test/CodeGen/AMDGPU/hazard-hidden-bundle.mir
M llvm/test/CodeGen/AMDGPU/hazard-in-bundle.mir
M llvm/test/CodeGen/AMDGPU/hazard-inlineasm.mir
M llvm/test/CodeGen/AMDGPU/hazard-kill.mir
M llvm/test/CodeGen/AMDGPU/hazard-lds-addtid.mir
M llvm/test/CodeGen/AMDGPU/hazard-pass-ordering.mir
M llvm/test/CodeGen/AMDGPU/hazard-pseudo-machineinstrs.mir
M llvm/test/CodeGen/AMDGPU/hazard-recognizer-meta-insts.mir
M llvm/test/CodeGen/AMDGPU/hazard-recognizer-src-shared-base.ll
M llvm/test/CodeGen/AMDGPU/hazard-setreg-vgpr-msb-gfx1250.mir
M llvm/test/CodeGen/AMDGPU/hazard-shift64.mir
M llvm/test/CodeGen/AMDGPU/hazard.mir
M llvm/test/CodeGen/AMDGPU/hazards-gfx1250.mir
M llvm/test/CodeGen/AMDGPU/hazards-gfx950.mir
M llvm/test/CodeGen/AMDGPU/high-RP-reschedule.mir
M llvm/test/CodeGen/AMDGPU/high-bits-zeroed-16-bit-ops.mir
M llvm/test/CodeGen/AMDGPU/hip.extern.shared.array.ll
M llvm/test/CodeGen/AMDGPU/hsa-func-align.ll
M llvm/test/CodeGen/AMDGPU/hsa-globals.ll
M llvm/test/CodeGen/AMDGPU/hsa-group-segment.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-agpr-register-count.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-agpr-small.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-dynlds-func-hidden-args-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-dynlds-funcarg-hidden-args-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-dynlds-kernarg-hidden-args-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-enqueue-kernel-.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-from-llvm-ctor-dtor-list.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-from-llvm-ir-full.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-heap-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-hidden-args-v4.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-hidden-args-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-hostcall-present-asan.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-hostcall-v4.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-hostcall-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-images.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-kernel-code-props.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-multigrid-sync-arg-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-queue-ptr-v4.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-queue-ptr-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-queueptr-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-resource-usage-function-ordering.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-uniform-workgroup-size-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-wavefrontsize.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-workgroup-processor-mode-v5.ll
M llvm/test/CodeGen/AMDGPU/huge-private-buffer.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-implicit-def.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-phi.ll
M llvm/test/CodeGen/AMDGPU/i1-divergent-phi-fix-sgpr-copies-assert.mir
M llvm/test/CodeGen/AMDGPU/i1-to-bf16.ll
M llvm/test/CodeGen/AMDGPU/i128-add-carry-chain.ll
M llvm/test/CodeGen/AMDGPU/i1_copy_phi_with_phi_incoming_value.mir
M llvm/test/CodeGen/AMDGPU/i8-extract-cost-comparison.ll
M llvm/test/CodeGen/AMDGPU/icmp.i16.ll
M llvm/test/CodeGen/AMDGPU/icmp64.ll
M llvm/test/CodeGen/AMDGPU/idemponent-atomics.ll
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (15) (#209118)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to
the folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping
the redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: b719e2e27ce121bec3afcf96f4806c0592ce95a1
https://github.com/llvm/llvm-project/commit/b719e2e27ce121bec3afcf96f4806c0592ce95a1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/idiv-licm.ll
M llvm/test/CodeGen/AMDGPU/idot2-test.ll
M llvm/test/CodeGen/AMDGPU/idot2.ll
M llvm/test/CodeGen/AMDGPU/idot4-test.ll
M llvm/test/CodeGen/AMDGPU/idot4s.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/idot8s.ll
M llvm/test/CodeGen/AMDGPU/idot8u.ll
M llvm/test/CodeGen/AMDGPU/iglp-no-clobber.ll
M llvm/test/CodeGen/AMDGPU/iglp.opt.reentry.ll
M llvm/test/CodeGen/AMDGPU/illegal-eviction-assert.mir
M llvm/test/CodeGen/AMDGPU/image-load-d16-tfe.ll
M llvm/test/CodeGen/AMDGPU/image-sample-waterfall.ll
M llvm/test/CodeGen/AMDGPU/image-schedule.ll
M llvm/test/CodeGen/AMDGPU/img-nouse-adjust.ll
M llvm/test/CodeGen/AMDGPU/imm.ll
M llvm/test/CodeGen/AMDGPU/imm16.ll
M llvm/test/CodeGen/AMDGPU/immv216.ll
M llvm/test/CodeGen/AMDGPU/implicit-arg-block-count.ll
M llvm/test/CodeGen/AMDGPU/implicit-arg-v5-opt.ll
M llvm/test/CodeGen/AMDGPU/implicit-kernarg-backend-usage.ll
M llvm/test/CodeGen/AMDGPU/implicit-kernel-argument-alignment.ll
M llvm/test/CodeGen/AMDGPU/implicitarg-offset-attributes.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si-gfx9.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-term.ll
M llvm/test/CodeGen/AMDGPU/indirect-call-known-callees.ll
M llvm/test/CodeGen/AMDGPU/indirect-call-set-from-other-function.ll
M llvm/test/CodeGen/AMDGPU/indirect-private-64.ll
M llvm/test/CodeGen/AMDGPU/indirect-reg-read-imm-idx.ll
M llvm/test/CodeGen/AMDGPU/indirect-reg-read-imm-idx.mir
M llvm/test/CodeGen/AMDGPU/infer-addrpace-pipeline.ll
M llvm/test/CodeGen/AMDGPU/infer-addrspace-flat-atomic.ll
M llvm/test/CodeGen/AMDGPU/infer-uniform-load-shader.ll
M llvm/test/CodeGen/AMDGPU/infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/inflate-av-remat-imm.mir
M llvm/test/CodeGen/AMDGPU/inflate-reg-class-vgpr-mfma-to-agpr-negative-tests.mir
M llvm/test/CodeGen/AMDGPU/inflate-reg-class-vgpr-mfma-to-av-with-load-source.mir
M llvm/test/CodeGen/AMDGPU/inflate-reg-class-vgpr-mfma-to-av.mir
M llvm/test/CodeGen/AMDGPU/inflated-reg-class-snippet-copy-use-after-free.mir
M llvm/test/CodeGen/AMDGPU/infloop-subrange-spill-inspect-subrange.mir
M llvm/test/CodeGen/AMDGPU/infloop-subrange-spill.mir
M llvm/test/CodeGen/AMDGPU/init-whole-wave-vgpr-count-large.ll
M llvm/test/CodeGen/AMDGPU/init-whole-wave-vgpr-count-leaf.ll
M llvm/test/CodeGen/AMDGPU/init-whole-wave-vgpr-count-use-inactive.ll
M llvm/test/CodeGen/AMDGPU/init-whole-wave-vgpr-count.ll
M llvm/test/CodeGen/AMDGPU/inline-asm-av-constraint-err.ll
M llvm/test/CodeGen/AMDGPU/inline-asm-av-constraint.ll
M llvm/test/CodeGen/AMDGPU/inline-asm-out-of-bounds-register.ll
M llvm/test/CodeGen/AMDGPU/inline-asm-reserved-regs.ll
M llvm/test/CodeGen/AMDGPU/inline-asm-vgpr-range-unsupported-width.ll
M llvm/test/CodeGen/AMDGPU/inline-asm-vgpr-sgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/inline-asm.i128.ll
M llvm/test/CodeGen/AMDGPU/inline-asm.ll
M llvm/test/CodeGen/AMDGPU/inline-attr.ll
M llvm/test/CodeGen/AMDGPU/inline-constraints.ll
M llvm/test/CodeGen/AMDGPU/inline-maxbb.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-16-fake16.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-16-true16.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-16.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-illegal-type.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-mismatched-size-error.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-mismatched-size.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-packed.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-v16.ll
M llvm/test/CodeGen/AMDGPU/insert-branch-w32.mir
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-attr.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-literal.mir
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-parse.mir
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-wmma-xdl.mir
M llvm/test/CodeGen/AMDGPU/insert-delay-alu.mir
M llvm/test/CodeGen/AMDGPU/insert-handle-flat-vmem-ds.mir
M llvm/test/CodeGen/AMDGPU/insert-skip-from-vcc.mir
M llvm/test/CodeGen/AMDGPU/insert-skips-gfx10.mir
M llvm/test/CodeGen/AMDGPU/insert-skips-gfx12.mir
M llvm/test/CodeGen/AMDGPU/insert-skips-gfx1250.mir
M llvm/test/CodeGen/AMDGPU/insert-skips-gws.mir
M llvm/test/CodeGen/AMDGPU/insert-skips-ignored-insts.mir
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-callee.mir
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-fence-soft.mir
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-gfx12-wbinv.mir
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-hang.mir
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-merge.ll
M llvm/test/CodeGen/AMDGPU/insert_subreg.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.subtest-nosaddr.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.subtest-saddr.ll
M llvm/test/CodeGen/AMDGPU/insert_waitcnt_for_precise_memory.ll
M llvm/test/CodeGen/AMDGPU/inserted-wait-states.mir
M llvm/test/CodeGen/AMDGPU/inst-prefetch-hint.ll
M llvm/test/CodeGen/AMDGPU/inst-prefetch-inline-asm.ll
M llvm/test/CodeGen/AMDGPU/integer-canonicalizing-src-modifiers.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
M llvm/test/CodeGen/AMDGPU/integer-select-src-modifiers.ll
M llvm/test/CodeGen/AMDGPU/internalize.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (16) (#209119)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx>
to the folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa),
dropping the redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: db87fc87c7fd70f9e429439aeebbf9cd014dde54
https://github.com/llvm/llvm-project/commit/db87fc87c7fd70f9e429439aeebbf9cd014dde54
Author: Mikhail R. Gadelha <mikhail at igalia.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/entrypoints.txt
Log Message:
-----------
[libc][RISC-V] Enable additional entrypoints and headers (#208927)
Bring most of the already enabled libs for x86_64 to riscv.
Also, move two libs in x86_64 entrypoints.txt to keep the file sorted
alphabetically.
Commit: 62b7c7f547da4af492e85aa09b6feafc9b513f23
https://github.com/llvm/llvm-project/commit/62b7c7f547da4af492e85aa09b6feafc9b513f23
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/flang/lib/Optimizer/Passes/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 5595710 (#209165)
This fixes 5595710093f7f8b9cdb0ff4f8d7400e58bde09b2.
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=5595710093f7f8b9cdb0ff4f8d7400e58bde09b2
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 9e014de2d3cc674b548e321013bfe42e6f5485ab
https://github.com/llvm/llvm-project/commit/9e014de2d3cc674b548e321013bfe42e6f5485ab
Author: Tony Guillot <tony.guillot at protonmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaExpr.cpp
M clang/test/SemaCXX/attr-sentinel.cpp
Log Message:
-----------
[Clang] Fixed missing sentinel attribute diagnostic discrepancy with explicit object parameters (#208842)
When using the sentinel attribute on a variadic function with an
explicit object parameter, the missing sentinel attribute diagnostic
takes into account the explicit object parameter as an argument. It was
diagnosing `missing sentinel in function call` instead of `not enough
variable arguments in '%0' declaration to fit a sentinel`, compared to
other similar variadic functions.
Fixes #200007
Commit: 90d8af8caac360dca0fa28abbb5804dcbe694ef1
https://github.com/llvm/llvm-project/commit/90d8af8caac360dca0fa28abbb5804dcbe694ef1
Author: Kieran B <kieran.bailey at arm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_dot.c
Log Message:
-----------
[Clang][AArch64] Add ACLE _n variants for svdot intrinsics (#208694)
Add missing _n variants for the svdot ACLE
intrinsics in arm_sve.td
Add CodeGen tests in acle_sve2p1_dot.c to verify
correct intrinsics are generated
List of Intrinsics:
- svdot_n_s32_s16
- svdot_n_u32_u16
- svdot_n_f32_f16
Commit: 7a8b26271b273ea36c1d68c97f4c87b63de4a2bd
https://github.com/llvm/llvm-project/commit/7a8b26271b273ea36c1d68c97f4c87b63de4a2bd
Author: quic-k <kushpal at qti.qualcomm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M libunwind/src/UnwindRegistersRestore.S
M libunwind/src/UnwindRegistersSave.S
Log Message:
-----------
[libunwind][Hexagon] Save/restore full r0-r7 in getcontext/jumpto (#208753)
The Hexagon save and restore routines dropped GPRs, producing an
incomplete context.
UnwindRegistersSave.S (__unw_getcontext): save r0-r7 (stores began at
__r[8]), drop a dead "r1 = memw(r30)" before the PC store, and return
UNW_ESUCCESS instead of a stale non-zero value.
UnwindRegistersRestore.S (jumpto): restore the missing r2-r7 (r0/r1 and
r8-r31 were already handled), and fix the stale "pointer is in r2"
comment (it is r0).
Signed-off-by: Kushal Pal <kushpal at qti.qualcomm.com>
Commit: ff599bba9d370bf58e4a34f9f29b4fb6234013f0
https://github.com/llvm/llvm-project/commit/ff599bba9d370bf58e4a34f9f29b4fb6234013f0
Author: quic-k <kushpal at qti.qualcomm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/test/Driver/hexagon-toolchain-picolibc.c
Log Message:
-----------
[Hexagon] Enable init-array by default for picolibc (#208639)
Picolibc uses the modern .init_array/.fini_array mechanism rather than
legacy .init/.fini sections. Extend UseInitArrayDefault in
HexagonToolChain::addClangTargetOptions to also return true when
--cstdlib=picolibc is selected, preventing -fno-use-init-array from
being passed to cc1.
Signed-off-by: Kushal Pal <kushpal at qti.qualcomm.com>
Commit: fc9a4afa9bdc406f1ce4e0dbc078734025ab2d9d
https://github.com/llvm/llvm-project/commit/fc9a4afa9bdc406f1ce4e0dbc078734025ab2d9d
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port SelectionDAGISel to NewPM
Similar to other targets, for getting the NewPM rolling.
Reviewers: aheejin, sbc100, dschuff
Pull Request: https://github.com/llvm/llvm-project/pull/208982
Commit: c31455cd07c43ed02445f5b1f1057037f0503552
https://github.com/llvm/llvm-project/commit/c31455cd07c43ed02445f5b1f1057037f0503552
Author: Jake Egan <Jake.egan at ibm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M libcxx/src/filesystem/operations.cpp
A libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.remove_all/bad_perms_parent.pass.cpp
Log Message:
-----------
[libc++] Fix filesystem::remove_all bug with read-only nested directory (#197104)
Consider a directory `parent/child`, where `parent` has read-only
permissions. Calling `remove_all` on `parent` is expected to fail with a
permission error, however it fails with a different error depending on
the platform (such as "error file exists" on AIX).
During the recursive removal, `unlinkat` is first called on the child
and fails with a permission error. Rather than returning, the function
continues and tries `unlinkat` on the parent and fails with a different
error depending on the platform. This error is returned instead of the
permission error. This PR makes the first encountered error be returned
instead.
According to the standard [fs.op.remove.all]:
> Effects: Recursively deletes the contents of p if it exists, then
> deletes file p itself, as if by POSIX remove.
The word "then" implies an ordering where deleting the contents of p
should be successful before deleting file p itself.
Fixes #197100.
Commit: 52511761bc80e96b7d07b4da71bb08c8f498dee1
https://github.com/llvm/llvm-project/commit/52511761bc80e96b7d07b4da71bb08c8f498dee1
Author: Wooseok Lee <wolee at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUMachineModuleInfo.h
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/test/CodeGen/AMDGPU/av-invalid-scope.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-invalid-syncscope.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-atomics.mir
Log Message:
-----------
[AMDGPU] Fix SSID merge in SIMemoryLegalizer to use smallest inclusiv… (#208300)
…e scope
SIMemOpAccess::constructFromMIWithMMO merged multiple MMO sync scopes by
calling isSyncScopeInclusion(A, B) and blindly overwriting SSID with B
when it returned false. This was correct when B strictly subsumes A, but
isSyncScopeInclusion returned false for both "A < B" and "A and B are
incomparable" -- e.g. agent-one-as (one-AS, agent level) vs workgroup
(cross-AS, workgroup level) live on different branches of the
two-dimensional scope lattice and neither subsumes the other. In the
incomparable case the resulting SSID depended on MMO order, silently
dropping agent-scope cache-management requirements.
Fix: replace isSyncScopeInclusion (std::optional<bool>) with
getMergedSyncScopeID (std::optional<SyncScope::ID>) which returns the
smallest scope inclusive of both inputs. The merged level is
max(level_A, level_B); if either input is cross-AS the result is also
cross-AS, since dropping cross-AS ordering would silently lose the
ordering guarantee for address spaces not covered by a one-AS scope.
Add tests in memory-legalizer-multiple-mem-operands-atomics.mir
verifying that a FLAT_ATOMIC_ADD with agent-one-as and workgroup MMOs
produces agent-scope cache ops (BUFFER_WBINVL1_VOL) regardless of MMO
order.
Commit: c42c7b47a634ab3f4455b0e8b17f2bbc3be022af
https://github.com/llvm/llvm-project/commit/c42c7b47a634ab3f4455b0e8b17f2bbc3be022af
Author: Anonmiraj <ezzibrahimx at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/Lex/PPDirectives.cpp
Log Message:
-----------
[clang][NFC] Skip macro source-location check for names that can't warn (#208862)
While profiling Linux headers, I noticed that
`Preprocessor::CheckMacroName` performs expensive source-location
queries for every macro, even when no diagnostic is possible. We can
avoid this overhead by only performing these checks when the macro name
is actually a reserved identifier or keyword, skipping them entirely for
ordinary macros.
| | basket Ir |
| --- | --- |
| before | 10,690,004,315 |
| after | 10,649,181,540 |
| **Δ** | **−40.8M (−0.38%)** |
this is a follow up to #137306 and #139492
Commit: aab2ff0b9096df1d5168e293c81b6653e759890d
https://github.com/llvm/llvm-project/commit/aab2ff0b9096df1d5168e293c81b6653e759890d
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/X86/avx512fp16-fmaxnum.ll
M llvm/test/CodeGen/X86/avx512fp16-fminnum.ll
Log Message:
-----------
[SDAG][X86] Form pseudo fmin/fmax from select_cc (#208717)
Create PSEUDO_FMIN/PSEUDO_FMAX from SELECT_CC in addition to
SELECT/VSELECT.
Unfortunately we can't just do this in the common SimplifySelectCC()
helper because of the StrictFP handling and need to handle all three
cases explicitly.
I ran into this trying to use the ops on s390x, but there are also some
avx512 cases that benefit, so I split out this generalization.
Commit: 592953beff733a1e28f6c6e5e39f948fb035a329
https://github.com/llvm/llvm-project/commit/592953beff733a1e28f6c6e5e39f948fb035a329
Author: Anonmiraj <ezzibrahimx at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/include/clang/Lex/Preprocessor.h
M clang/lib/Lex/Preprocessor.cpp
Log Message:
-----------
[clang][Diagnostics] Only record lexer check points when colors are enabled (#204926)
Only build lexer check points when colored diagnostics are enabled,
since that's the only case where they're ever used,
This should reduce the cost on larger builds.
| Commit | Basket Ir | Delta |
|---|---|---|
| 863b2c84 (Parent) | 30,240,576,150 | — |
| 718aac9f (Commit) | 30,336,607,185 | +0.318% |
| **+ this pr** | **30,279,772,621** | **+0.130%** |
**synthetic error file (12.3k lines, 300 errors):**
| Build | Error-TU Ir (colors on) | Δ vs commit |
|---|---|---|
| 718aac9f (Commit) | 1,386,488,658 | — |
| **+ this pr** | **1,387,140,588** | **+0.05%** |
Resolves #203764
---------
Co-authored-by: Timm Baeder <tbaeder at redhat.com>
Commit: ee71eb831b6090897df8ae4f843f4b14370131d5
https://github.com/llvm/llvm-project/commit/ee71eb831b6090897df8ae4f843f4b14370131d5
Author: StoeckOverflow <95052643+StoeckOverflow at users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/include/clang/APINotes/APINotesReader.h
M clang/lib/APINotes/APINotesFormat.h
M clang/lib/APINotes/APINotesReader.cpp
M clang/lib/Sema/SemaAPINotes.cpp
A clang/test/APINotes/Inputs/Headers/WhereParametersSema.apinotes
A clang/test/APINotes/Inputs/Headers/WhereParametersSema.h
M clang/test/APINotes/Inputs/Headers/module.modulemap
A clang/test/APINotes/where-parameters-sema.cpp
Log Message:
-----------
[APINotes] Match function-like Where.Parameters in Sema (#205307)
This PR teaches Sema to apply function-like `Where.Parameters` selectors
for API notes.
It builds on #204147 by using the serialized `Where.Parameters` selector
keys in Sema. For each `FunctionDecl` / `CXXMethodDecl`, Sema derives an
exact parameter selector from the declaration’s `FunctionProtoType`.
Broad name-only API notes lookup still runs first, preserving existing
behavior. If Clang can form a parameter selector, Sema then performs an
exact selector lookup and applies that result second, allowing
overload-specific notes to refine same-name broad notes.
Tests:
- Adds end-to-end module APINotes Sema coverage (`.apinotes` source ->
binary APINotes -> reader lookup -> Sema matching -> AST result)
- Covers core matching behavior for global functions and C++ methods,
including same-name overloads, exact empty selectors, broad-plus-exact
coexistence and mismatched selectors
- Covers important edge cases: default arguments, static methods, alias
spellings remaining non-canonicalized, by-value `const`, namespaced
functions, and overloaded operators.
This PR does not add duplicate-selector or unmatched-selector
diagnostics. Those remain for a follow-up diagnostics PR.
**Note**: this PR was originally stacked on top of #204147. It has now
been rebased on top of main containing those changes, so the remaining
diff should reflect only the top commit specific to this PR.
Reviewers: @Xazax-hun @j-hui @egorzhdan
---------
Co-authored-by: John Hui <updog at j-hui.com>
Commit: 42aaca2c4a6d69b6334be102e41d185526915f8b
https://github.com/llvm/llvm-project/commit/42aaca2c4a6d69b6334be102e41d185526915f8b
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt/Session.h
M orc-rt/test/unit/SessionTest.cpp
Log Message:
-----------
[orc-rt] Add ReportErrorsViaSession utility. (#209177)
ReportErrorsViaSession is a function object constructed from a Session&
that forwards Errors to that Session's reportError method. It will be
used in upcoming patches to simplify some error reporting plumbing.
Commit: f88150e1d5fc8591b0d71619d02e5b553161c1f8
https://github.com/llvm/llvm-project/commit/f88150e1d5fc8591b0d71619d02e5b553161c1f8
Author: Andrey Pavlenko <andrey.a.pavlenko at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
M mlir/test/Conversion/VectorToXeGPU/transfer-read-to-xegpu.mlir
Log Message:
-----------
[MLIR][XeGPU][VectorToXeGPU] Fixed transposed transfer_read/write (#197281)
The problem was that adjustStridesForPermutation() permutes strides, but
they are required to compute base offset from transfer read indices.
Added optional argument to computeMemrefMeta() to preserve the original
strides.
Commit: 4c519c6e558a0cccf80c072ccf0822488968cbaf
https://github.com/llvm/llvm-project/commit/4c519c6e558a0cccf80c072ccf0822488968cbaf
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
Log Message:
-----------
[gn] port 375cc88b510150d (AMDGPU -gisel-extended-llt) (#209181)
Commit: 290601ed3e08a7e90b81b0b17cf45e1a435783a7
https://github.com/llvm/llvm-project/commit/290601ed3e08a7e90b81b0b17cf45e1a435783a7
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M lldb/source/Plugins/SymbolLocator/SymStore/SymbolLocatorSymStore.cpp
M lldb/source/Plugins/SymbolLocator/SymStore/SymbolLocatorSymStoreProperties.td
M lldb/test/API/symstore/TestSymStore.py
Log Message:
-----------
[lldb] Make timeout for HTTP send/receive in SymbolLocatorSymStore configurable (#192061)
This patch adds the `plugin.symbol-locator.symstore.timeout` setting and
keeps the previously hard-coded value of 60 sections as the default. It
adds a test to check that the breakpoint doesn't resolve and we get the
correct warning message if the timeout hits.
---------
Co-authored-by: Nerixyz <nerixdev at outlook.de>
Commit: da1e5f1f6c096f360abe39ad2f7d235b6d270a70
https://github.com/llvm/llvm-project/commit/da1e5f1f6c096f360abe39ad2f7d235b6d270a70
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/DiagOutputUtils.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
M clang/test/Analysis/Checkers/WebKit/local-vars-checked-const-member.cpp
M clang/test/Analysis/Checkers/WebKit/local-vars-counted-const-member.cpp
M clang/test/Analysis/Checkers/WebKit/member-function-pointer-crash.cpp
M clang/test/Analysis/Checkers/WebKit/unchecked-local-vars.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-local-vars.cpp
M clang/test/Analysis/Checkers/WebKit/unretained-local-vars-arc.mm
M clang/test/Analysis/Checkers/WebKit/unretained-local-vars.mm
Log Message:
-----------
[alpha.webkit.UncheckedLocalVarsChecker] Improve the warning text (#208855)
This PR aligns UncheckedLocalVarsChecker and its variant's warning
message with the new warning format in
https://github.com/llvm/llvm-project/pull/202724.
Commit: ac370b8e838ada3dd482560c4b8a568e760f95b5
https://github.com/llvm/llvm-project/commit/ac370b8e838ada3dd482560c4b8a568e760f95b5
Author: Hugo Trachino <hugo.trachino at huawei.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/DecomposeGenericByUnfoldingPermutation.cpp
M mlir/test/Dialect/Linalg/specialize-generic-ops-fail.mlir
Log Message:
-----------
[MLIR][Linalg] Fix LinalgSpecializeGenericOpsPass for scalar inputs (#208466)
The test case added would crash because the Ranked Tensor-ness of
operands was assumed but never checked. This crash only happened when there
were multiple inputs as it must bail out somewhere else when there is only
1 input.
Commit: 24df1d13d9090e075b162bf81d1a34a408e54924
https://github.com/llvm/llvm-project/commit/24df1d13d9090e075b162bf81d1a34a408e54924
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/Template.h
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/TreeTransform.h
M clang/test/SemaTemplate/concepts-lambda.cpp
M clang/test/SemaTemplate/concepts.cpp
Log Message:
-----------
Reapply "[Clang] Transform lambda's constraints when instantiating parameter mapping (#207966)
This reapplies https://github.com/llvm/llvm-project/pull/195995
The last approach caused a regression because sometimes we transformed
the constraints of lambda expression too aggressively when we should
have preserved it.
The basic idea of this patch is to transform constraints of lambda
expressions when we instantiate the parameter mapping, thus the
evaluation can be emancipated from preserving outer template arguments.
Claude is used to help reduce the test case from #199209
Fixes https://github.com/llvm/llvm-project/issues/193944
Fixes https://github.com/llvm/llvm-project/issues/199209
Fixes https://github.com/llvm/llvm-project/issues/202957
Commit: f0a014a2f2f81cc69cda8177d772a348f6126aff
https://github.com/llvm/llvm-project/commit/f0a014a2f2f81cc69cda8177d772a348f6126aff
Author: Connector Switch <c8ef at outlook.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M .ci/compute_projects.py
M .ci/compute_projects_test.py
M .ci/green-dragon/lldb-windows.groovy
M .github/CODEOWNERS
M .github/new-prs-labeler.yml
M .github/workflows/build-ci-container-tooling.yml
M .github/workflows/commit-access-greeter.yml
M .github/workflows/containers/github-action-ci-tooling/Dockerfile
M .github/workflows/containers/github-action-ci-windows/Dockerfile
M .github/workflows/containers/github-action-ci/Dockerfile
M .github/workflows/ids-check.yml
R .github/workflows/libclang-python-tests.yml
M .github/workflows/libcxx-build-and-test.yaml
A .github/workflows/libcxx-pr-benchmark.yml
R .github/workflows/libcxx-run-benchmarks.yml
M .github/workflows/merged-prs.yml
M .github/workflows/release-documentation.yml
M .github/workflows/release-llvm-testing-tools.yml
M .github/workflows/test-suite.yml
M .github/workflows/test-suite/llvm.cmake
M .github/workflows/test-suite/x86_64.cmake
M bolt/CMakeLists.txt
M bolt/docs/BAT.md
M bolt/docs/BinaryAnalysis.md
A bolt/docs/GettingStarted.rst
M bolt/docs/OptimizingClang.md
M bolt/docs/PointerAuthDesign.md
M bolt/docs/conf.py
M bolt/docs/index.rst
M bolt/include/bolt/Core/BinaryBasicBlock.h
M bolt/include/bolt/Core/BinaryContext.h
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/include/bolt/Core/BinarySection.h
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/include/bolt/Core/Relocation.h
M bolt/include/bolt/Rewrite/RewriteInstance.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Core/DIEBuilder.cpp
M bolt/lib/Core/MCPlusBuilder.cpp
M bolt/lib/Passes/BinaryPasses.cpp
M bolt/lib/Passes/CacheMetrics.cpp
M bolt/lib/Passes/IdenticalCodeFolding.cpp
M bolt/lib/Passes/IndirectCallPromotion.cpp
M bolt/lib/Passes/ProfileQualityStats.cpp
M bolt/lib/Passes/ReorderAlgorithm.cpp
M bolt/lib/Passes/RetpolineInsertion.cpp
M bolt/lib/Rewrite/DWARFRewriter.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
M bolt/test/AArch64/computed-goto.s
M bolt/test/AArch64/got-load-symbolization.s
A bolt/test/AArch64/icp-inline.c
A bolt/test/AArch64/icp.c
M bolt/test/AArch64/lite-mode.s
M bolt/test/AArch64/unsupported-passes.test
M bolt/test/AArch64/use-old-text-zero-padding.c
M bolt/test/X86/dwarf4-cross-cu-ranges.test
M bolt/test/X86/dwarf5-debug-names-cross-cu.s
M bolt/test/X86/dwarf5-locexpr-addrx.s
M bolt/test/X86/icf-safe-icp.test
M bolt/test/X86/icf-safe-test1.test
M bolt/test/X86/icf-safe-test2GlobalConstPtrNoPic.test
M bolt/test/X86/indirect-goto.test
M bolt/test/X86/infer_no_exits.test
M bolt/test/X86/match-blocks-with-pseudo-probes-inline.test
M bolt/test/X86/pseudoprobe-decoding-inline.test
M bolt/test/X86/pseudoprobe-decoding-noinline.test
A bolt/test/X86/relr-odd-unaligned.c
M bolt/test/indirect-goto-relocs.test
M bolt/unittests/Profile/PerfScripts.cpp
M clang-tools-extra/clang-doc/BitcodeWriter.cpp
M clang-tools-extra/clang-doc/CMakeLists.txt
M clang-tools-extra/clang-doc/Representation.cpp
M clang-tools-extra/clang-doc/YAMLGenerator.cpp
A clang-tools-extra/clang-doc/markdown/CMakeLists.txt
A clang-tools-extra/clang-doc/markdown/Markdown.cpp
A clang-tools-extra/clang-doc/markdown/Markdown.h
M clang-tools-extra/clang-doc/support/File.h
M clang-tools-extra/clang-doc/support/Utils.h
M clang-tools-extra/clang-tidy/ClangTidy.cpp
M clang-tools-extra/clang-tidy/bugprone/BranchCloneCheck.h
M clang-tools-extra/clang-tidy/bugprone/UnhandledCodePathsCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/UnhandledCodePathsCheck.h
M clang-tools-extra/clang-tidy/cppcoreguidelines/RvalueReferenceParamNotMovedCheck.cpp
M clang-tools-extra/clang-tidy/cppcoreguidelines/RvalueReferenceParamNotMovedCheck.h
M clang-tools-extra/clang-tidy/cppcoreguidelines/SpecialMemberFunctionsCheck.cpp
M clang-tools-extra/clang-tidy/misc/ConfusableIdentifierCheck.cpp
M clang-tools-extra/clang-tidy/misc/ConfusableTable/BuildConfusableTable.cpp
M clang-tools-extra/clang-tidy/misc/ConstCorrectnessCheck.cpp
M clang-tools-extra/clang-tidy/misc/ConstCorrectnessCheck.h
M clang-tools-extra/clang-tidy/misc/ThrowByValueCatchByReferenceCheck.cpp
M clang-tools-extra/clang-tidy/modernize/AvoidCStyleCastCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseOverrideCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseOverrideCheck.h
M clang-tools-extra/clang-tidy/modernize/UseStringViewCheck.cpp
M clang-tools-extra/clang-tidy/readability/CMakeLists.txt
M clang-tools-extra/clang-tidy/readability/IdentifierNamingCheck.cpp
M clang-tools-extra/clang-tidy/readability/ReadabilityTidyModule.cpp
M clang-tools-extra/clang-tidy/readability/RedundantParenthesesCheck.cpp
A clang-tools-extra/clang-tidy/readability/TrivialSwitchCheck.cpp
A clang-tools-extra/clang-tidy/readability/TrivialSwitchCheck.h
M clang-tools-extra/clangd/AST.cpp
M clang-tools-extra/clangd/AST.h
M clang-tools-extra/clangd/CodeComplete.cpp
M clang-tools-extra/clangd/CompileCommands.cpp
M clang-tools-extra/clangd/Compiler.cpp
M clang-tools-extra/clangd/ModulesBuilder.cpp
M clang-tools-extra/clangd/ModulesBuilder.h
M clang-tools-extra/clangd/Preamble.cpp
M clang-tools-extra/clangd/SemanticHighlighting.cpp
M clang-tools-extra/clangd/XRefs.cpp
M clang-tools-extra/clangd/index/SymbolCollector.cpp
M clang-tools-extra/clangd/index/SymbolCollector.h
M clang-tools-extra/clangd/index/remote/marshalling/Marshalling.cpp
M clang-tools-extra/clangd/index/remote/server/Server.cpp
M clang-tools-extra/clangd/support/Markup.cpp
M clang-tools-extra/clangd/support/Markup.h
A clang-tools-extra/clangd/test/remote-index/cross-platform-root.test
M clang-tools-extra/clangd/unittests/CodeCompleteTests.cpp
M clang-tools-extra/clangd/unittests/HoverTests.cpp
M clang-tools-extra/clangd/unittests/IndexActionTests.cpp
M clang-tools-extra/clangd/unittests/PrerequisiteModulesTest.cpp
M clang-tools-extra/clangd/unittests/SemanticHighlightingTests.cpp
M clang-tools-extra/clangd/unittests/SymbolDocumentationTests.cpp
M clang-tools-extra/clangd/unittests/XRefsTests.cpp
M clang-tools-extra/clangd/unittests/remote/MarshallingTests.cpp
M clang-tools-extra/clangd/unittests/support/MarkupTests.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/command-processor.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/float-loop-counter.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/std-namespace-modification.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/throwing-static-initialization.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/unchecked-string-to-number-conversion.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/unhandled-code-paths.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/dcl50-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/dcl58-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/env33-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/err52-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/err58-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/fio38-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/flp30-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/rvalue-reference-param-not-moved.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/const-correctness.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/new-delete-overloads.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/non-copyable-objects.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/avoid-bind.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/avoid-setjmp-longjmp.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/avoid-variadic-functions.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-override.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/trivial-switch.rst
M clang-tools-extra/pp-trace/PPCallbacksTracker.cpp
A clang-tools-extra/test/clang-doc/Inputs/DR-141990.cpp
M clang-tools-extra/test/clang-doc/Inputs/basic-project/database_template.json
M clang-tools-extra/test/clang-doc/Inputs/basic-project/include/Rectangle.h
M clang-tools-extra/test/clang-doc/Inputs/basic-project/include/Shape.h
M clang-tools-extra/test/clang-doc/Inputs/basic-project/src/Calculator.cpp
M clang-tools-extra/test/clang-doc/Inputs/basic-project/src/Circle.cpp
M clang-tools-extra/test/clang-doc/Inputs/basic-project/src/Rectangle.cpp
A clang-tools-extra/test/clang-doc/Inputs/builtin_types.cpp
M clang-tools-extra/test/clang-doc/Inputs/class-partial-specialization.cpp
A clang-tools-extra/test/clang-doc/Inputs/class-requires.cpp
A clang-tools-extra/test/clang-doc/Inputs/class-specialization.cpp
A clang-tools-extra/test/clang-doc/Inputs/class-template.cpp
A clang-tools-extra/test/clang-doc/Inputs/class.cpp
A clang-tools-extra/test/clang-doc/Inputs/comments-in-macros.cpp
A clang-tools-extra/test/clang-doc/Inputs/compact.cpp
A clang-tools-extra/test/clang-doc/Inputs/compound-constraints.cpp
A clang-tools-extra/test/clang-doc/Inputs/concept.cpp
A clang-tools-extra/test/clang-doc/Inputs/conversion_function.cpp
M clang-tools-extra/test/clang-doc/Inputs/enum.cpp
A clang-tools-extra/test/clang-doc/Inputs/function-requires.cpp
A clang-tools-extra/test/clang-doc/Inputs/function-specifiers.cpp
A clang-tools-extra/test/clang-doc/Inputs/index.cpp
A clang-tools-extra/test/clang-doc/Inputs/inheritance.cpp
A clang-tools-extra/test/clang-doc/Inputs/long-name.cpp
A clang-tools-extra/test/clang-doc/Inputs/method-template.cpp
A clang-tools-extra/test/clang-doc/Inputs/multiple-namespaces.cpp
A clang-tools-extra/test/clang-doc/Inputs/mustache-index.cpp
A clang-tools-extra/test/clang-doc/Inputs/mustache-separate-namespace.cpp
A clang-tools-extra/test/clang-doc/Inputs/namespace-html-md.cpp
A clang-tools-extra/test/clang-doc/Inputs/namespace.cpp
A clang-tools-extra/test/clang-doc/Inputs/nested-namespace.cpp
M clang-tools-extra/test/clang-doc/Inputs/nested-pointer-qualifiers.cpp
A clang-tools-extra/test/clang-doc/Inputs/single-file-public.cpp
A clang-tools-extra/test/clang-doc/Inputs/single-file.cpp
A clang-tools-extra/test/clang-doc/Inputs/templates.cpp
M clang-tools-extra/test/clang-doc/Inputs/test-assets/test.css
M clang-tools-extra/test/clang-doc/Inputs/test-assets/test.js
A clang-tools-extra/test/clang-doc/Inputs/typedef-alias.cpp
R clang-tools-extra/test/clang-doc/array-type.cpp
M clang-tools-extra/test/clang-doc/basic-project.mustache.test
M clang-tools-extra/test/clang-doc/basic-project.test
R clang-tools-extra/test/clang-doc/builtin_types.cpp
R clang-tools-extra/test/clang-doc/class-partial-specialization.cpp
R clang-tools-extra/test/clang-doc/comments-in-macros.cpp
R clang-tools-extra/test/clang-doc/compact.cpp
R clang-tools-extra/test/clang-doc/conversion_function.cpp
R clang-tools-extra/test/clang-doc/enum.cpp
R clang-tools-extra/test/clang-doc/function-pointer-type.cpp
A clang-tools-extra/test/clang-doc/html/array-type.cpp
A clang-tools-extra/test/clang-doc/html/class-partial-specialization.cpp
A clang-tools-extra/test/clang-doc/html/class-specialization.cpp
A clang-tools-extra/test/clang-doc/html/class.cpp
A clang-tools-extra/test/clang-doc/html/comments-in-macros.cpp
A clang-tools-extra/test/clang-doc/html/compound-constraints.cpp
A clang-tools-extra/test/clang-doc/html/conversion_function.cpp
A clang-tools-extra/test/clang-doc/html/enum.cpp
A clang-tools-extra/test/clang-doc/html/function-pointer-type.cpp
A clang-tools-extra/test/clang-doc/html/index.cpp
A clang-tools-extra/test/clang-doc/html/long-name.cpp
A clang-tools-extra/test/clang-doc/html/member-function-pointer-type.cpp
A clang-tools-extra/test/clang-doc/html/mustache-index.cpp
A clang-tools-extra/test/clang-doc/html/mustache-separate-namespace.cpp
A clang-tools-extra/test/clang-doc/html/namespace.cpp
A clang-tools-extra/test/clang-doc/html/nested-pointer-qualifiers.cpp
A clang-tools-extra/test/clang-doc/html/templates.cpp
A clang-tools-extra/test/clang-doc/html/typedef-alias.cpp
R clang-tools-extra/test/clang-doc/index.cpp
M clang-tools-extra/test/clang-doc/json/class-partial-specialization.cpp
M clang-tools-extra/test/clang-doc/json/class-requires.cpp
M clang-tools-extra/test/clang-doc/json/class-specialization.cpp
M clang-tools-extra/test/clang-doc/json/class-template.cpp
M clang-tools-extra/test/clang-doc/json/class.cpp
A clang-tools-extra/test/clang-doc/json/compact.cpp
M clang-tools-extra/test/clang-doc/json/compound-constraints.cpp
M clang-tools-extra/test/clang-doc/json/concept.cpp
A clang-tools-extra/test/clang-doc/json/conversion_function.cpp
A clang-tools-extra/test/clang-doc/json/enum.cpp
M clang-tools-extra/test/clang-doc/json/function-requires.cpp
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M clang/lib/CIR/Dialect/Transforms/EHABILowering.cpp
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
M clang/lib/CIR/Dialect/Transforms/HoistAllocas.cpp
A clang/lib/CIR/Dialect/Transforms/LibOpt.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.h
M clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerItaniumCXXABI.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerModule.cpp
M clang/lib/CIR/FrontendAction/CIRGenAction.cpp
M clang/lib/CIR/Lowering/CIRPasses.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/LoweringHelpers.cpp
M clang/lib/CodeGen/ABIInfo.cpp
M clang/lib/CodeGen/ABIInfo.h
M clang/lib/CodeGen/BackendConsumer.h
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGAtomic.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCUDANV.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGCall.h
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGCoroutine.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprAgg.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/CGLoopInfo.cpp
M clang/lib/CodeGen/CGObjCMac.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/CodeGen/CMakeLists.txt
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/CodeGen/CodeGenTBAA.h
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/lib/CodeGen/HLSLBufferLayoutBuilder.cpp
M clang/lib/CodeGen/HLSLBufferLayoutBuilder.h
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/lib/CodeGen/README.txt
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/lib/CodeGen/TargetBuiltins/NVPTX.cpp
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/CodeGen/TargetBuiltins/SystemZ.cpp
M clang/lib/CodeGen/TargetBuiltins/X86.cpp
M clang/lib/CodeGen/Targets/AArch64.cpp
M clang/lib/CodeGen/Targets/BPF.cpp
M clang/lib/CodeGen/Targets/DirectX.cpp
M clang/lib/CodeGen/Targets/RISCV.cpp
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/lib/CodeGen/Targets/SystemZ.cpp
M clang/lib/CodeGen/Targets/X86.cpp
A clang/lib/CodeGen/pch.h
M clang/lib/CrossTU/CrossTranslationUnit.cpp
M clang/lib/DependencyScanning/DependencyScannerImpl.cpp
M clang/lib/DependencyScanning/ModuleDepCollector.cpp
M clang/lib/Driver/Action.cpp
M clang/lib/Driver/CMakeLists.txt
M clang/lib/Driver/Compilation.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/OffloadBundler.cpp
M clang/lib/Driver/SanitizerArgs.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/AMDGPU.h
R clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp
R clang/lib/Driver/ToolChains/AMDGPUOpenMP.h
M clang/lib/Driver/ToolChains/Arch/X86.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/Darwin.h
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/lib/Driver/ToolChains/HIPAMD.h
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/MSVC.cpp
M clang/lib/Driver/ToolChains/MSVC.h
M clang/lib/Driver/ToolChains/MinGW.cpp
M clang/lib/Driver/ToolChains/MinGW.h
M clang/lib/Driver/ToolChains/ZOS.cpp
M clang/lib/Format/CMakeLists.txt
M clang/lib/Format/Format.cpp
M clang/lib/Format/FormatToken.h
M clang/lib/Format/NumericLiteralInfo.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Format/UnwrappedLineParser.h
M clang/lib/Format/WhitespaceManager.cpp
M clang/lib/Frontend/ASTConsumers.cpp
M clang/lib/Frontend/ASTUnit.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/FrontendAction.cpp
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/lib/Frontend/TextDiagnostic.cpp
M clang/lib/Frontend/TextDiagnosticPrinter.cpp
M clang/lib/Headers/CMakeLists.txt
A clang/lib/Headers/__clang_gpu_builtin_vars.h
A clang/lib/Headers/__clang_gpu_device_functions.h
A clang/lib/Headers/__clang_gpu_intrinsics.h
R clang/lib/Headers/amxtf32intrin.h
M clang/lib/Headers/avx2intrin.h
A clang/lib/Headers/avx512bmmintrin.h
A clang/lib/Headers/avx512bmmvlintrin.h
M clang/lib/Headers/avx512bwintrin.h
M clang/lib/Headers/avx512vp2intersectintrin.h
M clang/lib/Headers/emmintrin.h
M clang/lib/Headers/immintrin.h
M clang/lib/Headers/ptrauth.h
M clang/lib/Headers/riscv_packed_simd.h
M clang/lib/Headers/stdint.h
M clang/lib/Headers/xmmintrin.h
A clang/lib/Headers/zos_wrappers/grp.h
A clang/lib/Headers/zos_wrappers/locale.h
A clang/lib/Headers/zos_wrappers/math.h
A clang/lib/Headers/zos_wrappers/poll.h
A clang/lib/Headers/zos_wrappers/stdlib.h
A clang/lib/Headers/zos_wrappers/string.h
A clang/lib/Headers/zos_wrappers/time.h
A clang/lib/Headers/zos_wrappers/variant.h
M clang/lib/Interpreter/IncrementalExecutor.cpp
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/Lex/CMakeLists.txt
M clang/lib/Lex/Lexer.cpp
M clang/lib/Lex/LiteralSupport.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/lib/Lex/Pragma.cpp
M clang/lib/Lex/Preprocessor.cpp
A clang/lib/Lex/TextEncoding.cpp
M clang/lib/Lex/TokenConcatenation.cpp
M clang/lib/Parse/ParseCXXInlineMethods.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseInit.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Parse/ParseStmt.cpp
M clang/lib/Parse/ParseTemplate.cpp
M clang/lib/Rewrite/HTMLRewrite.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/CMakeLists.txt
A clang/lib/ScalableStaticAnalysis/Analyses/OperatorNewDelete/OperatorNewDeletePointers.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlowAnalysis.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/SSAFAnalysesCommon.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/SSAFAnalysesCommon.h
M clang/lib/ScalableStaticAnalysis/Analyses/UnsafeBufferUsage/UnsafeBufferUsageAnalysis.cpp
M clang/lib/ScalableStaticAnalysis/Core/CMakeLists.txt
M clang/lib/ScalableStaticAnalysis/Core/ModelStringConversions.h
M clang/lib/ScalableStaticAnalysis/Core/Serialization/JSONFormat/Artifact.cpp
M clang/lib/ScalableStaticAnalysis/Core/Serialization/JSONFormat/JSONFormatImpl.cpp
M clang/lib/ScalableStaticAnalysis/Core/Serialization/JSONFormat/JSONFormatImpl.h
M clang/lib/ScalableStaticAnalysis/Core/Serialization/JSONFormat/LUSummaryEncoding.cpp
A clang/lib/ScalableStaticAnalysis/Core/Serialization/JSONFormat/MultiArchSharedLibrary.cpp
A clang/lib/ScalableStaticAnalysis/Core/Serialization/JSONFormat/MultiArchStaticLibrary.cpp
A clang/lib/ScalableStaticAnalysis/Core/Serialization/JSONFormat/StaticLibrary.cpp
M clang/lib/ScalableStaticAnalysis/Core/Serialization/JSONFormat/TUSummaryEncoding.cpp
M clang/lib/ScalableStaticAnalysis/Core/Serialization/SerializationFormatRegistry.cpp
M clang/lib/ScalableStaticAnalysis/Core/SummaryData/SummaryDataBuilderRegistry.cpp
M clang/lib/ScalableStaticAnalysis/Core/TUSummary/ExtractorRegistry.cpp
M clang/lib/ScalableStaticAnalysis/Core/WholeProgramAnalysis/AnalysisRegistry.cpp
M clang/lib/ScalableStaticAnalysis/SourceTransformation/CMakeLists.txt
A clang/lib/ScalableStaticAnalysis/SourceTransformation/SARIFTransformationReportFormat.cpp
M clang/lib/ScalableStaticAnalysis/SourceTransformation/TransformationRegistry.cpp
A clang/lib/ScalableStaticAnalysis/SourceTransformation/YAMLSourceEditFormat.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/CMakeLists.txt
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/DeclSpec.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.h
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/IdentifierResolver.cpp
M clang/lib/Sema/Scope.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaAMDGPU.cpp
M clang/lib/Sema/SemaAPINotes.cpp
M clang/lib/Sema/SemaCXXScopeSpec.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
A clang/lib/Sema/SemaExpand.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/lib/Sema/SemaLifetimeSafety.h
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaOpenACCClause.cpp
M clang/lib/Sema/SemaOpenCL.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaSYCL.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaStmtAsm.cpp
M clang/lib/Sema/SemaStmtAttr.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Sema/SemaTypeTraits.cpp
M clang/lib/Sema/SemaX86.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTCommon.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/StaticAnalyzer/Checkers/BlockInCriticalSectionChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/CMakeLists.txt
M clang/lib/StaticAnalyzer/Checkers/CStringChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/GenericTaintChecker.cpp
A clang/lib/StaticAnalyzer/Checkers/LifetimeModeling.cpp
A clang/lib/StaticAnalyzer/Checkers/LifetimeModeling.h
M clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MoveChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/NullabilityChecker.cpp
A clang/lib/StaticAnalyzer/Checkers/UseAfterLifetimeEnd.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/DiagOutputUtils.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLambdaCapturesChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefMemberChecker.cpp
M clang/lib/StaticAnalyzer/Core/BasicValueFactory.cpp
M clang/lib/StaticAnalyzer/Core/CheckerManager.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineC.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCallAndReturn.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineObjC.cpp
M clang/lib/StaticAnalyzer/Core/HTMLDiagnostics.cpp
M clang/lib/StaticAnalyzer/Core/RangeConstraintManager.cpp
M clang/lib/StaticAnalyzer/Core/Z3CrosscheckVisitor.cpp
M clang/lib/Tooling/CompilationDatabase.cpp
M clang/lib/Tooling/DependencyScanningTool.cpp
M clang/lib/Tooling/Execution.cpp
M clang/lib/Tooling/InterpolatingCompilationDatabase.cpp
M clang/lib/Tooling/Tooling.cpp
M clang/lib/UnifiedSymbolResolution/USRGeneration.cpp
A clang/test/APINotes/Inputs/Headers/WhereParametersSema.apinotes
A clang/test/APINotes/Inputs/Headers/WhereParametersSema.h
M clang/test/APINotes/Inputs/Headers/module.modulemap
M clang/test/APINotes/Inputs/WhereParametersConvertDiag/APINotes.apinotes
M clang/test/APINotes/Inputs/WhereParametersConvertDiag/WhereParametersConvertDiag.h
A clang/test/APINotes/Inputs/WhereParametersEmptyWhereDiag/APINotes.apinotes
A clang/test/APINotes/Inputs/WhereParametersEmptyWhereDiag/WhereParametersConvertDiag.h
M clang/test/APINotes/where-parameters-convert-diags.cpp
A clang/test/APINotes/where-parameters-sema.cpp
M clang/test/AST/ByteCode/builtin-constant-p.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
M clang/test/AST/ByteCode/codegen.cpp
M clang/test/AST/ByteCode/cxx11.cpp
M clang/test/AST/ByteCode/cxx17.cpp
M clang/test/AST/ByteCode/cxx20.cpp
M clang/test/AST/ByteCode/cxx23.cpp
M clang/test/AST/ByteCode/cxx2a.cpp
M clang/test/AST/ByteCode/dynamic-cast.cpp
A clang/test/AST/ByteCode/enable_if.c
M clang/test/AST/ByteCode/invalid.cpp
M clang/test/AST/ByteCode/literals.cpp
A clang/test/AST/ByteCode/module-dummy-redecl.cpp
M clang/test/AST/ByteCode/mutable.cpp
M clang/test/AST/ByteCode/new-delete.cpp
M clang/test/AST/ByteCode/placement-new.cpp
M clang/test/AST/ByteCode/typeid.cpp
R clang/test/AST/HLSL/ConstantBuffers-AST-error.hlsl
M clang/test/AST/HLSL/ConstantBuffers-AST.hlsl
A clang/test/AST/HLSL/Texture2D-AST.hlsl
A clang/test/AST/HLSL/Texture2DArray-scalar-AST.hlsl
A clang/test/AST/HLSL/Texture2DArray-shorthand-AST.hlsl
A clang/test/AST/HLSL/Texture2DArray-vector-AST.hlsl
A clang/test/AST/HLSL/resources-in-structs-method-call.hlsl
A clang/test/AST/ast-dump-expansion-stmt.cpp
A clang/test/AST/ast-dump-init.cpp
A clang/test/AST/ast-print-expansion-stmts.cpp
A clang/test/AST/ast_matchers_updated.test
M clang/test/Analysis/ArrayBound/assumption-reporting.c
M clang/test/Analysis/Checkers/WebKit/binding-to-refptr.cpp
M clang/test/Analysis/Checkers/WebKit/call-args-checked-const-member.cpp
M clang/test/Analysis/Checkers/WebKit/call-args-checked-ptr.cpp
M clang/test/Analysis/Checkers/WebKit/call-args-checked.cpp
M clang/test/Analysis/Checkers/WebKit/call-args-counted-const-member.cpp
M clang/test/Analysis/Checkers/WebKit/call-args-loop-init-opaque-value.cpp
M clang/test/Analysis/Checkers/WebKit/call-args-safe-functions.cpp
M clang/test/Analysis/Checkers/WebKit/call-args-wtf-containers.cpp
M clang/test/Analysis/Checkers/WebKit/call-args.cpp
M clang/test/Analysis/Checkers/WebKit/local-vars-checked-const-member.cpp
M clang/test/Analysis/Checkers/WebKit/local-vars-counted-const-member.cpp
M clang/test/Analysis/Checkers/WebKit/member-function-pointer-crash.cpp
M clang/test/Analysis/Checkers/WebKit/mock-types.h
M clang/test/Analysis/Checkers/WebKit/ref-countable-default-arg-nullptr.cpp
M clang/test/Analysis/Checkers/WebKit/unchecked-call-arg.cpp
A clang/test/Analysis/Checkers/WebKit/unchecked-lambda-captures.cpp
M clang/test/Analysis/Checkers/WebKit/unchecked-local-vars.cpp
M clang/test/Analysis/Checkers/WebKit/unchecked-members-objc.mm
M clang/test/Analysis/Checkers/WebKit/unchecked-members.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures-decl-protects-this-crash.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-local-vars.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-members-objc.mm
M clang/test/Analysis/Checkers/WebKit/uncounted-members-ref-deref-on-diff-classes.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-members.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-obj-arg.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-obj-arg.mm
M clang/test/Analysis/Checkers/WebKit/uncounted-obj-const-v-muable.cpp
M clang/test/Analysis/Checkers/WebKit/unretained-call-args-arc.mm
M clang/test/Analysis/Checkers/WebKit/unretained-call-args-member.mm
M clang/test/Analysis/Checkers/WebKit/unretained-call-args.mm
M clang/test/Analysis/Checkers/WebKit/unretained-lambda-captures-arc.mm
M clang/test/Analysis/Checkers/WebKit/unretained-lambda-captures.mm
M clang/test/Analysis/Checkers/WebKit/unretained-local-vars-arc.mm
M clang/test/Analysis/Checkers/WebKit/unretained-local-vars.mm
M clang/test/Analysis/Checkers/WebKit/unretained-members-arc.mm
M clang/test/Analysis/Checkers/WebKit/unretained-members.mm
M clang/test/Analysis/Checkers/WebKit/unretained-obj-arg.mm
M clang/test/Analysis/Inputs/system-header-simulator-cxx.h
A clang/test/Analysis/Scalable/OperatorNewDelete/Inputs/tu-summary-bad-id.json
A clang/test/Analysis/Scalable/OperatorNewDelete/Inputs/tu-summary-no-key.json
A clang/test/Analysis/Scalable/OperatorNewDelete/Inputs/tu-summary.json
A clang/test/Analysis/Scalable/OperatorNewDelete/Inputs/wpa-result-bad-id.json
A clang/test/Analysis/Scalable/OperatorNewDelete/Inputs/wpa-result-empty.json
A clang/test/Analysis/Scalable/OperatorNewDelete/Inputs/wpa-result-no-key.json
A clang/test/Analysis/Scalable/OperatorNewDelete/operator-new-delete.cpp
A clang/test/Analysis/Scalable/OperatorNewDelete/tu-summary-serialization.test
A clang/test/Analysis/Scalable/OperatorNewDelete/wpa-result-serialization.test
M clang/test/Analysis/Scalable/PointerFlow/entity-name-no-conflict.cpp
A clang/test/Analysis/Scalable/ssaf-format/Artifact/Inputs/rt-multi-arch-shared-library-empty.json
A clang/test/Analysis/Scalable/ssaf-format/Artifact/Inputs/rt-multi-arch-shared-library-nonempty.json
A clang/test/Analysis/Scalable/ssaf-format/Artifact/Inputs/rt-multi-arch-static-library-empty.json
A clang/test/Analysis/Scalable/ssaf-format/Artifact/Inputs/rt-multi-arch-static-library-nonempty.json
A clang/test/Analysis/Scalable/ssaf-format/Artifact/Inputs/rt-static-library-empty.json
M clang/test/Analysis/Scalable/ssaf-format/Artifact/round-trip.test
M clang/test/Analysis/Scalable/ssaf-format/Artifact/top-level.test
A clang/test/Analysis/Scalable/ssaf-format/MultiArchSharedLibrary/Inputs/duplicate-target-triple.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchSharedLibrary/Inputs/invalid-syntax.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchSharedLibrary/Inputs/member-empty-lu-namespace.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchSharedLibrary/Inputs/member-inner-error.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchSharedLibrary/Inputs/member-mismatched-type.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchSharedLibrary/Inputs/member-missing-type.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchSharedLibrary/Inputs/member-namespace-mismatch.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchSharedLibrary/Inputs/member-not-object.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchSharedLibrary/Inputs/members-not-array.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchSharedLibrary/Inputs/mismatched-type.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchSharedLibrary/Inputs/missing-members.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchSharedLibrary/Inputs/missing-namespace.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchSharedLibrary/Inputs/missing-type.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchSharedLibrary/Inputs/namespace-not-array.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchSharedLibrary/Inputs/not-json-extension.txt
A clang/test/Analysis/Scalable/ssaf-format/MultiArchSharedLibrary/Inputs/not-object.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchSharedLibrary/Inputs/rt-empty-members.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchSharedLibrary/Inputs/rt-multiple-members.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchSharedLibrary/Inputs/rt-nonempty-members.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchSharedLibrary/Inputs/rt-single-member.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchSharedLibrary/Inputs/rt-three-members.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchSharedLibrary/Inputs/unsorted-members-input.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchSharedLibrary/Inputs/unsorted-three-members-input.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchSharedLibrary/io.test
A clang/test/Analysis/Scalable/ssaf-format/MultiArchSharedLibrary/permissions.test
A clang/test/Analysis/Scalable/ssaf-format/MultiArchSharedLibrary/round-trip.test
A clang/test/Analysis/Scalable/ssaf-format/MultiArchSharedLibrary/top-level.test
A clang/test/Analysis/Scalable/ssaf-format/MultiArchStaticLibrary/Inputs/duplicate-target-triple.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchStaticLibrary/Inputs/invalid-syntax.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchStaticLibrary/Inputs/member-inner-error.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchStaticLibrary/Inputs/member-mismatched-type.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchStaticLibrary/Inputs/member-missing-type.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchStaticLibrary/Inputs/member-namespace-mismatch.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchStaticLibrary/Inputs/member-not-object.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchStaticLibrary/Inputs/members-not-array.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchStaticLibrary/Inputs/mismatched-type.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchStaticLibrary/Inputs/missing-members.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchStaticLibrary/Inputs/missing-namespace.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchStaticLibrary/Inputs/missing-type.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchStaticLibrary/Inputs/namespace-not-object.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchStaticLibrary/Inputs/namespace-wrong-kind.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchStaticLibrary/Inputs/not-json-extension.txt
A clang/test/Analysis/Scalable/ssaf-format/MultiArchStaticLibrary/Inputs/not-object.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchStaticLibrary/Inputs/rt-empty-members.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchStaticLibrary/Inputs/rt-multiple-members.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchStaticLibrary/Inputs/rt-nonempty-members.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchStaticLibrary/Inputs/rt-single-member.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchStaticLibrary/Inputs/rt-three-members.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchStaticLibrary/Inputs/unsorted-members-input.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchStaticLibrary/Inputs/unsorted-three-members-input.json
A clang/test/Analysis/Scalable/ssaf-format/MultiArchStaticLibrary/io.test
A clang/test/Analysis/Scalable/ssaf-format/MultiArchStaticLibrary/permissions.test
A clang/test/Analysis/Scalable/ssaf-format/MultiArchStaticLibrary/round-trip.test
A clang/test/Analysis/Scalable/ssaf-format/MultiArchStaticLibrary/top-level.test
A clang/test/Analysis/Scalable/ssaf-format/StaticLibrary/Inputs/duplicate-member.json
A clang/test/Analysis/Scalable/ssaf-format/StaticLibrary/Inputs/invalid-syntax.json
A clang/test/Analysis/Scalable/ssaf-format/StaticLibrary/Inputs/member-inner-error.json
A clang/test/Analysis/Scalable/ssaf-format/StaticLibrary/Inputs/member-mismatched-type.json
A clang/test/Analysis/Scalable/ssaf-format/StaticLibrary/Inputs/member-missing-type.json
A clang/test/Analysis/Scalable/ssaf-format/StaticLibrary/Inputs/member-not-object.json
A clang/test/Analysis/Scalable/ssaf-format/StaticLibrary/Inputs/member-triple-mismatch.json
A clang/test/Analysis/Scalable/ssaf-format/StaticLibrary/Inputs/members-not-array.json
A clang/test/Analysis/Scalable/ssaf-format/StaticLibrary/Inputs/mismatched-type.json
A clang/test/Analysis/Scalable/ssaf-format/StaticLibrary/Inputs/missing-members.json
A clang/test/Analysis/Scalable/ssaf-format/StaticLibrary/Inputs/missing-namespace.json
A clang/test/Analysis/Scalable/ssaf-format/StaticLibrary/Inputs/missing-target-triple.json
A clang/test/Analysis/Scalable/ssaf-format/StaticLibrary/Inputs/missing-type.json
A clang/test/Analysis/Scalable/ssaf-format/StaticLibrary/Inputs/namespace-invalid-kind.json
A clang/test/Analysis/Scalable/ssaf-format/StaticLibrary/Inputs/namespace-missing-kind.json
A clang/test/Analysis/Scalable/ssaf-format/StaticLibrary/Inputs/namespace-missing-name.json
A clang/test/Analysis/Scalable/ssaf-format/StaticLibrary/Inputs/namespace-wrong-kind.json
A clang/test/Analysis/Scalable/ssaf-format/StaticLibrary/Inputs/not-json-extension.txt
A clang/test/Analysis/Scalable/ssaf-format/StaticLibrary/Inputs/not-normalized-target-triple.json
A clang/test/Analysis/Scalable/ssaf-format/StaticLibrary/Inputs/not-object.json
A clang/test/Analysis/Scalable/ssaf-format/StaticLibrary/Inputs/rt-empty.json
A clang/test/Analysis/Scalable/ssaf-format/StaticLibrary/Inputs/rt-multiple-members.json
A clang/test/Analysis/Scalable/ssaf-format/StaticLibrary/Inputs/rt-single-member.json
A clang/test/Analysis/Scalable/ssaf-format/StaticLibrary/Inputs/unsorted-members-input.json
A clang/test/Analysis/Scalable/ssaf-format/StaticLibrary/io.test
A clang/test/Analysis/Scalable/ssaf-format/StaticLibrary/permissions.test
A clang/test/Analysis/Scalable/ssaf-format/StaticLibrary/round-trip.test
A clang/test/Analysis/Scalable/ssaf-format/StaticLibrary/top-level.test
M clang/test/Analysis/analyzer-config.c
M clang/test/Analysis/bitwise-shift-common.c
A clang/test/Analysis/block-in-critical-section-raii.cpp
M clang/test/Analysis/bstring.c
M clang/test/Analysis/constant-folding.c
A clang/test/Analysis/debug-lifetime-bound.cpp
A clang/test/Analysis/html_diagnostics/variable-popups-eol.c
A clang/test/Analysis/lifetime-bound.cpp
A clang/test/Analysis/malloc-failure.c
M clang/test/Analysis/malloc.c
M clang/test/Analysis/missing-z3-nocrash.c
M clang/test/Analysis/pr22954.c
A clang/test/Analysis/string-search-modeling.c
M clang/test/Analysis/string.c
A clang/test/Analysis/use-after-move-iterator.cpp
M clang/test/Analysis/use-after-move.cpp
M clang/test/Analysis/z3/D83660.c
M clang/test/Analysis/z3/pretty-dump.c
A clang/test/Analysis/z3/z3-logicalexpr-eval.c
M clang/test/Analysis/z3/z3-unarysymexpr.c
M clang/test/C/C11/n1285_1.c
M clang/test/C/C23/n3007.c
M clang/test/CIR/CodeGen/abstract-cond.c
A clang/test/CIR/CodeGen/agg-atomic-cast.c
R clang/test/CIR/CodeGen/agg-atomic-cast.cpp
M clang/test/CIR/CodeGen/agg-expr-lvalue.c
M clang/test/CIR/CodeGen/agg-init-constexpr.cpp
M clang/test/CIR/CodeGen/aggregate-copy-overlap.cpp
A clang/test/CIR/CodeGen/anonymous-nested-init.c
M clang/test/CIR/CodeGen/array-init-loop-exprs.cpp
M clang/test/CIR/CodeGen/array.cpp
M clang/test/CIR/CodeGen/atomic-libcall.c
M clang/test/CIR/CodeGen/attr-noundef.cpp
M clang/test/CIR/CodeGen/attr-target-x86.c
M clang/test/CIR/CodeGen/binassign.c
A clang/test/CIR/CodeGen/bitfield-init-values.c
M clang/test/CIR/CodeGen/bitfields.cpp
A clang/test/CIR/CodeGen/builtin-atomic-is-lock-free.c
A clang/test/CIR/CodeGen/builtin-multiprecision.c
M clang/test/CIR/CodeGen/builtins-x86.c
A clang/test/CIR/CodeGen/cleanup-scope-throw-caught.cpp
M clang/test/CIR/CodeGen/complex-cast.cpp
M clang/test/CIR/CodeGen/compound_literal.cpp
M clang/test/CIR/CodeGen/const-array-floating-point.c
M clang/test/CIR/CodeGen/constant-inits.cpp
M clang/test/CIR/CodeGen/consteval-aggregate.cpp
M clang/test/CIR/CodeGen/constexpr-ptr-offset.cpp
M clang/test/CIR/CodeGen/copy-constructor.cpp
A clang/test/CIR/CodeGen/cross-reference-globals.c
M clang/test/CIR/CodeGen/ctor-try-body.cpp
M clang/test/CIR/CodeGen/cxx-rewritten-binary-operator.cpp
M clang/test/CIR/CodeGen/cxx-special-member-attr.cpp
M clang/test/CIR/CodeGen/embed-expr.c
A clang/test/CIR/CodeGen/enum-bool.cpp
A clang/test/CIR/CodeGen/flexible-array-init.c
A clang/test/CIR/CodeGen/fp16-native-args.c
A clang/test/CIR/CodeGen/fp16.c
M clang/test/CIR/CodeGen/global-array-dtor.cpp
M clang/test/CIR/CodeGen/global-decomp-decls.cpp
M clang/test/CIR/CodeGen/global-dtor-union-narrowed.cpp
M clang/test/CIR/CodeGen/global-init.cpp
A clang/test/CIR/CodeGen/global-replace-string-array.c
M clang/test/CIR/CodeGen/global-temp-dtor.cpp
A clang/test/CIR/CodeGen/global-temporary-comdat.cpp
M clang/test/CIR/CodeGen/global-tls-dyn-init.cpp
M clang/test/CIR/CodeGen/global-tls-templates.cpp
M clang/test/CIR/CodeGen/globals.cpp
A clang/test/CIR/CodeGen/goto-address-label-table.c
M clang/test/CIR/CodeGen/inherited-ctors.cpp
M clang/test/CIR/CodeGen/inline-asm.c
A clang/test/CIR/CodeGen/int128-global-const.cpp
M clang/test/CIR/CodeGen/label-values.c
M clang/test/CIR/CodeGen/lambda-dtor-field.cpp
M clang/test/CIR/CodeGen/lambda.cpp
M clang/test/CIR/CodeGen/local-const-aggregate-name-clash.cpp
M clang/test/CIR/CodeGen/loop.cpp
M clang/test/CIR/CodeGen/no-odr-use.cpp
M clang/test/CIR/CodeGen/no-unique-address.cpp
M clang/test/CIR/CodeGen/nrvo.cpp
M clang/test/CIR/CodeGen/paren-init-list.cpp
M clang/test/CIR/CodeGen/paren-list-agg-init.cpp
A clang/test/CIR/CodeGen/pointer-to-empty-data-member.cpp
M clang/test/CIR/CodeGen/pointer-to-member-func.cpp
M clang/test/CIR/CodeGen/record-zero-init-padding.c
M clang/test/CIR/CodeGen/replace-global.cpp
M clang/test/CIR/CodeGen/self-ref-temporaries.cpp
M clang/test/CIR/CodeGen/statement-exprs.c
M clang/test/CIR/CodeGen/static-local.cpp
M clang/test/CIR/CodeGen/static-members.cpp
M clang/test/CIR/CodeGen/struct-init.cpp
M clang/test/CIR/CodeGen/struct.cpp
A clang/test/CIR/CodeGen/switch-range.c
M clang/test/CIR/CodeGen/temp-param-obj-decl.cpp
M clang/test/CIR/CodeGen/thread-local-in-func.cpp
M clang/test/CIR/CodeGen/three-way-cmp.cpp
M clang/test/CIR/CodeGen/union-agg-init.c
M clang/test/CIR/CodeGen/var-arg-aggregate.c
M clang/test/CIR/CodeGen/variable-decomposition.cpp
A clang/test/CIR/CodeGen/vtable-load-invariant.cpp
A clang/test/CIR/CodeGenBuiltins/RISCV/riscv-xcvalu.c
M clang/test/CIR/CodeGenBuiltins/builtin-fpclassify.c
M clang/test/CIR/CodeGenBuiltins/builtin-isfpclass.c
M clang/test/CIR/CodeGenBuiltins/builtin-isinf-sign.c
A clang/test/CIR/CodeGenBuiltins/builtin-nondeterministic-value.c
M clang/test/CIR/CodeGenBuiltins/builtins-elementwise.c
M clang/test/CIR/CodeGenBuiltins/builtins-overflow.cpp
M clang/test/CIR/CodeGenCUDA/address-spaces.cu
A clang/test/CIR/CodeGenCUDA/surface.cu
A clang/test/CIR/CodeGenCXX/base-layout.cpp
M clang/test/CIR/CodeGenCXX/global-refs.cpp
M clang/test/CIR/CodeGenCXX/new-array-init.cpp
M clang/test/CIR/CodeGenCXX/sizeof-pack.cpp
M clang/test/CIR/CodeGenCXX/uncopyable-args.cpp
M clang/test/CIR/CodeGenCXX/zero_init_bases.cpp
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx1250.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-vi-f16.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
M clang/test/CIR/CodeGenOpenACC/combined-firstprivate-clause.cpp
M clang/test/CIR/CodeGenOpenACC/compute-firstprivate-clause-templates.cpp
M clang/test/CIR/CodeGenOpenACC/compute-firstprivate-clause.c
M clang/test/CIR/CodeGenOpenACC/compute-firstprivate-clause.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-default-ops.c
M clang/test/CIR/CodeGenOpenACC/firstprivate-clause-recipes.cpp
M clang/test/CIR/CodeGenOpenMP/omp-llvmir.c
A clang/test/CIR/IR/const-record-flexible-array.cir
A clang/test/CIR/IR/const-record-union.cir
M clang/test/CIR/IR/func.cir
M clang/test/CIR/IR/global.cir
M clang/test/CIR/IR/invalid-const-record.cir
M clang/test/CIR/IR/invalid-func.cir
A clang/test/CIR/IR/invalid-int-attr.cir
M clang/test/CIR/IR/invalid-linkage.cir
A clang/test/CIR/IR/load-invariant.cir
M clang/test/CIR/Lowering/array.cpp
A clang/test/CIR/Lowering/load-invariant.cir
M clang/test/CIR/Lowering/module-asm.cir
M clang/test/CIR/Transforms/abi-lowering/coerce-record-to-record-via-memory.cir
A clang/test/CIR/Transforms/abi-lowering/direct-flatten.cir
A clang/test/CIR/Transforms/abi-lowering/expand-struct-arg.cir
M clang/test/CIR/Transforms/cxx-abi-lowering-attrs.cir
M clang/test/CIR/Transforms/hoist-allocas.cir
A clang/test/CIR/Transforms/lib-opt.cpp
M clang/test/CIR/Transforms/switch.cir
M clang/test/CIR/Transforms/vector-cmp-fold.cir
M clang/test/CXX/dcl.dcl/dcl.spec/dcl.stc/p2.cpp
M clang/test/CXX/dcl.dcl/dcl.spec/dcl.type/dcl.spec.auto/p3-1y.cpp
M clang/test/CXX/dcl.dcl/dcl.spec/dcl.type/dcl.spec.auto/p3-generic-lambda-1y.cpp
M clang/test/CXX/dcl.dcl/dcl.spec/dcl.type/dcl.spec.auto/p3.cpp
M clang/test/CXX/dcl.decl/dcl.init/dcl.init.general/p16-cxx20.cpp
M clang/test/CXX/dcl/dcl.fct/p17.cpp
M clang/test/CXX/drs/cwg25xx.cpp
M clang/test/CXX/drs/cwg26xx.cpp
A clang/test/CXX/drs/cwg3088.cpp
M clang/test/CXX/drs/cwg30xx.cpp
M clang/test/CXX/drs/cwg31xx.cpp
M clang/test/CXX/drs/cwg3xx.cpp
M clang/test/CXX/drs/cwg5xx.cpp
M clang/test/CXX/drs/cwg7xx.cpp
M clang/test/CXX/expr/expr.unary/expr.unary.general/p1.cpp
M clang/test/ClangScanDeps/diagnostics.c
M clang/test/ClangScanDeps/header-search-pruning-transitive.c
M clang/test/ClangScanDeps/modules-context-hash-from-named-module.cpp
M clang/test/ClangScanDeps/modules-context-hash-ignore-macros.c
M clang/test/ClangScanDeps/modules-context-hash-outputs.c
M clang/test/ClangScanDeps/modules-context-hash-warnings.c
M clang/test/ClangScanDeps/modules-context-hash.c
M clang/test/ClangScanDeps/modules-dep-args.c
M clang/test/ClangScanDeps/modules-extern-submodule.c
M clang/test/ClangScanDeps/modules-extern-unrelated.m
M clang/test/ClangScanDeps/modules-fmodule-name-no-module-built.m
M clang/test/ClangScanDeps/modules-full-by-mod-name.c
M clang/test/ClangScanDeps/modules-full-named-modules.cppm
M clang/test/ClangScanDeps/modules-full-output-tu-order.c
M clang/test/ClangScanDeps/modules-full.cpp
M clang/test/ClangScanDeps/modules-has-include-umbrella-header.c
M clang/test/ClangScanDeps/modules-header-sharing.m
M clang/test/ClangScanDeps/modules-implementation-module-map.c
M clang/test/ClangScanDeps/modules-implementation-private.m
M clang/test/ClangScanDeps/modules-implementation-vfs.m
M clang/test/ClangScanDeps/modules-implicit-dot-private.m
M clang/test/ClangScanDeps/modules-incomplete-umbrella.c
M clang/test/ClangScanDeps/modules-inferred.m
M clang/test/ClangScanDeps/modules-no-undeclared-includes.c
M clang/test/ClangScanDeps/modules-pch-common-stale.c
M clang/test/ClangScanDeps/modules-pch-common-submodule.c
M clang/test/ClangScanDeps/modules-pch-common-via-submodule.c
A clang/test/ClangScanDeps/modules-pch-compatibility.c
M clang/test/ClangScanDeps/modules-pch.c
M clang/test/ClangScanDeps/modules-priv-fw-from-pub.m
M clang/test/ClangScanDeps/multiple-commands.c
M clang/test/ClangScanDeps/tu-buffer.c
A clang/test/CodeCompletion/GH200879.cpp
A clang/test/CodeCompletion/GH201632.cpp
M clang/test/CodeGen/2006-01-23-FileScopeAsm.c
M clang/test/CodeGen/64bit-swiftcall.c
M clang/test/CodeGen/AArch64/args.cpp
M clang/test/CodeGen/AArch64/atomic-ops-float-check-minmax.c
M clang/test/CodeGen/AArch64/bf16-reinterpret-intrinsics.c
M clang/test/CodeGen/AArch64/byval-temp.c
M clang/test/CodeGen/AArch64/fp8-intrinsics/acle_neon_fp8_reinterpret.c
M clang/test/CodeGen/AArch64/ls64-inline-asm.c
M clang/test/CodeGen/AArch64/neon-2velem.c
M clang/test/CodeGen/AArch64/neon-extract.c
M clang/test/CodeGen/AArch64/neon-intrinsics-constrained.c
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon-ldst-one-rcpc3.c
M clang/test/CodeGen/AArch64/neon-ldst-one.c
M clang/test/CodeGen/AArch64/neon-misc.c
M clang/test/CodeGen/AArch64/neon-scalar-x-indexed-elem-constrained.c
M clang/test/CodeGen/AArch64/neon-scalar-x-indexed-elem.c
M clang/test/CodeGen/AArch64/neon-vcmla.c
M clang/test/CodeGen/AArch64/neon/add.c
M clang/test/CodeGen/AArch64/neon/fullfp16.c
M clang/test/CodeGen/AArch64/neon/fused-multiple-fullfp16.c
M clang/test/CodeGen/AArch64/neon/fused-multiply.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
A clang/test/CodeGen/AArch64/neon/rounding-v8.5.c
M clang/test/CodeGen/AArch64/neon/subtraction.c
M clang/test/CodeGen/AArch64/pure-scalable-args-empty-union.c
M clang/test/CodeGen/AArch64/pure-scalable-args.c
M clang/test/CodeGen/AArch64/strictfp-builtins.c
M clang/test/CodeGen/AArch64/struct-coerce-using-ptr.cpp
M clang/test/CodeGen/AArch64/sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.c
M clang/test/CodeGen/AArch64/sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.cpp
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_dot.c
M clang/test/CodeGen/AArch64/v8.2a-fp16-intrinsics.c
M clang/test/CodeGen/AArch64/v8.2a-neon-intrinsics.c
M clang/test/CodeGen/AArch64/v8.5a-neon-frint3264-intrinsic.c
M clang/test/CodeGen/LoongArch/bitint.c
M clang/test/CodeGen/LoongArch/lasx/builtin-alias.c
M clang/test/CodeGen/LoongArch/lasx/builtin-approximate-alias.c
M clang/test/CodeGen/LoongArch/lasx/builtin-approximate.c
M clang/test/CodeGen/LoongArch/lasx/builtin.c
M clang/test/CodeGen/PowerPC/builtins-ppc-amo.c
M clang/test/CodeGen/PowerPC/ppc64-vector.c
M clang/test/CodeGen/RISCV/attr-rvv-vector-bits-cast.c
A clang/test/CodeGen/RISCV/attr-rvv-vector-bits-struct-call.c
M clang/test/CodeGen/RISCV/bitint.c
M clang/test/CodeGen/RISCV/riscv-abi.cpp
M clang/test/CodeGen/RISCV/riscv-vector-callingconv-llvm-ir.c
M clang/test/CodeGen/RISCV/riscv-vector-callingconv-llvm-ir.cpp
M clang/test/CodeGen/RISCV/riscv32-abi.c
M clang/test/CodeGen/RISCV/riscv32-vararg.c
M clang/test/CodeGen/RISCV/riscv64-abi.c
M clang/test/CodeGen/RISCV/riscv64-vararg.c
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M clang/test/CodeGen/Sparc/sparcv9-abi.c
A clang/test/CodeGen/SystemZ/builtins-zos-cs.c
M clang/test/CodeGen/SystemZ/sync-builtins-i128-16Al.c
M clang/test/CodeGen/SystemZ/systemz-abi-vector.c
M clang/test/CodeGen/SystemZ/systemz-abi.c
M clang/test/CodeGen/SystemZ/systemz-inline-asm.c
M clang/test/CodeGen/SystemZ/zos-abi.c
A clang/test/CodeGen/SystemZ/zos-ppa1-name.c
R clang/test/CodeGen/X86/amx_tf32.c
R clang/test/CodeGen/X86/amx_tf32_api.c
R clang/test/CodeGen/X86/amx_tf32_errors.c
R clang/test/CodeGen/X86/amx_tf32_inline_asm.c
M clang/test/CodeGen/X86/avx2-builtins.c
A clang/test/CodeGen/X86/avx512bmm-builtins.c
A clang/test/CodeGen/X86/avx512bmmvl-builtins.c
M clang/test/CodeGen/X86/avx512bw-builtins.c
M clang/test/CodeGen/X86/avx512fp16-abi.c
M clang/test/CodeGen/X86/bfloat-half-abi.c
M clang/test/CodeGen/X86/cx-complex-range.c
M clang/test/CodeGen/X86/fp128-abi.c
M clang/test/CodeGen/X86/mmx-builtins.c
M clang/test/CodeGen/X86/mmx-inline-asm-error.c
A clang/test/CodeGen/X86/newpm.c
M clang/test/CodeGen/X86/sse2-builtins.c
M clang/test/CodeGen/X86/strictfp_builtins.c
M clang/test/CodeGen/X86/x86_32-arguments-win32.c
M clang/test/CodeGen/X86/x86_64-arguments-win32.c
M clang/test/CodeGen/aapcs64-align.cpp
M clang/test/CodeGen/aarch64_neon_sve_bridge_intrinsics/acle_neon_sve_bridge_dup_neonq.c
M clang/test/CodeGen/aarch64_neon_sve_bridge_intrinsics/acle_neon_sve_bridge_get_neonq.c
M clang/test/CodeGen/aarch64_neon_sve_bridge_intrinsics/acle_neon_sve_bridge_set_neonq.c
M clang/test/CodeGen/allow-ubsan-check.c
M clang/test/CodeGen/amdgpu-builtin-is-invocable.c
M clang/test/CodeGen/amdgpu-builtin-processor-is.c
M clang/test/CodeGen/arm-aapcs-vfp.c
M clang/test/CodeGen/arm-abi-vector.c
M clang/test/CodeGen/arm-neon-vst.c
M clang/test/CodeGen/arm-swiftcall.c
M clang/test/CodeGen/arm64-abi-vector.c
M clang/test/CodeGen/arm64-arguments.c
M clang/test/CodeGen/arm64-microsoft-arguments.cpp
M clang/test/CodeGen/arm64_vdupq_n_f64.c
M clang/test/CodeGen/arm64ec-varargs.c
M clang/test/CodeGen/arm_neon_intrinsics.c
M clang/test/CodeGen/armv7k-abi.c
M clang/test/CodeGen/asm.c
M clang/test/CodeGen/asm_incbin.c
M clang/test/CodeGen/atomic-arm64.c
A clang/test/CodeGen/atomic-auto-type.c
M clang/test/CodeGen/attr-arm-sve-vector-bits-cast.c
A clang/test/CodeGen/attr-cleanup-duplicate.c
A clang/test/CodeGen/attr-counted-by-nested-structs.c
A clang/test/CodeGen/attr-counted-by-with-sanitizers.c
A clang/test/CodeGen/attr-counted-by-without-sanitizers.c
R clang/test/CodeGen/attr-counted-by.c
M clang/test/CodeGen/attr-noundef.cpp
M clang/test/CodeGen/attr-target-x86.c
A clang/test/CodeGen/bpf-struct-return-regs.c
A clang/test/CodeGen/bpf-struct-return.c
M clang/test/CodeGen/builtin-clear-padding-codegen.c
A clang/test/CodeGen/builtin-cpu-is-cputype.c
A clang/test/CodeGen/builtin-cpu-is-subtype.c
A clang/test/CodeGen/builtin-cpu-is-vendor.c
R clang/test/CodeGen/builtin-cpu-is.c
A clang/test/CodeGen/builtin-cpu-supports-all.c
M clang/test/CodeGen/builtin_float.c
M clang/test/CodeGen/builtin_float_strictfp.c
M clang/test/CodeGen/builtins-x86.c
M clang/test/CodeGen/builtins.c
M clang/test/CodeGen/call-graph-section-callback.cpp
M clang/test/CodeGen/call-graph-section-internal.cpp
M clang/test/CodeGen/call-graph-section-templates.cpp
M clang/test/CodeGen/call-graph-section-virtual-methods.cpp
M clang/test/CodeGen/call-graph-section.c
M clang/test/CodeGen/call-graph-section.cpp
M clang/test/CodeGen/cfi-icall-trap-recover-runtime.c
M clang/test/CodeGen/cfi-salt.c
M clang/test/CodeGen/cfi-unchecked-callee-attribute.cpp
M clang/test/CodeGen/cx-complex-range-real.c
M clang/test/CodeGen/cx-complex-range.c
M clang/test/CodeGen/errno-tbaa.c
M clang/test/CodeGen/ext-int-cc.c
M clang/test/CodeGen/isfpclass.c
M clang/test/CodeGen/kcfi.c
M clang/test/CodeGen/lto-newpm-pipeline.c
M clang/test/CodeGen/math-libcalls-tbaa-indirect-args.c
M clang/test/CodeGen/mingw-long-double.c
M clang/test/CodeGen/ms_abi.c
A clang/test/CodeGen/null-checks.c
M clang/test/CodeGen/pass-by-value-noalias.c
M clang/test/CodeGen/ptrauth-in-c-struct.c
M clang/test/CodeGen/ptrauth-intrinsics.c
M clang/test/CodeGen/regcall.c
M clang/test/CodeGen/regcall4.c
M clang/test/CodeGen/sanitize-metadata-ignorelist.c
M clang/test/CodeGen/sanitize-metadata-nosanitize.c
M clang/test/CodeGen/sanitize-type-globals.cpp
M clang/test/CodeGen/strictfp_builtins.c
A clang/test/CodeGen/systemz-charset-diag.cpp
A clang/test/CodeGen/systemz-charset.c
A clang/test/CodeGen/systemz-charset.cpp
A clang/test/CodeGen/target-avx-abi-diag-knr.c
M clang/test/CodeGen/target-builtin-error-3.c
M clang/test/CodeGen/target-builtin-noerror.c
M clang/test/CodeGen/target-features-error-2.c
M clang/test/CodeGen/tbaa-class.cpp
M clang/test/CodeGen/tbaa-matrix.c
M clang/test/CodeGen/tbaa-ms-abi.cpp
M clang/test/CodeGen/tbaa-pointers.c
M clang/test/CodeGen/tbaa-struct-bitfield-endianness.cpp
M clang/test/CodeGen/tbaa-struct.cpp
M clang/test/CodeGen/tbaa.c
M clang/test/CodeGen/tbaa.cpp
M clang/test/CodeGen/ubsan-type-ignorelist-category.test
M clang/test/CodeGen/union-tbaa1.c
M clang/test/CodeGen/vectorcall.c
M clang/test/CodeGen/wasm-fp16.c
M clang/test/CodeGen/win-fp128.c
M clang/test/CodeGen/win64-i128.c
M clang/test/CodeGen/windows-seh-arg-capture-crash.cpp
M clang/test/CodeGen/windows-swiftcall.c
M clang/test/CodeGenCUDA/builtins-amdgcn.cu
M clang/test/CodeGenCUDA/builtins-spirv-amdgcn.cu
M clang/test/CodeGenCUDA/filter-decl.cu
M clang/test/CodeGenCUDA/offload_via_llvm.cu
M clang/test/CodeGenCXX/aarch64-mangle-sve-vectors.cpp
M clang/test/CodeGenCXX/aix-alignment.cpp
M clang/test/CodeGenCXX/amdgcn-func-arg.cpp
M clang/test/CodeGenCXX/arm-cc.cpp
M clang/test/CodeGenCXX/arm-swiftcall.cpp
M clang/test/CodeGenCXX/attr-likelihood-if-branch-weights.cpp
M clang/test/CodeGenCXX/attr-likelihood-iteration-stmt.cpp
M clang/test/CodeGenCXX/attr-likelihood-switch-branch-weights.cpp
M clang/test/CodeGenCXX/attr-target-mv-inalloca.cpp
M clang/test/CodeGenCXX/blocks.cpp
M clang/test/CodeGenCXX/builtin-clear-padding-codegen.cpp
M clang/test/CodeGenCXX/cfi-vcall-trap-recover-runtime.cpp
A clang/test/CodeGenCXX/construction-vtable-unnamed-addr.cpp
M clang/test/CodeGenCXX/copy-initialization.cpp
M clang/test/CodeGenCXX/cxx1z-copy-omission.cpp
M clang/test/CodeGenCXX/cxx2a-destroying-delete.cpp
A clang/test/CodeGenCXX/cxx2c-destructuring-expansion-stmt.cpp
A clang/test/CodeGenCXX/cxx2c-enumerating-expansion-statements.cpp
A clang/test/CodeGenCXX/cxx2c-expansion-stmts-control-flow.cpp
A clang/test/CodeGenCXX/cxx2c-expansion-stmts-mangling.cpp
A clang/test/CodeGenCXX/cxx2c-expansion-stmts-templates.cpp
A clang/test/CodeGenCXX/cxx2c-iterating-expansion-stmt.cpp
A clang/test/CodeGenCXX/defaulted-function-fp-features.cpp
M clang/test/CodeGenCXX/derived-to-base-conv.cpp
M clang/test/CodeGenCXX/dllexport-ctor-closure.cpp
M clang/test/CodeGenCXX/dtor-local-lambda-mangle.cpp
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
M clang/test/CodeGenCXX/dynamic-cast-exact-disabled.cpp
M clang/test/CodeGenCXX/dynamic-cast-exact.cpp
M clang/test/CodeGenCXX/empty-nontrivially-copyable.cpp
M clang/test/CodeGenCXX/fastcall.cpp
A clang/test/CodeGenCXX/gh196469-default-member-init-lambda-cleanup.cpp
M clang/test/CodeGenCXX/gnu-asm-constexpr.cpp
M clang/test/CodeGenCXX/homogeneous-aggregates.cpp
M clang/test/CodeGenCXX/inalloca-lambda.cpp
M clang/test/CodeGenCXX/inalloca-overaligned.cpp
M clang/test/CodeGenCXX/inalloca-vector.cpp
M clang/test/CodeGenCXX/inheriting-constructor.cpp
M clang/test/CodeGenCXX/key-function-vtable.cpp
M clang/test/CodeGenCXX/load-reference-metadata.cpp
M clang/test/CodeGenCXX/mangle-lambdas-gh88906.cpp
A clang/test/CodeGenCXX/mangle-lambdas-in-dmi-local-class.cpp
M clang/test/CodeGenCXX/mangle-ms-md5.cpp
M clang/test/CodeGenCXX/mangle-subst-std.cpp
M clang/test/CodeGenCXX/member-function-pointer-calls.cpp
M clang/test/CodeGenCXX/microsoft-abi-arg-order.cpp
M clang/test/CodeGenCXX/microsoft-abi-byval-thunks.cpp
M clang/test/CodeGenCXX/microsoft-abi-member-pointers.cpp
M clang/test/CodeGenCXX/microsoft-abi-sret-and-byval.cpp
M clang/test/CodeGenCXX/microsoft-abi-structors.cpp
M clang/test/CodeGenCXX/microsoft-abi-throw.cpp
M clang/test/CodeGenCXX/microsoft-abi-unknown-arch.cpp
M clang/test/CodeGenCXX/microsoft-vector-deleting-dtors.cpp
M clang/test/CodeGenCXX/microsoft-vector-deleting-dtors2.cpp
M clang/test/CodeGenCXX/ms-mangle-requires.cpp
M clang/test/CodeGenCXX/ms-property.cpp
A clang/test/CodeGenCXX/msvc-global-delete-scalar-array-split.cpp
A clang/test/CodeGenCXX/msvc-global-delete-scope-no-dtor.cpp
A clang/test/CodeGenCXX/msvc-no-global-delete-forwarding.cpp
M clang/test/CodeGenCXX/msvc-vector-deleting-dtors-sized-delete.cpp
M clang/test/CodeGenCXX/nrvo.cpp
M clang/test/CodeGenCXX/pass-by-value-noalias.cpp
M clang/test/CodeGenCXX/powerpc-byval.cpp
M clang/test/CodeGenCXX/ptrauth-dynamic-cast-exact.cpp
M clang/test/CodeGenCXX/ptrauth-explicit-vtable-pointer-control.cpp
M clang/test/CodeGenCXX/ptrauth-qualifier-struct.cpp
M clang/test/CodeGenCXX/ptrauth-vtable-virtual-inheritance-thunk.cpp
M clang/test/CodeGenCXX/regcall.cpp
M clang/test/CodeGenCXX/regcall4.cpp
M clang/test/CodeGenCXX/regparm.cpp
A clang/test/CodeGenCXX/riscv-rvv-fixed-length-struct-call.cpp
M clang/test/CodeGenCXX/std-byte.cpp
A clang/test/CodeGenCXX/target-avx-abi-diag.cpp
M clang/test/CodeGenCXX/template-instantiation.cpp
M clang/test/CodeGenCXX/temporaries.cpp
M clang/test/CodeGenCXX/trivial_abi.cpp
M clang/test/CodeGenCXX/type_visibility.cpp
M clang/test/CodeGenCXX/uncopyable-args.cpp
M clang/test/CodeGenCXX/virt-template-vtable.cpp
M clang/test/CodeGenCXX/visibility.cpp
M clang/test/CodeGenCXX/vtable-assume-load.cpp
M clang/test/CodeGenCXX/vtable-available-externally.cpp
M clang/test/CodeGenCXX/vtable-key-function-ios.cpp
M clang/test/CodeGenCXX/vtable-key-function.cpp
M clang/test/CodeGenCXX/vtt-layout.cpp
M clang/test/CodeGenCXX/wasm-args-returns.cpp
M clang/test/CodeGenCXX/windows-x86-swiftcall.cpp
M clang/test/CodeGenCXX/x86_32-arguments.cpp
R clang/test/CodeGenCoroutines/coro-cwg2935.cpp
M clang/test/CodeGenCoroutines/coro-gro.cpp
M clang/test/CodeGenCoroutines/coro-params.cpp
M clang/test/CodeGenHIP/offload-pgo-sections.hip
M clang/test/CodeGenHLSL/BasicFeatures/InitLists.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/MatrixElementTypeCast.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/OutArgLifetime.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/StructPassing.hlsl
M clang/test/CodeGenHLSL/builtins/ConstantBuffer.hlsl
A clang/test/CodeGenHLSL/builtins/InterlockedOr.hlsl
M clang/test/CodeGenHLSL/builtins/hlsl_resource_t.hlsl
R clang/test/CodeGenHLSL/cbuffer_copy_layout.hlsl
M clang/test/CodeGenHLSL/implicit-norecurse-attrib.hlsl
A clang/test/CodeGenHLSL/resources/ConstantBufferT-struct-passing.hlsl
M clang/test/CodeGenHLSL/resources/StructuredBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/resources/StructuredBuffers-subscripts.hlsl
M clang/test/CodeGenHLSL/resources/Texture2D-GetDimensions.hlsl
M clang/test/CodeGenHLSL/resources/Texture2D-Load.hlsl
A clang/test/CodeGenHLSL/resources/Texture2DArray-CalculateLevelOfDetail.hlsl
A clang/test/CodeGenHLSL/resources/Texture2DArray-Gather.hlsl
A clang/test/CodeGenHLSL/resources/Texture2DArray-Load.hlsl
A clang/test/CodeGenHLSL/resources/Texture2DArray-Mips.hlsl
A clang/test/CodeGenHLSL/resources/Texture2DArray-Sample.hlsl
A clang/test/CodeGenHLSL/resources/Texture2DArray-SampleBias.hlsl
A clang/test/CodeGenHLSL/resources/Texture2DArray-SampleCmp.hlsl
A clang/test/CodeGenHLSL/resources/Texture2DArray-SampleCmpLevelZero.hlsl
A clang/test/CodeGenHLSL/resources/Texture2DArray-SampleGrad.hlsl
A clang/test/CodeGenHLSL/resources/Texture2DArray-SampleLevel.hlsl
A clang/test/CodeGenHLSL/resources/Texture2DArray-Subscript.hlsl
A clang/test/CodeGenHLSL/resources/Texture2DArray-default-explicit-binding.hlsl
A clang/test/CodeGenHLSL/resources/Texture2DArray-default.hlsl
A clang/test/CodeGenHLSL/resources/Texture2DArray-shorthand-contexts.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer_struct_passing.hlsl
A clang/test/CodeGenHLSL/resources/cbuffer_struct_passing_with_resources.hlsl
A clang/test/CodeGenHLSL/resources/resources-in-structs-method-call.hlsl
M clang/test/CodeGenHLSL/semantics/semantic-struct-2-output.hlsl
M clang/test/CodeGenObjC/category-class.m
M clang/test/CodeGenObjC/objc-runtime-name.m
M clang/test/CodeGenObjC/pass-by-value-noalias.m
M clang/test/CodeGenObjC/weak-in-c-struct.m
M clang/test/CodeGenObjCXX/objc-struct-cxx-abi.mm
M clang/test/CodeGenObjCXX/property-dot-copy-elision.mm
M clang/test/CodeGenObjCXX/property-objects.mm
M clang/test/CodeGenObjCXX/ptrauth-struct-cxx-abi.mm
M clang/test/CodeGenOpenCL/amdgpu-cluster-dims.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/amdgpu-printf.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-asyncmark-errs.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-asyncmark.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx9.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-s-buffer-load.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-workgroup-size.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
M clang/test/CodeGenOpenCL/implicit-addrspacecast-function-parameter.cl
M clang/test/CodeGenOpenCL/preserve_vec3.cl
M clang/test/CodeGenSYCL/kernel-caller-entry-point.cpp
M clang/test/DebugInfo/CXX/debug-info.cpp
M clang/test/DebugInfo/Generic/bitfield-0-struct.c
M clang/test/DebugInfo/ObjC/nontrivial-c-struct-exception.m
A clang/test/Driver/Inputs/clang-offload-bundler-magic-collision.co
A clang/test/Driver/Inputs/clang-offload-bundler-magic-collision.py
A clang/test/Driver/aarch64-nvidia-rigel.c
M clang/test/Driver/aarch64-v96a.c
M clang/test/Driver/aix-object-mode.c
M clang/test/Driver/amdgpu-macros.cl
M clang/test/Driver/amdgpu-mcpu.cl
A clang/test/Driver/amdgpu-openmp-gpu-max-threads-per-block.c
M clang/test/Driver/amdgpu-toolchain.c
A clang/test/Driver/arm64x.c
M clang/test/Driver/cl-options.c
A clang/test/Driver/clang-offload-bundler-magic-collision.c
M clang/test/Driver/driverkit-path.c
A clang/test/Driver/fsanitize-shadow-call-stack-hexagon.c
A clang/test/Driver/gpu-exceptions.cpp
A clang/test/Driver/hexagon-hvx-ieee-qfloat.c
M clang/test/Driver/hexagon-toolchain-elf.c
M clang/test/Driver/hexagon-toolchain-picolibc.c
M clang/test/Driver/hip-device-libs-llvm-env.hip
M clang/test/Driver/hip-include-path.hip
M clang/test/Driver/hip-phases.hip
M clang/test/Driver/hip-toolchain-device-only.hip
M clang/test/Driver/hip-toolchain-no-rdc.hip
M clang/test/Driver/hipstdpar.c
M clang/test/Driver/incompatible_sysroot.c
M clang/test/Driver/linux-ld.c
M clang/test/Driver/msvc-link.c
M clang/test/Driver/offload-arch-translation-amdgpu.cu
A clang/test/Driver/offload-parallel-device-cc1.cu
M clang/test/Driver/opencl-libclc.cl
A clang/test/Driver/print-enabled-extensions/aarch64-rigel.c
M clang/test/Driver/print-enabled-extensions/riscv-spacemit-a100.c
M clang/test/Driver/print-supported-extensions-aarch64.c
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Driver/riscv-arch.c
M clang/test/Driver/riscv-cpus.c
M clang/test/Driver/riscv-profiles.c
M clang/test/Driver/stack-protector-guard.c
M clang/test/Driver/sycl-offload-jit.cpp
M clang/test/Driver/unknown-std.cpp
M clang/test/Driver/x86-march.c
M clang/test/Driver/x86-target-features.c
M clang/test/Driver/zos-ld.c
A clang/test/Driver/zos-ppa1-name.c
M clang/test/FixIt/fixit-unicode-named-escape-sequences.c
M clang/test/Frontend/ast-codegen.c
M clang/test/Frontend/compiler-options-dump.cpp
A clang/test/Frontend/linemarker-invalid-escape.c
A clang/test/Frontend/openmp-warn-gpu-max-threads-per-block.c
M clang/test/Frontend/x86-target-cpu.c
A clang/test/Headers/Inputs/zos/usr/include/grp.h
A clang/test/Headers/Inputs/zos/usr/include/locale.h
A clang/test/Headers/Inputs/zos/usr/include/math.h
A clang/test/Headers/Inputs/zos/usr/include/poll.h
A clang/test/Headers/Inputs/zos/usr/include/stdlib.h
A clang/test/Headers/Inputs/zos/usr/include/string.h
A clang/test/Headers/Inputs/zos/usr/include/time.h
A clang/test/Headers/Inputs/zos/usr/include/variant.h
M clang/test/Headers/__clang_hip_math.hip
M clang/test/Headers/amdgcn-openmp-device-math-complex.c
M clang/test/Headers/amdgcn-openmp-device-math-complex.cpp
M clang/test/Headers/amdhsa_abi.cl
A clang/test/Headers/gpu-device-functions.cpp
M clang/test/Headers/hip-header.hip
M clang/test/Headers/nvptx_device_math_complex.c
M clang/test/Headers/nvptx_device_math_complex.cpp
M clang/test/Headers/openmp_device_math_isnan.cpp
M clang/test/Headers/stdarg.cpp
A clang/test/Headers/zos-cs-wrapper.c
A clang/test/Headers/zos-guard.c
M clang/test/Interpreter/cxx20-modules.cppm
M clang/test/Interpreter/dynamic-library.cpp
A clang/test/Interpreter/emulated-tls.cpp
M clang/test/Interpreter/execute-pch.cpp
M clang/test/Interpreter/lit.local.cfg
A clang/test/Interpreter/pch-pic-mismatch.cpp
A clang/test/Interpreter/pcm-pic-mismatch.cpp
A clang/test/Lexer/char-escapes-delimited-invalid-utf8.c
M clang/test/Lexer/char-escapes-delimited.c
M clang/test/Lexer/cxx-features.cpp
A clang/test/Lexer/dollar-idents.cpp
M clang/test/Lexer/has_feature_modules.m
A clang/test/Lexer/invalid-directive.cpp
M clang/test/Lexer/string-literal-encoding.c
M clang/test/Lexer/unicode.c
M clang/test/Misc/constexpr-source-ranges.cpp
A clang/test/Misc/diagnostic-color-output-stream.cpp
M clang/test/Misc/pragma-attribute-supported-attributes-list.test
M clang/test/Misc/target-invalid-cpu-note/aarch64.c
M clang/test/Misc/target-invalid-cpu-note/amdgcn.c
M clang/test/Misc/target-invalid-cpu-note/nvptx.c
M clang/test/Misc/target-invalid-cpu-note/x86.c
M clang/test/Misc/warning-wall.c
A clang/test/Modules/GH207581.cpp
M clang/test/Modules/codegen.test
M clang/test/Modules/embed-files-compressed.cpp
M clang/test/Modules/glob-delete-with-virtual-dtor.cpp
A clang/test/Modules/modules-lambda-dependent-crash.cppm
A clang/test/Modules/modules-local-class-dependent-crash.cppm
A clang/test/Modules/modules-using-enum-class-scope.cppm
M clang/test/Modules/msvc-vector-deleting-destructors.cpp
A clang/test/Modules/pr204479.cppm
M clang/test/Modules/templates.mm
R clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-hip-no-rdc-amdgcnspirv.c
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-hip-no-rdc.c
A clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-verbose.c
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper.c
M clang/test/OffloadTools/clang-offload-bundler/zstd.c
M clang/test/OffloadTools/clang-sycl-linker/basic.ll
M clang/test/OffloadTools/clang-sycl-linker/split-mode.ll
M clang/test/OffloadTools/clang-sycl-linker/triple.ll
M clang/test/OpenMP/bug54082.c
M clang/test/OpenMP/bug56913.c
M clang/test/OpenMP/error_codegen.cpp
M clang/test/OpenMP/for_firstprivate_codegen.cpp
M clang/test/OpenMP/nvptx_target_parallel_reduction_codegen_tbaa_PR46146.cpp
M clang/test/OpenMP/parallel_firstprivate_codegen.cpp
M clang/test/OpenMP/parallel_if_codegen_PR51349.cpp
M clang/test/OpenMP/sections_firstprivate_codegen.cpp
M clang/test/OpenMP/single_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_ast_print.cpp
M clang/test/OpenMP/target_teams_distribute_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_num_teams_messages.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_num_teams_messages.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_firstprivate_codegen.cpp
A clang/test/OpenMP/target_teams_distribute_parallel_for_simd_if_openmp52_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/taskloop_strictmodifier_codegen.cpp
M clang/test/OpenMP/teams_distribute_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_firstprivate_codegen.cpp
A clang/test/OpenMP/teams_distribute_parallel_for_simd_if_openmp52_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_num_teams_messages.cpp
M clang/test/OpenMP/unimplemented_clause_messages.cpp
M clang/test/PCH/cxx1z-decomposition.cpp
M clang/test/PCH/cxx20-template-args.cpp
A clang/test/PCH/dllexport-ctor-closure-copy.cpp
M clang/test/PCH/glob-delete-with-virtual-dtor.cpp
M clang/test/PCH/msvc-vector-deleting-destructors.cpp
M clang/test/Parser/c2x-auto.c
A clang/test/Parser/cxx-missing-semi-crash.cpp
M clang/test/Parser/cxx0x-attributes.cpp
M clang/test/Parser/cxx0x-keyword-attributes.cpp
M clang/test/Parser/cxx1z-class-template-argument-deduction.cpp
M clang/test/Parser/cxx1z-decomposition.cpp
A clang/test/Parser/cxx2c-expansion-statements-not-backported.cpp
A clang/test/Parser/cxx2c-expansion-statements.cpp
M clang/test/Preprocessor/aarch64-target-features.c
M clang/test/Preprocessor/init-aarch64.c
M clang/test/Preprocessor/init-riscv.c
M clang/test/Preprocessor/init-s390x.c
M clang/test/Preprocessor/init.c
M clang/test/Preprocessor/line-directive-output.c
M clang/test/Preprocessor/line-directive.c
M clang/test/Preprocessor/pragma_module.c
M clang/test/Preprocessor/predefined-arch-macros.c
M clang/test/Preprocessor/predefined-macros.c
M clang/test/Preprocessor/stdint.c
M clang/test/Preprocessor/ucn-pp-identifier.c
M clang/test/Preprocessor/x86_target_features.c
A clang/test/Sema/Inputs/warn-fortify-source-umask-darwin.h
A clang/test/Sema/Inputs/warn-fortify-source-umask-glibc.h
A clang/test/Sema/Inputs/warn-fortify-source-umask.h
M clang/test/Sema/LifetimeSafety/annotation-suggestions-fixits.cpp
M clang/test/Sema/LifetimeSafety/annotation-suggestions.cpp
M clang/test/Sema/LifetimeSafety/capture-by.cpp
A clang/test/Sema/LifetimeSafety/dangling-field-implicit-ctor.cpp
M clang/test/Sema/LifetimeSafety/invalidations.cpp
M clang/test/Sema/LifetimeSafety/lifetime-facts.cpp
M clang/test/Sema/LifetimeSafety/misplaced-lifetimebound-cross-tu.cpp
M clang/test/Sema/LifetimeSafety/misplaced-lifetimebound-intra-tu.cpp
M clang/test/Sema/LifetimeSafety/safety-c.c
M clang/test/Sema/LifetimeSafety/safety.cpp
M clang/test/Sema/asm.c
A clang/test/Sema/atomic-auto-type.c
M clang/test/Sema/atomic-ops.c
A clang/test/Sema/attr-cleanup-duplicate.c
A clang/test/Sema/attr-const-pure.c
M clang/test/Sema/attr-target.c
A clang/test/Sema/aux-target-builtin-constexpr.cpp
M clang/test/Sema/builtin-memcpy.c
M clang/test/Sema/builtin-object-size.c
M clang/test/Sema/matrix-type-operators.c
A clang/test/Sema/offsetof-unsigned-index.c
M clang/test/Sema/ptrauth-intrinsics-macro.c
M clang/test/Sema/ptrauth.c
M clang/test/Sema/scoped-atomic-ops.c
A clang/test/Sema/warn-fortify-source-umask-darwin.c
A clang/test/Sema/warn-fortify-source-umask-forward-decl.c
A clang/test/Sema/warn-fortify-source-umask-glibc.c
A clang/test/Sema/warn-fortify-source-umask-not-builtin.c
A clang/test/Sema/warn-fortify-source-umask-record-member.c
A clang/test/Sema/warn-fortify-source-umask-redecl.c
M clang/test/Sema/warn-fortify-source.c
R clang/test/Sema/warn-stringop-overread.c
A clang/test/SemaCXX/GH203701.cpp
M clang/test/SemaCXX/attr-lifetime-capture-by.cpp
M clang/test/SemaCXX/attr-sentinel.cpp
M clang/test/SemaCXX/auto-cxx0x.cpp
M clang/test/SemaCXX/class.cpp
M clang/test/SemaCXX/condition.cpp
M clang/test/SemaCXX/constant-expression-cxx2a.cpp
M clang/test/SemaCXX/constexpr-array-unknown-bound.cpp
M clang/test/SemaCXX/cxx2c-constexpr-placement-new.cpp
A clang/test/SemaCXX/cxx2c-expansion-statements-shadow.cpp
A clang/test/SemaCXX/cxx2c-expansion-stmts-control-flow.cpp
A clang/test/SemaCXX/cxx2c-expansion-stmts.cpp
M clang/test/SemaCXX/cxx2c-pack-indexing.cpp
M clang/test/SemaCXX/deduced-return-type-cxx14.cpp
M clang/test/SemaCXX/enable_if-nested-call-with-valuedependent-param.cpp
M clang/test/SemaCXX/enable_if.cpp
A clang/test/SemaCXX/gh196469-default-member-init-lambda-capture.cpp
A clang/test/SemaCXX/init-list-incomplete-dtor-crash.cpp
M clang/test/SemaCXX/injected-class-name-crash.cpp
A clang/test/SemaCXX/inline-asm-aggregate-output.cpp
A clang/test/SemaCXX/ms-ctor-closure.cpp
M clang/test/SemaCXX/source_location.cpp
M clang/test/SemaCXX/static-assert-cxx26.cpp
M clang/test/SemaCXX/static-assert.cpp
M clang/test/SemaCXX/static-data-member.cpp
M clang/test/SemaCXX/type-traits-incomplete.cpp
M clang/test/SemaCXX/type-traits.cpp
M clang/test/SemaCXX/typo-correction.cpp
M clang/test/SemaCXX/warn-bool-conversion.cpp
M clang/test/SemaCXX/warn-func-not-needed.cpp
M clang/test/SemaCXX/warn-implicit-unicode-conversions.cpp
M clang/test/SemaCXX/warn-memset-bad-sizeof.cpp
M clang/test/SemaCXX/warn-tautological-compare.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-warning-data-invocation.cpp
M clang/test/SemaCXX/warn-variable-not-needed.cpp
M clang/test/SemaHLSL/BuiltIns/ConstantBuffer-member-funcs.hlsl
A clang/test/SemaHLSL/BuiltIns/InterlockedOr-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/asuint-errors.hlsl
M clang/test/SemaHLSL/Resources/ConstantBuffers.hlsl
A clang/test/SemaHLSL/Resources/RWTexture2D-mips-errors.hlsl
A clang/test/SemaHLSL/Resources/RWTexture2D-unsupported-methods-errors.hlsl
M clang/test/SemaHLSL/Resources/Texture2D-GetDimensions.hlsl
A clang/test/SemaHLSL/Resources/Texture2D-Load-errors.hlsl
A clang/test/SemaHLSL/Resources/Texture2DArray-CalculateLevelOfDetail.hlsl
A clang/test/SemaHLSL/Resources/Texture2DArray-GetDimensions.hlsl
A clang/test/SemaHLSL/Resources/Texture2DArray-SampleBias.hlsl
A clang/test/SemaHLSL/Resources/Texture2DArray-SampleCmp.hlsl
A clang/test/SemaHLSL/Resources/Texture2DArray-SampleCmpLevelZero.hlsl
A clang/test/SemaHLSL/Resources/Texture2DArray-SampleGrad.hlsl
A clang/test/SemaHLSL/Resources/Texture2DArray-SampleLevel.hlsl
A clang/test/SemaHLSL/Resources/Texture2DArray-Sema.hlsl
A clang/test/SemaHLSL/Resources/Texture2DArray-Subscript.hlsl
A clang/test/SemaHLSL/Resources/resource_params_noinline.hlsl
M clang/test/SemaHLSL/Resources/unbounded_resource_arrays.hlsl
R clang/test/SemaHLSL/Texture2D-Load-errors.hlsl
A clang/test/SemaHLSL/Texture2DArray-Gather.hlsl
A clang/test/SemaHLSL/Texture2DArray-GatherCmp-Vulkan.hlsl
A clang/test/SemaHLSL/Texture2DArray-mips-errors.hlsl
M clang/test/SemaOpenACC/loop-construct-reduction-clause.cpp
M clang/test/SemaOpenCL/access-qualifier.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx9.cl
A clang/test/SemaOpenCL/builtins-amdgcn-s-buffer-load-error.cl
M clang/test/SemaOpenCL/fp64-fp16-options.cl
M clang/test/SemaOpenCL/storageclass.cl
M clang/test/SemaOpenCL/unsupported-image.cl
M clang/test/SemaSYCL/sycl-cconv-win.cpp
A clang/test/SemaSYCL/sycl-kernel-param-restrictions.cpp
M clang/test/SemaTemplate/GH176155.cpp
A clang/test/SemaTemplate/GH198890.cpp
M clang/test/SemaTemplate/concepts-lambda.cpp
M clang/test/SemaTemplate/concepts-no-early-substitution.cpp
M clang/test/SemaTemplate/concepts-out-of-line-def.cpp
M clang/test/SemaTemplate/concepts.cpp
M clang/test/SemaTemplate/ctad.cpp
M clang/test/SemaTemplate/fun-template-def.cpp
M clang/test/SemaTemplate/member-specialization.cpp
M clang/test/SemaTemplate/overload-candidates.cpp
M clang/test/TableGen/target-builtins-prototype-parser.td
M clang/test/lit.cfg.py
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M clang/tools/clang-linker-wrapper/LinkerWrapperOpts.td
M clang/tools/clang-ssaf-format/SSAFFormat.cpp
M clang/tools/clang-sycl-linker/ClangSYCLLinker.cpp
M clang/tools/clang-sycl-linker/SYCLLinkOpts.td
M clang/tools/driver/cc1_main.cpp
M clang/tools/libclang/CIndex.cpp
M clang/tools/libclang/CLog.h
M clang/tools/libclang/CXCursor.cpp
M clang/tools/scan-build-py/lib/libscanbuild/__init__.py
M clang/unittests/AST/CMakeLists.txt
M clang/unittests/AST/StmtPrinterTest.cpp
A clang/unittests/AST/SubobjectVisitorTest.cpp
M clang/unittests/AST/TypePrinterTest.cpp
M clang/unittests/ASTMatchers/ASTMatchersNarrowingTest.cpp
M clang/unittests/Analysis/ExprMutationAnalyzerTest.cpp
M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
M clang/unittests/Analysis/LifetimeSafetyTest.cpp
A clang/unittests/Basic/AtomicLineLoggerTest.cpp
M clang/unittests/Basic/CMakeLists.txt
M clang/unittests/Basic/DarwinSDKInfoTest.cpp
M clang/unittests/Basic/DiagnosticTest.cpp
M clang/unittests/Basic/LangOptionsTest.cpp
M clang/unittests/CIR/CMakeLists.txt
A clang/unittests/CIR/CallOpTest.cpp
M clang/unittests/Format/ConfigParseTest.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/FormatTestComments.cpp
M clang/unittests/Format/NumericLiteralInfoTest.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/unittests/Frontend/ASTUnitTest.cpp
M clang/unittests/Frontend/CompilerInvocationTest.cpp
M clang/unittests/Index/CMakeLists.txt
M clang/unittests/Index/IndexTests.cpp
M clang/unittests/Lex/PPMemoryAllocationsTest.cpp
A clang/unittests/ScalableStaticAnalysis/Analyses/OperatorNewDelete/OperatorNewDeletePointersExtractorTest.cpp
M clang/unittests/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlowTest.cpp
M clang/unittests/ScalableStaticAnalysis/BuildNamespaceTest.cpp
M clang/unittests/ScalableStaticAnalysis/CMakeLists.txt
M clang/unittests/ScalableStaticAnalysis/Frontend/TUSummaryExtractorFrontendActionTest.cpp
M clang/unittests/ScalableStaticAnalysis/ModelStringConversionsTest.cpp
M clang/unittests/ScalableStaticAnalysis/Registries/MockSerializationFormat.cpp
M clang/unittests/ScalableStaticAnalysis/Registries/MockSerializationFormat.h
A clang/unittests/ScalableStaticAnalysis/SourceTransformation/SARIFFormatTest.cpp
A clang/unittests/ScalableStaticAnalysis/SourceTransformation/YAMLFormatTest.cpp
M clang/unittests/ScalableStaticAnalysis/TestFixture.h
M clang/unittests/Tooling/Syntax/TokensTest.cpp
M clang/unittests/Tooling/ToolingTest.cpp
M clang/utils/TableGen/ClangBuiltinsEmitter.cpp
M clang/utils/TableGen/ClangOpcodesEmitter.cpp
A clang/utils/scan-deps-filter.py
M clang/www/OpenProjects.html
M clang/www/cxx_dr_status.html
M clang/www/cxx_status.html
M clang/www/make_cxx_dr_status
M cmake/Modules/CMakePolicy.cmake
M compiler-rt/CMakeLists.txt
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/cmake/Modules/CompilerRTUtils.cmake
M compiler-rt/include/profile/InstrProfData.inc
M compiler-rt/include/sanitizer/safestack_interface.h
M compiler-rt/lib/builtins/CMakeLists.txt
A compiler-rt/lib/builtins/addtf3.cpp
M compiler-rt/lib/builtins/arm/addsf3.S
A compiler-rt/lib/builtins/arm/thumb1/addsf3.S
A compiler-rt/lib/builtins/arm/thumb1/addsf3fast.S
M compiler-rt/lib/builtins/cpu_model/x86.c
A compiler-rt/lib/builtins/fp_libc_config.h
M compiler-rt/lib/builtins/hexagon/dffma.S
M compiler-rt/lib/fuzzer/FuzzerIO.cpp
M compiler-rt/lib/hwasan/hwasan_checks.h
M compiler-rt/lib/hwasan/hwasan_platform_interceptors.h
M compiler-rt/lib/hwasan/hwasan_tag_mismatch_aarch64.S
M compiler-rt/lib/hwasan/hwasan_tag_mismatch_riscv64.S
M compiler-rt/lib/lsan/lsan_allocator.cpp
M compiler-rt/lib/memprof/memprof_allocator.cpp
M compiler-rt/lib/memprof/memprof_mapping.h
M compiler-rt/lib/memprof/tests/CMakeLists.txt
A compiler-rt/lib/memprof/tests/shadow.cpp
M compiler-rt/lib/msan/msan_allocator.cpp
M compiler-rt/lib/nsan/nsan.cpp
M compiler-rt/lib/profile/InstrProfiling.h
M compiler-rt/lib/profile/InstrProfilingBuffer.c
M compiler-rt/lib/profile/InstrProfilingFile.c
M compiler-rt/lib/profile/InstrProfilingInternal.h
M compiler-rt/lib/profile/InstrProfilingPlatformGPU.c
M compiler-rt/lib/profile/InstrProfilingPlatformROCm.cpp
M compiler-rt/lib/profile/InstrProfilingPlatformWindows.c
M compiler-rt/lib/profile/InstrProfilingWriter.c
M compiler-rt/lib/safestack/safestack.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
M compiler-rt/lib/sanitizer_common/sanitizer_flag_parser.h
M compiler-rt/lib/sanitizer_common/sanitizer_mac.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
M compiler-rt/lib/sanitizer_common/tests/sanitizer_mutex_test.cpp
M compiler-rt/lib/sanitizer_common/tests/sanitizer_test_utils.h
M compiler-rt/lib/scudo/standalone/secondary.h
M compiler-rt/lib/scudo/standalone/tests/chunk_test.cpp
M compiler-rt/lib/scudo/standalone/tests/combined_test.cpp
M compiler-rt/lib/scudo/standalone/tests/flags_test.cpp
M compiler-rt/lib/scudo/standalone/tests/map_test.cpp
M compiler-rt/lib/scudo/standalone/tests/memtag_test.cpp
M compiler-rt/lib/scudo/standalone/tests/report_test.cpp
M compiler-rt/lib/scudo/standalone/tests/scudo_unit_test.h
M compiler-rt/lib/scudo/standalone/tests/secondary_test.cpp
M compiler-rt/lib/scudo/standalone/tests/wrappers_c_test.cpp
M compiler-rt/lib/scudo/standalone/tests/wrappers_cpp_test.cpp
M compiler-rt/lib/scudo/standalone/tsd_shared.h
M compiler-rt/lib/tsan/rtl/tsan_interceptors_libdispatch.cpp
M compiler-rt/test/asan/TestCases/Posix/new_array_cookie_with_new_from_class.cpp
M compiler-rt/test/asan/TestCases/Windows/issue64990.cpp
M compiler-rt/test/builtins/CMakeLists.txt
A compiler-rt/test/builtins/Unit/addsf3new_test.c
M compiler-rt/test/builtins/Unit/compiler_rt_scalbn_test.c
M compiler-rt/test/builtins/Unit/compiler_rt_scalbnf_test.c
A compiler-rt/test/builtins/Unit/hexagon_fmadf5_test.c
M compiler-rt/test/builtins/Unit/lit.cfg.py
M compiler-rt/test/builtins/Unit/lit.site.cfg.py.in
A compiler-rt/test/builtins/Unit/subsf3_test.c
M compiler-rt/test/lit.common.cfg.py
A compiler-rt/test/profile/Darwin/instrprof-mcdc-correlation.c
M compiler-rt/test/profile/GPU/instrprof-hip-counter-correctness.hip
A compiler-rt/test/profile/Inputs/instrprof-mcdc-correlation.cpp
M compiler-rt/test/profile/Linux/instrprof-debug-info-correlate-warnings.ll
A compiler-rt/test/profile/Linux/instrprof-mcdc-correlation.c
M compiler-rt/test/profile/instrprof-binary-correlate-debuginfod.c
M compiler-rt/test/profile/instrprof-binary-correlate.c
M compiler-rt/test/safestack/sigaltstack.c
A compiler-rt/test/sanitizer_common/TestCases/Linux/dlopen_image_base.c
A compiler-rt/test/sanitizer_common/TestCases/Linux/read_pread_chk.c
M compiler-rt/test/shadowcallstack/libc_support.h
M compiler-rt/test/shadowcallstack/lit.cfg.py
M compiler-rt/test/shadowcallstack/minimal_runtime.h
A compiler-rt/test/tsan/Darwin/dispatch_apply.mm
M compiler-rt/test/tsan/signal_in_read.c
A compiler-rt/test/ubsan/TestCases/Integer/Inputs/make_signed.h
A compiler-rt/test/ubsan/TestCases/Integer/Inputs/wrappers.h
A compiler-rt/test/ubsan/TestCases/Integer/suppressions-nested-calls.c
M cross-project-tests/CMakeLists.txt
M cross-project-tests/debuginfo-tests/dexter-tests/aggregate-indirect-arg.cpp
M cross-project-tests/debuginfo-tests/dexter-tests/asan-deque.cpp
M cross-project-tests/debuginfo-tests/dexter-tests/asan.c
M cross-project-tests/debuginfo-tests/dexter-tests/ctor.cpp
M cross-project-tests/debuginfo-tests/dexter-tests/dbg-arg.c
M cross-project-tests/debuginfo-tests/dexter-tests/deferred_globals.cpp
M cross-project-tests/debuginfo-tests/dexter-tests/global-constant.cpp
M cross-project-tests/debuginfo-tests/dexter-tests/hello.c
M cross-project-tests/debuginfo-tests/dexter-tests/inline-line-gap.cpp
M cross-project-tests/debuginfo-tests/dexter-tests/memvars/bitcast.c
M cross-project-tests/debuginfo-tests/dexter-tests/memvars/const-branch.c
M cross-project-tests/debuginfo-tests/dexter-tests/memvars/ctrl-flow.c
M cross-project-tests/debuginfo-tests/dexter-tests/memvars/implicit-ptr.c
M cross-project-tests/debuginfo-tests/dexter-tests/memvars/inline-escaping-function.c
M cross-project-tests/debuginfo-tests/dexter-tests/memvars/inlining-dse.c
M cross-project-tests/debuginfo-tests/dexter-tests/memvars/inlining.c
M cross-project-tests/debuginfo-tests/dexter-tests/memvars/loop.c
M cross-project-tests/debuginfo-tests/dexter-tests/memvars/merged-store.c
M cross-project-tests/debuginfo-tests/dexter-tests/memvars/ptr-to.c
M cross-project-tests/debuginfo-tests/dexter-tests/memvars/struct-dse.c
M cross-project-tests/debuginfo-tests/dexter-tests/memvars/unused-merged-value.c
M cross-project-tests/debuginfo-tests/dexter-tests/namespace.cpp
M cross-project-tests/debuginfo-tests/dexter-tests/nrvo-string.cpp
M cross-project-tests/debuginfo-tests/dexter-tests/nrvo.cpp
M cross-project-tests/debuginfo-tests/dexter-tests/optnone-fastmath.cpp
M cross-project-tests/debuginfo-tests/dexter-tests/optnone-loops.cpp
M cross-project-tests/debuginfo-tests/dexter-tests/optnone-simple-functions.cpp
M cross-project-tests/debuginfo-tests/dexter-tests/optnone-struct-and-methods.cpp
M cross-project-tests/debuginfo-tests/dexter-tests/optnone-vectors-and-functions.cpp
M cross-project-tests/debuginfo-tests/dexter-tests/realigned-frame.cpp
M cross-project-tests/debuginfo-tests/dexter-tests/stack-var.c
M cross-project-tests/debuginfo-tests/dexter-tests/vla.c
A cross-project-tests/debuginfo-tests/dexter/Heuristic.md
M cross-project-tests/debuginfo-tests/dexter/README.md
A cross-project-tests/debuginfo-tests/dexter/Script.md
M cross-project-tests/debuginfo-tests/dexter/dex/debugger/DAP.py
M cross-project-tests/debuginfo-tests/dexter/dex/debugger/DebuggerBase.py
M cross-project-tests/debuginfo-tests/dexter/dex/debugger/DebuggerControllers/ScriptDebuggerController.py
M cross-project-tests/debuginfo-tests/dexter/dex/debugger/dbgeng/dbgeng.py
M cross-project-tests/debuginfo-tests/dexter/dex/debugger/lldb/LLDB.py
M cross-project-tests/debuginfo-tests/dexter/dex/debugger/visualstudio/VisualStudio.py
M cross-project-tests/debuginfo-tests/dexter/dex/dextIR/FrameIR.py
M cross-project-tests/debuginfo-tests/dexter/dex/dextIR/StepIR.py
M cross-project-tests/debuginfo-tests/dexter/dex/evaluation/ExpectMatch.py
A cross-project-tests/debuginfo-tests/dexter/dex/evaluation/ExpectRewriter.py
M cross-project-tests/debuginfo-tests/dexter/dex/evaluation/Metrics.py
M cross-project-tests/debuginfo-tests/dexter/dex/evaluation/RunMatch.py
M cross-project-tests/debuginfo-tests/dexter/dex/evaluation/StateMatch.py
M cross-project-tests/debuginfo-tests/dexter/dex/test_script/Nodes.py
M cross-project-tests/debuginfo-tests/dexter/dex/test_script/Script.py
M cross-project-tests/debuginfo-tests/dexter/dex/tools/TestToolBase.py
M cross-project-tests/debuginfo-tests/dexter/dex/tools/ToolBase.py
M cross-project-tests/debuginfo-tests/dexter/dex/tools/test/Tool.py
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/control/dex-continue.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/control/dex_step_function.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/penalty/dex_declare_file.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/penalty/expect_program_state.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/penalty/expect_step_kinds.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/penalty/expect_step_order.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/penalty/expect_watch_type.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/penalty/expect_watch_value.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/penalty/float_range_out_range.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/penalty/float_range_zero_nonmatch.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/penalty/missing_dex_address.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/penalty/unreachable.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/penalty/unreachable_line_range.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/penalty/unreachable_on_line.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/command_line.c
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_address/address_after_ref.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_address/address_hit_count.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_address/expression_address.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_address/identical_address.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_address/multiple_address.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_address/offset_address.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_address/self_comparison.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/dex_and_source/test.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_finish_test/default_conditional.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_finish_test/default_conditional_hit_count.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_finish_test/default_hit_count.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_finish_test/default_simple.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_finish_test/limit_steps_conditional.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_finish_test/limit_steps_conditional_hit_count.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_finish_test/limit_steps_hit_count.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_finish_test/limit_steps_simple.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_program_state.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_step_kind/direction.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_step_kind/func.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_step_kind/func_external.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_step_kind/recursive.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_step_kind/small_loop.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_step_order.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_watch_type.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_watch_value.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/float_range_watch/float_range_multiple.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/float_range_watch/float_range_no_arg.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/float_range_watch/float_range_small.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/float_range_watch/float_range_zero_match.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/hit_count.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/limit_steps_check_json_step_count.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/limit_steps_expect_loop.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/limit_steps_expect_value.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/limit_steps_line_mismatch.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/limit_steps_overlapping_ranges.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/limit_steps_same_line_conditional.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/unconditional.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/unreachable.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/unreachable_not_cmd_lineno.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/unreachable_on_line.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/conditions.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/debugging/debug_aggregates.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/debugging/simple_where_function.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/debugging/simple_where_line.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/debugging/then_after_hit_count.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/debugging/then_at_frame.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/debugging/then_finish.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/debugging/then_step_out.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/debugging/watch_scope.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/debugging/where_file_paths.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/debugging/where_fn_hit_count.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/debugging/where_for_hit_count.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/debugging/where_hit_count_early_exit.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/evaluation/basic_evaluate.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/evaluation/eval_address.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/evaluation/eval_aggregates.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/evaluation/eval_at_frame.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/evaluation/eval_list_aggregates.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/evaluation/eval_steps_penalties.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/evaluation/eval_steps_perfect.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/evaluation/eval_sublist_aggregates.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/evaluation/eval_sublist_aggregates_addresses.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/evaluation/eval_types.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/evaluation/evaluate_nothing.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/floats.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/labels/invalid_label.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/labels/offset.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/labels/simple_labels.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/labels/source_root_dir.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/lit.local.cfg
M cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/nested_wheres.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/parser/bad-where-attr.test
M cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/parser/error-locations.test
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/parser/expect-all-with-value.test
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/parser/invalid-address.test
M cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/parser/invalid-script-nodes.test
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/parser/parse-address.test
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/parser/reject-bad-at_frame_idx.test
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/parser/step-node-expected-values.test
M cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/parser/valid-parse.test
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/Inputs/rewrite_aggregates_expected.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/Inputs/rewrite_at_frame_expected.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/Inputs/rewrite_expect_list_expected.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/Inputs/rewrite_expects_expected.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/Inputs/rewrite_list_aggregates_expected.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/Inputs/rewrite_multiple_scripts_expected.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/Inputs/rewrite_scopes_expected.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/Inputs/rewrite_scopes_list_expected.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/Inputs/rewrite_step_lines.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/Inputs/rewrite_step_lines_expected.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/Inputs/rewrite_types_expected.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/Inputs/simple_prog.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/Inputs/whole_file_test.dex
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/Inputs/whole_file_test_expected.dex
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/rewrite_aggregates.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/rewrite_at_frame.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/rewrite_expect_list.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/rewrite_expects.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/rewrite_list_aggregates.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/rewrite_multiple_scripts.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/rewrite_scopes.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/rewrite_scopes_list.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/rewrite_step_lines.test
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/rewrite_types.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/whole_file.test
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/where_hit_count.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/address_printing.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/err_bad_label_ref.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/err_duplicate_address.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/err_duplicate_label.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/err_label_kwarg.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/err_limit_steps_no_values.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/err_paren.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/err_paren_mline.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/err_syntax.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/err_syntax_dexdeclarefile.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/err_syntax_mline.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/err_type.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/err_type_mline.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/err_undeclared_addr.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/label_another_line.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/label_offset.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/source-root-dir.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/target_run_args.c
M cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/target_run_args_with_command.c
M cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/view.cpp
A cross-project-tests/dtlto/cache-serialization.test
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M cross-project-tests/lit.cfg.py
M flang-rt/include/flang-rt/runtime/allocator-registry.h
M flang-rt/include/flang-rt/runtime/work-queue.h
M flang-rt/lib/cuda/allocator.cpp
M flang-rt/lib/cuda/descriptor.cpp
M flang-rt/lib/runtime/CMakeLists.txt
M flang-rt/lib/runtime/ISO_Fortran_binding.cpp
M flang-rt/lib/runtime/__cuda_device.f90
M flang-rt/lib/runtime/__ppc_intrinsics.f90
M flang-rt/lib/runtime/__ppc_types.f90
M flang-rt/lib/runtime/cuda_runtime_api.f90
M flang-rt/lib/runtime/descriptor.cpp
M flang-rt/lib/runtime/io-api-server.cpp
M flang-rt/lib/runtime/mma.f90
M flang-rt/lib/runtime/pointer.cpp
M flang-rt/lib/runtime/time-intrinsic.cpp
M flang-rt/test/lit.cfg.py
M flang-rt/unittests/Runtime/Allocatable.cpp
M flang-rt/unittests/Runtime/Pointer.cpp
M flang-rt/unittests/Runtime/tools.h
M flang/CMakeLists.txt
M flang/docs/Extensions.md
M flang/docs/FAQ.md
M flang/docs/GettingInvolved.md
M flang/docs/OpenACC-extensions.md
M flang/docs/OpenMPSupport.md
M flang/docs/ReleaseNotes.md
M flang/docs/Semantics.md
M flang/include/flang/Common/constexpr-bitset.h
M flang/include/flang/Common/idioms.h
M flang/include/flang/Decimal/binary-floating-point.h
M flang/include/flang/Evaluate/expression.h
M flang/include/flang/Evaluate/fold-designator.h
M flang/include/flang/Evaluate/fold.h
M flang/include/flang/Evaluate/intrinsics.h
M flang/include/flang/Evaluate/rewrite.h
M flang/include/flang/Evaluate/shape.h
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Evaluate/traverse.h
M flang/include/flang/Evaluate/type.h
M flang/include/flang/Frontend/CodeGenOptions.def
M flang/include/flang/Frontend/CodeGenOptions.h
M flang/include/flang/Frontend/TextDiagnostic.h
M flang/include/flang/Lower/Allocatable.h
M flang/include/flang/Lower/CUDA.h
M flang/include/flang/Lower/CallInterface.h
M flang/include/flang/Lower/ConvertExprToHLFIR.h
M flang/include/flang/Lower/ConvertType.h
M flang/include/flang/Lower/DirectivesCommon.h
M flang/include/flang/Lower/HostAssociations.h
M flang/include/flang/Lower/LoweringOptions.def
M flang/include/flang/Lower/Mangler.h
M flang/include/flang/Lower/MultiImageFortran.h
M flang/include/flang/Lower/OpenMP.h
M flang/include/flang/Lower/Runtime.h
M flang/include/flang/Lower/Support/ReductionProcessor.h
M flang/include/flang/Lower/Support/Utils.h
M flang/include/flang/Lower/SymbolMap.h
M flang/include/flang/Optimizer/Analysis/AliasAnalysis.h
M flang/include/flang/Optimizer/Analysis/ArraySectionAnalyzer.h
M flang/include/flang/Optimizer/Builder/BoxValue.h
M flang/include/flang/Optimizer/Builder/CUDAIntrinsicCall.h
M flang/include/flang/Optimizer/Builder/DirectivesCommon.h
M flang/include/flang/Optimizer/Builder/FIRBuilder.h
M flang/include/flang/Optimizer/Builder/Factory.h
M flang/include/flang/Optimizer/Builder/HLFIRTools.h
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/include/flang/Optimizer/Builder/MIFCommon.h
A flang/include/flang/Optimizer/Builder/OpenACCIntrinsicCall.h
M flang/include/flang/Optimizer/Builder/PPCIntrinsicCall.h
M flang/include/flang/Optimizer/Builder/Runtime/Character.h
M flang/include/flang/Optimizer/Builder/Runtime/RTBuilder.h
M flang/include/flang/Optimizer/Builder/Todo.h
M flang/include/flang/Optimizer/CodeGen/CodeGenOpenMP.h
M flang/include/flang/Optimizer/CodeGen/TypeConverter.h
M flang/include/flang/Optimizer/Dialect/CUF/Attributes/CUFAttr.td
M flang/include/flang/Optimizer/Dialect/CUF/CUFDialect.h
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
M flang/include/flang/Optimizer/Dialect/FIRAttr.td
M flang/include/flang/Optimizer/Dialect/FIRCG/CGOps.h
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/include/flang/Optimizer/Dialect/FIROpsSupport.h
M flang/include/flang/Optimizer/Dialect/FIRType.h
M flang/include/flang/Optimizer/Dialect/FIRTypes.td
M flang/include/flang/Optimizer/Dialect/MIF/MIFDialect.h
M flang/include/flang/Optimizer/Dialect/MIF/MIFOps.td
M flang/include/flang/Optimizer/Dialect/SafeTempArrayCopyAttrInterface.h
M flang/include/flang/Optimizer/OpenACC/Analysis/FIROpenACCSupportAnalysis.h
M flang/include/flang/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.h
M flang/include/flang/Optimizer/Passes/Pipelines.h
M flang/include/flang/Optimizer/Support/InitFIR.h
M flang/include/flang/Optimizer/Support/InternalNames.h
M flang/include/flang/Optimizer/Support/Utils.h
M flang/include/flang/Optimizer/Transforms/CUDA/CUFAllocationConversion.h
M flang/include/flang/Optimizer/Transforms/CUFGPUToLLVMConversion.h
M flang/include/flang/Optimizer/Transforms/CUFOpConversion.h
M flang/include/flang/Optimizer/Transforms/MIFOpConversion.h
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Parser/char-block.h
M flang/include/flang/Parser/char-buffer.h
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/openmp-utils.h
M flang/include/flang/Parser/parse-state.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Parser/token-sequence.h
M flang/include/flang/Parser/unparse.h
M flang/include/flang/Parser/user-state.h
M flang/include/flang/Runtime/CUDA/allocator.h
M flang/include/flang/Runtime/CUDA/common.h
M flang/include/flang/Runtime/CUDA/kernel.h
M flang/include/flang/Runtime/allocator-registry-consts.h
M flang/include/flang/Runtime/array-constructor-consts.h
M flang/include/flang/Runtime/pointer.h
M flang/include/flang/Runtime/random.h
M flang/include/flang/Runtime/reduce.h
M flang/include/flang/Runtime/reduction.h
M flang/include/flang/Runtime/support.h
M flang/include/flang/Semantics/attr.h
M flang/include/flang/Semantics/expression.h
M flang/include/flang/Semantics/openmp-dsa.h
M flang/include/flang/Semantics/openmp-modifiers.h
M flang/include/flang/Semantics/openmp-utils.h
M flang/include/flang/Semantics/runtime-type-info.h
M flang/include/flang/Semantics/semantics.h
M flang/include/flang/Semantics/symbol.h
M flang/include/flang/Semantics/type.h
M flang/include/flang/Semantics/unparse-with-symbols.h
M flang/include/flang/Support/Flags.h
M flang/include/flang/Support/Fortran-features.h
M flang/include/flang/Support/Fortran.h
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/include/flang/Tools/TargetSetup.h
M flang/lib/Decimal/big-radix-floating-point.h
M flang/lib/Decimal/decimal-to-binary.cpp
M flang/lib/Evaluate/expression.cpp
M flang/lib/Evaluate/fold-implementation.h
M flang/lib/Evaluate/fold-integer.cpp
M flang/lib/Evaluate/formatting.cpp
M flang/lib/Evaluate/host.h
M flang/lib/Evaluate/intrinsics-library.cpp
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Evaluate/real.cpp
M flang/lib/Evaluate/tools.cpp
M flang/lib/Evaluate/variable.cpp
M flang/lib/Frontend/CodeGenOptions.cpp
M flang/lib/Frontend/CompilerInstance.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendAction.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Frontend/TextDiagnosticPrinter.cpp
M flang/lib/FrontendTool/ExecuteCompilerInvocation.cpp
M flang/lib/Lower/Allocatable.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/CallInterface.cpp
M flang/lib/Lower/ConvertArrayConstructor.cpp
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Lower/ConvertExpr.cpp
M flang/lib/Lower/ConvertExprToHLFIR.cpp
M flang/lib/Lower/ConvertType.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/CustomIntrinsicCall.cpp
M flang/lib/Lower/HostAssociations.cpp
M flang/lib/Lower/IO.cpp
M flang/lib/Lower/Mangler.cpp
M flang/lib/Lower/MultiImageFortran.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/OpenMP/Atomic.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/DataSharingProcessor.h
M flang/lib/Lower/OpenMP/Decomposer.cpp
M flang/lib/Lower/OpenMP/Decomposer.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/OpenMP/Utils.h
M flang/lib/Lower/PFTBuilder.cpp
M flang/lib/Lower/Runtime.cpp
M flang/lib/Lower/Support/ReductionProcessor.cpp
M flang/lib/Lower/SymbolMap.cpp
M flang/lib/Lower/VectorSubscripts.cpp
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/lib/Optimizer/Builder/CMakeLists.txt
M flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
M flang/lib/Optimizer/Builder/CUFCommon.cpp
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/MIFCommon.cpp
A flang/lib/Optimizer/Builder/OpenACCIntrinsicCall.cpp
M flang/lib/Optimizer/Builder/PPCIntrinsicCall.cpp
M flang/lib/Optimizer/Builder/Runtime/Character.cpp
M flang/lib/Optimizer/Builder/Runtime/Derived.cpp
M flang/lib/Optimizer/Builder/Runtime/Intrinsics.cpp
M flang/lib/Optimizer/Builder/Runtime/Main.cpp
M flang/lib/Optimizer/CodeGen/BoxedProcedure.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/CodeGen/CodeGenOpenMP.cpp
M flang/lib/Optimizer/CodeGen/FIROpPatterns.cpp
M flang/lib/Optimizer/CodeGen/PassDetail.h
M flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
M flang/lib/Optimizer/CodeGen/TBAABuilder.cpp
M flang/lib/Optimizer/CodeGen/Target.cpp
M flang/lib/Optimizer/CodeGen/TargetRewrite.cpp
M flang/lib/Optimizer/Dialect/CUF/Attributes/CUFAttr.cpp
M flang/lib/Optimizer/Dialect/CUF/CUFOps.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
M flang/lib/Optimizer/Dialect/MIF/MIFOps.cpp
M flang/lib/Optimizer/HLFIR/IR/HLFIROps.cpp
M flang/lib/Optimizer/HLFIR/Transforms/BufferizeHLFIR.cpp
M flang/lib/Optimizer/HLFIR/Transforms/ConvertToFIR.cpp
M flang/lib/Optimizer/HLFIR/Transforms/InlineElementals.cpp
M flang/lib/Optimizer/HLFIR/Transforms/InlineHLFIRAssign.cpp
M flang/lib/Optimizer/HLFIR/Transforms/LowerHLFIRIntrinsics.cpp
M flang/lib/Optimizer/HLFIR/Transforms/LowerHLFIROrderedAssignments.cpp
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
M flang/lib/Optimizer/HLFIR/Transforms/PropagateFortranVariableAttributes.cpp
M flang/lib/Optimizer/HLFIR/Transforms/ScheduleOrderedAssignments.cpp
M flang/lib/Optimizer/HLFIR/Transforms/SeparateAllocatableAssign.cpp
M flang/lib/Optimizer/HLFIR/Transforms/SimplifyHLFIRIntrinsics.cpp
M flang/lib/Optimizer/OpenACC/Analysis/CMakeLists.txt
M flang/lib/Optimizer/OpenACC/Analysis/FIROpenACCSupportAnalysis.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCAttributes.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCTypeInterfaces.cpp
M flang/lib/Optimizer/OpenACC/Support/RegisterOpenACCExtensions.cpp
M flang/lib/Optimizer/OpenACC/Transforms/ACCRecipeBufferization.cpp
M flang/lib/Optimizer/OpenMP/DeleteUnreachableTargets.cpp
M flang/lib/Optimizer/OpenMP/FunctionFiltering.cpp
M flang/lib/Optimizer/OpenMP/LowerWorkdistribute.cpp
M flang/lib/Optimizer/OpenMP/LowerWorkshare.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/lib/Optimizer/OpenMP/MapsForPrivatizedSymbols.cpp
M flang/lib/Optimizer/OpenMP/Support/FIROpenMPAttributes.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Support/DataLayout.cpp
M flang/lib/Optimizer/Support/InternalNames.cpp
M flang/lib/Optimizer/Transforms/AddAliasTags.cpp
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
M flang/lib/Optimizer/Transforms/AffineDemotion.cpp
M flang/lib/Optimizer/Transforms/AffinePromotion.cpp
M flang/lib/Optimizer/Transforms/AssumedRankOpConversion.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
M flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
A flang/lib/Optimizer/Transforms/CUDA/CUFAllocDelay.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFAllocationConversion.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFComputeSharedMemoryOffsetsAndSize.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFDeviceFuncTransform.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFDeviceGlobal.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFFunctionRewrite.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFGPUToLLVMConversion.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFLaunchAttachAttr.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFOpConversion.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFOpConversionLate.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFPredefinedVarToGPU.cpp
M flang/lib/Optimizer/Transforms/CompilerGeneratedNames.cpp
M flang/lib/Optimizer/Transforms/ControlFlowConverter.cpp
M flang/lib/Optimizer/Transforms/ConvertComplexPow.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.h
A flang/lib/Optimizer/Transforms/EmitMIFGlobalCtors.cpp
M flang/lib/Optimizer/Transforms/ExternalNameConversion.cpp
M flang/lib/Optimizer/Transforms/FIRToMemRef.cpp
M flang/lib/Optimizer/Transforms/FIRToSCF.cpp
M flang/lib/Optimizer/Transforms/GenRuntimeCallsForTest.cpp
M flang/lib/Optimizer/Transforms/LoopInvariantCodeMotion.cpp
M flang/lib/Optimizer/Transforms/LoopVersioning.cpp
M flang/lib/Optimizer/Transforms/MIFOpConversion.cpp
M flang/lib/Optimizer/Transforms/MemRefDataFlowOpt.cpp
M flang/lib/Optimizer/Transforms/MemoryAllocation.cpp
M flang/lib/Optimizer/Transforms/MemoryUtils.cpp
M flang/lib/Optimizer/Transforms/OptimizeArrayRepacking.cpp
M flang/lib/Optimizer/Transforms/PolymorphicOpConversion.cpp
M flang/lib/Optimizer/Transforms/SetRuntimeCallAttributes.cpp
M flang/lib/Optimizer/Transforms/SimplifyIntrinsics.cpp
M flang/lib/Optimizer/Transforms/SimplifyRegionLite.cpp
M flang/lib/Optimizer/Transforms/StackArrays.cpp
M flang/lib/Optimizer/Transforms/StackReclaim.cpp
M flang/lib/Optimizer/Transforms/VScaleAttr.cpp
M flang/lib/Parser/basic-parsers.h
M flang/lib/Parser/executable-parsers.cpp
M flang/lib/Parser/expr-parsers.cpp
M flang/lib/Parser/message.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/openmp-utils.cpp
M flang/lib/Parser/parse-tree.cpp
M flang/lib/Parser/preprocessor.cpp
M flang/lib/Parser/prescan.cpp
M flang/lib/Parser/program-parsers.cpp
M flang/lib/Parser/source.cpp
M flang/lib/Parser/token-parsers.h
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/assignment.cpp
M flang/lib/Semantics/canonicalize-omp.cpp
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-case.cpp
M flang/lib/Semantics/check-cuda.cpp
M flang/lib/Semantics/check-data.cpp
M flang/lib/Semantics/check-data.h
M flang/lib/Semantics/check-deallocate.cpp
M flang/lib/Semantics/check-declarations.cpp
M flang/lib/Semantics/check-do-forall.cpp
M flang/lib/Semantics/check-if-stmt.cpp
M flang/lib/Semantics/check-nullify.cpp
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/check-omp-variant.cpp
M flang/lib/Semantics/check-select-rank.cpp
M flang/lib/Semantics/check-select-type.cpp
M flang/lib/Semantics/check-stop.cpp
M flang/lib/Semantics/compute-offsets.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/openmp-dsa.cpp
M flang/lib/Semantics/openmp-modifiers.cpp
M flang/lib/Semantics/openmp-utils.cpp
M flang/lib/Semantics/pointer-assignment.cpp
M flang/lib/Semantics/program-tree.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-labels.cpp
M flang/lib/Semantics/resolve-names-utils.cpp
M flang/lib/Semantics/resolve-names-utils.h
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/rewrite-parse-tree.cpp
M flang/lib/Semantics/runtime-type-info.cpp
M flang/lib/Semantics/scope.cpp
M flang/lib/Semantics/semantics.cpp
M flang/lib/Semantics/tools.cpp
M flang/lib/Support/Flags.cpp
M flang/lib/Support/Fortran-features.cpp
M flang/lib/Support/Fortran.cpp
M flang/lib/Support/LangOptions.cpp
M flang/lib/Support/Version.cpp
M flang/lib/Testing/fp-testing.cpp
M flang/test/CMakeLists.txt
A flang/test/Driver/bbc-implicit-use-module.f90
M flang/test/Driver/color-diagnostics.f90
M flang/test/Driver/driver-help.f90
M flang/test/Driver/fsave-optimization-record.f90
M flang/test/Driver/omp-driver-offload.f90
A flang/test/Driver/real-sum-reassociation.f90
M flang/test/Fir/CUDA/cuda-constructor-2.f90
M flang/test/Fir/CUDA/cuda-device-func-transform.mlir
A flang/test/Fir/CUDA/cuda-device-global-internal-linkage.fir
M flang/test/Fir/CUDA/cuda-device-global.f90
M flang/test/Fir/CUDA/cuda-function-rewrite.mlir
M flang/test/Fir/CUDA/predefined-variables.mlir
M flang/test/Fir/FirToSCF/do-loop.fir
A flang/test/Fir/MIF/cobound.mlir
A flang/test/Fir/MIF/coshape.mlir
A flang/test/Fir/MIF/image_index.mlir
M flang/test/Fir/MIF/this_image.mlir
M flang/test/Fir/OpenACC/offload-livein-value-canonicalization.fir
M flang/test/Fir/basic-program.fir
M flang/test/Fir/convert-to-llvm.fir
A flang/test/Fir/derived-type-aliases.fir
M flang/test/Fir/fir-ops.fir
M flang/test/Fir/present-absent-if-fold.fir
M flang/test/Fir/target-rewrite-arg-position.fir
A flang/test/HLFIR/inline-elemental-multi-users.fir
R flang/test/HLFIR/inline-hlfir-assign-pointer-overlap.fir
R flang/test/HLFIR/inline-hlfir-assign-scalar-index.fir
R flang/test/HLFIR/inline-hlfir-assign-self-copy-runtime-stride.fir
R flang/test/HLFIR/inline-hlfir-assign-self-copy.fir
M flang/test/HLFIR/separate-allocatable-assign.fir
M flang/test/Integration/OpenMP/map-types-and-sizes.f90
M flang/test/Integration/split-lto-unit-2.f90
A flang/test/Lower/CUDA/cuda-allocatable-component.cuf
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
M flang/test/Lower/CUDA/cuda-device-proc.cuf
M flang/test/Lower/CUDA/cuda-libdevice.cuf
M flang/test/Lower/CUDA/cuda-proc-attribute.cuf
M flang/test/Lower/MIF/coarray_allocation.f90
M flang/test/Lower/MIF/coarray_allocation2.f90
M flang/test/Lower/MIF/coarray_allocation4.f90
M flang/test/Lower/MIF/coarray_allocation5.f90
A flang/test/Lower/MIF/cobound.f90
A flang/test/Lower/MIF/coshape.f90
A flang/test/Lower/MIF/image_index.f90
M flang/test/Lower/MIF/this_image.f90
M flang/test/Lower/OpenACC/acc-bounds.f90
M flang/test/Lower/OpenACC/acc-host-data-cuda-device.f90
A flang/test/Lower/OpenACC/acc-loop-nested-in-do-concurrent.f90
M flang/test/Lower/OpenACC/acc-private.f90
M flang/test/Lower/OpenACC/acc-reduction-maxmin.f90
M flang/test/Lower/OpenACC/acc-reduction.f90
M flang/test/Lower/OpenACC/acc-routine-bind-clone-signature.f90
A flang/test/Lower/OpenACC/acc-routine-bind-devtype-filter.f90
M flang/test/Lower/OpenACC/acc-routine-bind-devtype-undeclared.f90
M flang/test/Lower/OpenACC/acc-routine-bind-string-undeclared.f90
M flang/test/Lower/OpenACC/acc-routine-bind-undeclared.f90
M flang/test/Lower/OpenACC/locations.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-implicit-scalar-map-2.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-implicit-scalar-map.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-multiple-variables.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-teams-private-implicit-scalar-map.f90
A flang/test/Lower/OpenMP/declare-reduction-logical-init.f90
A flang/test/Lower/OpenMP/declare-reduction-operator-host-assoc.f90
A flang/test/Lower/OpenMP/declare-reduction-shadows-intrinsic-other-type.f90
A flang/test/Lower/OpenMP/declare-reduction-shadows-intrinsic.f90
M flang/test/Lower/OpenMP/declare-target-link-tarop-cap.f90
M flang/test/Lower/OpenMP/defaultmap.f90
A flang/test/Lower/OpenMP/function-filtering-4.f90
M flang/test/Lower/OpenMP/host-eval.f90
A flang/test/Lower/OpenMP/non-rectangular-collapse.f90
A flang/test/Lower/OpenMP/non-rectangular-collapse2.f90
A flang/test/Lower/OpenMP/non-rectangular-collapse3.f90
M flang/test/Lower/OpenMP/optional-argument-map-2.f90
A flang/test/Lower/OpenMP/reduction-array-element.f90
A flang/test/Lower/OpenMP/target-kernel-types.f90
M flang/test/Lower/OpenMP/target-map-complex.f90
M flang/test/Lower/OpenMP/target-scope.f90
M flang/test/Lower/OpenMP/target.f90
M flang/test/Lower/OpenMP/threadprivate-default-clause.f90
A flang/test/Lower/OpenMP/unroll-partial01.f90
A flang/test/Lower/split-sum-expression-tree-lowering.f90
A flang/test/Parser/OpenMP/apply01.f90
A flang/test/Parser/OpenMP/apply02.f90
A flang/test/Parser/acc-routine-in-interface.f90
A flang/test/Preprocessing/carriage-return.f90
A flang/test/Semantics/CUDA/cuf-constant-generic-unified.cuf
A flang/test/Semantics/CUDA/cuf-device-procedures01.cuf
A flang/test/Semantics/CUDA/cuf-device-procedures02.cuf
A flang/test/Semantics/CUDA/cuf-generic-literal-host.cuf
A flang/test/Semantics/CUDA/cuf-generic-nonvar-unified.cuf
A flang/test/Semantics/CUDA/cuf-hostdevice-host-call.cuf
A flang/test/Semantics/CUDA/cuf-ignore-tkr-m-error.cuf
A flang/test/Semantics/CUDA/cuf-ignore-tkr-m-generic.cuf
A flang/test/Semantics/CUDA/cuf-matching-distance.cuf
A flang/test/Semantics/CUDA/cuf-missing-intrinsic-modules.cuf
A flang/test/Semantics/CUDA/cuf-proc-attr-error.cuf
A flang/test/Semantics/CUDA/cuf01.cuf
A flang/test/Semantics/CUDA/cuf02.cuf
A flang/test/Semantics/CUDA/cuf03.cuf
A flang/test/Semantics/CUDA/cuf04.cuf
A flang/test/Semantics/CUDA/cuf05.cuf
A flang/test/Semantics/CUDA/cuf06.cuf
A flang/test/Semantics/CUDA/cuf07.cuf
A flang/test/Semantics/CUDA/cuf08.cuf
A flang/test/Semantics/CUDA/cuf09.cuf
A flang/test/Semantics/CUDA/cuf10.cuf
A flang/test/Semantics/CUDA/cuf11.cuf
A flang/test/Semantics/CUDA/cuf12.cuf
A flang/test/Semantics/CUDA/cuf13.cuf
A flang/test/Semantics/CUDA/cuf14.cuf
A flang/test/Semantics/CUDA/cuf15.cuf
A flang/test/Semantics/CUDA/cuf16.cuf
A flang/test/Semantics/CUDA/cuf17.cuf
A flang/test/Semantics/CUDA/cuf18.cuf
A flang/test/Semantics/CUDA/cuf19.cuf
A flang/test/Semantics/CUDA/cuf20.cuf
A flang/test/Semantics/CUDA/cuf21.cuf
A flang/test/Semantics/CUDA/cuf22.cuf
A flang/test/Semantics/CUDA/cuf23.cuf
A flang/test/Semantics/CUDA/cuf24.cuf
A flang/test/Semantics/CUDA/cuf25.cuf
A flang/test/Semantics/CUDA/cuf26.cuf
A flang/test/Semantics/CUDA/cuf27.cuf
A flang/test/Semantics/CUDA/cuf28.cuf
A flang/test/Semantics/CUDA/cuf29.cuf
A flang/test/Semantics/CUDA/cuf30.cuf
A flang/test/Semantics/CUDA/cuf31.cuf
A flang/test/Semantics/OpenACC/acc-component-ref-dsa.f90
A flang/test/Semantics/OpenACC/acc-default-none-arrays.f90
M flang/test/Semantics/OpenACC/acc-default-none-scalars-strict.f90
M flang/test/Semantics/OpenACC/acc-default-none-scalars.f90
M flang/test/Semantics/OpenACC/acc-kernels-loop.f90
M flang/test/Semantics/OpenACC/acc-parallel.f90
M flang/test/Semantics/OpenACC/acc-resolve01.f90
A flang/test/Semantics/OpenACC/acc-routine-bad.f90
A flang/test/Semantics/OpenACC/acc-routine-in-interface-name-mismatch.f90
A flang/test/Semantics/OpenACC/acc-routine-in-interface.f90
M flang/test/Semantics/OpenMP/affinity-clause.f90
M flang/test/Semantics/OpenMP/allocate02.f90
M flang/test/Semantics/OpenMP/allocate04.f90
M flang/test/Semantics/OpenMP/allocate_do1.f90
M flang/test/Semantics/OpenMP/allocators03.f90
A flang/test/Semantics/OpenMP/apply01.f90
A flang/test/Semantics/OpenMP/apply02.f90
M flang/test/Semantics/OpenMP/atomic-compare.f90
M flang/test/Semantics/OpenMP/atomic.f90
M flang/test/Semantics/OpenMP/atomic01.f90
M flang/test/Semantics/OpenMP/cancel.f90
M flang/test/Semantics/OpenMP/clause-validity01.f90
M flang/test/Semantics/OpenMP/clause-validity02.f90
M flang/test/Semantics/OpenMP/combined-constructs.f90
M flang/test/Semantics/OpenMP/declarative-directive01.f90
M flang/test/Semantics/OpenMP/declare-variant-match.f90
M flang/test/Semantics/OpenMP/declare-variant.f90
M flang/test/Semantics/OpenMP/default.f90
M flang/test/Semantics/OpenMP/detach02.f90
M flang/test/Semantics/OpenMP/device-constructs.f90
M flang/test/Semantics/OpenMP/do-collapse.f90
M flang/test/Semantics/OpenMP/flush01.f90
M flang/test/Semantics/OpenMP/flush02.f90
M flang/test/Semantics/OpenMP/graph-id.f90
M flang/test/Semantics/OpenMP/graph-reset.f90
M flang/test/Semantics/OpenMP/if-clause-45-suggestion.f90
M flang/test/Semantics/OpenMP/if-clause-45.f90
M flang/test/Semantics/OpenMP/if-clause-50-suggestion.f90
M flang/test/Semantics/OpenMP/if-clause-50.f90
M flang/test/Semantics/OpenMP/interchange-permutation.f90
M flang/test/Semantics/OpenMP/loop-transformation-clauses01.f90
M flang/test/Semantics/OpenMP/loop-transformation-construct01.f90
M flang/test/Semantics/OpenMP/masked.f90
A flang/test/Semantics/OpenMP/metadirective-loop-applicability.f90
A flang/test/Semantics/OpenMP/metadirective-loop-nest.f90
A flang/test/Semantics/OpenMP/metadirective-loop-sequence.f90
M flang/test/Semantics/OpenMP/nontemporal.f90
M flang/test/Semantics/OpenMP/order-clause01.f90
M flang/test/Semantics/OpenMP/ordered01.f90
M flang/test/Semantics/OpenMP/ordered02.f90
M flang/test/Semantics/OpenMP/ordered03.f90
M flang/test/Semantics/OpenMP/requires01.f90
R flang/test/Semantics/OpenMP/reserved-locator.f90
M flang/test/Semantics/OpenMP/resolve02.f90
M flang/test/Semantics/OpenMP/scan1.f90
M flang/test/Semantics/OpenMP/sections01.f90
M flang/test/Semantics/OpenMP/single03.f90
M flang/test/Semantics/OpenMP/single04.f90
M flang/test/Semantics/OpenMP/symbol08.f90
M flang/test/Semantics/OpenMP/target-update01.f90
M flang/test/Semantics/OpenMP/taskgroup01.f90
M flang/test/Semantics/OpenMP/taskloop04.f90
M flang/test/Semantics/OpenMP/threadset-clause.f90
M flang/test/Semantics/OpenMP/tile01.f90
M flang/test/Semantics/OpenMP/workshare02.f90
M flang/test/Semantics/bug121973.f90
A flang/test/Semantics/call48.f90
M flang/test/Semantics/case01.f90
R flang/test/Semantics/cuf-constant-generic-unified.cuf
R flang/test/Semantics/cuf-device-procedures01.cuf
R flang/test/Semantics/cuf-device-procedures02.cuf
R flang/test/Semantics/cuf-generic-literal-host.cuf
R flang/test/Semantics/cuf-ignore-tkr-m-error.cuf
R flang/test/Semantics/cuf-ignore-tkr-m-generic.cuf
R flang/test/Semantics/cuf-matching-distance.cuf
R flang/test/Semantics/cuf-missing-intrinsic-modules.cuf
R flang/test/Semantics/cuf-proc-attr-error.cuf
R flang/test/Semantics/cuf01.cuf
R flang/test/Semantics/cuf02.cuf
R flang/test/Semantics/cuf03.cuf
R flang/test/Semantics/cuf04.cuf
R flang/test/Semantics/cuf05.cuf
R flang/test/Semantics/cuf06.cuf
R flang/test/Semantics/cuf07.cuf
R flang/test/Semantics/cuf08.cuf
R flang/test/Semantics/cuf09.cuf
R flang/test/Semantics/cuf10.cuf
R flang/test/Semantics/cuf11.cuf
R flang/test/Semantics/cuf12.cuf
R flang/test/Semantics/cuf13.cuf
R flang/test/Semantics/cuf14.cuf
R flang/test/Semantics/cuf15.cuf
R flang/test/Semantics/cuf16.cuf
R flang/test/Semantics/cuf17.cuf
R flang/test/Semantics/cuf18.cuf
R flang/test/Semantics/cuf19.cuf
R flang/test/Semantics/cuf20.cuf
R flang/test/Semantics/cuf21.cuf
R flang/test/Semantics/cuf22.cuf
R flang/test/Semantics/cuf23.cuf
R flang/test/Semantics/cuf24.cuf
R flang/test/Semantics/cuf25.cuf
R flang/test/Semantics/cuf26.cuf
R flang/test/Semantics/cuf27.cuf
R flang/test/Semantics/cuf28.cuf
R flang/test/Semantics/cuf29.cuf
R flang/test/Semantics/cuf30.cuf
A flang/test/Semantics/enumeration-type-declarations.f90
A flang/test/Semantics/enumeration-type-forward-ref.f90
A flang/test/Semantics/enumeration-type-relational.f90
M flang/test/Semantics/indirect02.f90
A flang/test/Semantics/stmt-func04.f90
A flang/test/Transforms/CUF/cuf-alloc-delay.fir
A flang/test/Transforms/FIRToMemRef/emboxed-slice-array-coor.mlir
A flang/test/Transforms/FIRToMemRef/emboxed-slice-non-unit-stride-non-unit-lb.mlir
A flang/test/Transforms/FIRToMemRef/emboxed-slice-rank-reduction-nonprefix.mlir
A flang/test/Transforms/FIRToMemRef/emboxed-slice-rank-reduction.mlir
A flang/test/Transforms/FIRToMemRef/emboxed-slice-stride.mlir
R flang/test/Transforms/OpenMP/function-filtering-host-ops.mlir
M flang/test/Transforms/stack-arrays.fir
M flang/tools/bbc/bbc.cpp
M flang/unittests/Frontend/CMakeLists.txt
M flang/unittests/Frontend/CompilerInstanceTest.cpp
A flang/unittests/Optimizer/AliasAnalysisCacheTest.cpp
M flang/unittests/Optimizer/CMakeLists.txt
A flang/unittests/Optimizer/OpenACC/FIROpenACCSupportAnalysisTest.cpp
M libc/CMakeLists.txt
M libc/benchmarks/CMakeLists.txt
M libc/benchmarks/JSON.cpp
M libc/benchmarks/JSONTest.cpp
M libc/benchmarks/LibcBenchmark.cpp
M libc/benchmarks/LibcBenchmark.h
M libc/benchmarks/LibcBenchmarkTest.cpp
M libc/benchmarks/LibcFunctionPrototypes.h
M libc/benchmarks/LibcMemoryBenchmark.cpp
M libc/benchmarks/LibcMemoryBenchmark.h
M libc/benchmarks/LibcMemoryBenchmarkMain.cpp
M libc/benchmarks/LibcMemoryGoogleBenchmarkMain.cpp
M libc/benchmarks/MemorySizeDistributions.cpp
M libc/benchmarks/MemorySizeDistributions.h
M libc/cmake/modules/LLVMLibCArchitectures.cmake
M libc/cmake/modules/prepare_libc_gpu_build.cmake
M libc/config/baremetal/aarch64/entrypoints.txt
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/config.json
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/darwin/aarch64/entrypoints.txt
M libc/config/darwin/x86_64/entrypoints.txt
M libc/config/freebsd/x86_64/entrypoints.txt
M libc/config/gpu/amdgpu/entrypoints.txt
M libc/config/gpu/nvptx/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/windows/entrypoints.txt
A libc/docs/arch_support.md
R libc/docs/arch_support.rst
A libc/docs/build_and_test.md
R libc/docs/build_and_test.rst
A libc/docs/build_concepts.md
R libc/docs/build_concepts.rst
A libc/docs/compiler_support.md
R libc/docs/compiler_support.rst
M libc/docs/conf.py
A libc/docs/contributing.md
R libc/docs/contributing.rst
A libc/docs/dev/building_docs.md
R libc/docs/dev/building_docs.rst
A libc/docs/dev/builtin_compatibility.md
R libc/docs/dev/builtin_compatibility.rst
A libc/docs/dev/code_style.md
R libc/docs/dev/code_style.rst
A libc/docs/dev/config_options.md
R libc/docs/dev/config_options.rst
A libc/docs/dev/date_and_time.md
A libc/docs/dev/entrypoints.md
R libc/docs/dev/entrypoints.rst
A libc/docs/dev/fuzzing.md
R libc/docs/dev/fuzzing.rst
A libc/docs/dev/header_generation.md
R libc/docs/dev/header_generation.rst
A libc/docs/dev/implementation_standard.md
R libc/docs/dev/implementation_standard.rst
A libc/docs/dev/implementing_a_function.md
R libc/docs/dev/implementing_a_function.rst
A libc/docs/dev/index.md
R libc/docs/dev/index.rst
A libc/docs/dev/modular_format.md
R libc/docs/dev/modular_format.rst
A libc/docs/dev/printf_behavior.md
R libc/docs/dev/printf_behavior.rst
A libc/docs/dev/source_tree_layout.md
R libc/docs/dev/source_tree_layout.rst
A libc/docs/dev/syscall_wrapper_refactor.md
R libc/docs/dev/syscall_wrapper_refactor.rst
A libc/docs/dev/undefined_behavior.md
R libc/docs/dev/undefined_behavior.rst
A libc/docs/full_cross_build.md
R libc/docs/full_cross_build.rst
A libc/docs/full_host_build.md
R libc/docs/full_host_build.rst
A libc/docs/getting_started.md
R libc/docs/getting_started.rst
A libc/docs/hand_in_hand.md
R libc/docs/hand_in_hand.rst
M libc/docs/headers/complex.rst
M libc/docs/headers/math/index.rst
M libc/docs/headers/stdfix.rst
A libc/docs/index.md
R libc/docs/index.rst
A libc/docs/overlay_mode.md
R libc/docs/overlay_mode.rst
A libc/docs/platform_support.md
R libc/docs/platform_support.rst
A libc/docs/porting.md
R libc/docs/porting.rst
A libc/docs/talks.md
R libc/docs/talks.rst
M libc/fuzzing/arpa/inet/CMakeLists.txt
A libc/fuzzing/arpa/inet/inet_ntop_differential_fuzz.cpp
M libc/hdr/CMakeLists.txt
A libc/hdr/dirent_overlay.h
A libc/hdr/inet-address-macros.h
A libc/hdr/net_if_macros.h
M libc/hdr/regex_macros.h
A libc/hdr/sys_time_macros.h
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/DIR.h
A libc/hdr/types/sa_family_t.h
A libc/hdr/types/struct_dirent.h
A libc/hdr/types/struct_ifreq.h
A libc/hdr/types/struct_ipv6_mreq.h
M libc/include/CMakeLists.txt
M libc/include/arpa/inet.yaml
M libc/include/complex.yaml
M libc/include/elf.yaml
A libc/include/err.yaml
R libc/include/link.h.def
M libc/include/link.yaml
M libc/include/llvm-libc-macros/CMakeLists.txt
M libc/include/llvm-libc-macros/float-macros.h
M libc/include/llvm-libc-macros/linux/CMakeLists.txt
A libc/include/llvm-libc-macros/linux/net-if-macros.h
M libc/include/llvm-libc-macros/linux/sched-macros.h
M libc/include/llvm-libc-macros/linux/sys-socket-macros.h
M libc/include/llvm-libc-macros/linux/sys-time-macros.h
A libc/include/llvm-libc-macros/net-if-macros.h
M libc/include/llvm-libc-macros/netinet-in-macros.h
M libc/include/llvm-libc-macros/sys-auxv-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/struct_ifreq.h
A libc/include/llvm-libc-types/struct_ipv6_mreq.h
A libc/include/net/if.yaml
M libc/include/netinet/in.yaml
M libc/include/sched.yaml
M libc/include/stdlib.yaml
R libc/include/string.h.def
M libc/include/string.yaml
M libc/include/sys/socket.yaml
M libc/include/sys/time.yaml
R libc/include/sys/ucontext.h.def
M libc/include/sys/ucontext.yaml
A libc/shared/builtins.h
A libc/shared/builtins/adddf3.h
A libc/shared/builtins/addsf3.h
A libc/shared/builtins/addtf3.h
A libc/shared/builtins/divdf3.h
A libc/shared/builtins/divsf3.h
A libc/shared/builtins/divtf3.h
A libc/shared/builtins/muldf3.h
A libc/shared/builtins/mulsf3.h
A libc/shared/builtins/multf3.h
A libc/shared/builtins/subdf3.h
A libc/shared/builtins/subsf3.h
A libc/shared/builtins/subtf3.h
M libc/shared/math.h
A libc/shared/math/expbf16.h
M libc/src/CMakeLists.txt
M libc/src/__support/CMakeLists.txt
M libc/src/__support/CPP/CMakeLists.txt
M libc/src/__support/CPP/expected.h
M libc/src/__support/CPP/string.h
M libc/src/__support/CPP/string_view.h
M libc/src/__support/CPP/type_traits/is_integral.h
M libc/src/__support/FPUtil/dyadic_float.h
M libc/src/__support/File/CMakeLists.txt
M libc/src/__support/File/dir.cpp
M libc/src/__support/File/dir.h
M libc/src/__support/File/linux/CMakeLists.txt
M libc/src/__support/File/linux/dir.cpp
M libc/src/__support/File/linux/file.cpp
M libc/src/__support/OSUtil/CMakeLists.txt
R libc/src/__support/OSUtil/fcntl.h
M libc/src/__support/OSUtil/linux/CMakeLists.txt
R libc/src/__support/OSUtil/linux/fcntl.cpp
A libc/src/__support/OSUtil/linux/path.h
M libc/src/__support/OSUtil/linux/stat/kernel_statx_types.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/alarm.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/dup2.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/fcntl.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/getitimer.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/setitimer.h
A libc/src/__support/OSUtil/path.h
M libc/src/__support/big_int.h
A libc/src/__support/builtins/CMakeLists.txt
A libc/src/__support/builtins/adddf3.h
A libc/src/__support/builtins/addsf3.h
A libc/src/__support/builtins/addtf3.h
A libc/src/__support/builtins/divdf3.h
A libc/src/__support/builtins/divsf3.h
A libc/src/__support/builtins/divtf3.h
A libc/src/__support/builtins/muldf3.h
A libc/src/__support/builtins/mulsf3.h
A libc/src/__support/builtins/multf3.h
A libc/src/__support/builtins/subdf3.h
A libc/src/__support/builtins/subsf3.h
A libc/src/__support/builtins/subtf3.h
M libc/src/__support/float_to_string.h
M libc/src/__support/frac128.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/expbf16.h
M libc/src/__support/net/CMakeLists.txt
M libc/src/__support/net/address.cpp
M libc/src/__support/net/address.h
A libc/src/__support/regex/CMakeLists.txt
A libc/src/__support/regex/regex_ast.h
A libc/src/__support/regex/regex_expr_pool.cpp
A libc/src/__support/regex/regex_expr_pool.h
M libc/src/arpa/inet/CMakeLists.txt
A libc/src/arpa/inet/inet_ntop.cpp
A libc/src/arpa/inet/inet_ntop.h
M libc/src/complex/CMakeLists.txt
A libc/src/complex/cabs.h
A libc/src/complex/cabsf.h
M libc/src/complex/generic/CMakeLists.txt
A libc/src/complex/generic/cabs.cpp
A libc/src/complex/generic/cabsf.cpp
M libc/src/dirent/CMakeLists.txt
A libc/src/dirent/fdopendir.cpp
A libc/src/dirent/fdopendir.h
Log Message:
-----------
Merge branch 'main' into users/c8ef/atomic_minmax
Compare: https://github.com/llvm/llvm-project/compare/269691062efd...f0a014a2f2f8
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