[all-commits] [llvm/llvm-project] b4698d: AMDGPU: Migrate CodeGen tests to amdgpu subarch tr...

Matt Arsenault via All-commits all-commits at lists.llvm.org
Mon Jul 13 02:12:56 PDT 2026 

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b4698d8d53e9b228bd84676ae83637b52a30d0e9
      https://github.com/llvm/llvm-project/commit/b4698d8d53e9b228bd84676ae83637b52a30d0e9
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2026-07-13 (Mon, 13 Jul 2026)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/fadd.f16.ll
    M llvm/test/CodeGen/AMDGPU/fadd.ll
    M llvm/test/CodeGen/AMDGPU/fadd64.ll
    M llvm/test/CodeGen/AMDGPU/fast-ra-kills-vcc.mir
    M llvm/test/CodeGen/AMDGPU/fast-regalloc-bundles.mir
    M llvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.global.ll
    M llvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.private.ll
    M llvm/test/CodeGen/AMDGPU/fastregalloc-illegal-subreg-physreg.mir
    M llvm/test/CodeGen/AMDGPU/fastregalloc-self-loop-heuristic.mir
    M llvm/test/CodeGen/AMDGPU/fastregalloc-sgpr-only.mir
    M llvm/test/CodeGen/AMDGPU/fcanonicalize-elimination.bf16.ll
    M llvm/test/CodeGen/AMDGPU/fcanonicalize-elimination.ll
    M llvm/test/CodeGen/AMDGPU/fcanonicalize.bf16.ll
    M llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
    M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
    M llvm/test/CodeGen/AMDGPU/fceil.ll
    M llvm/test/CodeGen/AMDGPU/fceil64.ll
    M llvm/test/CodeGen/AMDGPU/fcmp.f16.ll
    M llvm/test/CodeGen/AMDGPU/fcmp64.ll
    M llvm/test/CodeGen/AMDGPU/fconst64.ll
    M llvm/test/CodeGen/AMDGPU/fcopysign.bf16.ll
    M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
    M llvm/test/CodeGen/AMDGPU/fcopysign.f32.ll
    M llvm/test/CodeGen/AMDGPU/fcopysign.f64.ll
    M llvm/test/CodeGen/AMDGPU/fcopysign.gfx11plus.ll
    M llvm/test/CodeGen/AMDGPU/fdiv-nofpexcept.ll
    M llvm/test/CodeGen/AMDGPU/fdiv.bf16.ll
    M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
    M llvm/test/CodeGen/AMDGPU/fdiv.f64.ll
    M llvm/test/CodeGen/AMDGPU/fdiv.ll
    M llvm/test/CodeGen/AMDGPU/fdiv32-to-rcp-folding.ll
    M llvm/test/CodeGen/AMDGPU/fdiv_flags.f32.ll
    M llvm/test/CodeGen/AMDGPU/fdot2.ll
    M llvm/test/CodeGen/AMDGPU/fence-barrier-latency.ll
    M llvm/test/CodeGen/AMDGPU/fence-barrier.ll
    M llvm/test/CodeGen/AMDGPU/fence-lds-read2-write2.ll
    M llvm/test/CodeGen/AMDGPU/ffloor.f64.ll
    M llvm/test/CodeGen/AMDGPU/ffloor.ll
    M llvm/test/CodeGen/AMDGPU/finalizebundle.mir
    M llvm/test/CodeGen/AMDGPU/fix-crash-valu-hazard.ll
    M llvm/test/CodeGen/AMDGPU/fix-frame-ptr-reg-copy-livein.ll
    M llvm/test/CodeGen/AMDGPU/fix-frame-reg-in-custom-csr-spills.ll
    M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-fake16.mir
    M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-gfx12-fake16.mir
    M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-gfx12-true16.mir
    M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-true16.mir
    M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16.mir
    M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-nondeterminism.ll
    M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-phi-block-end-iterator-debugloc.ll
    M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-phi-regression-av-classes.ll
    M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-phi-regression-issue130646-issue130119.ll
    M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-phi-regression-issue130646.mir
    M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-readfirstlane-av-register-regression.ll
    M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-sgpr32-to-vgpr16.ll
    M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-vgpr16-to-spgr32.ll
    M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-wmma-scale-lo256.mir
    M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-wwm.ll
    M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-wwm.mir
    M llvm/test/CodeGen/AMDGPU/fix-wwm-vgpr-copy.ll
    M llvm/test/CodeGen/AMDGPU/flat-address-space.ll
    M llvm/test/CodeGen/AMDGPU/flat-atomic-fadd.f32.ll
    M llvm/test/CodeGen/AMDGPU/flat-atomic-fadd.f64.ll
    M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
    M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
    M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
    M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
    M llvm/test/CodeGen/AMDGPU/flat-error-unsupported-gpu-hsa.ll
    M llvm/test/CodeGen/AMDGPU/flat-for-global-subtarget-feature.ll
    M llvm/test/CodeGen/AMDGPU/flat-load-clustering.mir
    M llvm/test/CodeGen/AMDGPU/flat-load-saddr-to-vaddr.ll
    M llvm/test/CodeGen/AMDGPU/flat-offset-bug.ll
    M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
    M llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
    M llvm/test/CodeGen/AMDGPU/flat-saddr-store.ll
    M llvm/test/CodeGen/AMDGPU/flat-scratch-alloca-issue-155902.ll
    M llvm/test/CodeGen/AMDGPU/flat-scratch-fold-fi-gfx1250.mir
    M llvm/test/CodeGen/AMDGPU/flat-scratch-fold-fi.mir
    M llvm/test/CodeGen/AMDGPU/flat-scratch-i8-i16.ll
    M llvm/test/CodeGen/AMDGPU/flat-scratch-init.ll
    M llvm/test/CodeGen/AMDGPU/flat-scratch-reg.ll
    M llvm/test/CodeGen/AMDGPU/flat-scratch-svs.ll
    M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
    M llvm/test/CodeGen/AMDGPU/flat_atomics.ll
    M llvm/test/CodeGen/AMDGPU/flat_atomics_i32_system.ll
    M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
    M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_noprivate.ll
    M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll
    M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system_noprivate.ll
    M llvm/test/CodeGen/AMDGPU/float-sopc-vopc.ll
    M llvm/test/CodeGen/AMDGPU/float-to-arbitrary-fp.ll
    M llvm/test/CodeGen/AMDGPU/fma-combine.ll
    M llvm/test/CodeGen/AMDGPU/fma-mix.gfx11plus.ll
    M llvm/test/CodeGen/AMDGPU/fma.f16.gfx11plus.ll
    M llvm/test/CodeGen/AMDGPU/fma.f16.ll
    M llvm/test/CodeGen/AMDGPU/fma.f64.ll
    M llvm/test/CodeGen/AMDGPU/fma.ll
    M llvm/test/CodeGen/AMDGPU/fmac.sdwa.ll
    M llvm/test/CodeGen/AMDGPU/fmad-formation-fmul-distribute-denormal-mode.ll
    M llvm/test/CodeGen/AMDGPU/fmamk_fmaak-t16.mir
    M llvm/test/CodeGen/AMDGPU/fmax_legacy.f16.ll

  Log Message:
  -----------
  AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (12) (#208896)

Mechanically migrate the command-line target spelling on llc/opt RUN
lines in
llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded
subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)



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