[all-commits] [llvm/llvm-project] e3e156: AMDGPU: Migrate CodeGen tests to amdgpu subarch tr...

Matt Arsenault via All-commits all-commits at lists.llvm.org
Mon Jul 13 02:12:22 PDT 2026 

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e3e15695a0e9b1acd3a4821cdeea353ce951f5da
      https://github.com/llvm/llvm-project/commit/e3e15695a0e9b1acd3a4821cdeea353ce951f5da
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2026-07-13 (Mon, 13 Jul 2026)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/dpp64_combine.ll
    M llvm/test/CodeGen/AMDGPU/dpp64_combine.mir
    M llvm/test/CodeGen/AMDGPU/dpp_combine.ll
    M llvm/test/CodeGen/AMDGPU/dpp_combine.mir
    M llvm/test/CodeGen/AMDGPU/drop-mem-operand-move-smrd.ll
    M llvm/test/CodeGen/AMDGPU/ds-alignment.ll
    M llvm/test/CodeGen/AMDGPU/ds-combine-large-stride.ll
    M llvm/test/CodeGen/AMDGPU/ds-combine-with-dependence.ll
    M llvm/test/CodeGen/AMDGPU/ds-negative-offset-addressing-mode-loop.ll
    M llvm/test/CodeGen/AMDGPU/ds-read2-write2-debug-info.ll
    M llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
    M llvm/test/CodeGen/AMDGPU/ds-vectorization-alignment.ll
    M llvm/test/CodeGen/AMDGPU/ds_gws_align.ll
    M llvm/test/CodeGen/AMDGPU/ds_permute_a_v.ll
    M llvm/test/CodeGen/AMDGPU/ds_read2-gfx1250.ll
    M llvm/test/CodeGen/AMDGPU/ds_read2.ll
    M llvm/test/CodeGen/AMDGPU/ds_read2_offset_order.ll
    M llvm/test/CodeGen/AMDGPU/ds_read2_superreg.ll
    M llvm/test/CodeGen/AMDGPU/ds_read2st64.ll
    M llvm/test/CodeGen/AMDGPU/ds_write2.ll
    M llvm/test/CodeGen/AMDGPU/ds_write2_a_v.ll
    M llvm/test/CodeGen/AMDGPU/ds_write2st64.ll
    M llvm/test/CodeGen/AMDGPU/dst-sel-hazard.mir
    M llvm/test/CodeGen/AMDGPU/dual-source-blend-export.ll
    M llvm/test/CodeGen/AMDGPU/dummy-regalloc-priority-advisor.mir
    M llvm/test/CodeGen/AMDGPU/dumpcode.ll
    M llvm/test/CodeGen/AMDGPU/duplicate-attribute-indirect.ll
    M llvm/test/CodeGen/AMDGPU/dvgpr-vgpr-count-propagation-direct-chain.ll
    M llvm/test/CodeGen/AMDGPU/dvgpr-vgpr-count-propagation-indirect.ll
    M llvm/test/CodeGen/AMDGPU/dvgpr-vgpr-count-propagation.ll
    M llvm/test/CodeGen/AMDGPU/dvgpr_sym.ll
    M llvm/test/CodeGen/AMDGPU/dvgpr_sym_fail_too_many_block_size_16.ll
    M llvm/test/CodeGen/AMDGPU/dvgpr_sym_fail_too_many_block_size_16_anon.ll
    M llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll
    M llvm/test/CodeGen/AMDGPU/dynamic-vgpr-reserve-stack-for-cwsr.ll
    M llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
    M llvm/test/CodeGen/AMDGPU/early-if-convert-cost.ll
    M llvm/test/CodeGen/AMDGPU/early-if-convert.ll
    M llvm/test/CodeGen/AMDGPU/early-inline-alias.ll
    M llvm/test/CodeGen/AMDGPU/early-inline.ll
    M llvm/test/CodeGen/AMDGPU/early-lis-two-address-partial-def.mir
    M llvm/test/CodeGen/AMDGPU/early-tailduplicator-nophis.mir
    M llvm/test/CodeGen/AMDGPU/early-tailduplicator-terminator.mir
    M llvm/test/CodeGen/AMDGPU/early-term.mir
    M llvm/test/CodeGen/AMDGPU/eh_frame.ll
    M llvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
    M llvm/test/CodeGen/AMDGPU/elf-header-flags-sramecc.ll
    M llvm/test/CodeGen/AMDGPU/elf-header-flags-xnack.ll
    M llvm/test/CodeGen/AMDGPU/elf-header-osabi.ll
    M llvm/test/CodeGen/AMDGPU/elf-note-null-terminator.ll
    M llvm/test/CodeGen/AMDGPU/elf.ll
    M llvm/test/CodeGen/AMDGPU/elf.metadata.ll
    M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-i32.mir
    M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-u32.mir
    M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-mov-b32.mir
    M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-scalar-bit-ops.mir
    M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-scalar-scc-clobber.mir
    M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-select.ll
    M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-select.mir
    M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32-wave32.mir
    M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir
    M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-u32.mir
    M llvm/test/CodeGen/AMDGPU/else.ll
    M llvm/test/CodeGen/AMDGPU/emit-high-vgprs.mir
    M llvm/test/CodeGen/AMDGPU/empty-function.ll
    M llvm/test/CodeGen/AMDGPU/empty-text.ll
    M llvm/test/CodeGen/AMDGPU/enable-scratch-only-dynamic-stack.ll
    M llvm/test/CodeGen/AMDGPU/entry-function-cfi.mir
    M llvm/test/CodeGen/AMDGPU/exec-mask-opt-cannot-create-empty-or-backward-segment.ll
    M llvm/test/CodeGen/AMDGPU/expand-atomicrmw-syncscope.ll
    M llvm/test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll
    M llvm/test/CodeGen/AMDGPU/expand-si-indirect.mir
    M llvm/test/CodeGen/AMDGPU/expand-waitcnt-profiling-no-outstanding.ll
    M llvm/test/CodeGen/AMDGPU/expand-waitcnt-profiling.ll
    M llvm/test/CodeGen/AMDGPU/expert_scheduling_gfx12.mir
    M llvm/test/CodeGen/AMDGPU/expert_scheduling_gfx1250.mir
    M llvm/test/CodeGen/AMDGPU/export-cluster-postra.mir
    M llvm/test/CodeGen/AMDGPU/extend-bit-ops-i16.ll
    M llvm/test/CodeGen/AMDGPU/extend-phi-subrange-not-in-parent.mir
    M llvm/test/CodeGen/AMDGPU/extend-wwm-virt-reg-liveness.mir
    M llvm/test/CodeGen/AMDGPU/extload-private.ll
    M llvm/test/CodeGen/AMDGPU/extload.ll
    M llvm/test/CodeGen/AMDGPU/extra-lds-size.ll
    M llvm/test/CodeGen/AMDGPU/extra-sroa-after-unroll.ll
    M llvm/test/CodeGen/AMDGPU/extract-i8-codegen.ll
    M llvm/test/CodeGen/AMDGPU/extract-lowbits.ll
    M llvm/test/CodeGen/AMDGPU/extract-subvector-16bit.ll
    M llvm/test/CodeGen/AMDGPU/extract-vector-elt-binop-build-vector.ll
    M llvm/test/CodeGen/AMDGPU/extract_subvector_vec4_vec3.ll
    M llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
    M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
    M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f64.ll
    M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i16.ll
    M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i64.ll
    M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i8.ll
    M llvm/test/CodeGen/AMDGPU/fabs-known-signbit-combine-fast-fdiv-lowering.ll
    M llvm/test/CodeGen/AMDGPU/fabs.bf16.ll
    M llvm/test/CodeGen/AMDGPU/fabs.f16.ll
    M llvm/test/CodeGen/AMDGPU/fabs.ll

  Log Message:
  -----------
  AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (11) (#208895)

Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)



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