[all-commits] [llvm/llvm-project] 6e42e2: AMDGPU: Migrate CodeGen tests to amdgpu subarch tr...

Mon Jul 13 01:52:38 PDT 2026

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 6e42e25efa9856d360fb38ef3a6e7a7c3334dd33
      https://github.com/llvm/llvm-project/commit/6e42e25efa9856d360fb38ef3a6e7a7c3334dd33
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2026-07-13 (Mon, 13 Jul 2026)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/combine-ftrunc.ll
    M llvm/test/CodeGen/AMDGPU/combine-vload-extract.ll
    M llvm/test/CodeGen/AMDGPU/commute-compares-scalar-float.ll
    M llvm/test/CodeGen/AMDGPU/commute-frame-index-operand.mir
    M llvm/test/CodeGen/AMDGPU/commute-op-sel.mir
    M llvm/test/CodeGen/AMDGPU/commute-shifts.ll
    M llvm/test/CodeGen/AMDGPU/commute-vop3.mir
    M llvm/test/CodeGen/AMDGPU/compute-known-bits-nofpclass.ll
    M llvm/test/CodeGen/AMDGPU/computeKnownBits-scalar-to-vector-crash.ll
    M llvm/test/CodeGen/AMDGPU/computeNumSignBits-mul.ll
    M llvm/test/CodeGen/AMDGPU/concat_vectors.ll
    M llvm/test/CodeGen/AMDGPU/consecutive-loads-in-branch.ll
    M llvm/test/CodeGen/AMDGPU/constant-address-space-32bit.ll
    M llvm/test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir
    M llvm/test/CodeGen/AMDGPU/constant-fold-mi-operands.ll
    M llvm/test/CodeGen/AMDGPU/constrained-shift.ll
    M llvm/test/CodeGen/AMDGPU/convergence-laneops.ll
    M llvm/test/CodeGen/AMDGPU/convergence-tokens.ll
    M llvm/test/CodeGen/AMDGPU/copy-hoist-no-spills.ll
    M llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll
    M llvm/test/CodeGen/AMDGPU/copy-overlap-sgpr-kill.mir
    M llvm/test/CodeGen/AMDGPU/copy-overlap-vgpr-kill.mir
    M llvm/test/CodeGen/AMDGPU/copy-phys-reg-implicit-operand-kills-subregs.mir
    M llvm/test/CodeGen/AMDGPU/copy-to-reg-frameindex.ll
    M llvm/test/CodeGen/AMDGPU/copy-to-reg-scc-clobber.ll
    M llvm/test/CodeGen/AMDGPU/copy-to-reg.ll
    M llvm/test/CodeGen/AMDGPU/copy-vgpr-clobber-spill-vgpr.mir
    M llvm/test/CodeGen/AMDGPU/copy_phys_vgpr64.mir
    M llvm/test/CodeGen/AMDGPU/copy_to_scc.ll
    M llvm/test/CodeGen/AMDGPU/copysign-simplify-demanded-bits.ll
    M llvm/test/CodeGen/AMDGPU/copysign-to-disjoint-or-combine.ll
    M llvm/test/CodeGen/AMDGPU/couldnt-join-subrange-3.mir
    M llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
    M llvm/test/CodeGen/AMDGPU/cse-convergent.ll
    M llvm/test/CodeGen/AMDGPU/cse-phi-incoming-val.ll
    M llvm/test/CodeGen/AMDGPU/csr-gfx10.ll
    M llvm/test/CodeGen/AMDGPU/csr-sgpr-spill-live-ins.mir
    M llvm/test/CodeGen/AMDGPU/ctls.ll
    M llvm/test/CodeGen/AMDGPU/ctlz.ll
    M llvm/test/CodeGen/AMDGPU/ctlz_zero_poison.ll
    M llvm/test/CodeGen/AMDGPU/ctpop.ll
    M llvm/test/CodeGen/AMDGPU/ctpop16.ll
    M llvm/test/CodeGen/AMDGPU/ctpop64.ll
    M llvm/test/CodeGen/AMDGPU/cttz.ll
    M llvm/test/CodeGen/AMDGPU/cttz_zero_poison.ll
    M llvm/test/CodeGen/AMDGPU/cube.ll
    M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
    M llvm/test/CodeGen/AMDGPU/cvt_flr_i32_f32.ll
    M llvm/test/CodeGen/AMDGPU/cvt_rpi_i32_f32.ll
    M llvm/test/CodeGen/AMDGPU/d16-write-vgpr32.ll
    M llvm/test/CodeGen/AMDGPU/dag-divergence-atomic.ll
    M llvm/test/CodeGen/AMDGPU/dag-divergence.ll
    M llvm/test/CodeGen/AMDGPU/dag-preserve-disjoint-flag.ll
    M llvm/test/CodeGen/AMDGPU/dagcomb-extract-vec-elt-different-sizes.ll
    M llvm/test/CodeGen/AMDGPU/dagcomb-mullohi.ll
    M llvm/test/CodeGen/AMDGPU/dagcombine-fma-crash.ll
    M llvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll
    M llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
    M llvm/test/CodeGen/AMDGPU/dagcombine-reassociate-multi-memop.ll
    M llvm/test/CodeGen/AMDGPU/dagcombine-select.ll
    M llvm/test/CodeGen/AMDGPU/dagcombine-setcc-select.ll
    M llvm/test/CodeGen/AMDGPU/dagcombine-v1i8-extractvecelt-crash.ll
    M llvm/test/CodeGen/AMDGPU/dbg-info-inline-at.ll
    M llvm/test/CodeGen/AMDGPU/dbg-value-ends-sched-region.mir
    M llvm/test/CodeGen/AMDGPU/dbg-value-starts-sched-region.mir
    M llvm/test/CodeGen/AMDGPU/dead-frame-index-dbg-value.ll
    M llvm/test/CodeGen/AMDGPU/dead-lane.mir
    M llvm/test/CodeGen/AMDGPU/dead-machine-elim-after-dead-lane.ll
    M llvm/test/CodeGen/AMDGPU/dead_bundle.mir
    M llvm/test/CodeGen/AMDGPU/dead_copy.mir
    M llvm/test/CodeGen/AMDGPU/debug-frame.ll
    M llvm/test/CodeGen/AMDGPU/debug-independence-dead-mi-elimination.mir
    M llvm/test/CodeGen/AMDGPU/debug-independence-exec-masking.mir
    M llvm/test/CodeGen/AMDGPU/debug-value-scheduler-crash.mir
    M llvm/test/CodeGen/AMDGPU/debug-value-scheduler-liveins.mir
    M llvm/test/CodeGen/AMDGPU/debug-value-scheduler.mir
    M llvm/test/CodeGen/AMDGPU/debug.ll
    M llvm/test/CodeGen/AMDGPU/default-flat-work-group-size-overrides-waves-per-eu.ll
    M llvm/test/CodeGen/AMDGPU/direct-indirect-call.ll
    M llvm/test/CodeGen/AMDGPU/disable_form_clauses.ll
    M llvm/test/CodeGen/AMDGPU/div-rem-by-constant-64.ll
    M llvm/test/CodeGen/AMDGPU/div-rem-fast-path.ll
    M llvm/test/CodeGen/AMDGPU/div_i128.ll
    M llvm/test/CodeGen/AMDGPU/diverge-extra-formal-args.ll
    M llvm/test/CodeGen/AMDGPU/diverge-interp-mov-lower.ll
    M llvm/test/CodeGen/AMDGPU/diverge-switch-default.ll
    M llvm/test/CodeGen/AMDGPU/divergence-at-use.ll
    M llvm/test/CodeGen/AMDGPU/divergence-driven-abs.ll
    M llvm/test/CodeGen/AMDGPU/divergence-driven-buildvector.ll
    M llvm/test/CodeGen/AMDGPU/divergence-driven-negsubinlineconst.ll
    M llvm/test/CodeGen/AMDGPU/divergence-driven-xnor.ll
    M llvm/test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll
    M llvm/test/CodeGen/AMDGPU/divrem24-assume.ll
    M llvm/test/CodeGen/AMDGPU/do-not-fold-copy.mir
    M llvm/test/CodeGen/AMDGPU/dpp_combine-true16.mir
    M llvm/test/CodeGen/AMDGPU/dpp_combine_gfx11.mir
    M llvm/test/CodeGen/AMDGPU/dpp_combine_gfx1250.mir

  Log Message:
  -----------
  AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (10) (#208894)

Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)

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