[all-commits] [llvm/llvm-project] 48aade: [libc++][NFC] Fix comment about size-based vector ...

[Alexey Bataev via All-commits]

  Branch: refs/heads/users/alexey-bataev/spr/slp-support-faddfsub-as-interchangeable-instructions
  Home:   https://github.com/llvm/llvm-project
  Commit: 48aade5e5208414693b695b1dfdb6c95ae56ccf6
      https://github.com/llvm/llvm-project/commit/48aade5e5208414693b695b1dfdb6c95ae56ccf6
  Author: Louis Dionne <ldionne.2 at gmail.com>
  Date:   2026-07-09 (Thu, 09 Jul 2026)

  Changed paths:
    M libcxx/include/__vector/layout.h

  Log Message:
  -----------
  [libc++][NFC] Fix comment about size-based vector (#208463)

The closing #endif comment was using _LIBCPP_ABI_SIZE_BASED_VECTOR,
which was the name of the macro in previous iterations of the size-based
vector patch. We ended up landing on _LIBCPP_ABI_VECTOR_LAYOUT_SIZE_BASED
instead.


  Commit: c09d9a4d03a9211844e146b03ec41f957c74c4b7
      https://github.com/llvm/llvm-project/commit/c09d9a4d03a9211844e146b03ec41f957c74c4b7
  Author: John Brawn <john.brawn at arm.com>
  Date:   2026-07-09 (Thu, 09 Jul 2026)

  Changed paths:
    M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
    M llvm/test/Transforms/LoopStrengthReduce/AArch64/vscale-fixups.ll

  Log Message:
  -----------
  [LSR] VScale doesn't occupy a register if it's a legal offset (#206754)

When we have an AddRec where the step value is n*vscale this value
doesn't occupy a register if the target has an add instruction where
this value is a legal offset.


  Commit: 883ef1ba1442618938961e8f8e3a6a74f3b7320a
      https://github.com/llvm/llvm-project/commit/883ef1ba1442618938961e8f8e3a6a74f3b7320a
  Author: eleviant <eleviant at accesssoftek.com>
  Date:   2026-07-09 (Thu, 09 Jul 2026)

  Changed paths:
    M clang/docs/ReleaseNotes.md
    M clang/include/clang/Options/Options.td
    A clang/test/CodeGen/null-checks.c

  Log Message:
  -----------
  [clang] Don't omit null pointer checks with -fms-compatibility (#204658)

MSVC preserves null check after dereference, e.g

```
struct Obj { int value, extra; };

int null_check_is_kept(Obj* p) {
    int v = p->value;
    if (p == nullptr)
        return -1;
    return v + p->extra;
}
```
Also MSVC keeps standard library calls (e.g memcpy), where target is
null pointer.


  Commit: 3c849236aef32acf5b974cf0f69005aad8b196c5
      https://github.com/llvm/llvm-project/commit/3c849236aef32acf5b974cf0f69005aad8b196c5
  Author: Ebuka Ezike <e_ezike at apple.com>
  Date:   2026-07-09 (Thu, 09 Jul 2026)

  Changed paths:
    M lldb/include/lldb/Symbol/TypeList.h
    M lldb/source/Symbol/TypeList.cpp

  Log Message:
  -----------
  [NFC][lldb] Simplify Typelist::GetTypeAtIndex (#208411)

Access the index value at constant time and use for range for the
`ForEach` functions.


  Commit: 178e9ce6ffe031466e0593aede0d5cdf8dd59ec5
      https://github.com/llvm/llvm-project/commit/178e9ce6ffe031466e0593aede0d5cdf8dd59ec5
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2026-07-09 (Thu, 09 Jul 2026)

  Changed paths:
    M llvm/test/CodeGen/X86/combine-pmaddwd.ll

  Log Message:
  -----------
  [X86] combine-pmaddwd.ll - add test showing poor codegen when trying to add together VPMADDWD pairs (#208457)

Shows current limitations of combineAddOfPMADDWD - only handles 128-bit
vectors, and the shuffle pattern it generates can be really poor on SSE
targets


  Commit: f63a08bcbf763e3ca33afd3ad9850be9b0eca8d3
      https://github.com/llvm/llvm-project/commit/f63a08bcbf763e3ca33afd3ad9850be9b0eca8d3
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2026-07-09 (Thu, 09 Jul 2026)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/vector-reduce-add-subvector.ll
    M llvm/test/CodeGen/X86/vector-reduce-add.ll

  Log Message:
  -----------
  [X86] SimplifyDemandedVectorEltsForTargetNode - add general X86ISD::PSADBW handling (#208309)

Extend the existing SimplifyMultipleUseDemandedVectorElts handling to
generic element folding as well.

lowerShuffleAsZeroOrAnyExtend requires an equivalent VZEXT_MOVL fold to
#207031 to stop us prematurely lowering to ZERO_EXTEND_VECTOR_INREG if
we only need the lowest element from a SCALAR_TO_VECTOR/LOAD


  Commit: 8ca25ee6e989545eb7732eec898b0f2f7fe20cde
      https://github.com/llvm/llvm-project/commit/8ca25ee6e989545eb7732eec898b0f2f7fe20cde
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2026-07-09 (Thu, 09 Jul 2026)

  Changed paths:
    M clang/docs/ReleaseNotes.md
    M clang/include/clang/Options/Options.td
    A clang/test/CodeGen/null-checks.c
    M libcxx/include/__vector/layout.h
    M lldb/include/lldb/Symbol/TypeList.h
    M lldb/source/Symbol/TypeList.cpp
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    M llvm/test/CodeGen/X86/combine-pmaddwd.ll
    M llvm/test/CodeGen/X86/vector-reduce-add-subvector.ll
    M llvm/test/CodeGen/X86/vector-reduce-add.ll
    M llvm/test/Transforms/LoopStrengthReduce/AArch64/vscale-fixups.ll

  Log Message:
  -----------
  Rebase, address comments

Created using spr 1.3.7


Compare: https://github.com/llvm/llvm-project/compare/34149b085c63...8ca25ee6e989

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