[all-commits] [llvm/llvm-project] 2b4e89: [X86] combineConcatVectorOps - concat(permi(x, imm0...

Simon Pilgrim via All-commits all-commits at lists.llvm.org
Fri Jun 12 05:13:50 PDT 2026


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2b4e89bc254dab3f18b59cd275519d256267b88e
      https://github.com/llvm/llvm-project/commit/2b4e89bc254dab3f18b59cd275519d256267b88e
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2026-06-12 (Fri, 12 Jun 2026)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-5.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-5.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
    M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512f.ll

  Log Message:
  -----------
  [X86] combineConcatVectorOps - concat(permi(x,imm0),permi(y,imm1)) -> vpermv3(widen(x),m,widen(y)) (#203508)

Add handling for X86ISD::VPERMI nodes with different immediates -
folding to a X86ISD::VPERMV3 instead, replacing a
INSERT_SUBVECTOR+2xPERMI nodes with a mask load

We don't need to concat the source operands - we have other folds that
will do this if beneficial - we just rely on (free) implicit widening.



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