[all-commits] [llvm/llvm-project] 9f5317: [RISCV][P-ext] Support packed bswap/bitreverse. (#...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 9f531751bbba6b1493ef4c73c6c97f0adb029976
      https://github.com/llvm/llvm-project/commit/9f531751bbba6b1493ef4c73c6c97f0adb029976
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2026-06-04 (Thu, 04 Jun 2026)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
    M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
    M llvm/test/CodeGen/RISCV/rvp-simd-64.ll

  Log Message:
  -----------
  [RISCV][P-ext] Support packed bswap/bitreverse. (#200448)

We can implement these using combinations of rev, rev8, and ppairoe.*.

Rename REV16->REV16_RV64. A hypothetical REV16 on RV32 would have a
different encoding like REV and REV8.

Long term we should probably custom lower these instead of having
complex isel patterns. That would allow additional optimizations. But I
think the isel patterns are fine as a starting point.



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