[all-commits] [llvm/llvm-project] d83aba: [AMDGPU][InstCombine] Match ds_swizzle rotate mode...

[Barbara Mitic via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d83abac82bd290e16a38ab79f6207f0bc3a07b3c
      https://github.com/llvm/llvm-project/commit/d83abac82bd290e16a38ab79f6207f0bc3a07b3c
  Author: Barbara Mitic <bmitic at amd.com>
  Date:   2026-06-04 (Thu, 04 Jun 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
    M llvm/lib/Target/AMDGPU/GCNSubtarget.h
    M llvm/test/Transforms/InstCombine/AMDGPU/wave-shuffle-patterns.ll

  Log Message:
  -----------
  [AMDGPU][InstCombine] Match ds_swizzle rotate mode for cyclic lane shuffles (#199004)

Follow-up to 17cc4f77109d [AMDGPU][InstCombine] Optimize constant
shuffle patterns (#192246).

Adds matchDsSwizzleRotatePattern to recognise shuffles of the form
dst_lane = (src_lane + N) % 32 (N in [1, 31]) and lower them to a single
ds_swizzle with rotate-mode encoding (ROTATE_MODE_ENC | N << 5),
available on GFX9+. The bitmask mode cannot express such rotations since
the carry between bit positions makes the per-bit mapping
non-independent. On wave64 the pattern is accepted only when
hasPeriodicLayout<32> confirms both 32-lane groups rotate by the same
amount. Wave32-only ID forms (mbcnt.lo alone) are correctly rejected on
wave64 targets.

Co-authored-by: Barbara Mitic <Barbara.Mitic at amd.com>



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