[all-commits] [llvm/llvm-project] 5f517d: [MLIR][XeGPU] Extend op definitions to support ...

[Jianhui Li via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5f517ddd3e7c29ac51ea88a33e500455deee03a1
      https://github.com/llvm/llvm-project/commit/5f517ddd3e7c29ac51ea88a33e500455deee03a1
  Author: Jianhui Li <jian.hui.li at intel.com>
  Date:   2026-06-03 (Wed, 03 Jun 2026)

  Changed paths:
    M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
    M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
    M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
    M mlir/test/Dialect/XeGPU/invalid.mlir
    M mlir/test/Dialect/XeGPU/ops.mlir

  Log Message:
  -----------
  [MLIR][XeGPU] Extend op definitions to support    3D+: dpas, dpas_mx (#199809)

**Summary**

Extend xegpu.dpas and xegpu.dpas_mx operations to support 3D and 4D
operands with batch dimensions, enabling batched matrix multiplication
workloads like [4, 128, 512] x [4, 512, 128] -> [4, 128, 128].

  **Changes**

- Type definitions: Extended XeGPU_DpasOprType and XeGPU_DpasResType to
support rank 3-4 (previously 1-3 and 1-2)
- Op definitions: Extended dpas_mx scale operands to support rank 3-4
vectors
- Verifiers: Updated verifyDpasDimensions() to validate batch dimensions
across A, B, and result operands; updated DpasMxOp::verify() for
batch-aware scale dimension checks
- Documentation: Added comprehensive documentation explaining batch
dimensions, microarchitecture-specific matrix sizes, and 3D/4D usage
examples
  - Tests: Added unit tests for 3D batched dpas and dpas_mx operations
  
  Assisted-by-Claude

---------

Co-authored-by: Claude Sonnet 4.5 <noreply at anthropic.com>



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